atiixp.c revision 173329
1/*- 2 * Copyright (c) 2005 Ariff Abdullah <ariff@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27/* 28 * FreeBSD pcm driver for ATI IXP 150/200/250/300 AC97 controllers 29 * 30 * Features 31 * * 16bit playback / recording 32 * * 32bit native playback - yay! 33 * * 32bit native recording (seems broken on few hardwares) 34 * 35 * Issues / TODO: 36 * * SPDIF 37 * * Support for more than 2 channels. 38 * * VRA ? VRM ? DRA ? 39 * * 32bit native recording seems broken on few hardwares, most 40 * probably because of incomplete VRA/DRA cleanup. 41 * 42 * 43 * Thanks goes to: 44 * 45 * Shaharil @ SCAN Associates whom relentlessly providing me the 46 * mind blowing Acer Ferrari 4002 WLMi with this ATI IXP hardware. 47 * 48 * Reinoud Zandijk <reinoud@NetBSD.org> (auixp), which this driver is 49 * largely based upon although large part of it has been reworked. His 50 * driver is the primary reference and pretty much well documented. 51 * 52 * Takashi Iwai (ALSA snd-atiixp), for register definitions and some 53 * random ninja hackery. 54 */ 55 56#include <dev/sound/pcm/sound.h> 57#include <dev/sound/pcm/ac97.h> 58 59#include <dev/pci/pcireg.h> 60#include <dev/pci/pcivar.h> 61#include <sys/sysctl.h> 62#include <sys/endian.h> 63 64#include <dev/sound/pci/atiixp.h> 65 66SND_DECLARE_FILE("$FreeBSD: head/sys/dev/sound/pci/atiixp.c 173329 2007-11-04 16:03:10Z ariff $"); 67 68#define ATI_IXP_DMA_RETRY_MAX 100 69 70#define ATI_IXP_BUFSZ_MIN 4096 71#define ATI_IXP_BUFSZ_MAX 65536 72#define ATI_IXP_BUFSZ_DEFAULT 16384 73 74#define ATI_IXP_BLK_MIN 32 75#define ATI_IXP_BLK_ALIGN (~(ATI_IXP_BLK_MIN - 1)) 76 77#define ATI_IXP_CHN_RUNNING 0x00000001 78#define ATI_IXP_CHN_SUSPEND 0x00000002 79 80struct atiixp_dma_op { 81 volatile uint32_t addr; 82 volatile uint16_t status; 83 volatile uint16_t size; 84 volatile uint32_t next; 85}; 86 87struct atiixp_info; 88 89struct atiixp_chinfo { 90 struct snd_dbuf *buffer; 91 struct pcm_channel *channel; 92 struct atiixp_info *parent; 93 struct atiixp_dma_op *sgd_table; 94 bus_addr_t sgd_addr; 95 uint32_t enable_bit, flush_bit, linkptr_bit, dt_cur_bit; 96 uint32_t blksz, blkcnt; 97 uint32_t ptr, prevptr; 98 uint32_t fmt; 99 uint32_t flags; 100 int caps_32bit, dir; 101}; 102 103struct atiixp_info { 104 device_t dev; 105 106 bus_space_tag_t st; 107 bus_space_handle_t sh; 108 bus_dma_tag_t parent_dmat; 109 bus_dma_tag_t sgd_dmat; 110 bus_dmamap_t sgd_dmamap; 111 bus_addr_t sgd_addr; 112 113 struct resource *reg, *irq; 114 int regtype, regid, irqid; 115 void *ih; 116 struct ac97_info *codec; 117 118 struct atiixp_chinfo pch; 119 struct atiixp_chinfo rch; 120 struct atiixp_dma_op *sgd_table; 121 struct intr_config_hook delayed_attach; 122 123 uint32_t bufsz; 124 uint32_t codec_not_ready_bits, codec_idx, codec_found; 125 uint32_t blkcnt; 126 int registered_channels; 127 128 struct mtx *lock; 129 struct callout poll_timer; 130 int poll_ticks, polling; 131}; 132 133#define atiixp_rd(_sc, _reg) \ 134 bus_space_read_4((_sc)->st, (_sc)->sh, _reg) 135#define atiixp_wr(_sc, _reg, _val) \ 136 bus_space_write_4((_sc)->st, (_sc)->sh, _reg, _val) 137 138#define atiixp_lock(_sc) snd_mtxlock((_sc)->lock) 139#define atiixp_unlock(_sc) snd_mtxunlock((_sc)->lock) 140#define atiixp_assert(_sc) snd_mtxassert((_sc)->lock) 141 142static uint32_t atiixp_fmt_32bit[] = { 143 AFMT_STEREO | AFMT_S16_LE, 144 AFMT_STEREO | AFMT_S32_LE, 145 0 146}; 147 148static uint32_t atiixp_fmt[] = { 149 AFMT_STEREO | AFMT_S16_LE, 150 0 151}; 152 153static struct pcmchan_caps atiixp_caps_32bit = { 154 ATI_IXP_BASE_RATE, 155 ATI_IXP_BASE_RATE, 156 atiixp_fmt_32bit, 0 157}; 158 159static struct pcmchan_caps atiixp_caps = { 160 ATI_IXP_BASE_RATE, 161 ATI_IXP_BASE_RATE, 162 atiixp_fmt, 0 163}; 164 165static const struct { 166 uint16_t vendor; 167 uint16_t devid; 168 char *desc; 169} atiixp_hw[] = { 170 { ATI_VENDOR_ID, ATI_IXP_200_ID, "ATI IXP 200" }, 171 { ATI_VENDOR_ID, ATI_IXP_300_ID, "ATI IXP 300" }, 172 { ATI_VENDOR_ID, ATI_IXP_400_ID, "ATI IXP 400" }, 173 { ATI_VENDOR_ID, ATI_IXP_SB600_ID, "ATI IXP SB600" }, 174}; 175 176static void atiixp_enable_interrupts(struct atiixp_info *); 177static void atiixp_disable_interrupts(struct atiixp_info *); 178static void atiixp_reset_aclink(struct atiixp_info *); 179static void atiixp_flush_dma(struct atiixp_chinfo *); 180static void atiixp_enable_dma(struct atiixp_chinfo *); 181static void atiixp_disable_dma(struct atiixp_chinfo *); 182 183static int atiixp_waitready_codec(struct atiixp_info *); 184static int atiixp_rdcd(kobj_t, void *, int); 185static int atiixp_wrcd(kobj_t, void *, int, uint32_t); 186 187static void *atiixp_chan_init(kobj_t, void *, struct snd_dbuf *, 188 struct pcm_channel *, int); 189static int atiixp_chan_setformat(kobj_t, void *, uint32_t); 190static int atiixp_chan_setspeed(kobj_t, void *, uint32_t); 191static int atiixp_chan_setfragments(kobj_t, void *, uint32_t, uint32_t); 192static int atiixp_chan_setblocksize(kobj_t, void *, uint32_t); 193static void atiixp_buildsgdt(struct atiixp_chinfo *); 194static int atiixp_chan_trigger(kobj_t, void *, int); 195static __inline uint32_t atiixp_dmapos(struct atiixp_chinfo *); 196static int atiixp_chan_getptr(kobj_t, void *); 197static struct pcmchan_caps *atiixp_chan_getcaps(kobj_t, void *); 198 199static void atiixp_intr(void *); 200static void atiixp_dma_cb(void *, bus_dma_segment_t *, int, int); 201static void atiixp_chip_pre_init(struct atiixp_info *); 202static void atiixp_chip_post_init(void *); 203static void atiixp_release_resource(struct atiixp_info *); 204static int atiixp_pci_probe(device_t); 205static int atiixp_pci_attach(device_t); 206static int atiixp_pci_detach(device_t); 207static int atiixp_pci_suspend(device_t); 208static int atiixp_pci_resume(device_t); 209 210/* 211 * ATI IXP helper functions 212 */ 213static void 214atiixp_enable_interrupts(struct atiixp_info *sc) 215{ 216 uint32_t value; 217 218 /* clear all pending */ 219 atiixp_wr(sc, ATI_REG_ISR, 0xffffffff); 220 221 /* enable all relevant interrupt sources we can handle */ 222 value = atiixp_rd(sc, ATI_REG_IER); 223 224 value |= ATI_REG_IER_IO_STATUS_EN; 225 226 /* 227 * Disable / ignore internal xrun/spdf interrupt flags 228 * since it doesn't interest us (for now). 229 */ 230#if 1 231 value &= ~(ATI_REG_IER_IN_XRUN_EN | ATI_REG_IER_OUT_XRUN_EN | 232 ATI_REG_IER_SPDF_XRUN_EN | ATI_REG_IER_SPDF_STATUS_EN); 233#else 234 value |= ATI_REG_IER_IN_XRUN_EN; 235 value |= ATI_REG_IER_OUT_XRUN_EN; 236 237 value |= ATI_REG_IER_SPDF_XRUN_EN; 238 value |= ATI_REG_IER_SPDF_STATUS_EN; 239#endif 240 241 atiixp_wr(sc, ATI_REG_IER, value); 242} 243 244static void 245atiixp_disable_interrupts(struct atiixp_info *sc) 246{ 247 /* disable all interrupt sources */ 248 atiixp_wr(sc, ATI_REG_IER, 0); 249 250 /* clear all pending */ 251 atiixp_wr(sc, ATI_REG_ISR, 0xffffffff); 252} 253 254static void 255atiixp_reset_aclink(struct atiixp_info *sc) 256{ 257 uint32_t value, timeout; 258 259 /* if power is down, power it up */ 260 value = atiixp_rd(sc, ATI_REG_CMD); 261 if (value & ATI_REG_CMD_POWERDOWN) { 262 /* explicitly enable power */ 263 value &= ~ATI_REG_CMD_POWERDOWN; 264 atiixp_wr(sc, ATI_REG_CMD, value); 265 266 /* have to wait at least 10 usec for it to initialise */ 267 DELAY(20); 268 } 269 270 /* perform a soft reset */ 271 value = atiixp_rd(sc, ATI_REG_CMD); 272 value |= ATI_REG_CMD_AC_SOFT_RESET; 273 atiixp_wr(sc, ATI_REG_CMD, value); 274 275 /* need to read the CMD reg and wait aprox. 10 usec to init */ 276 value = atiixp_rd(sc, ATI_REG_CMD); 277 DELAY(20); 278 279 /* clear soft reset flag again */ 280 value = atiixp_rd(sc, ATI_REG_CMD); 281 value &= ~ATI_REG_CMD_AC_SOFT_RESET; 282 atiixp_wr(sc, ATI_REG_CMD, value); 283 284 /* check if the ac-link is working; reset device otherwise */ 285 timeout = 10; 286 value = atiixp_rd(sc, ATI_REG_CMD); 287 while (!(value & ATI_REG_CMD_ACLINK_ACTIVE) && --timeout) { 288#if 0 289 device_printf(sc->dev, "not up; resetting aclink hardware\n"); 290#endif 291 292 /* dip aclink reset but keep the acsync */ 293 value &= ~ATI_REG_CMD_AC_RESET; 294 value |= ATI_REG_CMD_AC_SYNC; 295 atiixp_wr(sc, ATI_REG_CMD, value); 296 297 /* need to read CMD again and wait again (clocking in issue?) */ 298 value = atiixp_rd(sc, ATI_REG_CMD); 299 DELAY(20); 300 301 /* assert aclink reset again */ 302 value = atiixp_rd(sc, ATI_REG_CMD); 303 value |= ATI_REG_CMD_AC_RESET; 304 atiixp_wr(sc, ATI_REG_CMD, value); 305 306 /* check if its active now */ 307 value = atiixp_rd(sc, ATI_REG_CMD); 308 } 309 310 if (timeout == 0) 311 device_printf(sc->dev, "giving up aclink reset\n"); 312#if 0 313 if (timeout != 10) 314 device_printf(sc->dev, "aclink hardware reset successful\n"); 315#endif 316 317 /* assert reset and sync for safety */ 318 value = atiixp_rd(sc, ATI_REG_CMD); 319 value |= ATI_REG_CMD_AC_SYNC | ATI_REG_CMD_AC_RESET; 320 atiixp_wr(sc, ATI_REG_CMD, value); 321} 322 323static void 324atiixp_flush_dma(struct atiixp_chinfo *ch) 325{ 326 atiixp_wr(ch->parent, ATI_REG_FIFO_FLUSH, ch->flush_bit); 327} 328 329static void 330atiixp_enable_dma(struct atiixp_chinfo *ch) 331{ 332 uint32_t value; 333 334 value = atiixp_rd(ch->parent, ATI_REG_CMD); 335 if (!(value & ch->enable_bit)) { 336 value |= ch->enable_bit; 337 atiixp_wr(ch->parent, ATI_REG_CMD, value); 338 } 339} 340 341static void 342atiixp_disable_dma(struct atiixp_chinfo *ch) 343{ 344 uint32_t value; 345 346 value = atiixp_rd(ch->parent, ATI_REG_CMD); 347 if (value & ch->enable_bit) { 348 value &= ~ch->enable_bit; 349 atiixp_wr(ch->parent, ATI_REG_CMD, value); 350 } 351} 352 353/* 354 * AC97 interface 355 */ 356static int 357atiixp_waitready_codec(struct atiixp_info *sc) 358{ 359 int timeout = 500; 360 361 do { 362 if ((atiixp_rd(sc, ATI_REG_PHYS_OUT_ADDR) & 363 ATI_REG_PHYS_OUT_ADDR_EN) == 0) 364 return (0); 365 DELAY(1); 366 } while (--timeout); 367 368 return (-1); 369} 370 371static int 372atiixp_rdcd(kobj_t obj, void *devinfo, int reg) 373{ 374 struct atiixp_info *sc = devinfo; 375 uint32_t data; 376 int timeout; 377 378 if (atiixp_waitready_codec(sc)) 379 return (-1); 380 381 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | 382 ATI_REG_PHYS_OUT_ADDR_EN | ATI_REG_PHYS_OUT_RW | sc->codec_idx; 383 384 atiixp_wr(sc, ATI_REG_PHYS_OUT_ADDR, data); 385 386 if (atiixp_waitready_codec(sc)) 387 return (-1); 388 389 timeout = 500; 390 do { 391 data = atiixp_rd(sc, ATI_REG_PHYS_IN_ADDR); 392 if (data & ATI_REG_PHYS_IN_READ_FLAG) 393 return (data >> ATI_REG_PHYS_IN_DATA_SHIFT); 394 DELAY(1); 395 } while (--timeout); 396 397 if (reg < 0x7c) 398 device_printf(sc->dev, "codec read timeout! (reg 0x%x)\n", reg); 399 400 return (-1); 401} 402 403static int 404atiixp_wrcd(kobj_t obj, void *devinfo, int reg, uint32_t data) 405{ 406 struct atiixp_info *sc = devinfo; 407 408 if (atiixp_waitready_codec(sc)) 409 return (-1); 410 411 data = (data << ATI_REG_PHYS_OUT_DATA_SHIFT) | 412 (((uint32_t)reg) << ATI_REG_PHYS_OUT_ADDR_SHIFT) | 413 ATI_REG_PHYS_OUT_ADDR_EN | sc->codec_idx; 414 415 atiixp_wr(sc, ATI_REG_PHYS_OUT_ADDR, data); 416 417 return (0); 418} 419 420static kobj_method_t atiixp_ac97_methods[] = { 421 KOBJMETHOD(ac97_read, atiixp_rdcd), 422 KOBJMETHOD(ac97_write, atiixp_wrcd), 423 { 0, 0 } 424}; 425AC97_DECLARE(atiixp_ac97); 426 427/* 428 * Playback / Record channel interface 429 */ 430static void * 431atiixp_chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, 432 struct pcm_channel *c, int dir) 433{ 434 struct atiixp_info *sc = devinfo; 435 struct atiixp_chinfo *ch; 436 int num; 437 438 atiixp_lock(sc); 439 440 if (dir == PCMDIR_PLAY) { 441 ch = &sc->pch; 442 ch->linkptr_bit = ATI_REG_OUT_DMA_LINKPTR; 443 ch->enable_bit = ATI_REG_CMD_OUT_DMA_EN | ATI_REG_CMD_SEND_EN; 444 ch->flush_bit = ATI_REG_FIFO_OUT_FLUSH; 445 ch->dt_cur_bit = ATI_REG_OUT_DMA_DT_CUR; 446 /* Native 32bit playback working properly */ 447 ch->caps_32bit = 1; 448 } else { 449 ch = &sc->rch; 450 ch->linkptr_bit = ATI_REG_IN_DMA_LINKPTR; 451 ch->enable_bit = ATI_REG_CMD_IN_DMA_EN | ATI_REG_CMD_RECEIVE_EN; 452 ch->flush_bit = ATI_REG_FIFO_IN_FLUSH; 453 ch->dt_cur_bit = ATI_REG_IN_DMA_DT_CUR; 454 /* XXX Native 32bit recording appear to be broken */ 455 ch->caps_32bit = 1; 456 } 457 458 ch->buffer = b; 459 ch->parent = sc; 460 ch->channel = c; 461 ch->dir = dir; 462 ch->blkcnt = sc->blkcnt; 463 ch->blksz = sc->bufsz / ch->blkcnt; 464 465 atiixp_unlock(sc); 466 467 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, 0, sc->bufsz) == -1) 468 return (NULL); 469 470 atiixp_lock(sc); 471 num = sc->registered_channels++; 472 ch->sgd_table = &sc->sgd_table[num * ATI_IXP_DMA_CHSEGS_MAX]; 473 ch->sgd_addr = sc->sgd_addr + (num * ATI_IXP_DMA_CHSEGS_MAX * 474 sizeof(struct atiixp_dma_op)); 475 atiixp_disable_dma(ch); 476 atiixp_unlock(sc); 477 478 return (ch); 479} 480 481static int 482atiixp_chan_setformat(kobj_t obj, void *data, uint32_t format) 483{ 484 struct atiixp_chinfo *ch = data; 485 struct atiixp_info *sc = ch->parent; 486 uint32_t value; 487 488 atiixp_lock(sc); 489 if (ch->dir == PCMDIR_REC) { 490 value = atiixp_rd(sc, ATI_REG_CMD); 491 value &= ~ATI_REG_CMD_INTERLEAVE_IN; 492 if ((format & AFMT_32BIT) == 0) 493 value |= ATI_REG_CMD_INTERLEAVE_IN; 494 atiixp_wr(sc, ATI_REG_CMD, value); 495 } else { 496 value = atiixp_rd(sc, ATI_REG_OUT_DMA_SLOT); 497 value &= ~ATI_REG_OUT_DMA_SLOT_MASK; 498 /* We do not have support for more than 2 channels, _yet_. */ 499 value |= ATI_REG_OUT_DMA_SLOT_BIT(3) | 500 ATI_REG_OUT_DMA_SLOT_BIT(4); 501 value |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT; 502 atiixp_wr(sc, ATI_REG_OUT_DMA_SLOT, value); 503 value = atiixp_rd(sc, ATI_REG_CMD); 504 value &= ~ATI_REG_CMD_INTERLEAVE_OUT; 505 if ((format & AFMT_32BIT) == 0) 506 value |= ATI_REG_CMD_INTERLEAVE_OUT; 507 atiixp_wr(sc, ATI_REG_CMD, value); 508 value = atiixp_rd(sc, ATI_REG_6CH_REORDER); 509 value &= ~ATI_REG_6CH_REORDER_EN; 510 atiixp_wr(sc, ATI_REG_6CH_REORDER, value); 511 } 512 ch->fmt = format; 513 atiixp_unlock(sc); 514 515 return (0); 516} 517 518static int 519atiixp_chan_setspeed(kobj_t obj, void *data, uint32_t spd) 520{ 521 /* XXX We're supposed to do VRA/DRA processing right here */ 522 return (ATI_IXP_BASE_RATE); 523} 524 525static int 526atiixp_chan_setfragments(kobj_t obj, void *data, 527 uint32_t blksz, uint32_t blkcnt) 528{ 529 struct atiixp_chinfo *ch = data; 530 struct atiixp_info *sc = ch->parent; 531 532 blksz &= ATI_IXP_BLK_ALIGN; 533 534 if (blksz > (sndbuf_getmaxsize(ch->buffer) / ATI_IXP_DMA_CHSEGS_MIN)) 535 blksz = sndbuf_getmaxsize(ch->buffer) / ATI_IXP_DMA_CHSEGS_MIN; 536 if (blksz < ATI_IXP_BLK_MIN) 537 blksz = ATI_IXP_BLK_MIN; 538 if (blkcnt > ATI_IXP_DMA_CHSEGS_MAX) 539 blkcnt = ATI_IXP_DMA_CHSEGS_MAX; 540 if (blkcnt < ATI_IXP_DMA_CHSEGS_MIN) 541 blkcnt = ATI_IXP_DMA_CHSEGS_MIN; 542 543 while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->buffer)) { 544 if ((blkcnt >> 1) >= ATI_IXP_DMA_CHSEGS_MIN) 545 blkcnt >>= 1; 546 else if ((blksz >> 1) >= ATI_IXP_BLK_MIN) 547 blksz >>= 1; 548 else 549 break; 550 } 551 552 if ((sndbuf_getblksz(ch->buffer) != blksz || 553 sndbuf_getblkcnt(ch->buffer) != blkcnt) && 554 sndbuf_resize(ch->buffer, blkcnt, blksz) != 0) 555 device_printf(sc->dev, "%s: failed blksz=%u blkcnt=%u\n", 556 __func__, blksz, blkcnt); 557 558 ch->blksz = sndbuf_getblksz(ch->buffer); 559 ch->blkcnt = sndbuf_getblkcnt(ch->buffer); 560 561 return (1); 562} 563 564static int 565atiixp_chan_setblocksize(kobj_t obj, void *data, uint32_t blksz) 566{ 567 struct atiixp_chinfo *ch = data; 568 struct atiixp_info *sc = ch->parent; 569 570 atiixp_chan_setfragments(obj, data, blksz, sc->blkcnt); 571 572 return (ch->blksz); 573} 574 575static void 576atiixp_buildsgdt(struct atiixp_chinfo *ch) 577{ 578 struct atiixp_info *sc = ch->parent; 579 uint32_t addr, blksz, blkcnt; 580 int i; 581 582 addr = sndbuf_getbufaddr(ch->buffer); 583 584 if (sc->polling != 0) { 585 blksz = ch->blksz * ch->blkcnt; 586 blkcnt = 1; 587 } else { 588 blksz = ch->blksz; 589 blkcnt = ch->blkcnt; 590 } 591 592 for (i = 0; i < blkcnt; i++) { 593 ch->sgd_table[i].addr = htole32(addr + (i * blksz)); 594 ch->sgd_table[i].status = htole16(0); 595 ch->sgd_table[i].size = htole16(blksz >> 2); 596 ch->sgd_table[i].next = htole32((uint32_t)ch->sgd_addr + 597 (((i + 1) % blkcnt) * sizeof(struct atiixp_dma_op))); 598 } 599} 600 601static __inline uint32_t 602atiixp_dmapos(struct atiixp_chinfo *ch) 603{ 604 struct atiixp_info *sc = ch->parent; 605 uint32_t reg, addr, sz, retry; 606 volatile uint32_t ptr; 607 608 reg = ch->dt_cur_bit; 609 addr = sndbuf_getbufaddr(ch->buffer); 610 sz = ch->blkcnt * ch->blksz; 611 retry = ATI_IXP_DMA_RETRY_MAX; 612 613 do { 614 ptr = atiixp_rd(sc, reg); 615 if (ptr < addr) 616 continue; 617 ptr -= addr; 618 if (ptr < sz) { 619#if 0 620#ifdef ATI_IXP_DEBUG 621 if ((ptr & ~(ch->blksz - 1)) != ch->ptr) { 622 uint32_t delta; 623 624 delta = (sz + ptr - ch->prevptr) % sz; 625#ifndef ATI_IXP_DEBUG_VERBOSE 626 if (delta < ch->blksz) 627#endif 628 device_printf(sc->dev, 629 "PCMDIR_%s: incoherent DMA " 630 "prevptr=%u ptr=%u " 631 "ptr=%u blkcnt=%u " 632 "[delta=%u != blksz=%u] " 633 "(%s)\n", 634 (ch->dir == PCMDIR_PLAY) ? 635 "PLAY" : "REC", 636 ch->prevptr, ptr, 637 ch->ptr, ch->blkcnt, 638 delta, ch->blksz, 639 (delta < ch->blksz) ? 640 "OVERLAPPED!" : "Ok"); 641 ch->ptr = ptr & ~(ch->blksz - 1); 642 } 643 ch->prevptr = ptr; 644#endif 645#endif 646 return (ptr); 647 } 648 } while (--retry); 649 650 device_printf(sc->dev, "PCMDIR_%s: invalid DMA pointer ptr=%u\n", 651 (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", ptr); 652 653 return (0); 654} 655 656static __inline int 657atiixp_poll_channel(struct atiixp_chinfo *ch) 658{ 659 uint32_t sz, delta; 660 volatile uint32_t ptr; 661 662 if (!(ch->flags & ATI_IXP_CHN_RUNNING)) 663 return (0); 664 665 sz = ch->blksz * ch->blkcnt; 666 ptr = atiixp_dmapos(ch); 667 ch->ptr = ptr; 668 ptr %= sz; 669 ptr &= ~(ch->blksz - 1); 670 delta = (sz + ptr - ch->prevptr) % sz; 671 672 if (delta < ch->blksz) 673 return (0); 674 675 ch->prevptr = ptr; 676 677 return (1); 678} 679 680#define atiixp_chan_active(sc) (((sc)->pch.flags | (sc)->rch.flags) & \ 681 ATI_IXP_CHN_RUNNING) 682 683static void 684atiixp_poll_callback(void *arg) 685{ 686 struct atiixp_info *sc = arg; 687 uint32_t trigger = 0; 688 689 if (sc == NULL) 690 return; 691 692 atiixp_lock(sc); 693 if (sc->polling == 0 || atiixp_chan_active(sc) == 0) { 694 atiixp_unlock(sc); 695 return; 696 } 697 698 trigger |= (atiixp_poll_channel(&sc->pch) != 0) ? 1 : 0; 699 trigger |= (atiixp_poll_channel(&sc->rch) != 0) ? 2 : 0; 700 701 /* XXX */ 702 callout_reset(&sc->poll_timer, 1/*sc->poll_ticks*/, 703 atiixp_poll_callback, sc); 704 705 atiixp_unlock(sc); 706 707 if (trigger & 1) 708 chn_intr(sc->pch.channel); 709 if (trigger & 2) 710 chn_intr(sc->rch.channel); 711} 712 713static int 714atiixp_chan_trigger(kobj_t obj, void *data, int go) 715{ 716 struct atiixp_chinfo *ch = data; 717 struct atiixp_info *sc = ch->parent; 718 uint32_t value; 719 int pollticks; 720 721 if (!PCMTRIG_COMMON(go)) 722 return (0); 723 724 atiixp_lock(sc); 725 726 switch (go) { 727 case PCMTRIG_START: 728 atiixp_flush_dma(ch); 729 atiixp_buildsgdt(ch); 730 atiixp_wr(sc, ch->linkptr_bit, 0); 731 atiixp_enable_dma(ch); 732 atiixp_wr(sc, ch->linkptr_bit, 733 (uint32_t)ch->sgd_addr | ATI_REG_LINKPTR_EN); 734 if (sc->polling != 0) { 735 ch->ptr = 0; 736 ch->prevptr = 0; 737 pollticks = ((uint64_t)hz * ch->blksz) / 738 ((uint64_t)sndbuf_getbps(ch->buffer) * 739 sndbuf_getspd(ch->buffer)); 740 pollticks >>= 2; 741 if (pollticks > hz) 742 pollticks = hz; 743 if (pollticks < 1) 744 pollticks = 1; 745 if (atiixp_chan_active(sc) == 0 || 746 pollticks < sc->poll_ticks) { 747 if (bootverbose) { 748 if (atiixp_chan_active(sc) == 0) 749 device_printf(sc->dev, 750 "%s: pollticks=%d\n", 751 __func__, pollticks); 752 else 753 device_printf(sc->dev, 754 "%s: pollticks %d -> %d\n", 755 __func__, sc->poll_ticks, 756 pollticks); 757 } 758 sc->poll_ticks = pollticks; 759 callout_reset(&sc->poll_timer, 1, 760 atiixp_poll_callback, sc); 761 } 762 } 763 ch->flags |= ATI_IXP_CHN_RUNNING; 764 break; 765 case PCMTRIG_STOP: 766 case PCMTRIG_ABORT: 767 atiixp_disable_dma(ch); 768 atiixp_flush_dma(ch); 769 ch->flags &= ~ATI_IXP_CHN_RUNNING; 770 if (sc->polling != 0) { 771 if (atiixp_chan_active(sc) == 0) { 772 callout_stop(&sc->poll_timer); 773 sc->poll_ticks = 1; 774 } else { 775 if (sc->pch.flags & ATI_IXP_CHN_RUNNING) 776 ch = &sc->pch; 777 else 778 ch = &sc->rch; 779 pollticks = ((uint64_t)hz * ch->blksz) / 780 ((uint64_t)sndbuf_getbps(ch->buffer) * 781 sndbuf_getspd(ch->buffer)); 782 pollticks >>= 2; 783 if (pollticks > hz) 784 pollticks = hz; 785 if (pollticks < 1) 786 pollticks = 1; 787 if (pollticks > sc->poll_ticks) { 788 if (bootverbose) 789 device_printf(sc->dev, 790 "%s: pollticks %d -> %d\n", 791 __func__, sc->poll_ticks, 792 pollticks); 793 sc->poll_ticks = pollticks; 794 callout_reset(&sc->poll_timer, 795 1, atiixp_poll_callback, 796 sc); 797 } 798 } 799 } 800 break; 801 default: 802 atiixp_unlock(sc); 803 return (0); 804 break; 805 } 806 807 /* Update bus busy status */ 808 value = atiixp_rd(sc, ATI_REG_IER); 809 if (atiixp_rd(sc, ATI_REG_CMD) & (ATI_REG_CMD_SEND_EN | 810 ATI_REG_CMD_RECEIVE_EN | ATI_REG_CMD_SPDF_OUT_EN)) 811 value |= ATI_REG_IER_SET_BUS_BUSY; 812 else 813 value &= ~ATI_REG_IER_SET_BUS_BUSY; 814 atiixp_wr(sc, ATI_REG_IER, value); 815 816 atiixp_unlock(sc); 817 818 return (0); 819} 820 821static int 822atiixp_chan_getptr(kobj_t obj, void *data) 823{ 824 struct atiixp_chinfo *ch = data; 825 struct atiixp_info *sc = ch->parent; 826 uint32_t ptr; 827 828 atiixp_lock(sc); 829 if (sc->polling != 0) 830 ptr = ch->ptr; 831 else 832 ptr = atiixp_dmapos(ch); 833 atiixp_unlock(sc); 834 835 return (ptr); 836} 837 838static struct pcmchan_caps * 839atiixp_chan_getcaps(kobj_t obj, void *data) 840{ 841 struct atiixp_chinfo *ch = data; 842 843 if (ch->caps_32bit) 844 return (&atiixp_caps_32bit); 845 return (&atiixp_caps); 846} 847 848static kobj_method_t atiixp_chan_methods[] = { 849 KOBJMETHOD(channel_init, atiixp_chan_init), 850 KOBJMETHOD(channel_setformat, atiixp_chan_setformat), 851 KOBJMETHOD(channel_setspeed, atiixp_chan_setspeed), 852 KOBJMETHOD(channel_setblocksize, atiixp_chan_setblocksize), 853 KOBJMETHOD(channel_setfragments, atiixp_chan_setfragments), 854 KOBJMETHOD(channel_trigger, atiixp_chan_trigger), 855 KOBJMETHOD(channel_getptr, atiixp_chan_getptr), 856 KOBJMETHOD(channel_getcaps, atiixp_chan_getcaps), 857 { 0, 0 } 858}; 859CHANNEL_DECLARE(atiixp_chan); 860 861/* 862 * PCI driver interface 863 */ 864static void 865atiixp_intr(void *p) 866{ 867 struct atiixp_info *sc = p; 868 uint32_t status, enable, detected_codecs; 869 uint32_t trigger = 0; 870 871 atiixp_lock(sc); 872 if (sc->polling != 0) { 873 atiixp_unlock(sc); 874 return; 875 } 876 status = atiixp_rd(sc, ATI_REG_ISR); 877 878 if (status == 0) { 879 atiixp_unlock(sc); 880 return; 881 } 882 883 if ((status & ATI_REG_ISR_OUT_STATUS) && 884 (sc->pch.flags & ATI_IXP_CHN_RUNNING)) 885 trigger |= 1; 886 if ((status & ATI_REG_ISR_IN_STATUS) && 887 (sc->rch.flags & ATI_IXP_CHN_RUNNING)) 888 trigger |= 2; 889 890#if 0 891 if (status & ATI_REG_ISR_IN_XRUN) { 892 device_printf(sc->dev, 893 "Recieve IN XRUN interrupt\n"); 894 } 895 if (status & ATI_REG_ISR_OUT_XRUN) { 896 device_printf(sc->dev, 897 "Recieve OUT XRUN interrupt\n"); 898 } 899#endif 900 901 if (status & CODEC_CHECK_BITS) { 902 /* mark missing codecs as not ready */ 903 detected_codecs = status & CODEC_CHECK_BITS; 904 sc->codec_not_ready_bits |= detected_codecs; 905 906 /* disable detected interrupt sources */ 907 enable = atiixp_rd(sc, ATI_REG_IER); 908 enable &= ~detected_codecs; 909 atiixp_wr(sc, ATI_REG_IER, enable); 910 wakeup(sc); 911 } 912 913 /* acknowledge */ 914 atiixp_wr(sc, ATI_REG_ISR, status); 915 atiixp_unlock(sc); 916 917 if (trigger & 1) 918 chn_intr(sc->pch.channel); 919 if (trigger & 2) 920 chn_intr(sc->rch.channel); 921} 922 923static void 924atiixp_dma_cb(void *p, bus_dma_segment_t *bds, int a, int b) 925{ 926 struct atiixp_info *sc = (struct atiixp_info *)p; 927 sc->sgd_addr = bds->ds_addr; 928} 929 930static void 931atiixp_chip_pre_init(struct atiixp_info *sc) 932{ 933 uint32_t value; 934 935 atiixp_lock(sc); 936 937 /* disable interrupts */ 938 atiixp_disable_interrupts(sc); 939 940 /* clear all DMA enables (preserving rest of settings) */ 941 value = atiixp_rd(sc, ATI_REG_CMD); 942 value &= ~(ATI_REG_CMD_IN_DMA_EN | ATI_REG_CMD_OUT_DMA_EN | 943 ATI_REG_CMD_SPDF_OUT_EN ); 944 atiixp_wr(sc, ATI_REG_CMD, value); 945 946 /* reset aclink */ 947 atiixp_reset_aclink(sc); 948 949 sc->codec_not_ready_bits = 0; 950 951 /* enable all codecs to interrupt as well as the new frame interrupt */ 952 atiixp_wr(sc, ATI_REG_IER, CODEC_CHECK_BITS); 953 954 atiixp_unlock(sc); 955} 956 957#ifdef SND_DYNSYSCTL 958static int 959sysctl_atiixp_polling(SYSCTL_HANDLER_ARGS) 960{ 961 struct atiixp_info *sc; 962 device_t dev; 963 int err, val; 964 965 dev = oidp->oid_arg1; 966 sc = pcm_getdevinfo(dev); 967 if (sc == NULL) 968 return (EINVAL); 969 atiixp_lock(sc); 970 val = sc->polling; 971 atiixp_unlock(sc); 972 err = sysctl_handle_int(oidp, &val, 0, req); 973 974 if (err || req->newptr == NULL) 975 return (err); 976 if (val < 0 || val > 1) 977 return (EINVAL); 978 979 atiixp_lock(sc); 980 if (val != sc->polling) { 981 if (atiixp_chan_active(sc) != 0) 982 err = EBUSY; 983 else if (val == 0) { 984 atiixp_enable_interrupts(sc); 985 sc->polling = 0; 986 DELAY(1000); 987 } else { 988 atiixp_disable_interrupts(sc); 989 sc->polling = 1; 990 DELAY(1000); 991 } 992 } 993 atiixp_unlock(sc); 994 995 return (err); 996} 997#endif 998 999static void 1000atiixp_chip_post_init(void *arg) 1001{ 1002 struct atiixp_info *sc = (struct atiixp_info *)arg; 1003 uint32_t subdev; 1004 int i, timeout, found, polling; 1005 char status[SND_STATUSLEN]; 1006 1007 atiixp_lock(sc); 1008 1009 if (sc->delayed_attach.ich_func) { 1010 config_intrhook_disestablish(&sc->delayed_attach); 1011 sc->delayed_attach.ich_func = NULL; 1012 } 1013 1014 polling = sc->polling; 1015 sc->polling = 0; 1016 1017 timeout = 10; 1018 if (sc->codec_not_ready_bits == 0) { 1019 /* wait for the interrupts to happen */ 1020 do { 1021 msleep(sc, sc->lock, PWAIT, "ixpslp", max(hz / 10, 1)); 1022 if (sc->codec_not_ready_bits != 0) 1023 break; 1024 } while (--timeout); 1025 } 1026 1027 sc->polling = polling; 1028 atiixp_disable_interrupts(sc); 1029 1030 if (sc->codec_not_ready_bits == 0 && timeout == 0) { 1031 device_printf(sc->dev, 1032 "WARNING: timeout during codec detection; " 1033 "codecs might be present but haven't interrupted\n"); 1034 atiixp_unlock(sc); 1035 goto postinitbad; 1036 } 1037 1038 found = 0; 1039 1040 /* 1041 * ATI IXP can have upto 3 codecs, but single codec should be 1042 * suffice for now. 1043 */ 1044 if (!(sc->codec_not_ready_bits & ATI_REG_ISR_CODEC0_NOT_READY)) { 1045 /* codec 0 present */ 1046 sc->codec_found++; 1047 sc->codec_idx = 0; 1048 found++; 1049 } 1050 1051 if (!(sc->codec_not_ready_bits & ATI_REG_ISR_CODEC1_NOT_READY)) { 1052 /* codec 1 present */ 1053 sc->codec_found++; 1054 } 1055 1056 if (!(sc->codec_not_ready_bits & ATI_REG_ISR_CODEC2_NOT_READY)) { 1057 /* codec 2 present */ 1058 sc->codec_found++; 1059 } 1060 1061 atiixp_unlock(sc); 1062 1063 if (found == 0) 1064 goto postinitbad; 1065 1066 /* create/init mixer */ 1067 sc->codec = AC97_CREATE(sc->dev, sc, atiixp_ac97); 1068 if (sc->codec == NULL) 1069 goto postinitbad; 1070 1071 subdev = (pci_get_subdevice(sc->dev) << 16) | 1072 pci_get_subvendor(sc->dev); 1073 switch (subdev) { 1074 case 0x11831043: /* ASUS A6R */ 1075 case 0x2043161f: /* Maxselect x710s - http://maxselect.ru/ */ 1076 ac97_setflags(sc->codec, ac97_getflags(sc->codec) | 1077 AC97_F_EAPD_INV); 1078 break; 1079 default: 1080 break; 1081 } 1082 1083 mixer_init(sc->dev, ac97_getmixerclass(), sc->codec); 1084 1085 if (pcm_register(sc->dev, sc, ATI_IXP_NPCHAN, ATI_IXP_NRCHAN)) 1086 goto postinitbad; 1087 1088 for (i = 0; i < ATI_IXP_NPCHAN; i++) 1089 pcm_addchan(sc->dev, PCMDIR_PLAY, &atiixp_chan_class, sc); 1090 for (i = 0; i < ATI_IXP_NRCHAN; i++) 1091 pcm_addchan(sc->dev, PCMDIR_REC, &atiixp_chan_class, sc); 1092 1093#ifdef SND_DYNSYSCTL 1094 SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev), 1095 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, 1096 "polling", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev), 1097 sysctl_atiixp_polling, "I", "Enable polling mode"); 1098#endif 1099 1100 snprintf(status, SND_STATUSLEN, "at memory 0x%lx irq %ld %s", 1101 rman_get_start(sc->reg), rman_get_start(sc->irq), 1102 PCM_KLDSTRING(snd_atiixp)); 1103 1104 pcm_setstatus(sc->dev, status); 1105 1106 atiixp_lock(sc); 1107 if (sc->polling == 0) 1108 atiixp_enable_interrupts(sc); 1109 atiixp_unlock(sc); 1110 1111 return; 1112 1113postinitbad: 1114 atiixp_release_resource(sc); 1115} 1116 1117static void 1118atiixp_release_resource(struct atiixp_info *sc) 1119{ 1120 if (sc == NULL) 1121 return; 1122 if (sc->registered_channels != 0) { 1123 atiixp_lock(sc); 1124 sc->polling = 0; 1125 callout_stop(&sc->poll_timer); 1126 atiixp_unlock(sc); 1127 callout_drain(&sc->poll_timer); 1128 } 1129 if (sc->codec) { 1130 ac97_destroy(sc->codec); 1131 sc->codec = NULL; 1132 } 1133 if (sc->ih) { 1134 bus_teardown_intr(sc->dev, sc->irq, sc->ih); 1135 sc->ih = NULL; 1136 } 1137 if (sc->reg) { 1138 bus_release_resource(sc->dev, sc->regtype, sc->regid, sc->reg); 1139 sc->reg = NULL; 1140 } 1141 if (sc->irq) { 1142 bus_release_resource(sc->dev, SYS_RES_IRQ, sc->irqid, sc->irq); 1143 sc->irq = NULL; 1144 } 1145 if (sc->parent_dmat) { 1146 bus_dma_tag_destroy(sc->parent_dmat); 1147 sc->parent_dmat = NULL; 1148 } 1149 if (sc->sgd_dmamap) 1150 bus_dmamap_unload(sc->sgd_dmat, sc->sgd_dmamap); 1151 if (sc->sgd_table) { 1152 bus_dmamem_free(sc->sgd_dmat, sc->sgd_table, sc->sgd_dmamap); 1153 sc->sgd_table = NULL; 1154 } 1155 sc->sgd_dmamap = NULL; 1156 if (sc->sgd_dmat) { 1157 bus_dma_tag_destroy(sc->sgd_dmat); 1158 sc->sgd_dmat = NULL; 1159 } 1160 if (sc->lock) { 1161 snd_mtxfree(sc->lock); 1162 sc->lock = NULL; 1163 } 1164 free(sc, M_DEVBUF); 1165} 1166 1167static int 1168atiixp_pci_probe(device_t dev) 1169{ 1170 int i; 1171 uint16_t devid, vendor; 1172 1173 vendor = pci_get_vendor(dev); 1174 devid = pci_get_device(dev); 1175 for (i = 0; i < sizeof(atiixp_hw) / sizeof(atiixp_hw[0]); i++) { 1176 if (vendor == atiixp_hw[i].vendor && 1177 devid == atiixp_hw[i].devid) { 1178 device_set_desc(dev, atiixp_hw[i].desc); 1179 return (BUS_PROBE_DEFAULT); 1180 } 1181 } 1182 1183 return (ENXIO); 1184} 1185 1186static int 1187atiixp_pci_attach(device_t dev) 1188{ 1189 struct atiixp_info *sc; 1190 int i; 1191 1192 sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); 1193 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_atiixp softc"); 1194 sc->dev = dev; 1195 1196 callout_init(&sc->poll_timer, CALLOUT_MPSAFE); 1197 sc->poll_ticks = 1; 1198 1199 if (resource_int_value(device_get_name(sc->dev), 1200 device_get_unit(sc->dev), "polling", &i) == 0 && i != 0) 1201 sc->polling = 1; 1202 else 1203 sc->polling = 0; 1204 1205 pci_set_powerstate(dev, PCI_POWERSTATE_D0); 1206 pci_enable_busmaster(dev); 1207 1208 sc->regid = PCIR_BAR(0); 1209 sc->regtype = SYS_RES_MEMORY; 1210 sc->reg = bus_alloc_resource_any(dev, sc->regtype, 1211 &sc->regid, RF_ACTIVE); 1212 1213 if (!sc->reg) { 1214 device_printf(dev, "unable to allocate register space\n"); 1215 goto bad; 1216 } 1217 1218 sc->st = rman_get_bustag(sc->reg); 1219 sc->sh = rman_get_bushandle(sc->reg); 1220 1221 sc->bufsz = pcm_getbuffersize(dev, ATI_IXP_BUFSZ_MIN, 1222 ATI_IXP_BUFSZ_DEFAULT, ATI_IXP_BUFSZ_MAX); 1223 1224 sc->irqid = 0; 1225 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, 1226 RF_ACTIVE | RF_SHAREABLE); 1227 if (!sc->irq || snd_setup_intr(dev, sc->irq, INTR_MPSAFE, 1228 atiixp_intr, sc, &sc->ih)) { 1229 device_printf(dev, "unable to map interrupt\n"); 1230 goto bad; 1231 } 1232 1233 /* 1234 * Let the user choose the best DMA segments. 1235 */ 1236 if (resource_int_value(device_get_name(dev), 1237 device_get_unit(dev), "blocksize", &i) == 0 && i > 0) { 1238 i &= ATI_IXP_BLK_ALIGN; 1239 if (i < ATI_IXP_BLK_MIN) 1240 i = ATI_IXP_BLK_MIN; 1241 sc->blkcnt = sc->bufsz / i; 1242 i = 0; 1243 while (sc->blkcnt >> i) 1244 i++; 1245 sc->blkcnt = 1 << (i - 1); 1246 if (sc->blkcnt < ATI_IXP_DMA_CHSEGS_MIN) 1247 sc->blkcnt = ATI_IXP_DMA_CHSEGS_MIN; 1248 else if (sc->blkcnt > ATI_IXP_DMA_CHSEGS_MAX) 1249 sc->blkcnt = ATI_IXP_DMA_CHSEGS_MAX; 1250 1251 } else 1252 sc->blkcnt = ATI_IXP_DMA_CHSEGS; 1253 1254 /* 1255 * DMA tag for scatter-gather buffers and link pointers 1256 */ 1257 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, 1258 /*boundary*/0, 1259 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 1260 /*highaddr*/BUS_SPACE_MAXADDR, 1261 /*filter*/NULL, /*filterarg*/NULL, 1262 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 1263 /*flags*/0, /*lockfunc*/NULL, 1264 /*lockarg*/NULL, &sc->parent_dmat) != 0) { 1265 device_printf(dev, "unable to create dma tag\n"); 1266 goto bad; 1267 } 1268 1269 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, 1270 /*boundary*/0, 1271 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 1272 /*highaddr*/BUS_SPACE_MAXADDR, 1273 /*filter*/NULL, /*filterarg*/NULL, 1274 /*maxsize*/ATI_IXP_DMA_CHSEGS_MAX * ATI_IXP_NCHANS * 1275 sizeof(struct atiixp_dma_op), 1276 /*nsegments*/1, /*maxsegz*/0x3ffff, 1277 /*flags*/0, /*lockfunc*/NULL, 1278 /*lockarg*/NULL, &sc->sgd_dmat) != 0) { 1279 device_printf(dev, "unable to create dma tag\n"); 1280 goto bad; 1281 } 1282 1283 if (bus_dmamem_alloc(sc->sgd_dmat, (void **)&sc->sgd_table, 1284 BUS_DMA_NOWAIT, &sc->sgd_dmamap) == -1) 1285 goto bad; 1286 1287 if (bus_dmamap_load(sc->sgd_dmat, sc->sgd_dmamap, sc->sgd_table, 1288 ATI_IXP_DMA_CHSEGS_MAX * ATI_IXP_NCHANS * 1289 sizeof(struct atiixp_dma_op), atiixp_dma_cb, sc, 0)) 1290 goto bad; 1291 1292 1293 atiixp_chip_pre_init(sc); 1294 1295 sc->delayed_attach.ich_func = atiixp_chip_post_init; 1296 sc->delayed_attach.ich_arg = sc; 1297 if (cold == 0 || 1298 config_intrhook_establish(&sc->delayed_attach) != 0) { 1299 sc->delayed_attach.ich_func = NULL; 1300 atiixp_chip_post_init(sc); 1301 } 1302 1303 return (0); 1304 1305bad: 1306 atiixp_release_resource(sc); 1307 return (ENXIO); 1308} 1309 1310static int 1311atiixp_pci_detach(device_t dev) 1312{ 1313 int r; 1314 struct atiixp_info *sc; 1315 1316 sc = pcm_getdevinfo(dev); 1317 if (sc != NULL) { 1318 if (sc->codec != NULL) { 1319 r = pcm_unregister(dev); 1320 if (r) 1321 return (r); 1322 } 1323 sc->codec = NULL; 1324 if (sc->st != 0 && sc->sh != 0) 1325 atiixp_disable_interrupts(sc); 1326 atiixp_release_resource(sc); 1327 } 1328 return (0); 1329} 1330 1331static int 1332atiixp_pci_suspend(device_t dev) 1333{ 1334 struct atiixp_info *sc = pcm_getdevinfo(dev); 1335 uint32_t value; 1336 1337 /* quickly disable interrupts and save channels active state */ 1338 atiixp_lock(sc); 1339 atiixp_disable_interrupts(sc); 1340 atiixp_unlock(sc); 1341 1342 /* stop everything */ 1343 if (sc->pch.flags & ATI_IXP_CHN_RUNNING) { 1344 atiixp_chan_trigger(NULL, &sc->pch, PCMTRIG_STOP); 1345 sc->pch.flags |= ATI_IXP_CHN_SUSPEND; 1346 } 1347 if (sc->rch.flags & ATI_IXP_CHN_RUNNING) { 1348 atiixp_chan_trigger(NULL, &sc->rch, PCMTRIG_STOP); 1349 sc->rch.flags |= ATI_IXP_CHN_SUSPEND; 1350 } 1351 1352 /* power down aclink and pci bus */ 1353 atiixp_lock(sc); 1354 value = atiixp_rd(sc, ATI_REG_CMD); 1355 value |= ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET; 1356 atiixp_wr(sc, ATI_REG_CMD, ATI_REG_CMD_POWERDOWN); 1357 pci_set_powerstate(dev, PCI_POWERSTATE_D3); 1358 atiixp_unlock(sc); 1359 1360 return (0); 1361} 1362 1363static int 1364atiixp_pci_resume(device_t dev) 1365{ 1366 struct atiixp_info *sc = pcm_getdevinfo(dev); 1367 1368 atiixp_lock(sc); 1369 /* power up pci bus */ 1370 pci_set_powerstate(dev, PCI_POWERSTATE_D0); 1371 pci_enable_io(dev, SYS_RES_MEMORY); 1372 pci_enable_busmaster(dev); 1373 /* reset / power up aclink */ 1374 atiixp_reset_aclink(sc); 1375 atiixp_unlock(sc); 1376 1377 if (mixer_reinit(dev) == -1) { 1378 device_printf(dev, "unable to reinitialize the mixer\n"); 1379 return (ENXIO); 1380 } 1381 1382 /* 1383 * Resume channel activities. Reset channel format regardless 1384 * of its previous state. 1385 */ 1386 if (sc->pch.channel != NULL) { 1387 if (sc->pch.fmt != 0) 1388 atiixp_chan_setformat(NULL, &sc->pch, sc->pch.fmt); 1389 if (sc->pch.flags & ATI_IXP_CHN_SUSPEND) { 1390 sc->pch.flags &= ~ATI_IXP_CHN_SUSPEND; 1391 atiixp_chan_trigger(NULL, &sc->pch, PCMTRIG_START); 1392 } 1393 } 1394 if (sc->rch.channel != NULL) { 1395 if (sc->rch.fmt != 0) 1396 atiixp_chan_setformat(NULL, &sc->rch, sc->rch.fmt); 1397 if (sc->rch.flags & ATI_IXP_CHN_SUSPEND) { 1398 sc->rch.flags &= ~ATI_IXP_CHN_SUSPEND; 1399 atiixp_chan_trigger(NULL, &sc->rch, PCMTRIG_START); 1400 } 1401 } 1402 1403 /* enable interrupts */ 1404 atiixp_lock(sc); 1405 if (sc->polling == 0) 1406 atiixp_enable_interrupts(sc); 1407 atiixp_unlock(sc); 1408 1409 return (0); 1410} 1411 1412static device_method_t atiixp_methods[] = { 1413 DEVMETHOD(device_probe, atiixp_pci_probe), 1414 DEVMETHOD(device_attach, atiixp_pci_attach), 1415 DEVMETHOD(device_detach, atiixp_pci_detach), 1416 DEVMETHOD(device_suspend, atiixp_pci_suspend), 1417 DEVMETHOD(device_resume, atiixp_pci_resume), 1418 { 0, 0 } 1419}; 1420 1421static driver_t atiixp_driver = { 1422 "pcm", 1423 atiixp_methods, 1424 PCM_SOFTC_SIZE, 1425}; 1426 1427DRIVER_MODULE(snd_atiixp, pci, atiixp_driver, pcm_devclass, 0, 0); 1428MODULE_DEPEND(snd_atiixp, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 1429MODULE_VERSION(snd_atiixp, 1); 1430