1333019Ssbruno/*- 2333019Ssbruno * Copyright (c) 2018 Microsemi Corporation. 3333019Ssbruno * All rights reserved. 4333019Ssbruno * 5333019Ssbruno * Redistribution and use in source and binary forms, with or without 6333019Ssbruno * modification, are permitted provided that the following conditions 7333019Ssbruno * are met: 8333019Ssbruno * 1. Redistributions of source code must retain the above copyright 9333019Ssbruno * notice, this list of conditions and the following disclaimer. 10333019Ssbruno * 2. Redistributions in binary form must reproduce the above copyright 11333019Ssbruno * notice, this list of conditions and the following disclaimer in the 12333019Ssbruno * documentation and/or other materials provided with the distribution. 13333019Ssbruno * 14333019Ssbruno * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15333019Ssbruno * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16333019Ssbruno * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17333019Ssbruno * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18333019Ssbruno * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19333019Ssbruno * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20333019Ssbruno * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21333019Ssbruno * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22333019Ssbruno * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23333019Ssbruno * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24333019Ssbruno * SUCH DAMAGE. 25333019Ssbruno */ 26333019Ssbruno 27333019Ssbruno/* $FreeBSD: stable/11/sys/dev/smartpqi/smartpqi_main.c 333417 2018-05-09 16:14:12Z sbruno $ */ 28333019Ssbruno 29333019Ssbruno/* 30333019Ssbruno * Driver for the Microsemi Smart storage controllers 31333019Ssbruno */ 32333019Ssbruno 33333019Ssbruno#include "smartpqi_includes.h" 34333019Ssbruno#include "smartpqi_prototypes.h" 35333019Ssbruno 36333019Ssbruno/* 37333019Ssbruno * Supported devices 38333019Ssbruno */ 39333019Ssbrunostruct pqi_ident 40333019Ssbruno{ 41333019Ssbruno u_int16_t vendor; 42333019Ssbruno u_int16_t device; 43333019Ssbruno u_int16_t subvendor; 44333019Ssbruno u_int16_t subdevice; 45333019Ssbruno int hwif; 46333019Ssbruno char *desc; 47333019Ssbruno} pqi_identifiers[] = { 48333019Ssbruno /* (MSCC PM8205 8x12G based) */ 49333019Ssbruno {0x9005, 0x028f, 0x103c, 0x600, PQI_HWIF_SRCV, "P408i-p SR Gen10"}, 50333019Ssbruno {0x9005, 0x028f, 0x103c, 0x601, PQI_HWIF_SRCV, "P408e-p SR Gen10"}, 51333019Ssbruno {0x9005, 0x028f, 0x103c, 0x602, PQI_HWIF_SRCV, "P408i-a SR Gen10"}, 52333019Ssbruno {0x9005, 0x028f, 0x103c, 0x603, PQI_HWIF_SRCV, "P408i-c SR Gen10"}, 53333019Ssbruno {0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"}, 54333019Ssbruno {0x9005, 0x028f, 0x9005, 0x608, PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"}, 55333019Ssbruno {0x9005, 0x028f, 0x103c, 0x609, PQI_HWIF_SRCV, "P408i-sb SR G10"}, 56333019Ssbruno 57333019Ssbruno /* (MSCC PM8225 8x12G based) */ 58333019Ssbruno {0x9005, 0x028f, 0x103c, 0x650, PQI_HWIF_SRCV, "E208i-p SR Gen10"}, 59333019Ssbruno {0x9005, 0x028f, 0x103c, 0x651, PQI_HWIF_SRCV, "E208e-p SR Gen10"}, 60333019Ssbruno {0x9005, 0x028f, 0x103c, 0x652, PQI_HWIF_SRCV, "E208i-c SR Gen10"}, 61333019Ssbruno {0x9005, 0x028f, 0x103c, 0x654, PQI_HWIF_SRCV, "E208i-a SR Gen10"}, 62333019Ssbruno {0x9005, 0x028f, 0x103c, 0x655, PQI_HWIF_SRCV, "P408e-m SR Gen10"}, 63333019Ssbruno 64333019Ssbruno /* (MSCC PM8221 8x12G based) */ 65333019Ssbruno {0x9005, 0x028f, 0x103c, 0x700, PQI_HWIF_SRCV, "P204i-c SR Gen10"}, 66333019Ssbruno {0x9005, 0x028f, 0x103c, 0x701, PQI_HWIF_SRCV, "P204i-b SR Gen10"}, 67333019Ssbruno 68333019Ssbruno /* (MSCC PM8204 8x12G based) */ 69333019Ssbruno {0x9005, 0x028f, 0x9005, 0x800, PQI_HWIF_SRCV, "SmartRAID 3154-8i"}, 70333019Ssbruno {0x9005, 0x028f, 0x9005, 0x801, PQI_HWIF_SRCV, "SmartRAID 3152-8i"}, 71333019Ssbruno {0x9005, 0x028f, 0x9005, 0x802, PQI_HWIF_SRCV, "SmartRAID 3151-4i"}, 72333019Ssbruno {0x9005, 0x028f, 0x9005, 0x803, PQI_HWIF_SRCV, "SmartRAID 3101-4i"}, 73333019Ssbruno {0x9005, 0x028f, 0x9005, 0x804, PQI_HWIF_SRCV, "SmartRAID 3154-8e"}, 74333019Ssbruno {0x9005, 0x028f, 0x9005, 0x805, PQI_HWIF_SRCV, "SmartRAID 3102-8i"}, 75333019Ssbruno {0x9005, 0x028f, 0x9005, 0x806, PQI_HWIF_SRCV, "SmartRAID 3100"}, 76333019Ssbruno {0x9005, 0x028f, 0x9005, 0x807, PQI_HWIF_SRCV, "SmartRAID 3162-8i"}, 77333019Ssbruno {0x9005, 0x028f, 0x152d, 0x8a22, PQI_HWIF_SRCV, "QS-8204-8i"}, 78333019Ssbruno 79333019Ssbruno /* (MSCC PM8222 8x12G based) */ 80333019Ssbruno {0x9005, 0x028f, 0x9005, 0x900, PQI_HWIF_SRCV, "SmartHBA 2100-8i"}, 81333019Ssbruno {0x9005, 0x028f, 0x9005, 0x901, PQI_HWIF_SRCV, "SmartHBA 2100-4i"}, 82333019Ssbruno {0x9005, 0x028f, 0x9005, 0x902, PQI_HWIF_SRCV, "HBA 1100-8i"}, 83333019Ssbruno {0x9005, 0x028f, 0x9005, 0x903, PQI_HWIF_SRCV, "HBA 1100-4i"}, 84333019Ssbruno {0x9005, 0x028f, 0x9005, 0x904, PQI_HWIF_SRCV, "SmartHBA 2100-8e"}, 85333019Ssbruno {0x9005, 0x028f, 0x9005, 0x905, PQI_HWIF_SRCV, "HBA 1100-8e"}, 86333019Ssbruno {0x9005, 0x028f, 0x9005, 0x906, PQI_HWIF_SRCV, "SmartHBA 2100-4i4e"}, 87333019Ssbruno {0x9005, 0x028f, 0x9005, 0x907, PQI_HWIF_SRCV, "HBA 1100"}, 88333019Ssbruno {0x9005, 0x028f, 0x9005, 0x908, PQI_HWIF_SRCV, "SmartHBA 2100"}, 89333019Ssbruno {0x9005, 0x028f, 0x9005, 0x90a, PQI_HWIF_SRCV, "SmartHBA 2100A-8i"}, 90333019Ssbruno 91333019Ssbruno /* (SRCx MSCC FVB 24x12G based) */ 92333019Ssbruno {0x9005, 0x028f, 0x103c, 0x1001, PQI_HWIF_SRCV, "MSCC FVB"}, 93333019Ssbruno 94333019Ssbruno /* (MSCC PM8241 24x12G based) */ 95333019Ssbruno 96333019Ssbruno /* (MSCC PM8242 24x12G based) */ 97333019Ssbruno {0x9005, 0x028f, 0x152d, 0x8a37, PQI_HWIF_SRCV, "QS-8242-24i"}, 98333019Ssbruno {0x9005, 0x028f, 0x9005, 0x1300, PQI_HWIF_SRCV, "HBA 1100-8i8e"}, 99333019Ssbruno {0x9005, 0x028f, 0x9005, 0x1301, PQI_HWIF_SRCV, "HBA 1100-24i"}, 100333019Ssbruno {0x9005, 0x028f, 0x9005, 0x1302, PQI_HWIF_SRCV, "SmartHBA 2100-8i8e"}, 101333019Ssbruno {0x9005, 0x028f, 0x9005, 0x1303, PQI_HWIF_SRCV, "SmartHBA 2100-24i"}, 102333019Ssbruno 103333019Ssbruno /* (MSCC PM8236 16x12G based) */ 104333019Ssbruno {0x9005, 0x028f, 0x152d, 0x8a24, PQI_HWIF_SRCV, "QS-8236-16i"}, 105333019Ssbruno {0x9005, 0x028f, 0x9005, 0x1380, PQI_HWIF_SRCV, "SmartRAID 3154-16i"}, 106333019Ssbruno 107333019Ssbruno /* (MSCC PM8237 24x12G based) */ 108333019Ssbruno {0x9005, 0x028f, 0x103c, 0x1100, PQI_HWIF_SRCV, "P816i-a SR Gen10"}, 109333019Ssbruno {0x9005, 0x028f, 0x103c, 0x1101, PQI_HWIF_SRCV, "P416ie-m SR G10"}, 110333019Ssbruno 111333019Ssbruno /* (MSCC PM8238 16x12G based) */ 112333019Ssbruno {0x9005, 0x028f, 0x152d, 0x8a23, PQI_HWIF_SRCV, "QS-8238-16i"}, 113333019Ssbruno {0x9005, 0x028f, 0x9005, 0x1280, PQI_HWIF_SRCV, "HBA 1100-16i"}, 114333019Ssbruno {0x9005, 0x028f, 0x9005, 0x1281, PQI_HWIF_SRCV, "HBA 1100-16e"}, 115333019Ssbruno 116333019Ssbruno /* (MSCC PM8240 24x12G based) */ 117333019Ssbruno {0x9005, 0x028f, 0x152d, 0x8a36, PQI_HWIF_SRCV, "QS-8240-24i"}, 118333019Ssbruno {0x9005, 0x028f, 0x9005, 0x1200, PQI_HWIF_SRCV, "SmartRAID 3154-24i"}, 119333019Ssbruno {0x9005, 0x028f, 0x9005, 0x1201, PQI_HWIF_SRCV, "SmartRAID 3154-8i16e"}, 120333019Ssbruno {0x9005, 0x028f, 0x9005, 0x1202, PQI_HWIF_SRCV, "SmartRAID 3154-8i8e"}, 121333019Ssbruno 122333019Ssbruno {0, 0, 0, 0, 0, 0} 123333019Ssbruno}; 124333019Ssbruno 125333019Ssbrunostruct pqi_ident 126333019Ssbrunopqi_family_identifiers[] = { 127333019Ssbruno {0x9005, 0x028f, 0, 0, PQI_HWIF_SRCV, "Smart Array Storage Controller"}, 128333019Ssbruno {0, 0, 0, 0, 0, 0} 129333019Ssbruno}; 130333019Ssbruno 131333019Ssbruno/* 132333019Ssbruno * Function to identify the installed adapter. 133333019Ssbruno */ 134333019Ssbrunostatic struct pqi_ident * 135333019Ssbrunopqi_find_ident(device_t dev) 136333019Ssbruno{ 137333019Ssbruno struct pqi_ident *m; 138333019Ssbruno u_int16_t vendid, devid, sub_vendid, sub_devid; 139333019Ssbruno 140333019Ssbruno vendid = pci_get_vendor(dev); 141333019Ssbruno devid = pci_get_device(dev); 142333019Ssbruno sub_vendid = pci_get_subvendor(dev); 143333019Ssbruno sub_devid = pci_get_subdevice(dev); 144333019Ssbruno 145333019Ssbruno for (m = pqi_identifiers; m->vendor != 0; m++) { 146333019Ssbruno if ((m->vendor == vendid) && (m->device == devid) && 147333019Ssbruno (m->subvendor == sub_vendid) && 148333019Ssbruno (m->subdevice == sub_devid)) { 149333019Ssbruno return (m); 150333019Ssbruno } 151333019Ssbruno } 152333019Ssbruno 153333019Ssbruno for (m = pqi_family_identifiers; m->vendor != 0; m++) { 154333019Ssbruno if ((m->vendor == vendid) && (m->device == devid)) { 155333019Ssbruno return (m); 156333019Ssbruno } 157333019Ssbruno } 158333019Ssbruno 159333019Ssbruno return (NULL); 160333019Ssbruno} 161333019Ssbruno 162333019Ssbruno/* 163333019Ssbruno * Determine whether this is one of our supported adapters. 164333019Ssbruno */ 165333019Ssbrunostatic int 166333019Ssbrunosmartpqi_probe(device_t dev) 167333019Ssbruno{ 168333019Ssbruno struct pqi_ident *id; 169333019Ssbruno 170333019Ssbruno if ((id = pqi_find_ident(dev)) != NULL) { 171333019Ssbruno device_set_desc(dev, id->desc); 172333019Ssbruno return(BUS_PROBE_VENDOR); 173333019Ssbruno } 174333019Ssbruno 175333019Ssbruno return(ENXIO); 176333019Ssbruno} 177333019Ssbruno 178333019Ssbruno/* 179333019Ssbruno * Store Bus/Device/Function in softs 180333019Ssbruno */ 181333019Ssbrunovoid pqisrc_save_controller_info(struct pqisrc_softstate *softs) 182333019Ssbruno{ 183333019Ssbruno device_t dev = softs->os_specific.pqi_dev; 184333019Ssbruno 185333019Ssbruno softs->bus_id = (uint32_t)pci_get_bus(dev); 186333019Ssbruno softs->device_id = (uint32_t)pci_get_device(dev); 187333019Ssbruno softs->func_id = (uint32_t)pci_get_function(dev); 188333019Ssbruno} 189333019Ssbruno 190333019Ssbruno 191333019Ssbruno/* 192333019Ssbruno * Allocate resources for our device, set up the bus interface. 193333019Ssbruno * Initialize the PQI related functionality, scan devices, register sim to 194333019Ssbruno * upper layer, create management interface device node etc. 195333019Ssbruno */ 196333019Ssbrunostatic int 197333019Ssbrunosmartpqi_attach(device_t dev) 198333019Ssbruno{ 199333019Ssbruno struct pqisrc_softstate *softs = NULL; 200333019Ssbruno struct pqi_ident *id = NULL; 201333019Ssbruno int error = 0; 202333019Ssbruno u_int32_t command = 0, i = 0; 203333019Ssbruno int card_index = device_get_unit(dev); 204333019Ssbruno rcb_t *rcbp = NULL; 205333019Ssbruno 206333019Ssbruno /* 207333019Ssbruno * Initialise softc. 208333019Ssbruno */ 209333019Ssbruno softs = device_get_softc(dev); 210333019Ssbruno 211333019Ssbruno if (!softs) { 212333019Ssbruno printf("Could not get softc\n"); 213333019Ssbruno error = EINVAL; 214333019Ssbruno goto out; 215333019Ssbruno } 216333019Ssbruno memset(softs, 0, sizeof(*softs)); 217333019Ssbruno softs->os_specific.pqi_dev = dev; 218333019Ssbruno 219333019Ssbruno DBG_FUNC("IN\n"); 220333019Ssbruno 221333019Ssbruno /* assume failure is 'not configured' */ 222333019Ssbruno error = ENXIO; 223333019Ssbruno 224333019Ssbruno /* 225333019Ssbruno * Verify that the adapter is correctly set up in PCI space. 226333019Ssbruno */ 227333019Ssbruno pci_enable_busmaster(softs->os_specific.pqi_dev); 228333019Ssbruno command = pci_read_config(softs->os_specific.pqi_dev, PCIR_COMMAND, 2); 229333019Ssbruno if ((command & PCIM_CMD_MEMEN) == 0) { 230333019Ssbruno DBG_ERR("memory window not available command = %d\n", command); 231333019Ssbruno error = ENXIO; 232333019Ssbruno goto out; 233333019Ssbruno } 234333019Ssbruno 235333019Ssbruno /* 236333019Ssbruno * Detect the hardware interface version, set up the bus interface 237333019Ssbruno * indirection. 238333019Ssbruno */ 239333019Ssbruno id = pqi_find_ident(dev); 240333019Ssbruno softs->os_specific.pqi_hwif = id->hwif; 241333019Ssbruno 242333019Ssbruno switch(softs->os_specific.pqi_hwif) { 243333019Ssbruno case PQI_HWIF_SRCV: 244333019Ssbruno DBG_INFO("set hardware up for PMC SRCv for %p", softs); 245333019Ssbruno break; 246333019Ssbruno default: 247333019Ssbruno softs->os_specific.pqi_hwif = PQI_HWIF_UNKNOWN; 248333019Ssbruno DBG_ERR("unknown hardware type\n"); 249333019Ssbruno error = ENXIO; 250333019Ssbruno goto out; 251333019Ssbruno } 252333019Ssbruno 253333019Ssbruno pqisrc_save_controller_info(softs); 254333019Ssbruno 255333019Ssbruno /* 256333019Ssbruno * Allocate the PCI register window. 257333019Ssbruno */ 258333019Ssbruno softs->os_specific.pqi_regs_rid0 = PCIR_BAR(0); 259333019Ssbruno if ((softs->os_specific.pqi_regs_res0 = 260333019Ssbruno bus_alloc_resource_any(softs->os_specific.pqi_dev, SYS_RES_MEMORY, 261333019Ssbruno &softs->os_specific.pqi_regs_rid0, RF_ACTIVE)) == NULL) { 262333019Ssbruno DBG_ERR("couldn't allocate register window 0\n"); 263333019Ssbruno /* assume failure is 'out of memory' */ 264333019Ssbruno error = ENOMEM; 265333019Ssbruno goto out; 266333019Ssbruno } 267333019Ssbruno 268333019Ssbruno bus_get_resource_start(softs->os_specific.pqi_dev, SYS_RES_MEMORY, 269333019Ssbruno softs->os_specific.pqi_regs_rid0); 270333019Ssbruno 271333019Ssbruno softs->pci_mem_handle.pqi_btag = rman_get_bustag(softs->os_specific.pqi_regs_res0); 272333019Ssbruno softs->pci_mem_handle.pqi_bhandle = rman_get_bushandle(softs->os_specific.pqi_regs_res0); 273333019Ssbruno /* softs->pci_mem_base_vaddr = (uintptr_t)rman_get_virtual(softs->os_specific.pqi_regs_res0); */ 274333019Ssbruno softs->pci_mem_base_vaddr = (char *)rman_get_virtual(softs->os_specific.pqi_regs_res0); 275333019Ssbruno 276333019Ssbruno /* 277333019Ssbruno * Allocate the parent bus DMA tag appropriate for our PCI interface. 278333019Ssbruno * 279333019Ssbruno * Note that some of these controllers are 64-bit capable. 280333019Ssbruno */ 281333019Ssbruno if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 282333019Ssbruno PAGE_SIZE, 0, /* algnmnt, boundary */ 283333019Ssbruno BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 284333019Ssbruno BUS_SPACE_MAXADDR, /* highaddr */ 285333019Ssbruno NULL, NULL, /* filter, filterarg */ 286333019Ssbruno BUS_SPACE_MAXSIZE_32BIT, /* maxsize */ 287333019Ssbruno BUS_SPACE_UNRESTRICTED, /* nsegments */ 288333019Ssbruno BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 289333019Ssbruno 0, /* flags */ 290333019Ssbruno NULL, NULL, /* No locking needed */ 291333019Ssbruno &softs->os_specific.pqi_parent_dmat)) { 292333019Ssbruno DBG_ERR("can't allocate parent DMA tag\n"); 293333019Ssbruno /* assume failure is 'out of memory' */ 294333019Ssbruno error = ENOMEM; 295333019Ssbruno goto dma_out; 296333019Ssbruno } 297333019Ssbruno 298333019Ssbruno softs->os_specific.sim_registered = FALSE; 299333019Ssbruno softs->os_name = "FreeBSD "; 300333019Ssbruno 301333019Ssbruno /* Initialize the PQI library */ 302333019Ssbruno error = pqisrc_init(softs); 303333019Ssbruno if (error) { 304333019Ssbruno DBG_ERR("Failed to initialize pqi lib error = %d\n", error); 305333019Ssbruno error = PQI_STATUS_FAILURE; 306333019Ssbruno goto out; 307333019Ssbruno } 308333019Ssbruno 309333019Ssbruno mtx_init(&softs->os_specific.cam_lock, "cam_lock", NULL, MTX_DEF); 310333019Ssbruno softs->os_specific.mtx_init = TRUE; 311333019Ssbruno mtx_init(&softs->os_specific.map_lock, "map_lock", NULL, MTX_DEF); 312333019Ssbruno 313333019Ssbruno /* 314333019Ssbruno * Create DMA tag for mapping buffers into controller-addressable space. 315333019Ssbruno */ 316333019Ssbruno if (bus_dma_tag_create(softs->os_specific.pqi_parent_dmat,/* parent */ 317333019Ssbruno 1, 0, /* algnmnt, boundary */ 318333019Ssbruno BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 319333019Ssbruno BUS_SPACE_MAXADDR, /* highaddr */ 320333019Ssbruno NULL, NULL, /* filter, filterarg */ 321333019Ssbruno softs->pqi_cap.max_sg_elem*PAGE_SIZE,/*maxsize*/ 322333019Ssbruno softs->pqi_cap.max_sg_elem, /* nsegments */ 323333019Ssbruno BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 324333019Ssbruno BUS_DMA_ALLOCNOW, /* flags */ 325333019Ssbruno busdma_lock_mutex, /* lockfunc */ 326333019Ssbruno &softs->os_specific.map_lock, /* lockfuncarg*/ 327333019Ssbruno &softs->os_specific.pqi_buffer_dmat)) { 328333019Ssbruno DBG_ERR("can't allocate buffer DMA tag for pqi_buffer_dmat\n"); 329333019Ssbruno return (ENOMEM); 330333019Ssbruno } 331333019Ssbruno 332333019Ssbruno rcbp = &softs->rcb[1]; 333333019Ssbruno for( i = 1; i <= softs->pqi_cap.max_outstanding_io; i++, rcbp++ ) { 334333019Ssbruno if ((error = bus_dmamap_create(softs->os_specific.pqi_buffer_dmat, 0, &rcbp->cm_datamap)) != 0) { 335333019Ssbruno DBG_ERR("Cant create datamap for buf @" 336333019Ssbruno "rcbp = %p maxio = %d error = %d\n", 337333019Ssbruno rcbp, softs->pqi_cap.max_outstanding_io, error); 338333019Ssbruno goto dma_out; 339333019Ssbruno } 340333019Ssbruno } 341333019Ssbruno 342333019Ssbruno os_start_heartbeat_timer((void *)softs); /* Start the heart-beat timer */ 343333019Ssbruno softs->os_specific.wellness_periodic = timeout( os_wellness_periodic, 344333019Ssbruno softs, 120*hz); 345333019Ssbruno /* Register our shutdown handler. */ 346333019Ssbruno softs->os_specific.eh = EVENTHANDLER_REGISTER(shutdown_final, 347333019Ssbruno smartpqi_shutdown, softs, SHUTDOWN_PRI_DEFAULT); 348333019Ssbruno 349333019Ssbruno error = pqisrc_scan_devices(softs); 350333019Ssbruno if (error) { 351333019Ssbruno DBG_ERR("Failed to scan lib error = %d\n", error); 352333019Ssbruno error = PQI_STATUS_FAILURE; 353333019Ssbruno goto out; 354333019Ssbruno } 355333019Ssbruno 356333019Ssbruno error = register_sim(softs, card_index); 357333019Ssbruno if (error) { 358333019Ssbruno DBG_ERR("Failed to register sim index = %d error = %d\n", 359333019Ssbruno card_index, error); 360333019Ssbruno goto out; 361333019Ssbruno } 362333019Ssbruno 363333019Ssbruno smartpqi_target_rescan(softs); 364333019Ssbruno 365333019Ssbruno TASK_INIT(&softs->os_specific.event_task, 0, pqisrc_event_worker,softs); 366333019Ssbruno 367333019Ssbruno error = create_char_dev(softs, card_index); 368333019Ssbruno if (error) { 369333019Ssbruno DBG_ERR("Failed to register character device index=%d r=%d\n", 370333019Ssbruno card_index, error); 371333019Ssbruno goto out; 372333019Ssbruno } 373333019Ssbruno goto out; 374333019Ssbruno 375333019Ssbrunodma_out: 376333019Ssbruno if (softs->os_specific.pqi_regs_res0 != NULL) 377333019Ssbruno bus_release_resource(softs->os_specific.pqi_dev, SYS_RES_MEMORY, 378333019Ssbruno softs->os_specific.pqi_regs_rid0, 379333019Ssbruno softs->os_specific.pqi_regs_res0); 380333019Ssbrunoout: 381333019Ssbruno DBG_FUNC("OUT error = %d\n", error); 382333019Ssbruno return(error); 383333019Ssbruno} 384333019Ssbruno 385333019Ssbruno/* 386333019Ssbruno * Deallocate resources for our device. 387333019Ssbruno */ 388333019Ssbrunostatic int 389333019Ssbrunosmartpqi_detach(device_t dev) 390333019Ssbruno{ 391333019Ssbruno struct pqisrc_softstate *softs = NULL; 392333019Ssbruno softs = device_get_softc(dev); 393333019Ssbruno DBG_FUNC("IN\n"); 394333019Ssbruno 395333019Ssbruno EVENTHANDLER_DEREGISTER(shutdown_final, softs->os_specific.eh); 396333019Ssbruno 397333019Ssbruno /* kill the periodic event */ 398333019Ssbruno untimeout(os_wellness_periodic, softs, 399333019Ssbruno softs->os_specific.wellness_periodic); 400333019Ssbruno /* Kill the heart beat event */ 401333019Ssbruno untimeout(os_start_heartbeat_timer, softs, 402333019Ssbruno softs->os_specific.heartbeat_timeout_id); 403333019Ssbruno 404333019Ssbruno smartpqi_shutdown(softs); 405333019Ssbruno destroy_char_dev(softs); 406333019Ssbruno pqisrc_uninit(softs); 407333019Ssbruno deregister_sim(softs); 408333019Ssbruno pci_release_msi(dev); 409333019Ssbruno 410333019Ssbruno DBG_FUNC("OUT\n"); 411333019Ssbruno return 0; 412333019Ssbruno} 413333019Ssbruno 414333019Ssbruno/* 415333019Ssbruno * Bring the controller to a quiescent state, ready for system suspend. 416333019Ssbruno */ 417333019Ssbrunostatic int 418333019Ssbrunosmartpqi_suspend(device_t dev) 419333019Ssbruno{ 420333019Ssbruno struct pqisrc_softstate *softs; 421333019Ssbruno softs = device_get_softc(dev); 422333019Ssbruno DBG_FUNC("IN\n"); 423333019Ssbruno 424333019Ssbruno DBG_INFO("Suspending the device %p\n", softs); 425333019Ssbruno softs->os_specific.pqi_state |= SMART_STATE_SUSPEND; 426333019Ssbruno 427333019Ssbruno DBG_FUNC("OUT\n"); 428333019Ssbruno return(0); 429333019Ssbruno} 430333019Ssbruno 431333019Ssbruno/* 432333019Ssbruno * Bring the controller back to a state ready for operation. 433333019Ssbruno */ 434333019Ssbrunostatic int 435333019Ssbrunosmartpqi_resume(device_t dev) 436333019Ssbruno{ 437333019Ssbruno struct pqisrc_softstate *softs; 438333019Ssbruno softs = device_get_softc(dev); 439333019Ssbruno DBG_FUNC("IN\n"); 440333019Ssbruno 441333019Ssbruno softs->os_specific.pqi_state &= ~SMART_STATE_SUSPEND; 442333019Ssbruno 443333019Ssbruno DBG_FUNC("OUT\n"); 444333019Ssbruno return(0); 445333019Ssbruno} 446333019Ssbruno 447333019Ssbruno/* 448333019Ssbruno * Do whatever is needed during a system shutdown. 449333019Ssbruno */ 450333019Ssbrunoint 451333019Ssbrunosmartpqi_shutdown(void *arg) 452333019Ssbruno{ 453333019Ssbruno struct pqisrc_softstate *softs = NULL; 454333019Ssbruno int rval = 0; 455333019Ssbruno 456333019Ssbruno DBG_FUNC("IN\n"); 457333019Ssbruno 458333019Ssbruno softs = (struct pqisrc_softstate *)arg; 459333019Ssbruno 460333019Ssbruno rval = pqisrc_flush_cache(softs, PQISRC_SHUTDOWN); 461333019Ssbruno if (rval != PQI_STATUS_SUCCESS) { 462333019Ssbruno DBG_ERR("Unable to flush adapter cache! rval = %d", rval); 463333019Ssbruno } 464333019Ssbruno 465333019Ssbruno DBG_FUNC("OUT\n"); 466333019Ssbruno 467333019Ssbruno return rval; 468333019Ssbruno} 469333019Ssbruno 470333019Ssbruno/* 471333019Ssbruno * PCI bus interface. 472333019Ssbruno */ 473333019Ssbrunostatic device_method_t pqi_methods[] = { 474333019Ssbruno /* Device interface */ 475333019Ssbruno DEVMETHOD(device_probe, smartpqi_probe), 476333019Ssbruno DEVMETHOD(device_attach, smartpqi_attach), 477333019Ssbruno DEVMETHOD(device_detach, smartpqi_detach), 478333019Ssbruno DEVMETHOD(device_suspend, smartpqi_suspend), 479333019Ssbruno DEVMETHOD(device_resume, smartpqi_resume), 480333019Ssbruno { 0, 0 } 481333019Ssbruno}; 482333019Ssbruno 483333019Ssbrunostatic devclass_t pqi_devclass; 484333019Ssbrunostatic driver_t smartpqi_pci_driver = { 485333019Ssbruno "smartpqi", 486333019Ssbruno pqi_methods, 487333019Ssbruno sizeof(struct pqisrc_softstate) 488333019Ssbruno}; 489333019Ssbruno 490333019SsbrunoDRIVER_MODULE(smartpqi, pci, smartpqi_pci_driver, pqi_devclass, 0, 0); 491333019SsbrunoMODULE_DEPEND(smartpqi, pci, 1, 1, 1); 492