sfxge_tx.c revision 280163
1/*- 2 * Copyright (c) 2010-2011 Solarflare Communications, Inc. 3 * All rights reserved. 4 * 5 * This software was developed in part by Philip Paeps under contract for 6 * Solarflare Communications, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30/* Theory of operation: 31 * 32 * Tx queues allocation and mapping 33 * 34 * One Tx queue with enabled checksum offload is allocated per Rx channel 35 * (event queue). Also 2 Tx queues (one without checksum offload and one 36 * with IP checksum offload only) are allocated and bound to event queue 0. 37 * sfxge_txq_type is used as Tx queue label. 38 * 39 * So, event queue plus label mapping to Tx queue index is: 40 * if event queue index is 0, TxQ-index = TxQ-label * [0..SFXGE_TXQ_NTYPES) 41 * else TxQ-index = SFXGE_TXQ_NTYPES + EvQ-index - 1 42 * See sfxge_get_txq_by_label() sfxge_ev.c 43 */ 44 45#include <sys/cdefs.h> 46__FBSDID("$FreeBSD: head/sys/dev/sfxge/sfxge_tx.c 280163 2015-03-17 08:23:15Z arybchik $"); 47 48#include <sys/types.h> 49#include <sys/mbuf.h> 50#include <sys/smp.h> 51#include <sys/socket.h> 52#include <sys/sysctl.h> 53#include <sys/syslog.h> 54 55#include <net/bpf.h> 56#include <net/ethernet.h> 57#include <net/if.h> 58#include <net/if_vlan_var.h> 59 60#include <netinet/in.h> 61#include <netinet/ip.h> 62#include <netinet/ip6.h> 63#include <netinet/tcp.h> 64 65#include "common/efx.h" 66 67#include "sfxge.h" 68#include "sfxge_tx.h" 69 70/* 71 * Estimate maximum number of Tx descriptors required for TSO packet. 72 * With minimum MSS and maximum mbuf length we might need more (even 73 * than a ring-ful of descriptors), but this should not happen in 74 * practice except due to deliberate attack. In that case we will 75 * truncate the output at a packet boundary. 76 */ 77#define SFXGE_TSO_MAX_DESC \ 78 (SFXGE_TSO_MAX_SEGS * 2 + SFXGE_TX_MAPPING_MAX_SEG - 1) 79 80/* 81 * Set the block level to ensure there is space to generate a 82 * large number of descriptors for TSO. 83 */ 84#define SFXGE_TXQ_BLOCK_LEVEL(_entries) \ 85 (EFX_TXQ_LIMIT(_entries) - SFXGE_TSO_MAX_DESC) 86 87#ifdef SFXGE_HAVE_MQ 88 89#define SFXGE_PARAM_TX_DPL_GET_MAX SFXGE_PARAM(tx_dpl_get_max) 90static int sfxge_tx_dpl_get_max = SFXGE_TX_DPL_GET_PKT_LIMIT_DEFAULT; 91TUNABLE_INT(SFXGE_PARAM_TX_DPL_GET_MAX, &sfxge_tx_dpl_get_max); 92SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_get_max, CTLFLAG_RDTUN, 93 &sfxge_tx_dpl_get_max, 0, 94 "Maximum number of any packets in deferred packet get-list"); 95 96#define SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX \ 97 SFXGE_PARAM(tx_dpl_get_non_tcp_max) 98static int sfxge_tx_dpl_get_non_tcp_max = 99 SFXGE_TX_DPL_GET_NON_TCP_PKT_LIMIT_DEFAULT; 100TUNABLE_INT(SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX, &sfxge_tx_dpl_get_non_tcp_max); 101SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_get_non_tcp_max, CTLFLAG_RDTUN, 102 &sfxge_tx_dpl_get_non_tcp_max, 0, 103 "Maximum number of non-TCP packets in deferred packet get-list"); 104 105#define SFXGE_PARAM_TX_DPL_PUT_MAX SFXGE_PARAM(tx_dpl_put_max) 106static int sfxge_tx_dpl_put_max = SFXGE_TX_DPL_PUT_PKT_LIMIT_DEFAULT; 107TUNABLE_INT(SFXGE_PARAM_TX_DPL_PUT_MAX, &sfxge_tx_dpl_put_max); 108SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_put_max, CTLFLAG_RDTUN, 109 &sfxge_tx_dpl_put_max, 0, 110 "Maximum number of any packets in deferred packet put-list"); 111 112#endif 113 114 115/* Forward declarations. */ 116static void sfxge_tx_qdpl_service(struct sfxge_txq *txq); 117static void sfxge_tx_qlist_post(struct sfxge_txq *txq); 118static void sfxge_tx_qunblock(struct sfxge_txq *txq); 119static int sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf, 120 const bus_dma_segment_t *dma_seg, int n_dma_seg); 121 122void 123sfxge_tx_qcomplete(struct sfxge_txq *txq, struct sfxge_evq *evq) 124{ 125 unsigned int completed; 126 127 SFXGE_EVQ_LOCK_ASSERT_OWNED(evq); 128 129 completed = txq->completed; 130 while (completed != txq->pending) { 131 struct sfxge_tx_mapping *stmp; 132 unsigned int id; 133 134 id = completed++ & txq->ptr_mask; 135 136 stmp = &txq->stmp[id]; 137 if (stmp->flags & TX_BUF_UNMAP) { 138 bus_dmamap_unload(txq->packet_dma_tag, stmp->map); 139 if (stmp->flags & TX_BUF_MBUF) { 140 struct mbuf *m = stmp->u.mbuf; 141 do 142 m = m_free(m); 143 while (m != NULL); 144 } else { 145 free(stmp->u.heap_buf, M_SFXGE); 146 } 147 stmp->flags = 0; 148 } 149 } 150 txq->completed = completed; 151 152 /* Check whether we need to unblock the queue. */ 153 mb(); 154 if (txq->blocked) { 155 unsigned int level; 156 157 level = txq->added - txq->completed; 158 if (level <= SFXGE_TXQ_UNBLOCK_LEVEL(txq->entries)) 159 sfxge_tx_qunblock(txq); 160 } 161} 162 163#ifdef SFXGE_HAVE_MQ 164 165static unsigned int 166sfxge_is_mbuf_non_tcp(struct mbuf *mbuf) 167{ 168 /* Absense of TCP checksum flags does not mean that it is non-TCP 169 * but it should be true if user wants to achieve high throughput. 170 */ 171 return (!(mbuf->m_pkthdr.csum_flags & (CSUM_IP_TCP | CSUM_IP6_TCP))); 172} 173 174/* 175 * Reorder the put list and append it to the get list. 176 */ 177static void 178sfxge_tx_qdpl_swizzle(struct sfxge_txq *txq) 179{ 180 struct sfxge_tx_dpl *stdp; 181 struct mbuf *mbuf, *get_next, **get_tailp; 182 volatile uintptr_t *putp; 183 uintptr_t put; 184 unsigned int count; 185 unsigned int non_tcp_count; 186 187 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 188 189 stdp = &txq->dpl; 190 191 /* Acquire the put list. */ 192 putp = &stdp->std_put; 193 put = atomic_readandclear_ptr(putp); 194 mbuf = (void *)put; 195 196 if (mbuf == NULL) 197 return; 198 199 /* Reverse the put list. */ 200 get_tailp = &mbuf->m_nextpkt; 201 get_next = NULL; 202 203 count = 0; 204 non_tcp_count = 0; 205 do { 206 struct mbuf *put_next; 207 208 non_tcp_count += sfxge_is_mbuf_non_tcp(mbuf); 209 put_next = mbuf->m_nextpkt; 210 mbuf->m_nextpkt = get_next; 211 get_next = mbuf; 212 mbuf = put_next; 213 214 count++; 215 } while (mbuf != NULL); 216 217 if (count > stdp->std_put_hiwat) 218 stdp->std_put_hiwat = count; 219 220 /* Append the reversed put list to the get list. */ 221 KASSERT(*get_tailp == NULL, ("*get_tailp != NULL")); 222 *stdp->std_getp = get_next; 223 stdp->std_getp = get_tailp; 224 stdp->std_get_count += count; 225 stdp->std_get_non_tcp_count += non_tcp_count; 226} 227 228#endif /* SFXGE_HAVE_MQ */ 229 230static void 231sfxge_tx_qreap(struct sfxge_txq *txq) 232{ 233 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 234 235 txq->reaped = txq->completed; 236} 237 238static void 239sfxge_tx_qlist_post(struct sfxge_txq *txq) 240{ 241 unsigned int old_added; 242 unsigned int level; 243 int rc; 244 245 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 246 247 KASSERT(txq->n_pend_desc != 0, ("txq->n_pend_desc == 0")); 248 KASSERT(txq->n_pend_desc <= SFXGE_TSO_MAX_DESC, 249 ("txq->n_pend_desc too large")); 250 KASSERT(!txq->blocked, ("txq->blocked")); 251 252 old_added = txq->added; 253 254 /* Post the fragment list. */ 255 rc = efx_tx_qpost(txq->common, txq->pend_desc, txq->n_pend_desc, 256 txq->reaped, &txq->added); 257 KASSERT(rc == 0, ("efx_tx_qpost() failed")); 258 259 /* If efx_tx_qpost() had to refragment, our information about 260 * buffers to free may be associated with the wrong 261 * descriptors. 262 */ 263 KASSERT(txq->added - old_added == txq->n_pend_desc, 264 ("efx_tx_qpost() refragmented descriptors")); 265 266 level = txq->added - txq->reaped; 267 KASSERT(level <= txq->entries, ("overfilled TX queue")); 268 269 /* Clear the fragment list. */ 270 txq->n_pend_desc = 0; 271 272 /* Have we reached the block level? */ 273 if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries)) 274 return; 275 276 /* Reap, and check again */ 277 sfxge_tx_qreap(txq); 278 level = txq->added - txq->reaped; 279 if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries)) 280 return; 281 282 txq->blocked = 1; 283 284 /* 285 * Avoid a race with completion interrupt handling that could leave 286 * the queue blocked. 287 */ 288 mb(); 289 sfxge_tx_qreap(txq); 290 level = txq->added - txq->reaped; 291 if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries)) { 292 mb(); 293 txq->blocked = 0; 294 } 295} 296 297static int sfxge_tx_queue_mbuf(struct sfxge_txq *txq, struct mbuf *mbuf) 298{ 299 bus_dmamap_t *used_map; 300 bus_dmamap_t map; 301 bus_dma_segment_t dma_seg[SFXGE_TX_MAPPING_MAX_SEG]; 302 unsigned int id; 303 struct sfxge_tx_mapping *stmp; 304 efx_buffer_t *desc; 305 int n_dma_seg; 306 int rc; 307 int i; 308 309 KASSERT(!txq->blocked, ("txq->blocked")); 310 311 if (mbuf->m_pkthdr.csum_flags & CSUM_TSO) 312 prefetch_read_many(mbuf->m_data); 313 314 if (__predict_false(txq->init_state != SFXGE_TXQ_STARTED)) { 315 rc = EINTR; 316 goto reject; 317 } 318 319 /* Load the packet for DMA. */ 320 id = txq->added & txq->ptr_mask; 321 stmp = &txq->stmp[id]; 322 rc = bus_dmamap_load_mbuf_sg(txq->packet_dma_tag, stmp->map, 323 mbuf, dma_seg, &n_dma_seg, 0); 324 if (rc == EFBIG) { 325 /* Try again. */ 326 struct mbuf *new_mbuf = m_collapse(mbuf, M_NOWAIT, 327 SFXGE_TX_MAPPING_MAX_SEG); 328 if (new_mbuf == NULL) 329 goto reject; 330 ++txq->collapses; 331 mbuf = new_mbuf; 332 rc = bus_dmamap_load_mbuf_sg(txq->packet_dma_tag, 333 stmp->map, mbuf, 334 dma_seg, &n_dma_seg, 0); 335 } 336 if (rc != 0) 337 goto reject; 338 339 /* Make the packet visible to the hardware. */ 340 bus_dmamap_sync(txq->packet_dma_tag, stmp->map, BUS_DMASYNC_PREWRITE); 341 342 used_map = &stmp->map; 343 344 if (mbuf->m_pkthdr.csum_flags & CSUM_TSO) { 345 rc = sfxge_tx_queue_tso(txq, mbuf, dma_seg, n_dma_seg); 346 if (rc < 0) 347 goto reject_mapped; 348 stmp = &txq->stmp[rc]; 349 } else { 350 /* Add the mapping to the fragment list, and set flags 351 * for the buffer. 352 */ 353 i = 0; 354 for (;;) { 355 desc = &txq->pend_desc[i]; 356 desc->eb_addr = dma_seg[i].ds_addr; 357 desc->eb_size = dma_seg[i].ds_len; 358 if (i == n_dma_seg - 1) { 359 desc->eb_eop = 1; 360 break; 361 } 362 desc->eb_eop = 0; 363 i++; 364 365 stmp->flags = 0; 366 if (__predict_false(stmp == 367 &txq->stmp[txq->ptr_mask])) 368 stmp = &txq->stmp[0]; 369 else 370 stmp++; 371 } 372 txq->n_pend_desc = n_dma_seg; 373 } 374 375 /* 376 * If the mapping required more than one descriptor 377 * then we need to associate the DMA map with the last 378 * descriptor, not the first. 379 */ 380 if (used_map != &stmp->map) { 381 map = stmp->map; 382 stmp->map = *used_map; 383 *used_map = map; 384 } 385 386 stmp->u.mbuf = mbuf; 387 stmp->flags = TX_BUF_UNMAP | TX_BUF_MBUF; 388 389 /* Post the fragment list. */ 390 sfxge_tx_qlist_post(txq); 391 392 return (0); 393 394reject_mapped: 395 bus_dmamap_unload(txq->packet_dma_tag, *used_map); 396reject: 397 /* Drop the packet on the floor. */ 398 m_freem(mbuf); 399 ++txq->drops; 400 401 return (rc); 402} 403 404#ifdef SFXGE_HAVE_MQ 405 406/* 407 * Drain the deferred packet list into the transmit queue. 408 */ 409static void 410sfxge_tx_qdpl_drain(struct sfxge_txq *txq) 411{ 412 struct sfxge_softc *sc; 413 struct sfxge_tx_dpl *stdp; 414 struct mbuf *mbuf, *next; 415 unsigned int count; 416 unsigned int non_tcp_count; 417 unsigned int pushed; 418 int rc; 419 420 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 421 422 sc = txq->sc; 423 stdp = &txq->dpl; 424 pushed = txq->added; 425 426 if (__predict_true(txq->init_state == SFXGE_TXQ_STARTED)) { 427 prefetch_read_many(sc->enp); 428 prefetch_read_many(txq->common); 429 } 430 431 mbuf = stdp->std_get; 432 count = stdp->std_get_count; 433 non_tcp_count = stdp->std_get_non_tcp_count; 434 435 if (count > stdp->std_get_hiwat) 436 stdp->std_get_hiwat = count; 437 438 while (count != 0) { 439 KASSERT(mbuf != NULL, ("mbuf == NULL")); 440 441 next = mbuf->m_nextpkt; 442 mbuf->m_nextpkt = NULL; 443 444 ETHER_BPF_MTAP(sc->ifnet, mbuf); /* packet capture */ 445 446 if (next != NULL) 447 prefetch_read_many(next); 448 449 rc = sfxge_tx_queue_mbuf(txq, mbuf); 450 --count; 451 non_tcp_count -= sfxge_is_mbuf_non_tcp(mbuf); 452 mbuf = next; 453 if (rc != 0) 454 continue; 455 456 if (txq->blocked) 457 break; 458 459 /* Push the fragments to the hardware in batches. */ 460 if (txq->added - pushed >= SFXGE_TX_BATCH) { 461 efx_tx_qpush(txq->common, txq->added); 462 pushed = txq->added; 463 } 464 } 465 466 if (count == 0) { 467 KASSERT(mbuf == NULL, ("mbuf != NULL")); 468 KASSERT(non_tcp_count == 0, 469 ("inconsistent TCP/non-TCP detection")); 470 stdp->std_get = NULL; 471 stdp->std_get_count = 0; 472 stdp->std_get_non_tcp_count = 0; 473 stdp->std_getp = &stdp->std_get; 474 } else { 475 stdp->std_get = mbuf; 476 stdp->std_get_count = count; 477 stdp->std_get_non_tcp_count = non_tcp_count; 478 } 479 480 if (txq->added != pushed) 481 efx_tx_qpush(txq->common, txq->added); 482 483 KASSERT(txq->blocked || stdp->std_get_count == 0, 484 ("queue unblocked but count is non-zero")); 485} 486 487#define SFXGE_TX_QDPL_PENDING(_txq) \ 488 ((_txq)->dpl.std_put != 0) 489 490/* 491 * Service the deferred packet list. 492 * 493 * NOTE: drops the txq mutex! 494 */ 495static void 496sfxge_tx_qdpl_service(struct sfxge_txq *txq) 497{ 498 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 499 500 do { 501 if (SFXGE_TX_QDPL_PENDING(txq)) 502 sfxge_tx_qdpl_swizzle(txq); 503 504 if (!txq->blocked) 505 sfxge_tx_qdpl_drain(txq); 506 507 SFXGE_TXQ_UNLOCK(txq); 508 } while (SFXGE_TX_QDPL_PENDING(txq) && 509 SFXGE_TXQ_TRYLOCK(txq)); 510} 511 512/* 513 * Put a packet on the deferred packet list. 514 * 515 * If we are called with the txq lock held, we put the packet on the "get 516 * list", otherwise we atomically push it on the "put list". The swizzle 517 * function takes care of ordering. 518 * 519 * The length of the put list is bounded by SFXGE_TX_MAX_DEFERRED. We 520 * overload the csum_data field in the mbuf to keep track of this length 521 * because there is no cheap alternative to avoid races. 522 */ 523static int 524sfxge_tx_qdpl_put(struct sfxge_txq *txq, struct mbuf *mbuf, int locked) 525{ 526 struct sfxge_tx_dpl *stdp; 527 528 stdp = &txq->dpl; 529 530 KASSERT(mbuf->m_nextpkt == NULL, ("mbuf->m_nextpkt != NULL")); 531 532 if (locked) { 533 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 534 535 sfxge_tx_qdpl_swizzle(txq); 536 537 if (stdp->std_get_count >= stdp->std_get_max) { 538 txq->get_overflow++; 539 return (ENOBUFS); 540 } 541 if (sfxge_is_mbuf_non_tcp(mbuf)) { 542 if (stdp->std_get_non_tcp_count >= 543 stdp->std_get_non_tcp_max) { 544 txq->get_non_tcp_overflow++; 545 return (ENOBUFS); 546 } 547 stdp->std_get_non_tcp_count++; 548 } 549 550 *(stdp->std_getp) = mbuf; 551 stdp->std_getp = &mbuf->m_nextpkt; 552 stdp->std_get_count++; 553 } else { 554 volatile uintptr_t *putp; 555 uintptr_t old; 556 uintptr_t new; 557 unsigned old_len; 558 559 putp = &stdp->std_put; 560 new = (uintptr_t)mbuf; 561 562 do { 563 old = *putp; 564 if (old != 0) { 565 struct mbuf *mp = (struct mbuf *)old; 566 old_len = mp->m_pkthdr.csum_data; 567 } else 568 old_len = 0; 569 if (old_len >= stdp->std_put_max) { 570 atomic_add_long(&txq->put_overflow, 1); 571 return (ENOBUFS); 572 } 573 mbuf->m_pkthdr.csum_data = old_len + 1; 574 mbuf->m_nextpkt = (void *)old; 575 } while (atomic_cmpset_ptr(putp, old, new) == 0); 576 } 577 578 return (0); 579} 580 581/* 582 * Called from if_transmit - will try to grab the txq lock and enqueue to the 583 * put list if it succeeds, otherwise try to push onto the defer list if space. 584 */ 585int 586sfxge_tx_packet_add(struct sfxge_txq *txq, struct mbuf *m) 587{ 588 int locked; 589 int rc; 590 591 if (!SFXGE_LINK_UP(txq->sc)) { 592 rc = ENETDOWN; 593 atomic_add_long(&txq->netdown_drops, 1); 594 goto fail; 595 } 596 597 /* 598 * Try to grab the txq lock. If we are able to get the lock, 599 * the packet will be appended to the "get list" of the deferred 600 * packet list. Otherwise, it will be pushed on the "put list". 601 */ 602 locked = SFXGE_TXQ_TRYLOCK(txq); 603 604 if (sfxge_tx_qdpl_put(txq, m, locked) != 0) { 605 if (locked) 606 SFXGE_TXQ_UNLOCK(txq); 607 rc = ENOBUFS; 608 goto fail; 609 } 610 611 /* 612 * Try to grab the lock again. 613 * 614 * If we are able to get the lock, we need to process the deferred 615 * packet list. If we are not able to get the lock, another thread 616 * is processing the list. 617 */ 618 if (!locked) 619 locked = SFXGE_TXQ_TRYLOCK(txq); 620 621 if (locked) { 622 /* Try to service the list. */ 623 sfxge_tx_qdpl_service(txq); 624 /* Lock has been dropped. */ 625 } 626 627 return (0); 628 629fail: 630 m_freem(m); 631 return (rc); 632} 633 634static void 635sfxge_tx_qdpl_flush(struct sfxge_txq *txq) 636{ 637 struct sfxge_tx_dpl *stdp = &txq->dpl; 638 struct mbuf *mbuf, *next; 639 640 SFXGE_TXQ_LOCK(txq); 641 642 sfxge_tx_qdpl_swizzle(txq); 643 for (mbuf = stdp->std_get; mbuf != NULL; mbuf = next) { 644 next = mbuf->m_nextpkt; 645 m_freem(mbuf); 646 } 647 stdp->std_get = NULL; 648 stdp->std_get_count = 0; 649 stdp->std_get_non_tcp_count = 0; 650 stdp->std_getp = &stdp->std_get; 651 652 SFXGE_TXQ_UNLOCK(txq); 653} 654 655void 656sfxge_if_qflush(struct ifnet *ifp) 657{ 658 struct sfxge_softc *sc; 659 int i; 660 661 sc = ifp->if_softc; 662 663 for (i = 0; i < sc->txq_count; i++) 664 sfxge_tx_qdpl_flush(sc->txq[i]); 665} 666 667/* 668 * TX start -- called by the stack. 669 */ 670int 671sfxge_if_transmit(struct ifnet *ifp, struct mbuf *m) 672{ 673 struct sfxge_softc *sc; 674 struct sfxge_txq *txq; 675 int rc; 676 677 sc = (struct sfxge_softc *)ifp->if_softc; 678 679 KASSERT(ifp->if_flags & IFF_UP, ("interface not up")); 680 681 /* Pick the desired transmit queue. */ 682 if (m->m_pkthdr.csum_flags & (CSUM_DELAY_DATA | CSUM_TSO)) { 683 int index = 0; 684 685 /* check if flowid is set */ 686 if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE) { 687 uint32_t hash = m->m_pkthdr.flowid; 688 689 index = sc->rx_indir_table[hash % SFXGE_RX_SCALE_MAX]; 690 } 691 txq = sc->txq[SFXGE_TXQ_IP_TCP_UDP_CKSUM + index]; 692 } else if (m->m_pkthdr.csum_flags & CSUM_DELAY_IP) { 693 txq = sc->txq[SFXGE_TXQ_IP_CKSUM]; 694 } else { 695 txq = sc->txq[SFXGE_TXQ_NON_CKSUM]; 696 } 697 698 rc = sfxge_tx_packet_add(txq, m); 699 700 return (rc); 701} 702 703#else /* !SFXGE_HAVE_MQ */ 704 705static void sfxge_if_start_locked(struct ifnet *ifp) 706{ 707 struct sfxge_softc *sc = ifp->if_softc; 708 struct sfxge_txq *txq; 709 struct mbuf *mbuf; 710 unsigned int pushed[SFXGE_TXQ_NTYPES]; 711 unsigned int q_index; 712 713 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) != 714 IFF_DRV_RUNNING) 715 return; 716 717 if (!sc->port.link_up) 718 return; 719 720 for (q_index = 0; q_index < SFXGE_TXQ_NTYPES; q_index++) { 721 txq = sc->txq[q_index]; 722 pushed[q_index] = txq->added; 723 } 724 725 while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) { 726 IFQ_DRV_DEQUEUE(&ifp->if_snd, mbuf); 727 if (mbuf == NULL) 728 break; 729 730 ETHER_BPF_MTAP(ifp, mbuf); /* packet capture */ 731 732 /* Pick the desired transmit queue. */ 733 if (mbuf->m_pkthdr.csum_flags & (CSUM_DELAY_DATA | CSUM_TSO)) 734 q_index = SFXGE_TXQ_IP_TCP_UDP_CKSUM; 735 else if (mbuf->m_pkthdr.csum_flags & CSUM_DELAY_IP) 736 q_index = SFXGE_TXQ_IP_CKSUM; 737 else 738 q_index = SFXGE_TXQ_NON_CKSUM; 739 txq = sc->txq[q_index]; 740 741 if (sfxge_tx_queue_mbuf(txq, mbuf) != 0) 742 continue; 743 744 if (txq->blocked) { 745 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 746 break; 747 } 748 749 /* Push the fragments to the hardware in batches. */ 750 if (txq->added - pushed[q_index] >= SFXGE_TX_BATCH) { 751 efx_tx_qpush(txq->common, txq->added); 752 pushed[q_index] = txq->added; 753 } 754 } 755 756 for (q_index = 0; q_index < SFXGE_TXQ_NTYPES; q_index++) { 757 txq = sc->txq[q_index]; 758 if (txq->added != pushed[q_index]) 759 efx_tx_qpush(txq->common, txq->added); 760 } 761} 762 763void sfxge_if_start(struct ifnet *ifp) 764{ 765 struct sfxge_softc *sc = ifp->if_softc; 766 767 SFXGE_TXQ_LOCK(sc->txq[0]); 768 sfxge_if_start_locked(ifp); 769 SFXGE_TXQ_UNLOCK(sc->txq[0]); 770} 771 772static void 773sfxge_tx_qdpl_service(struct sfxge_txq *txq) 774{ 775 struct ifnet *ifp = txq->sc->ifnet; 776 777 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 778 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 779 sfxge_if_start_locked(ifp); 780 SFXGE_TXQ_UNLOCK(txq); 781} 782 783#endif /* SFXGE_HAVE_MQ */ 784 785/* 786 * Software "TSO". Not quite as good as doing it in hardware, but 787 * still faster than segmenting in the stack. 788 */ 789 790struct sfxge_tso_state { 791 /* Output position */ 792 unsigned out_len; /* Remaining length in current segment */ 793 unsigned seqnum; /* Current sequence number */ 794 unsigned packet_space; /* Remaining space in current packet */ 795 796 /* Input position */ 797 uint64_t dma_addr; /* DMA address of current position */ 798 unsigned in_len; /* Remaining length in current mbuf */ 799 800 const struct mbuf *mbuf; /* Input mbuf (head of chain) */ 801 u_short protocol; /* Network protocol (after VLAN decap) */ 802 ssize_t nh_off; /* Offset of network header */ 803 ssize_t tcph_off; /* Offset of TCP header */ 804 unsigned header_len; /* Number of bytes of header */ 805 unsigned seg_size; /* TCP segment size */ 806}; 807 808static const struct ip *tso_iph(const struct sfxge_tso_state *tso) 809{ 810 KASSERT(tso->protocol == htons(ETHERTYPE_IP), 811 ("tso_iph() in non-IPv4 state")); 812 return (const struct ip *)(tso->mbuf->m_data + tso->nh_off); 813} 814static __unused const struct ip6_hdr *tso_ip6h(const struct sfxge_tso_state *tso) 815{ 816 KASSERT(tso->protocol == htons(ETHERTYPE_IPV6), 817 ("tso_ip6h() in non-IPv6 state")); 818 return (const struct ip6_hdr *)(tso->mbuf->m_data + tso->nh_off); 819} 820static const struct tcphdr *tso_tcph(const struct sfxge_tso_state *tso) 821{ 822 return (const struct tcphdr *)(tso->mbuf->m_data + tso->tcph_off); 823} 824 825/* Size of preallocated TSO header buffers. Larger blocks must be 826 * allocated from the heap. 827 */ 828#define TSOH_STD_SIZE 128 829 830/* At most half the descriptors in the queue at any time will refer to 831 * a TSO header buffer, since they must always be followed by a 832 * payload descriptor referring to an mbuf. 833 */ 834#define TSOH_COUNT(_txq_entries) ((_txq_entries) / 2u) 835#define TSOH_PER_PAGE (PAGE_SIZE / TSOH_STD_SIZE) 836#define TSOH_PAGE_COUNT(_txq_entries) \ 837 ((TSOH_COUNT(_txq_entries) + TSOH_PER_PAGE - 1) / TSOH_PER_PAGE) 838 839static int tso_init(struct sfxge_txq *txq) 840{ 841 struct sfxge_softc *sc = txq->sc; 842 unsigned int tsoh_page_count = TSOH_PAGE_COUNT(sc->txq_entries); 843 int i, rc; 844 845 /* Allocate TSO header buffers */ 846 txq->tsoh_buffer = malloc(tsoh_page_count * sizeof(txq->tsoh_buffer[0]), 847 M_SFXGE, M_WAITOK); 848 849 for (i = 0; i < tsoh_page_count; i++) { 850 rc = sfxge_dma_alloc(sc, PAGE_SIZE, &txq->tsoh_buffer[i]); 851 if (rc != 0) 852 goto fail; 853 } 854 855 return (0); 856 857fail: 858 while (i-- > 0) 859 sfxge_dma_free(&txq->tsoh_buffer[i]); 860 free(txq->tsoh_buffer, M_SFXGE); 861 txq->tsoh_buffer = NULL; 862 return (rc); 863} 864 865static void tso_fini(struct sfxge_txq *txq) 866{ 867 int i; 868 869 if (txq->tsoh_buffer != NULL) { 870 for (i = 0; i < TSOH_PAGE_COUNT(txq->sc->txq_entries); i++) 871 sfxge_dma_free(&txq->tsoh_buffer[i]); 872 free(txq->tsoh_buffer, M_SFXGE); 873 } 874} 875 876static void tso_start(struct sfxge_tso_state *tso, struct mbuf *mbuf) 877{ 878 struct ether_header *eh = mtod(mbuf, struct ether_header *); 879 const struct tcphdr *th; 880 struct tcphdr th_copy; 881 882 tso->mbuf = mbuf; 883 884 /* Find network protocol and header */ 885 tso->protocol = eh->ether_type; 886 if (tso->protocol == htons(ETHERTYPE_VLAN)) { 887 struct ether_vlan_header *veh = 888 mtod(mbuf, struct ether_vlan_header *); 889 tso->protocol = veh->evl_proto; 890 tso->nh_off = sizeof(*veh); 891 } else { 892 tso->nh_off = sizeof(*eh); 893 } 894 895 /* Find TCP header */ 896 if (tso->protocol == htons(ETHERTYPE_IP)) { 897 KASSERT(tso_iph(tso)->ip_p == IPPROTO_TCP, 898 ("TSO required on non-TCP packet")); 899 tso->tcph_off = tso->nh_off + 4 * tso_iph(tso)->ip_hl; 900 } else { 901 KASSERT(tso->protocol == htons(ETHERTYPE_IPV6), 902 ("TSO required on non-IP packet")); 903 KASSERT(tso_ip6h(tso)->ip6_nxt == IPPROTO_TCP, 904 ("TSO required on non-TCP packet")); 905 tso->tcph_off = tso->nh_off + sizeof(struct ip6_hdr); 906 } 907 908 KASSERT(mbuf->m_len >= tso->tcph_off, 909 ("network header is fragmented in mbuf")); 910 /* We need TCP header including flags (window is the next) */ 911 if (mbuf->m_len < tso->tcph_off + offsetof(struct tcphdr, th_win)) { 912 m_copydata(tso->mbuf, tso->tcph_off, sizeof(th_copy), 913 (caddr_t)&th_copy); 914 th = &th_copy; 915 } else { 916 th = tso_tcph(tso); 917 } 918 919 tso->header_len = tso->tcph_off + 4 * th->th_off; 920 tso->seg_size = mbuf->m_pkthdr.tso_segsz; 921 922 tso->seqnum = ntohl(th->th_seq); 923 924 /* These flags must not be duplicated */ 925 KASSERT(!(th->th_flags & (TH_URG | TH_SYN | TH_RST)), 926 ("incompatible TCP flag on TSO packet")); 927 928 tso->out_len = mbuf->m_pkthdr.len - tso->header_len; 929} 930 931/* 932 * tso_fill_packet_with_fragment - form descriptors for the current fragment 933 * 934 * Form descriptors for the current fragment, until we reach the end 935 * of fragment or end-of-packet. Return 0 on success, 1 if not enough 936 * space. 937 */ 938static void tso_fill_packet_with_fragment(struct sfxge_txq *txq, 939 struct sfxge_tso_state *tso) 940{ 941 efx_buffer_t *desc; 942 int n; 943 944 if (tso->in_len == 0 || tso->packet_space == 0) 945 return; 946 947 KASSERT(tso->in_len > 0, ("TSO input length went negative")); 948 KASSERT(tso->packet_space > 0, ("TSO packet space went negative")); 949 950 n = min(tso->in_len, tso->packet_space); 951 952 tso->packet_space -= n; 953 tso->out_len -= n; 954 tso->in_len -= n; 955 956 desc = &txq->pend_desc[txq->n_pend_desc++]; 957 desc->eb_addr = tso->dma_addr; 958 desc->eb_size = n; 959 desc->eb_eop = tso->out_len == 0 || tso->packet_space == 0; 960 961 tso->dma_addr += n; 962} 963 964/* Callback from bus_dmamap_load() for long TSO headers. */ 965static void tso_map_long_header(void *dma_addr_ret, 966 bus_dma_segment_t *segs, int nseg, 967 int error) 968{ 969 *(uint64_t *)dma_addr_ret = ((__predict_true(error == 0) && 970 __predict_true(nseg == 1)) ? 971 segs->ds_addr : 0); 972} 973 974/* 975 * tso_start_new_packet - generate a new header and prepare for the new packet 976 * 977 * Generate a new header and prepare for the new packet. Return 0 on 978 * success, or an error code if failed to alloc header. 979 */ 980static int tso_start_new_packet(struct sfxge_txq *txq, 981 struct sfxge_tso_state *tso, 982 unsigned int id) 983{ 984 struct sfxge_tx_mapping *stmp = &txq->stmp[id]; 985 struct tcphdr *tsoh_th; 986 unsigned ip_length; 987 caddr_t header; 988 uint64_t dma_addr; 989 bus_dmamap_t map; 990 efx_buffer_t *desc; 991 int rc; 992 993 /* Allocate a DMA-mapped header buffer. */ 994 if (__predict_true(tso->header_len <= TSOH_STD_SIZE)) { 995 unsigned int page_index = (id / 2) / TSOH_PER_PAGE; 996 unsigned int buf_index = (id / 2) % TSOH_PER_PAGE; 997 998 header = (txq->tsoh_buffer[page_index].esm_base + 999 buf_index * TSOH_STD_SIZE); 1000 dma_addr = (txq->tsoh_buffer[page_index].esm_addr + 1001 buf_index * TSOH_STD_SIZE); 1002 map = txq->tsoh_buffer[page_index].esm_map; 1003 1004 stmp->flags = 0; 1005 } else { 1006 /* We cannot use bus_dmamem_alloc() as that may sleep */ 1007 header = malloc(tso->header_len, M_SFXGE, M_NOWAIT); 1008 if (__predict_false(!header)) 1009 return (ENOMEM); 1010 rc = bus_dmamap_load(txq->packet_dma_tag, stmp->map, 1011 header, tso->header_len, 1012 tso_map_long_header, &dma_addr, 1013 BUS_DMA_NOWAIT); 1014 if (__predict_false(dma_addr == 0)) { 1015 if (rc == 0) { 1016 /* Succeeded but got >1 segment */ 1017 bus_dmamap_unload(txq->packet_dma_tag, 1018 stmp->map); 1019 rc = EINVAL; 1020 } 1021 free(header, M_SFXGE); 1022 return (rc); 1023 } 1024 map = stmp->map; 1025 1026 txq->tso_long_headers++; 1027 stmp->u.heap_buf = header; 1028 stmp->flags = TX_BUF_UNMAP; 1029 } 1030 1031 tsoh_th = (struct tcphdr *)(header + tso->tcph_off); 1032 1033 /* Copy and update the headers. */ 1034 m_copydata(tso->mbuf, 0, tso->header_len, header); 1035 1036 tsoh_th->th_seq = htonl(tso->seqnum); 1037 tso->seqnum += tso->seg_size; 1038 if (tso->out_len > tso->seg_size) { 1039 /* This packet will not finish the TSO burst. */ 1040 ip_length = tso->header_len - tso->nh_off + tso->seg_size; 1041 tsoh_th->th_flags &= ~(TH_FIN | TH_PUSH); 1042 } else { 1043 /* This packet will be the last in the TSO burst. */ 1044 ip_length = tso->header_len - tso->nh_off + tso->out_len; 1045 } 1046 1047 if (tso->protocol == htons(ETHERTYPE_IP)) { 1048 struct ip *tsoh_iph = (struct ip *)(header + tso->nh_off); 1049 tsoh_iph->ip_len = htons(ip_length); 1050 /* XXX We should increment ip_id, but FreeBSD doesn't 1051 * currently allocate extra IDs for multiple segments. 1052 */ 1053 } else { 1054 struct ip6_hdr *tsoh_iph = 1055 (struct ip6_hdr *)(header + tso->nh_off); 1056 tsoh_iph->ip6_plen = htons(ip_length - sizeof(*tsoh_iph)); 1057 } 1058 1059 /* Make the header visible to the hardware. */ 1060 bus_dmamap_sync(txq->packet_dma_tag, map, BUS_DMASYNC_PREWRITE); 1061 1062 tso->packet_space = tso->seg_size; 1063 txq->tso_packets++; 1064 1065 /* Form a descriptor for this header. */ 1066 desc = &txq->pend_desc[txq->n_pend_desc++]; 1067 desc->eb_addr = dma_addr; 1068 desc->eb_size = tso->header_len; 1069 desc->eb_eop = 0; 1070 1071 return (0); 1072} 1073 1074static int 1075sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf, 1076 const bus_dma_segment_t *dma_seg, int n_dma_seg) 1077{ 1078 struct sfxge_tso_state tso; 1079 unsigned int id, next_id; 1080 unsigned skipped = 0; 1081 1082 tso_start(&tso, mbuf); 1083 1084 while (dma_seg->ds_len + skipped <= tso.header_len) { 1085 skipped += dma_seg->ds_len; 1086 --n_dma_seg; 1087 KASSERT(n_dma_seg, ("no payload found in TSO packet")); 1088 ++dma_seg; 1089 } 1090 tso.in_len = dma_seg->ds_len + (tso.header_len - skipped); 1091 tso.dma_addr = dma_seg->ds_addr + (tso.header_len - skipped); 1092 1093 id = txq->added & txq->ptr_mask; 1094 if (__predict_false(tso_start_new_packet(txq, &tso, id))) 1095 return (-1); 1096 1097 while (1) { 1098 id = (id + 1) & txq->ptr_mask; 1099 tso_fill_packet_with_fragment(txq, &tso); 1100 1101 /* Move onto the next fragment? */ 1102 if (tso.in_len == 0) { 1103 --n_dma_seg; 1104 if (n_dma_seg == 0) 1105 break; 1106 ++dma_seg; 1107 tso.in_len = dma_seg->ds_len; 1108 tso.dma_addr = dma_seg->ds_addr; 1109 } 1110 1111 /* End of packet? */ 1112 if (tso.packet_space == 0) { 1113 /* If the queue is now full due to tiny MSS, 1114 * or we can't create another header, discard 1115 * the remainder of the input mbuf but do not 1116 * roll back the work we have done. 1117 */ 1118 if (txq->n_pend_desc + 1 /* header */ + n_dma_seg > 1119 SFXGE_TSO_MAX_DESC) { 1120 txq->tso_pdrop_too_many++; 1121 break; 1122 } 1123 next_id = (id + 1) & txq->ptr_mask; 1124 if (__predict_false(tso_start_new_packet(txq, &tso, 1125 next_id))) { 1126 txq->tso_pdrop_no_rsrc++; 1127 break; 1128 } 1129 id = next_id; 1130 } 1131 } 1132 1133 txq->tso_bursts++; 1134 return (id); 1135} 1136 1137static void 1138sfxge_tx_qunblock(struct sfxge_txq *txq) 1139{ 1140 struct sfxge_softc *sc; 1141 struct sfxge_evq *evq; 1142 1143 sc = txq->sc; 1144 evq = sc->evq[txq->evq_index]; 1145 1146 SFXGE_EVQ_LOCK_ASSERT_OWNED(evq); 1147 1148 if (__predict_false(txq->init_state != SFXGE_TXQ_STARTED)) 1149 return; 1150 1151 SFXGE_TXQ_LOCK(txq); 1152 1153 if (txq->blocked) { 1154 unsigned int level; 1155 1156 level = txq->added - txq->completed; 1157 if (level <= SFXGE_TXQ_UNBLOCK_LEVEL(txq->entries)) { 1158 /* reaped must be in sync with blocked */ 1159 sfxge_tx_qreap(txq); 1160 txq->blocked = 0; 1161 } 1162 } 1163 1164 sfxge_tx_qdpl_service(txq); 1165 /* note: lock has been dropped */ 1166} 1167 1168void 1169sfxge_tx_qflush_done(struct sfxge_txq *txq) 1170{ 1171 1172 txq->flush_state = SFXGE_FLUSH_DONE; 1173} 1174 1175static void 1176sfxge_tx_qstop(struct sfxge_softc *sc, unsigned int index) 1177{ 1178 struct sfxge_txq *txq; 1179 struct sfxge_evq *evq; 1180 unsigned int count; 1181 1182 txq = sc->txq[index]; 1183 evq = sc->evq[txq->evq_index]; 1184 1185 SFXGE_TXQ_LOCK(txq); 1186 1187 KASSERT(txq->init_state == SFXGE_TXQ_STARTED, 1188 ("txq->init_state != SFXGE_TXQ_STARTED")); 1189 1190 txq->init_state = SFXGE_TXQ_INITIALIZED; 1191 txq->flush_state = SFXGE_FLUSH_PENDING; 1192 1193 /* Flush the transmit queue. */ 1194 efx_tx_qflush(txq->common); 1195 1196 SFXGE_TXQ_UNLOCK(txq); 1197 1198 count = 0; 1199 do { 1200 /* Spin for 100ms. */ 1201 DELAY(100000); 1202 1203 if (txq->flush_state != SFXGE_FLUSH_PENDING) 1204 break; 1205 } while (++count < 20); 1206 1207 SFXGE_EVQ_LOCK(evq); 1208 SFXGE_TXQ_LOCK(txq); 1209 1210 KASSERT(txq->flush_state != SFXGE_FLUSH_FAILED, 1211 ("txq->flush_state == SFXGE_FLUSH_FAILED")); 1212 1213 txq->flush_state = SFXGE_FLUSH_DONE; 1214 1215 txq->blocked = 0; 1216 txq->pending = txq->added; 1217 1218 sfxge_tx_qcomplete(txq, evq); 1219 KASSERT(txq->completed == txq->added, 1220 ("txq->completed != txq->added")); 1221 1222 sfxge_tx_qreap(txq); 1223 KASSERT(txq->reaped == txq->completed, 1224 ("txq->reaped != txq->completed")); 1225 1226 txq->added = 0; 1227 txq->pending = 0; 1228 txq->completed = 0; 1229 txq->reaped = 0; 1230 1231 /* Destroy the common code transmit queue. */ 1232 efx_tx_qdestroy(txq->common); 1233 txq->common = NULL; 1234 1235 efx_sram_buf_tbl_clear(sc->enp, txq->buf_base_id, 1236 EFX_TXQ_NBUFS(sc->txq_entries)); 1237 1238 SFXGE_EVQ_UNLOCK(evq); 1239 SFXGE_TXQ_UNLOCK(txq); 1240} 1241 1242static int 1243sfxge_tx_qstart(struct sfxge_softc *sc, unsigned int index) 1244{ 1245 struct sfxge_txq *txq; 1246 efsys_mem_t *esmp; 1247 uint16_t flags; 1248 struct sfxge_evq *evq; 1249 int rc; 1250 1251 txq = sc->txq[index]; 1252 esmp = &txq->mem; 1253 evq = sc->evq[txq->evq_index]; 1254 1255 KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED, 1256 ("txq->init_state != SFXGE_TXQ_INITIALIZED")); 1257 KASSERT(evq->init_state == SFXGE_EVQ_STARTED, 1258 ("evq->init_state != SFXGE_EVQ_STARTED")); 1259 1260 /* Program the buffer table. */ 1261 if ((rc = efx_sram_buf_tbl_set(sc->enp, txq->buf_base_id, esmp, 1262 EFX_TXQ_NBUFS(sc->txq_entries))) != 0) 1263 return (rc); 1264 1265 /* Determine the kind of queue we are creating. */ 1266 switch (txq->type) { 1267 case SFXGE_TXQ_NON_CKSUM: 1268 flags = 0; 1269 break; 1270 case SFXGE_TXQ_IP_CKSUM: 1271 flags = EFX_CKSUM_IPV4; 1272 break; 1273 case SFXGE_TXQ_IP_TCP_UDP_CKSUM: 1274 flags = EFX_CKSUM_IPV4 | EFX_CKSUM_TCPUDP; 1275 break; 1276 default: 1277 KASSERT(0, ("Impossible TX queue")); 1278 flags = 0; 1279 break; 1280 } 1281 1282 /* Create the common code transmit queue. */ 1283 if ((rc = efx_tx_qcreate(sc->enp, index, txq->type, esmp, 1284 sc->txq_entries, txq->buf_base_id, flags, evq->common, 1285 &txq->common)) != 0) 1286 goto fail; 1287 1288 SFXGE_TXQ_LOCK(txq); 1289 1290 /* Enable the transmit queue. */ 1291 efx_tx_qenable(txq->common); 1292 1293 txq->init_state = SFXGE_TXQ_STARTED; 1294 1295 SFXGE_TXQ_UNLOCK(txq); 1296 1297 return (0); 1298 1299fail: 1300 efx_sram_buf_tbl_clear(sc->enp, txq->buf_base_id, 1301 EFX_TXQ_NBUFS(sc->txq_entries)); 1302 return (rc); 1303} 1304 1305void 1306sfxge_tx_stop(struct sfxge_softc *sc) 1307{ 1308 int index; 1309 1310 index = sc->txq_count; 1311 while (--index >= 0) 1312 sfxge_tx_qstop(sc, index); 1313 1314 /* Tear down the transmit module */ 1315 efx_tx_fini(sc->enp); 1316} 1317 1318int 1319sfxge_tx_start(struct sfxge_softc *sc) 1320{ 1321 int index; 1322 int rc; 1323 1324 /* Initialize the common code transmit module. */ 1325 if ((rc = efx_tx_init(sc->enp)) != 0) 1326 return (rc); 1327 1328 for (index = 0; index < sc->txq_count; index++) { 1329 if ((rc = sfxge_tx_qstart(sc, index)) != 0) 1330 goto fail; 1331 } 1332 1333 return (0); 1334 1335fail: 1336 while (--index >= 0) 1337 sfxge_tx_qstop(sc, index); 1338 1339 efx_tx_fini(sc->enp); 1340 1341 return (rc); 1342} 1343 1344/** 1345 * Destroy a transmit queue. 1346 */ 1347static void 1348sfxge_tx_qfini(struct sfxge_softc *sc, unsigned int index) 1349{ 1350 struct sfxge_txq *txq; 1351 unsigned int nmaps; 1352 1353 txq = sc->txq[index]; 1354 1355 KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED, 1356 ("txq->init_state != SFXGE_TXQ_INITIALIZED")); 1357 1358 if (txq->type == SFXGE_TXQ_IP_TCP_UDP_CKSUM) 1359 tso_fini(txq); 1360 1361 /* Free the context arrays. */ 1362 free(txq->pend_desc, M_SFXGE); 1363 nmaps = sc->txq_entries; 1364 while (nmaps-- != 0) 1365 bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map); 1366 free(txq->stmp, M_SFXGE); 1367 1368 /* Release DMA memory mapping. */ 1369 sfxge_dma_free(&txq->mem); 1370 1371 sc->txq[index] = NULL; 1372 1373#ifdef SFXGE_HAVE_MQ 1374 SFXGE_TXQ_LOCK_DESTROY(txq); 1375#endif 1376 1377 free(txq, M_SFXGE); 1378} 1379 1380static int 1381sfxge_tx_qinit(struct sfxge_softc *sc, unsigned int txq_index, 1382 enum sfxge_txq_type type, unsigned int evq_index) 1383{ 1384 char name[16]; 1385 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 1386 struct sysctl_oid *txq_node; 1387 struct sfxge_txq *txq; 1388 struct sfxge_evq *evq; 1389#ifdef SFXGE_HAVE_MQ 1390 struct sfxge_tx_dpl *stdp; 1391 struct sysctl_oid *dpl_node; 1392#endif 1393 efsys_mem_t *esmp; 1394 unsigned int nmaps; 1395 int rc; 1396 1397 txq = malloc(sizeof(struct sfxge_txq), M_SFXGE, M_ZERO | M_WAITOK); 1398 txq->sc = sc; 1399 txq->entries = sc->txq_entries; 1400 txq->ptr_mask = txq->entries - 1; 1401 1402 sc->txq[txq_index] = txq; 1403 esmp = &txq->mem; 1404 1405 evq = sc->evq[evq_index]; 1406 1407 /* Allocate and zero DMA space for the descriptor ring. */ 1408 if ((rc = sfxge_dma_alloc(sc, EFX_TXQ_SIZE(sc->txq_entries), esmp)) != 0) 1409 return (rc); 1410 1411 /* Allocate buffer table entries. */ 1412 sfxge_sram_buf_tbl_alloc(sc, EFX_TXQ_NBUFS(sc->txq_entries), 1413 &txq->buf_base_id); 1414 1415 /* Create a DMA tag for packet mappings. */ 1416 if (bus_dma_tag_create(sc->parent_dma_tag, 1, 0x1000, 1417 MIN(0x3FFFFFFFFFFFUL, BUS_SPACE_MAXADDR), BUS_SPACE_MAXADDR, NULL, 1418 NULL, 0x11000, SFXGE_TX_MAPPING_MAX_SEG, 0x1000, 0, NULL, NULL, 1419 &txq->packet_dma_tag) != 0) { 1420 device_printf(sc->dev, "Couldn't allocate txq DMA tag\n"); 1421 rc = ENOMEM; 1422 goto fail; 1423 } 1424 1425 /* Allocate pending descriptor array for batching writes. */ 1426 txq->pend_desc = malloc(sizeof(efx_buffer_t) * sc->txq_entries, 1427 M_SFXGE, M_ZERO | M_WAITOK); 1428 1429 /* Allocate and initialise mbuf DMA mapping array. */ 1430 txq->stmp = malloc(sizeof(struct sfxge_tx_mapping) * sc->txq_entries, 1431 M_SFXGE, M_ZERO | M_WAITOK); 1432 for (nmaps = 0; nmaps < sc->txq_entries; nmaps++) { 1433 rc = bus_dmamap_create(txq->packet_dma_tag, 0, 1434 &txq->stmp[nmaps].map); 1435 if (rc != 0) 1436 goto fail2; 1437 } 1438 1439 snprintf(name, sizeof(name), "%u", txq_index); 1440 txq_node = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(sc->txqs_node), 1441 OID_AUTO, name, CTLFLAG_RD, NULL, ""); 1442 if (txq_node == NULL) { 1443 rc = ENOMEM; 1444 goto fail_txq_node; 1445 } 1446 1447 if (type == SFXGE_TXQ_IP_TCP_UDP_CKSUM && 1448 (rc = tso_init(txq)) != 0) 1449 goto fail3; 1450 1451#ifdef SFXGE_HAVE_MQ 1452 if (sfxge_tx_dpl_get_max <= 0) { 1453 log(LOG_ERR, "%s=%d must be greater than 0", 1454 SFXGE_PARAM_TX_DPL_GET_MAX, sfxge_tx_dpl_get_max); 1455 rc = EINVAL; 1456 goto fail_tx_dpl_get_max; 1457 } 1458 if (sfxge_tx_dpl_get_non_tcp_max <= 0) { 1459 log(LOG_ERR, "%s=%d must be greater than 0", 1460 SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX, 1461 sfxge_tx_dpl_get_non_tcp_max); 1462 rc = EINVAL; 1463 goto fail_tx_dpl_get_max; 1464 } 1465 if (sfxge_tx_dpl_put_max < 0) { 1466 log(LOG_ERR, "%s=%d must be greater or equal to 0", 1467 SFXGE_PARAM_TX_DPL_PUT_MAX, sfxge_tx_dpl_put_max); 1468 rc = EINVAL; 1469 goto fail_tx_dpl_put_max; 1470 } 1471 1472 /* Initialize the deferred packet list. */ 1473 stdp = &txq->dpl; 1474 stdp->std_put_max = sfxge_tx_dpl_put_max; 1475 stdp->std_get_max = sfxge_tx_dpl_get_max; 1476 stdp->std_get_non_tcp_max = sfxge_tx_dpl_get_non_tcp_max; 1477 stdp->std_getp = &stdp->std_get; 1478 1479 SFXGE_TXQ_LOCK_INIT(txq, device_get_nameunit(sc->dev), txq_index); 1480 1481 dpl_node = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(txq_node), OID_AUTO, 1482 "dpl", CTLFLAG_RD, NULL, 1483 "Deferred packet list statistics"); 1484 if (dpl_node == NULL) { 1485 rc = ENOMEM; 1486 goto fail_dpl_node; 1487 } 1488 1489 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(dpl_node), OID_AUTO, 1490 "get_count", CTLFLAG_RD | CTLFLAG_STATS, 1491 &stdp->std_get_count, 0, ""); 1492 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(dpl_node), OID_AUTO, 1493 "get_non_tcp_count", CTLFLAG_RD | CTLFLAG_STATS, 1494 &stdp->std_get_non_tcp_count, 0, ""); 1495 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(dpl_node), OID_AUTO, 1496 "get_hiwat", CTLFLAG_RD | CTLFLAG_STATS, 1497 &stdp->std_get_hiwat, 0, ""); 1498 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(dpl_node), OID_AUTO, 1499 "put_hiwat", CTLFLAG_RD | CTLFLAG_STATS, 1500 &stdp->std_put_hiwat, 0, ""); 1501#endif 1502 1503 txq->type = type; 1504 txq->evq_index = evq_index; 1505 txq->txq_index = txq_index; 1506 txq->init_state = SFXGE_TXQ_INITIALIZED; 1507 1508 return (0); 1509 1510fail_dpl_node: 1511fail_tx_dpl_put_max: 1512fail_tx_dpl_get_max: 1513fail3: 1514fail_txq_node: 1515 free(txq->pend_desc, M_SFXGE); 1516fail2: 1517 while (nmaps-- != 0) 1518 bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map); 1519 free(txq->stmp, M_SFXGE); 1520 bus_dma_tag_destroy(txq->packet_dma_tag); 1521 1522fail: 1523 sfxge_dma_free(esmp); 1524 1525 return (rc); 1526} 1527 1528static const struct { 1529 const char *name; 1530 size_t offset; 1531} sfxge_tx_stats[] = { 1532#define SFXGE_TX_STAT(name, member) \ 1533 { #name, offsetof(struct sfxge_txq, member) } 1534 SFXGE_TX_STAT(tso_bursts, tso_bursts), 1535 SFXGE_TX_STAT(tso_packets, tso_packets), 1536 SFXGE_TX_STAT(tso_long_headers, tso_long_headers), 1537 SFXGE_TX_STAT(tso_pdrop_too_many, tso_pdrop_too_many), 1538 SFXGE_TX_STAT(tso_pdrop_no_rsrc, tso_pdrop_no_rsrc), 1539 SFXGE_TX_STAT(tx_collapses, collapses), 1540 SFXGE_TX_STAT(tx_drops, drops), 1541 SFXGE_TX_STAT(tx_get_overflow, get_overflow), 1542 SFXGE_TX_STAT(tx_get_non_tcp_overflow, get_non_tcp_overflow), 1543 SFXGE_TX_STAT(tx_put_overflow, put_overflow), 1544 SFXGE_TX_STAT(tx_netdown_drops, netdown_drops), 1545}; 1546 1547static int 1548sfxge_tx_stat_handler(SYSCTL_HANDLER_ARGS) 1549{ 1550 struct sfxge_softc *sc = arg1; 1551 unsigned int id = arg2; 1552 unsigned long sum; 1553 unsigned int index; 1554 1555 /* Sum across all TX queues */ 1556 sum = 0; 1557 for (index = 0; index < sc->txq_count; index++) 1558 sum += *(unsigned long *)((caddr_t)sc->txq[index] + 1559 sfxge_tx_stats[id].offset); 1560 1561 return (SYSCTL_OUT(req, &sum, sizeof(sum))); 1562} 1563 1564static void 1565sfxge_tx_stat_init(struct sfxge_softc *sc) 1566{ 1567 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 1568 struct sysctl_oid_list *stat_list; 1569 unsigned int id; 1570 1571 stat_list = SYSCTL_CHILDREN(sc->stats_node); 1572 1573 for (id = 0; id < nitems(sfxge_tx_stats); id++) { 1574 SYSCTL_ADD_PROC( 1575 ctx, stat_list, 1576 OID_AUTO, sfxge_tx_stats[id].name, 1577 CTLTYPE_ULONG|CTLFLAG_RD, 1578 sc, id, sfxge_tx_stat_handler, "LU", 1579 ""); 1580 } 1581} 1582 1583uint64_t 1584sfxge_tx_get_drops(struct sfxge_softc *sc) 1585{ 1586 unsigned int index; 1587 uint64_t drops = 0; 1588 struct sfxge_txq *txq; 1589 1590 /* Sum across all TX queues */ 1591 for (index = 0; index < sc->txq_count; index++) { 1592 txq = sc->txq[index]; 1593 /* 1594 * In theory, txq->put_overflow and txq->netdown_drops 1595 * should use atomic operation and other should be 1596 * obtained under txq lock, but it is just statistics. 1597 */ 1598 drops += txq->drops + txq->get_overflow + 1599 txq->get_non_tcp_overflow + 1600 txq->put_overflow + txq->netdown_drops + 1601 txq->tso_pdrop_too_many + txq->tso_pdrop_no_rsrc; 1602 } 1603 return (drops); 1604} 1605 1606void 1607sfxge_tx_fini(struct sfxge_softc *sc) 1608{ 1609 int index; 1610 1611 index = sc->txq_count; 1612 while (--index >= 0) 1613 sfxge_tx_qfini(sc, index); 1614 1615 sc->txq_count = 0; 1616} 1617 1618 1619int 1620sfxge_tx_init(struct sfxge_softc *sc) 1621{ 1622 struct sfxge_intr *intr; 1623 int index; 1624 int rc; 1625 1626 intr = &sc->intr; 1627 1628 KASSERT(intr->state == SFXGE_INTR_INITIALIZED, 1629 ("intr->state != SFXGE_INTR_INITIALIZED")); 1630 1631#ifdef SFXGE_HAVE_MQ 1632 sc->txq_count = SFXGE_TXQ_NTYPES - 1 + sc->intr.n_alloc; 1633#else 1634 sc->txq_count = SFXGE_TXQ_NTYPES; 1635#endif 1636 1637 sc->txqs_node = SYSCTL_ADD_NODE( 1638 device_get_sysctl_ctx(sc->dev), 1639 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), 1640 OID_AUTO, "txq", CTLFLAG_RD, NULL, "Tx queues"); 1641 if (sc->txqs_node == NULL) { 1642 rc = ENOMEM; 1643 goto fail_txq_node; 1644 } 1645 1646 /* Initialize the transmit queues */ 1647 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_NON_CKSUM, 1648 SFXGE_TXQ_NON_CKSUM, 0)) != 0) 1649 goto fail; 1650 1651 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_IP_CKSUM, 1652 SFXGE_TXQ_IP_CKSUM, 0)) != 0) 1653 goto fail2; 1654 1655 for (index = 0; 1656 index < sc->txq_count - SFXGE_TXQ_NTYPES + 1; 1657 index++) { 1658 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_NTYPES - 1 + index, 1659 SFXGE_TXQ_IP_TCP_UDP_CKSUM, index)) != 0) 1660 goto fail3; 1661 } 1662 1663 sfxge_tx_stat_init(sc); 1664 1665 return (0); 1666 1667fail3: 1668 while (--index >= 0) 1669 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_TCP_UDP_CKSUM + index); 1670 1671 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_CKSUM); 1672 1673fail2: 1674 sfxge_tx_qfini(sc, SFXGE_TXQ_NON_CKSUM); 1675 1676fail: 1677fail_txq_node: 1678 sc->txq_count = 0; 1679 return (rc); 1680} 1681