sfxge.c revision 291843
1/*- 2 * Copyright (c) 2010-2015 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * This software was developed in part by Philip Paeps under contract for 6 * Solarflare Communications, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright notice, 12 * this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright notice, 14 * this list of conditions and the following disclaimer in the documentation 15 * and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * The views and conclusions contained in the software and documentation are 30 * those of the authors and should not be interpreted as representing official 31 * policies, either expressed or implied, of the FreeBSD Project. 32 */ 33 34#include <sys/cdefs.h> 35__FBSDID("$FreeBSD: head/sys/dev/sfxge/sfxge.c 291843 2015-12-05 07:04:11Z arybchik $"); 36 37#include <sys/param.h> 38#include <sys/kernel.h> 39#include <sys/bus.h> 40#include <sys/rman.h> 41#include <sys/lock.h> 42#include <sys/module.h> 43#include <sys/mutex.h> 44#include <sys/smp.h> 45#include <sys/socket.h> 46#include <sys/taskqueue.h> 47#include <sys/sockio.h> 48#include <sys/sysctl.h> 49#include <sys/priv.h> 50#include <sys/syslog.h> 51 52#include <dev/pci/pcireg.h> 53#include <dev/pci/pcivar.h> 54 55#include <net/ethernet.h> 56#include <net/if.h> 57#include <net/if_var.h> 58#include <net/if_media.h> 59#include <net/if_types.h> 60 61#include "common/efx.h" 62 63#include "sfxge.h" 64#include "sfxge_rx.h" 65#include "sfxge_ioc.h" 66#include "sfxge_version.h" 67 68#define SFXGE_CAP (IFCAP_VLAN_MTU | IFCAP_VLAN_HWCSUM | \ 69 IFCAP_RXCSUM | IFCAP_TXCSUM | \ 70 IFCAP_RXCSUM_IPV6 | IFCAP_TXCSUM_IPV6 | \ 71 IFCAP_TSO4 | IFCAP_TSO6 | \ 72 IFCAP_JUMBO_MTU | \ 73 IFCAP_VLAN_HWTSO | IFCAP_LINKSTATE | IFCAP_HWSTATS) 74#define SFXGE_CAP_ENABLE SFXGE_CAP 75#define SFXGE_CAP_FIXED (IFCAP_VLAN_MTU | \ 76 IFCAP_JUMBO_MTU | IFCAP_LINKSTATE | IFCAP_HWSTATS) 77 78MALLOC_DEFINE(M_SFXGE, "sfxge", "Solarflare 10GigE driver"); 79 80 81SYSCTL_NODE(_hw, OID_AUTO, sfxge, CTLFLAG_RD, 0, 82 "SFXGE driver parameters"); 83 84#define SFXGE_PARAM_RX_RING SFXGE_PARAM(rx_ring) 85static int sfxge_rx_ring_entries = SFXGE_NDESCS; 86TUNABLE_INT(SFXGE_PARAM_RX_RING, &sfxge_rx_ring_entries); 87SYSCTL_INT(_hw_sfxge, OID_AUTO, rx_ring, CTLFLAG_RDTUN, 88 &sfxge_rx_ring_entries, 0, 89 "Maximum number of descriptors in a receive ring"); 90 91#define SFXGE_PARAM_TX_RING SFXGE_PARAM(tx_ring) 92static int sfxge_tx_ring_entries = SFXGE_NDESCS; 93TUNABLE_INT(SFXGE_PARAM_TX_RING, &sfxge_tx_ring_entries); 94SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_ring, CTLFLAG_RDTUN, 95 &sfxge_tx_ring_entries, 0, 96 "Maximum number of descriptors in a transmit ring"); 97 98#if EFSYS_OPT_MCDI_LOGGING 99#define SFXGE_PARAM_MCDI_LOGGING SFXGE_PARAM(mcdi_logging) 100static int sfxge_mcdi_logging = 0; 101TUNABLE_INT(SFXGE_PARAM_MCDI_LOGGING, &sfxge_mcdi_logging); 102#endif 103 104static void 105sfxge_reset(void *arg, int npending); 106 107static int 108sfxge_estimate_rsrc_limits(struct sfxge_softc *sc) 109{ 110 efx_drv_limits_t limits; 111 int rc; 112 unsigned int evq_max; 113 uint32_t evq_allocated; 114 uint32_t rxq_allocated; 115 uint32_t txq_allocated; 116 117 /* 118 * Limit the number of event queues to: 119 * - number of CPUs 120 * - hardwire maximum RSS channels 121 * - administratively specified maximum RSS channels 122 */ 123 evq_max = MIN(mp_ncpus, EFX_MAXRSS); 124 if (sc->max_rss_channels > 0) 125 evq_max = MIN(evq_max, sc->max_rss_channels); 126 127 memset(&limits, 0, sizeof(limits)); 128 129 limits.edl_min_evq_count = 1; 130 limits.edl_max_evq_count = evq_max; 131 limits.edl_min_txq_count = SFXGE_TXQ_NTYPES; 132 limits.edl_max_txq_count = evq_max + SFXGE_TXQ_NTYPES - 1; 133 limits.edl_min_rxq_count = 1; 134 limits.edl_max_rxq_count = evq_max; 135 136 efx_nic_set_drv_limits(sc->enp, &limits); 137 138 if ((rc = efx_nic_init(sc->enp)) != 0) 139 return (rc); 140 141 rc = efx_nic_get_vi_pool(sc->enp, &evq_allocated, &rxq_allocated, 142 &txq_allocated); 143 if (rc != 0) { 144 efx_nic_fini(sc->enp); 145 return (rc); 146 } 147 148 KASSERT(txq_allocated >= SFXGE_TXQ_NTYPES, 149 ("txq_allocated < SFXGE_TXQ_NTYPES")); 150 151 sc->evq_max = MIN(evq_allocated, evq_max); 152 sc->evq_max = MIN(rxq_allocated, sc->evq_max); 153 sc->evq_max = MIN(txq_allocated - (SFXGE_TXQ_NTYPES - 1), 154 sc->evq_max); 155 156 KASSERT(sc->evq_max <= evq_max, 157 ("allocated more than maximum requested")); 158 159 /* 160 * NIC is kept initialized in the case of success to be able to 161 * initialize port to find out media types. 162 */ 163 return (0); 164} 165 166static int 167sfxge_set_drv_limits(struct sfxge_softc *sc) 168{ 169 efx_drv_limits_t limits; 170 171 memset(&limits, 0, sizeof(limits)); 172 173 /* Limits are strict since take into account initial estimation */ 174 limits.edl_min_evq_count = limits.edl_max_evq_count = 175 sc->intr.n_alloc; 176 limits.edl_min_txq_count = limits.edl_max_txq_count = 177 sc->intr.n_alloc + SFXGE_TXQ_NTYPES - 1; 178 limits.edl_min_rxq_count = limits.edl_max_rxq_count = 179 sc->intr.n_alloc; 180 181 return (efx_nic_set_drv_limits(sc->enp, &limits)); 182} 183 184static int 185sfxge_start(struct sfxge_softc *sc) 186{ 187 int rc; 188 189 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); 190 191 if (sc->init_state == SFXGE_STARTED) 192 return (0); 193 194 if (sc->init_state != SFXGE_REGISTERED) { 195 rc = EINVAL; 196 goto fail; 197 } 198 199 /* Set required resource limits */ 200 if ((rc = sfxge_set_drv_limits(sc)) != 0) 201 goto fail; 202 203 if ((rc = efx_nic_init(sc->enp)) != 0) 204 goto fail; 205 206 /* Start processing interrupts. */ 207 if ((rc = sfxge_intr_start(sc)) != 0) 208 goto fail2; 209 210 /* Start processing events. */ 211 if ((rc = sfxge_ev_start(sc)) != 0) 212 goto fail3; 213 214 /* Fire up the port. */ 215 if ((rc = sfxge_port_start(sc)) != 0) 216 goto fail4; 217 218 /* Start the receiver side. */ 219 if ((rc = sfxge_rx_start(sc)) != 0) 220 goto fail5; 221 222 /* Start the transmitter side. */ 223 if ((rc = sfxge_tx_start(sc)) != 0) 224 goto fail6; 225 226 sc->init_state = SFXGE_STARTED; 227 228 /* Tell the stack we're running. */ 229 sc->ifnet->if_drv_flags |= IFF_DRV_RUNNING; 230 sc->ifnet->if_drv_flags &= ~IFF_DRV_OACTIVE; 231 232 return (0); 233 234fail6: 235 sfxge_rx_stop(sc); 236 237fail5: 238 sfxge_port_stop(sc); 239 240fail4: 241 sfxge_ev_stop(sc); 242 243fail3: 244 sfxge_intr_stop(sc); 245 246fail2: 247 efx_nic_fini(sc->enp); 248 249fail: 250 device_printf(sc->dev, "sfxge_start: %d\n", rc); 251 252 return (rc); 253} 254 255static void 256sfxge_if_init(void *arg) 257{ 258 struct sfxge_softc *sc; 259 260 sc = (struct sfxge_softc *)arg; 261 262 SFXGE_ADAPTER_LOCK(sc); 263 (void)sfxge_start(sc); 264 SFXGE_ADAPTER_UNLOCK(sc); 265} 266 267static void 268sfxge_stop(struct sfxge_softc *sc) 269{ 270 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); 271 272 if (sc->init_state != SFXGE_STARTED) 273 return; 274 275 sc->init_state = SFXGE_REGISTERED; 276 277 /* Stop the transmitter. */ 278 sfxge_tx_stop(sc); 279 280 /* Stop the receiver. */ 281 sfxge_rx_stop(sc); 282 283 /* Stop the port. */ 284 sfxge_port_stop(sc); 285 286 /* Stop processing events. */ 287 sfxge_ev_stop(sc); 288 289 /* Stop processing interrupts. */ 290 sfxge_intr_stop(sc); 291 292 efx_nic_fini(sc->enp); 293 294 sc->ifnet->if_drv_flags &= ~IFF_DRV_RUNNING; 295} 296 297 298static int 299sfxge_vpd_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc) 300{ 301 efx_vpd_value_t value; 302 int rc = 0; 303 304 switch (ioc->u.vpd.op) { 305 case SFXGE_VPD_OP_GET_KEYWORD: 306 value.evv_tag = ioc->u.vpd.tag; 307 value.evv_keyword = ioc->u.vpd.keyword; 308 rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value); 309 if (rc != 0) 310 break; 311 ioc->u.vpd.len = MIN(ioc->u.vpd.len, value.evv_length); 312 if (ioc->u.vpd.payload != 0) { 313 rc = copyout(value.evv_value, ioc->u.vpd.payload, 314 ioc->u.vpd.len); 315 } 316 break; 317 case SFXGE_VPD_OP_SET_KEYWORD: 318 if (ioc->u.vpd.len > sizeof(value.evv_value)) 319 return (EINVAL); 320 value.evv_tag = ioc->u.vpd.tag; 321 value.evv_keyword = ioc->u.vpd.keyword; 322 value.evv_length = ioc->u.vpd.len; 323 rc = copyin(ioc->u.vpd.payload, value.evv_value, value.evv_length); 324 if (rc != 0) 325 break; 326 rc = efx_vpd_set(sc->enp, sc->vpd_data, sc->vpd_size, &value); 327 if (rc != 0) 328 break; 329 rc = efx_vpd_verify(sc->enp, sc->vpd_data, sc->vpd_size); 330 if (rc != 0) 331 break; 332 rc = efx_vpd_write(sc->enp, sc->vpd_data, sc->vpd_size); 333 break; 334 default: 335 rc = EOPNOTSUPP; 336 break; 337 } 338 339 return (rc); 340} 341 342static int 343sfxge_private_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc) 344{ 345 switch (ioc->op) { 346 case SFXGE_MCDI_IOC: 347 return (sfxge_mcdi_ioctl(sc, ioc)); 348 case SFXGE_NVRAM_IOC: 349 return (sfxge_nvram_ioctl(sc, ioc)); 350 case SFXGE_VPD_IOC: 351 return (sfxge_vpd_ioctl(sc, ioc)); 352 default: 353 return (EOPNOTSUPP); 354 } 355} 356 357 358static int 359sfxge_if_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data) 360{ 361 struct sfxge_softc *sc; 362 struct ifreq *ifr; 363 sfxge_ioc_t ioc; 364 int error; 365 366 ifr = (struct ifreq *)data; 367 sc = ifp->if_softc; 368 error = 0; 369 370 switch (command) { 371 case SIOCSIFFLAGS: 372 SFXGE_ADAPTER_LOCK(sc); 373 if (ifp->if_flags & IFF_UP) { 374 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 375 if ((ifp->if_flags ^ sc->if_flags) & 376 (IFF_PROMISC | IFF_ALLMULTI)) { 377 sfxge_mac_filter_set(sc); 378 } 379 } else 380 sfxge_start(sc); 381 } else 382 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 383 sfxge_stop(sc); 384 sc->if_flags = ifp->if_flags; 385 SFXGE_ADAPTER_UNLOCK(sc); 386 break; 387 case SIOCSIFMTU: 388 if (ifr->ifr_mtu == ifp->if_mtu) { 389 /* Nothing to do */ 390 error = 0; 391 } else if (ifr->ifr_mtu > SFXGE_MAX_MTU) { 392 error = EINVAL; 393 } else if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 394 ifp->if_mtu = ifr->ifr_mtu; 395 error = 0; 396 } else { 397 /* Restart required */ 398 SFXGE_ADAPTER_LOCK(sc); 399 sfxge_stop(sc); 400 ifp->if_mtu = ifr->ifr_mtu; 401 error = sfxge_start(sc); 402 SFXGE_ADAPTER_UNLOCK(sc); 403 if (error != 0) { 404 ifp->if_flags &= ~IFF_UP; 405 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 406 if_down(ifp); 407 } 408 } 409 break; 410 case SIOCADDMULTI: 411 case SIOCDELMULTI: 412 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 413 sfxge_mac_filter_set(sc); 414 break; 415 case SIOCSIFCAP: 416 { 417 int reqcap = ifr->ifr_reqcap; 418 int capchg_mask; 419 420 SFXGE_ADAPTER_LOCK(sc); 421 422 /* Capabilities to be changed in accordance with request */ 423 capchg_mask = ifp->if_capenable ^ reqcap; 424 425 /* 426 * The networking core already rejects attempts to 427 * enable capabilities we don't have. We still have 428 * to reject attempts to disable capabilities that we 429 * can't (yet) disable. 430 */ 431 KASSERT((reqcap & ~ifp->if_capabilities) == 0, 432 ("Unsupported capabilities 0x%x requested 0x%x vs " 433 "supported 0x%x", 434 reqcap & ~ifp->if_capabilities, 435 reqcap , ifp->if_capabilities)); 436 if (capchg_mask & SFXGE_CAP_FIXED) { 437 error = EINVAL; 438 SFXGE_ADAPTER_UNLOCK(sc); 439 break; 440 } 441 442 /* Check request before any changes */ 443 if ((capchg_mask & IFCAP_TSO4) && 444 (reqcap & (IFCAP_TSO4 | IFCAP_TXCSUM)) == IFCAP_TSO4) { 445 error = EAGAIN; 446 SFXGE_ADAPTER_UNLOCK(sc); 447 if_printf(ifp, "enable txcsum before tso4\n"); 448 break; 449 } 450 if ((capchg_mask & IFCAP_TSO6) && 451 (reqcap & (IFCAP_TSO6 | IFCAP_TXCSUM_IPV6)) == IFCAP_TSO6) { 452 error = EAGAIN; 453 SFXGE_ADAPTER_UNLOCK(sc); 454 if_printf(ifp, "enable txcsum6 before tso6\n"); 455 break; 456 } 457 458 if (reqcap & IFCAP_TXCSUM) { 459 ifp->if_hwassist |= (CSUM_IP | CSUM_TCP | CSUM_UDP); 460 } else { 461 ifp->if_hwassist &= ~(CSUM_IP | CSUM_TCP | CSUM_UDP); 462 if (reqcap & IFCAP_TSO4) { 463 reqcap &= ~IFCAP_TSO4; 464 if_printf(ifp, 465 "tso4 disabled due to -txcsum\n"); 466 } 467 } 468 if (reqcap & IFCAP_TXCSUM_IPV6) { 469 ifp->if_hwassist |= (CSUM_TCP_IPV6 | CSUM_UDP_IPV6); 470 } else { 471 ifp->if_hwassist &= ~(CSUM_TCP_IPV6 | CSUM_UDP_IPV6); 472 if (reqcap & IFCAP_TSO6) { 473 reqcap &= ~IFCAP_TSO6; 474 if_printf(ifp, 475 "tso6 disabled due to -txcsum6\n"); 476 } 477 } 478 479 /* 480 * The kernel takes both IFCAP_TSOx and CSUM_TSO into 481 * account before using TSO. So, we do not touch 482 * checksum flags when IFCAP_TSOx is modified. 483 * Note that CSUM_TSO is (CSUM_IP_TSO|CSUM_IP6_TSO), 484 * but both bits are set in IPv4 and IPv6 mbufs. 485 */ 486 487 ifp->if_capenable = reqcap; 488 489 SFXGE_ADAPTER_UNLOCK(sc); 490 break; 491 } 492 case SIOCSIFMEDIA: 493 case SIOCGIFMEDIA: 494 error = ifmedia_ioctl(ifp, ifr, &sc->media, command); 495 break; 496 case SIOCGPRIVATE_0: 497 error = priv_check(curthread, PRIV_DRIVER); 498 if (error != 0) 499 break; 500 error = copyin(ifr->ifr_data, &ioc, sizeof(ioc)); 501 if (error != 0) 502 return (error); 503 error = sfxge_private_ioctl(sc, &ioc); 504 if (error == 0) { 505 error = copyout(&ioc, ifr->ifr_data, sizeof(ioc)); 506 } 507 break; 508 default: 509 error = ether_ioctl(ifp, command, data); 510 } 511 512 return (error); 513} 514 515static void 516sfxge_ifnet_fini(struct ifnet *ifp) 517{ 518 struct sfxge_softc *sc = ifp->if_softc; 519 520 SFXGE_ADAPTER_LOCK(sc); 521 sfxge_stop(sc); 522 SFXGE_ADAPTER_UNLOCK(sc); 523 524 ifmedia_removeall(&sc->media); 525 ether_ifdetach(ifp); 526 if_free(ifp); 527} 528 529static int 530sfxge_ifnet_init(struct ifnet *ifp, struct sfxge_softc *sc) 531{ 532 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp); 533 device_t dev; 534 int rc; 535 536 dev = sc->dev; 537 sc->ifnet = ifp; 538 539 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 540 ifp->if_init = sfxge_if_init; 541 ifp->if_softc = sc; 542 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 543 ifp->if_ioctl = sfxge_if_ioctl; 544 545 ifp->if_capabilities = SFXGE_CAP; 546 ifp->if_capenable = SFXGE_CAP_ENABLE; 547 ifp->if_hw_tsomax = SFXGE_TSO_MAX_SIZE; 548 ifp->if_hw_tsomaxsegcount = SFXGE_TX_MAPPING_MAX_SEG; 549 ifp->if_hw_tsomaxsegsize = PAGE_SIZE; 550 551#ifdef SFXGE_LRO 552 ifp->if_capabilities |= IFCAP_LRO; 553 ifp->if_capenable |= IFCAP_LRO; 554#endif 555 556 if (encp->enc_hw_tx_insert_vlan_enabled) { 557 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; 558 ifp->if_capenable |= IFCAP_VLAN_HWTAGGING; 559 } 560 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO | 561 CSUM_TCP_IPV6 | CSUM_UDP_IPV6; 562 563 ether_ifattach(ifp, encp->enc_mac_addr); 564 565 ifp->if_transmit = sfxge_if_transmit; 566 ifp->if_qflush = sfxge_if_qflush; 567 568 ifp->if_get_counter = sfxge_get_counter; 569 570 DBGPRINT(sc->dev, "ifmedia_init"); 571 if ((rc = sfxge_port_ifmedia_init(sc)) != 0) 572 goto fail; 573 574 return (0); 575 576fail: 577 ether_ifdetach(sc->ifnet); 578 return (rc); 579} 580 581void 582sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n, uint32_t *idp) 583{ 584 KASSERT(sc->buffer_table_next + n <= 585 efx_nic_cfg_get(sc->enp)->enc_buftbl_limit, 586 ("buffer table full")); 587 588 *idp = sc->buffer_table_next; 589 sc->buffer_table_next += n; 590} 591 592static int 593sfxge_bar_init(struct sfxge_softc *sc) 594{ 595 efsys_bar_t *esbp = &sc->bar; 596 597 esbp->esb_rid = PCIR_BAR(EFX_MEM_BAR); 598 if ((esbp->esb_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, 599 &esbp->esb_rid, RF_ACTIVE)) == NULL) { 600 device_printf(sc->dev, "Cannot allocate BAR region %d\n", 601 EFX_MEM_BAR); 602 return (ENXIO); 603 } 604 esbp->esb_tag = rman_get_bustag(esbp->esb_res); 605 esbp->esb_handle = rman_get_bushandle(esbp->esb_res); 606 607 SFXGE_BAR_LOCK_INIT(esbp, device_get_nameunit(sc->dev)); 608 609 return (0); 610} 611 612static void 613sfxge_bar_fini(struct sfxge_softc *sc) 614{ 615 efsys_bar_t *esbp = &sc->bar; 616 617 bus_release_resource(sc->dev, SYS_RES_MEMORY, esbp->esb_rid, 618 esbp->esb_res); 619 SFXGE_BAR_LOCK_DESTROY(esbp); 620} 621 622static int 623sfxge_create(struct sfxge_softc *sc) 624{ 625 device_t dev; 626 efx_nic_t *enp; 627 int error; 628 char rss_param_name[sizeof(SFXGE_PARAM(%d.max_rss_channels))]; 629#if EFSYS_OPT_MCDI_LOGGING 630 char mcdi_log_param_name[sizeof(SFXGE_PARAM(%d.mcdi_logging))]; 631#endif 632 633 dev = sc->dev; 634 635 SFXGE_ADAPTER_LOCK_INIT(sc, device_get_nameunit(sc->dev)); 636 637 sc->max_rss_channels = 0; 638 snprintf(rss_param_name, sizeof(rss_param_name), 639 SFXGE_PARAM(%d.max_rss_channels), 640 (int)device_get_unit(dev)); 641 TUNABLE_INT_FETCH(rss_param_name, &sc->max_rss_channels); 642#if EFSYS_OPT_MCDI_LOGGING 643 sc->mcdi_logging = sfxge_mcdi_logging; 644 snprintf(mcdi_log_param_name, sizeof(mcdi_log_param_name), 645 SFXGE_PARAM(%d.mcdi_logging), 646 (int)device_get_unit(dev)); 647 TUNABLE_INT_FETCH(mcdi_log_param_name, &sc->mcdi_logging); 648#endif 649 650 sc->stats_node = SYSCTL_ADD_NODE( 651 device_get_sysctl_ctx(dev), 652 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 653 OID_AUTO, "stats", CTLFLAG_RD, NULL, "Statistics"); 654 if (sc->stats_node == NULL) { 655 error = ENOMEM; 656 goto fail; 657 } 658 659 TASK_INIT(&sc->task_reset, 0, sfxge_reset, sc); 660 661 (void) pci_enable_busmaster(dev); 662 663 /* Initialize DMA mappings. */ 664 DBGPRINT(sc->dev, "dma_init..."); 665 if ((error = sfxge_dma_init(sc)) != 0) 666 goto fail; 667 668 /* Map the device registers. */ 669 DBGPRINT(sc->dev, "bar_init..."); 670 if ((error = sfxge_bar_init(sc)) != 0) 671 goto fail; 672 673 error = efx_family(pci_get_vendor(dev), pci_get_device(dev), 674 &sc->family); 675 KASSERT(error == 0, ("Family should be filtered by sfxge_probe()")); 676 677 DBGPRINT(sc->dev, "nic_create..."); 678 679 /* Create the common code nic object. */ 680 SFXGE_EFSYS_LOCK_INIT(&sc->enp_lock, 681 device_get_nameunit(sc->dev), "nic"); 682 if ((error = efx_nic_create(sc->family, (efsys_identifier_t *)sc, 683 &sc->bar, &sc->enp_lock, &enp)) != 0) 684 goto fail3; 685 sc->enp = enp; 686 687 if (!ISP2(sfxge_rx_ring_entries) || 688 (sfxge_rx_ring_entries < EFX_RXQ_MINNDESCS) || 689 (sfxge_rx_ring_entries > EFX_RXQ_MAXNDESCS)) { 690 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u", 691 SFXGE_PARAM_RX_RING, sfxge_rx_ring_entries, 692 EFX_RXQ_MINNDESCS, EFX_RXQ_MAXNDESCS); 693 error = EINVAL; 694 goto fail_rx_ring_entries; 695 } 696 sc->rxq_entries = sfxge_rx_ring_entries; 697 698 if (!ISP2(sfxge_tx_ring_entries) || 699 (sfxge_tx_ring_entries < EFX_TXQ_MINNDESCS) || 700 (sfxge_tx_ring_entries > EFX_TXQ_MAXNDESCS(efx_nic_cfg_get(enp)))) { 701 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u", 702 SFXGE_PARAM_TX_RING, sfxge_tx_ring_entries, 703 EFX_TXQ_MINNDESCS, EFX_TXQ_MAXNDESCS(efx_nic_cfg_get(enp))); 704 error = EINVAL; 705 goto fail_tx_ring_entries; 706 } 707 sc->txq_entries = sfxge_tx_ring_entries; 708 709 /* Initialize MCDI to talk to the microcontroller. */ 710 DBGPRINT(sc->dev, "mcdi_init..."); 711 if ((error = sfxge_mcdi_init(sc)) != 0) 712 goto fail4; 713 714 /* Probe the NIC and build the configuration data area. */ 715 DBGPRINT(sc->dev, "nic_probe..."); 716 if ((error = efx_nic_probe(enp)) != 0) 717 goto fail5; 718 719 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 720 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 721 OID_AUTO, "version", CTLFLAG_RD, 722 SFXGE_VERSION_STRING, 0, 723 "Driver version"); 724 725 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 726 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 727 OID_AUTO, "phy_type", CTLFLAG_RD, 728 NULL, efx_nic_cfg_get(enp)->enc_phy_type, 729 "PHY type"); 730 731 /* Initialize the NVRAM. */ 732 DBGPRINT(sc->dev, "nvram_init..."); 733 if ((error = efx_nvram_init(enp)) != 0) 734 goto fail6; 735 736 /* Initialize the VPD. */ 737 DBGPRINT(sc->dev, "vpd_init..."); 738 if ((error = efx_vpd_init(enp)) != 0) 739 goto fail7; 740 741 efx_mcdi_new_epoch(enp); 742 743 /* Reset the NIC. */ 744 DBGPRINT(sc->dev, "nic_reset..."); 745 if ((error = efx_nic_reset(enp)) != 0) 746 goto fail8; 747 748 /* Initialize buffer table allocation. */ 749 sc->buffer_table_next = 0; 750 751 /* 752 * Guarantee minimum and estimate maximum number of event queues 753 * to take it into account when MSI-X interrupts are allocated. 754 * It initializes NIC and keeps it initialized on success. 755 */ 756 if ((error = sfxge_estimate_rsrc_limits(sc)) != 0) 757 goto fail8; 758 759 /* Set up interrupts. */ 760 DBGPRINT(sc->dev, "intr_init..."); 761 if ((error = sfxge_intr_init(sc)) != 0) 762 goto fail9; 763 764 /* Initialize event processing state. */ 765 DBGPRINT(sc->dev, "ev_init..."); 766 if ((error = sfxge_ev_init(sc)) != 0) 767 goto fail11; 768 769 /* Initialize port state. */ 770 DBGPRINT(sc->dev, "port_init..."); 771 if ((error = sfxge_port_init(sc)) != 0) 772 goto fail12; 773 774 /* Initialize receive state. */ 775 DBGPRINT(sc->dev, "rx_init..."); 776 if ((error = sfxge_rx_init(sc)) != 0) 777 goto fail13; 778 779 /* Initialize transmit state. */ 780 DBGPRINT(sc->dev, "tx_init..."); 781 if ((error = sfxge_tx_init(sc)) != 0) 782 goto fail14; 783 784 sc->init_state = SFXGE_INITIALIZED; 785 786 DBGPRINT(sc->dev, "success"); 787 return (0); 788 789fail14: 790 sfxge_rx_fini(sc); 791 792fail13: 793 sfxge_port_fini(sc); 794 795fail12: 796 sfxge_ev_fini(sc); 797 798fail11: 799 sfxge_intr_fini(sc); 800 801fail9: 802 efx_nic_fini(sc->enp); 803 804fail8: 805 efx_vpd_fini(enp); 806 807fail7: 808 efx_nvram_fini(enp); 809 810fail6: 811 efx_nic_unprobe(enp); 812 813fail5: 814 sfxge_mcdi_fini(sc); 815 816fail4: 817fail_tx_ring_entries: 818fail_rx_ring_entries: 819 sc->enp = NULL; 820 efx_nic_destroy(enp); 821 SFXGE_EFSYS_LOCK_DESTROY(&sc->enp_lock); 822 823fail3: 824 sfxge_bar_fini(sc); 825 (void) pci_disable_busmaster(sc->dev); 826 827fail: 828 DBGPRINT(sc->dev, "failed %d", error); 829 sc->dev = NULL; 830 SFXGE_ADAPTER_LOCK_DESTROY(sc); 831 return (error); 832} 833 834static void 835sfxge_destroy(struct sfxge_softc *sc) 836{ 837 efx_nic_t *enp; 838 839 /* Clean up transmit state. */ 840 sfxge_tx_fini(sc); 841 842 /* Clean up receive state. */ 843 sfxge_rx_fini(sc); 844 845 /* Clean up port state. */ 846 sfxge_port_fini(sc); 847 848 /* Clean up event processing state. */ 849 sfxge_ev_fini(sc); 850 851 /* Clean up interrupts. */ 852 sfxge_intr_fini(sc); 853 854 /* Tear down common code subsystems. */ 855 efx_nic_reset(sc->enp); 856 efx_vpd_fini(sc->enp); 857 efx_nvram_fini(sc->enp); 858 efx_nic_unprobe(sc->enp); 859 860 /* Tear down MCDI. */ 861 sfxge_mcdi_fini(sc); 862 863 /* Destroy common code context. */ 864 enp = sc->enp; 865 sc->enp = NULL; 866 efx_nic_destroy(enp); 867 868 /* Free DMA memory. */ 869 sfxge_dma_fini(sc); 870 871 /* Free mapped BARs. */ 872 sfxge_bar_fini(sc); 873 874 (void) pci_disable_busmaster(sc->dev); 875 876 taskqueue_drain(taskqueue_thread, &sc->task_reset); 877 878 /* Destroy the softc lock. */ 879 SFXGE_ADAPTER_LOCK_DESTROY(sc); 880} 881 882static int 883sfxge_vpd_handler(SYSCTL_HANDLER_ARGS) 884{ 885 struct sfxge_softc *sc = arg1; 886 efx_vpd_value_t value; 887 int rc; 888 889 value.evv_tag = arg2 >> 16; 890 value.evv_keyword = arg2 & 0xffff; 891 if ((rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value)) 892 != 0) 893 return (rc); 894 895 return (SYSCTL_OUT(req, value.evv_value, value.evv_length)); 896} 897 898static void 899sfxge_vpd_try_add(struct sfxge_softc *sc, struct sysctl_oid_list *list, 900 efx_vpd_tag_t tag, const char *keyword) 901{ 902 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 903 efx_vpd_value_t value; 904 905 /* Check whether VPD tag/keyword is present */ 906 value.evv_tag = tag; 907 value.evv_keyword = EFX_VPD_KEYWORD(keyword[0], keyword[1]); 908 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) != 0) 909 return; 910 911 SYSCTL_ADD_PROC( 912 ctx, list, OID_AUTO, keyword, CTLTYPE_STRING|CTLFLAG_RD, 913 sc, tag << 16 | EFX_VPD_KEYWORD(keyword[0], keyword[1]), 914 sfxge_vpd_handler, "A", ""); 915} 916 917static int 918sfxge_vpd_init(struct sfxge_softc *sc) 919{ 920 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 921 struct sysctl_oid *vpd_node; 922 struct sysctl_oid_list *vpd_list; 923 char keyword[3]; 924 efx_vpd_value_t value; 925 int rc; 926 927 if ((rc = efx_vpd_size(sc->enp, &sc->vpd_size)) != 0) { 928 /* 929 * Unpriviledged functions deny VPD access. 930 * Simply skip VPD in this case. 931 */ 932 if (rc == EACCES) 933 goto done; 934 goto fail; 935 } 936 sc->vpd_data = malloc(sc->vpd_size, M_SFXGE, M_WAITOK); 937 if ((rc = efx_vpd_read(sc->enp, sc->vpd_data, sc->vpd_size)) != 0) 938 goto fail2; 939 940 /* Copy ID (product name) into device description, and log it. */ 941 value.evv_tag = EFX_VPD_ID; 942 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) == 0) { 943 value.evv_value[value.evv_length] = 0; 944 device_set_desc_copy(sc->dev, value.evv_value); 945 device_printf(sc->dev, "%s\n", value.evv_value); 946 } 947 948 vpd_node = SYSCTL_ADD_NODE( 949 ctx, SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), 950 OID_AUTO, "vpd", CTLFLAG_RD, NULL, "Vital Product Data"); 951 vpd_list = SYSCTL_CHILDREN(vpd_node); 952 953 /* Add sysctls for all expected and any vendor-defined keywords. */ 954 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "PN"); 955 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "EC"); 956 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "SN"); 957 keyword[0] = 'V'; 958 keyword[2] = 0; 959 for (keyword[1] = '0'; keyword[1] <= '9'; keyword[1]++) 960 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword); 961 for (keyword[1] = 'A'; keyword[1] <= 'Z'; keyword[1]++) 962 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword); 963 964done: 965 return (0); 966 967fail2: 968 free(sc->vpd_data, M_SFXGE); 969fail: 970 return (rc); 971} 972 973static void 974sfxge_vpd_fini(struct sfxge_softc *sc) 975{ 976 free(sc->vpd_data, M_SFXGE); 977} 978 979static void 980sfxge_reset(void *arg, int npending) 981{ 982 struct sfxge_softc *sc; 983 int rc; 984 unsigned attempt; 985 986 (void)npending; 987 988 sc = (struct sfxge_softc *)arg; 989 990 SFXGE_ADAPTER_LOCK(sc); 991 992 if (sc->init_state != SFXGE_STARTED) 993 goto done; 994 995 sfxge_stop(sc); 996 efx_nic_reset(sc->enp); 997 for (attempt = 0; attempt < 3; ++attempt) { 998 if ((rc = sfxge_start(sc)) == 0) 999 goto done; 1000 1001 device_printf(sc->dev, "start on reset failed (%d)\n", rc); 1002 DELAY(100000); 1003 } 1004 1005 device_printf(sc->dev, "reset failed; interface is now stopped\n"); 1006 1007done: 1008 SFXGE_ADAPTER_UNLOCK(sc); 1009} 1010 1011void 1012sfxge_schedule_reset(struct sfxge_softc *sc) 1013{ 1014 taskqueue_enqueue(taskqueue_thread, &sc->task_reset); 1015} 1016 1017static int 1018sfxge_attach(device_t dev) 1019{ 1020 struct sfxge_softc *sc; 1021 struct ifnet *ifp; 1022 int error; 1023 1024 sc = device_get_softc(dev); 1025 sc->dev = dev; 1026 1027 /* Allocate ifnet. */ 1028 ifp = if_alloc(IFT_ETHER); 1029 if (ifp == NULL) { 1030 device_printf(dev, "Couldn't allocate ifnet\n"); 1031 error = ENOMEM; 1032 goto fail; 1033 } 1034 sc->ifnet = ifp; 1035 1036 /* Initialize hardware. */ 1037 DBGPRINT(sc->dev, "create nic"); 1038 if ((error = sfxge_create(sc)) != 0) 1039 goto fail2; 1040 1041 /* Create the ifnet for the port. */ 1042 DBGPRINT(sc->dev, "init ifnet"); 1043 if ((error = sfxge_ifnet_init(ifp, sc)) != 0) 1044 goto fail3; 1045 1046 DBGPRINT(sc->dev, "init vpd"); 1047 if ((error = sfxge_vpd_init(sc)) != 0) 1048 goto fail4; 1049 1050 /* 1051 * NIC is initialized inside sfxge_create() and kept inialized 1052 * to be able to initialize port to discover media types in 1053 * sfxge_ifnet_init(). 1054 */ 1055 efx_nic_fini(sc->enp); 1056 1057 sc->init_state = SFXGE_REGISTERED; 1058 1059 DBGPRINT(sc->dev, "success"); 1060 return (0); 1061 1062fail4: 1063 sfxge_ifnet_fini(ifp); 1064fail3: 1065 efx_nic_fini(sc->enp); 1066 sfxge_destroy(sc); 1067 1068fail2: 1069 if_free(sc->ifnet); 1070 1071fail: 1072 DBGPRINT(sc->dev, "failed %d", error); 1073 return (error); 1074} 1075 1076static int 1077sfxge_detach(device_t dev) 1078{ 1079 struct sfxge_softc *sc; 1080 1081 sc = device_get_softc(dev); 1082 1083 sfxge_vpd_fini(sc); 1084 1085 /* Destroy the ifnet. */ 1086 sfxge_ifnet_fini(sc->ifnet); 1087 1088 /* Tear down hardware. */ 1089 sfxge_destroy(sc); 1090 1091 return (0); 1092} 1093 1094static int 1095sfxge_probe(device_t dev) 1096{ 1097 uint16_t pci_vendor_id; 1098 uint16_t pci_device_id; 1099 efx_family_t family; 1100 int rc; 1101 1102 pci_vendor_id = pci_get_vendor(dev); 1103 pci_device_id = pci_get_device(dev); 1104 1105 DBGPRINT(dev, "PCI ID %04x:%04x", pci_vendor_id, pci_device_id); 1106 rc = efx_family(pci_vendor_id, pci_device_id, &family); 1107 if (rc != 0) { 1108 DBGPRINT(dev, "efx_family fail %d", rc); 1109 return (ENXIO); 1110 } 1111 1112 if (family == EFX_FAMILY_SIENA) { 1113 device_set_desc(dev, "Solarflare SFC9000 family"); 1114 return (0); 1115 } 1116 1117 if (family == EFX_FAMILY_HUNTINGTON) { 1118 device_set_desc(dev, "Solarflare SFC9100 family"); 1119 return (0); 1120 } 1121 1122 DBGPRINT(dev, "impossible controller family %d", family); 1123 return (ENXIO); 1124} 1125 1126static device_method_t sfxge_methods[] = { 1127 DEVMETHOD(device_probe, sfxge_probe), 1128 DEVMETHOD(device_attach, sfxge_attach), 1129 DEVMETHOD(device_detach, sfxge_detach), 1130 1131 DEVMETHOD_END 1132}; 1133 1134static devclass_t sfxge_devclass; 1135 1136static driver_t sfxge_driver = { 1137 "sfxge", 1138 sfxge_methods, 1139 sizeof(struct sfxge_softc) 1140}; 1141 1142DRIVER_MODULE(sfxge, pci, sfxge_driver, sfxge_devclass, 0, 0); 1143