siena_impl.h revision 311486 
1/*-
2 * Copyright (c) 2009-2016 Solarflare Communications Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 *    this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 *    this list of conditions and the following disclaimer in the documentation
12 *    and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
29 *
30 * $FreeBSD: stable/11/sys/dev/sfxge/common/siena_impl.h 311486 2017-01-06 07:19:03Z arybchik $
31 */
32
33#ifndef _SYS_SIENA_IMPL_H
34#define	_SYS_SIENA_IMPL_H
35
36#include "efx.h"
37#include "efx_regs.h"
38#include "efx_mcdi.h"
39#include "siena_flash.h"
40
41#ifdef	__cplusplus
42extern "C" {
43#endif
44
45#define	SIENA_NVRAM_CHUNK 0x80
46
47extern	__checkReturn	efx_rc_t
48siena_nic_probe(
49	__in		efx_nic_t *enp);
50
51extern	__checkReturn	efx_rc_t
52siena_nic_reset(
53	__in		efx_nic_t *enp);
54
55extern	__checkReturn	efx_rc_t
56siena_nic_init(
57	__in		efx_nic_t *enp);
58
59#if EFSYS_OPT_DIAG
60
61extern	__checkReturn	efx_rc_t
62siena_nic_register_test(
63	__in		efx_nic_t *enp);
64
65#endif	/* EFSYS_OPT_DIAG */
66
67extern			void
68siena_nic_fini(
69	__in		efx_nic_t *enp);
70
71extern			void
72siena_nic_unprobe(
73	__in		efx_nic_t *enp);
74
75#define	SIENA_SRAM_ROWS	0x12000
76
77extern			void
78siena_sram_init(
79	__in		efx_nic_t *enp);
80
81#if EFSYS_OPT_DIAG
82
83extern	__checkReturn	efx_rc_t
84siena_sram_test(
85	__in		efx_nic_t *enp,
86	__in		efx_sram_pattern_fn_t func);
87
88#endif	/* EFSYS_OPT_DIAG */
89
90#if EFSYS_OPT_MCDI
91
92extern	__checkReturn	efx_rc_t
93siena_mcdi_init(
94	__in		efx_nic_t *enp,
95	__in		const efx_mcdi_transport_t *mtp);
96
97extern			void
98siena_mcdi_send_request(
99	__in			efx_nic_t *enp,
100	__in_bcount(hdr_len)	void *hdrp,
101	__in			size_t hdr_len,
102	__in_bcount(sdu_len)	void *sdup,
103	__in			size_t sdu_len);
104
105extern	__checkReturn	boolean_t
106siena_mcdi_poll_response(
107	__in		efx_nic_t *enp);
108
109extern			void
110siena_mcdi_read_response(
111	__in			efx_nic_t *enp,
112	__out_bcount(length)	void *bufferp,
113	__in			size_t offset,
114	__in			size_t length);
115
116extern			efx_rc_t
117siena_mcdi_poll_reboot(
118	__in		efx_nic_t *enp);
119
120extern			void
121siena_mcdi_fini(
122	__in		efx_nic_t *enp);
123
124extern	__checkReturn	efx_rc_t
125siena_mcdi_feature_supported(
126	__in		efx_nic_t *enp,
127	__in		efx_mcdi_feature_id_t id,
128	__out		boolean_t *supportedp);
129
130extern			void
131siena_mcdi_get_timeout(
132	__in		efx_nic_t *enp,
133	__in		efx_mcdi_req_t *emrp,
134	__out		uint32_t *timeoutp);
135
136#endif /* EFSYS_OPT_MCDI */
137
138#if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
139
140extern	__checkReturn		efx_rc_t
141siena_nvram_partn_lock(
142	__in			efx_nic_t *enp,
143	__in			uint32_t partn);
144
145extern	__checkReturn		efx_rc_t
146siena_nvram_partn_unlock(
147	__in			efx_nic_t *enp,
148	__in			uint32_t partn);
149
150extern	__checkReturn		efx_rc_t
151siena_nvram_get_dynamic_cfg(
152	__in			efx_nic_t *enp,
153	__in			uint32_t partn,
154	__in			boolean_t vpd,
155	__out			siena_mc_dynamic_config_hdr_t **dcfgp,
156	__out			size_t *sizep);
157
158#endif	/* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
159
160#if EFSYS_OPT_NVRAM
161
162#if EFSYS_OPT_DIAG
163
164extern	__checkReturn		efx_rc_t
165siena_nvram_test(
166	__in			efx_nic_t *enp);
167
168#endif	/* EFSYS_OPT_DIAG */
169
170extern	__checkReturn		efx_rc_t
171siena_nvram_get_subtype(
172	__in			efx_nic_t *enp,
173	__in			uint32_t partn,
174	__out			uint32_t *subtypep);
175
176extern	__checkReturn		efx_rc_t
177siena_nvram_type_to_partn(
178	__in			efx_nic_t *enp,
179	__in			efx_nvram_type_t type,
180	__out			uint32_t *partnp);
181
182extern	__checkReturn		efx_rc_t
183siena_nvram_partn_size(
184	__in			efx_nic_t *enp,
185	__in			uint32_t partn,
186	__out			size_t *sizep);
187
188extern	__checkReturn		efx_rc_t
189siena_nvram_partn_rw_start(
190	__in			efx_nic_t *enp,
191	__in			uint32_t partn,
192	__out			size_t *chunk_sizep);
193
194extern	__checkReturn		efx_rc_t
195siena_nvram_partn_read(
196	__in			efx_nic_t *enp,
197	__in			uint32_t partn,
198	__in			unsigned int offset,
199	__out_bcount(size)	caddr_t data,
200	__in			size_t size);
201
202extern	__checkReturn		efx_rc_t
203siena_nvram_partn_erase(
204	__in			efx_nic_t *enp,
205	__in			uint32_t partn,
206	__in			unsigned int offset,
207	__in			size_t size);
208
209extern	__checkReturn		efx_rc_t
210siena_nvram_partn_write(
211	__in			efx_nic_t *enp,
212	__in			uint32_t partn,
213	__in			unsigned int offset,
214	__out_bcount(size)	caddr_t data,
215	__in			size_t size);
216
217extern	__checkReturn		efx_rc_t
218siena_nvram_partn_rw_finish(
219	__in			efx_nic_t *enp,
220	__in			uint32_t partn);
221
222extern	__checkReturn		efx_rc_t
223siena_nvram_partn_get_version(
224	__in			efx_nic_t *enp,
225	__in			uint32_t partn,
226	__out			uint32_t *subtypep,
227	__out_ecount(4)		uint16_t version[4]);
228
229extern	__checkReturn		efx_rc_t
230siena_nvram_partn_set_version(
231	__in			efx_nic_t *enp,
232	__in			uint32_t partn,
233	__in_ecount(4)		uint16_t version[4]);
234
235#endif	/* EFSYS_OPT_NVRAM */
236
237#if EFSYS_OPT_VPD
238
239extern	__checkReturn		efx_rc_t
240siena_vpd_init(
241	__in			efx_nic_t *enp);
242
243extern	__checkReturn		efx_rc_t
244siena_vpd_size(
245	__in			efx_nic_t *enp,
246	__out			size_t *sizep);
247
248extern	__checkReturn		efx_rc_t
249siena_vpd_read(
250	__in			efx_nic_t *enp,
251	__out_bcount(size)	caddr_t data,
252	__in			size_t size);
253
254extern	__checkReturn		efx_rc_t
255siena_vpd_verify(
256	__in			efx_nic_t *enp,
257	__in_bcount(size)	caddr_t data,
258	__in			size_t size);
259
260extern	__checkReturn		efx_rc_t
261siena_vpd_reinit(
262	__in			efx_nic_t *enp,
263	__in_bcount(size)	caddr_t data,
264	__in			size_t size);
265
266extern	__checkReturn		efx_rc_t
267siena_vpd_get(
268	__in			efx_nic_t *enp,
269	__in_bcount(size)	caddr_t data,
270	__in			size_t size,
271	__inout			efx_vpd_value_t *evvp);
272
273extern	__checkReturn		efx_rc_t
274siena_vpd_set(
275	__in			efx_nic_t *enp,
276	__in_bcount(size)	caddr_t data,
277	__in			size_t size,
278	__in			efx_vpd_value_t *evvp);
279
280extern	__checkReturn		efx_rc_t
281siena_vpd_next(
282	__in			efx_nic_t *enp,
283	__in_bcount(size)	caddr_t data,
284	__in			size_t size,
285	__out			efx_vpd_value_t *evvp,
286	__inout			unsigned int *contp);
287
288extern __checkReturn		efx_rc_t
289siena_vpd_write(
290	__in			efx_nic_t *enp,
291	__in_bcount(size)	caddr_t data,
292	__in			size_t size);
293
294extern				void
295siena_vpd_fini(
296	__in			efx_nic_t *enp);
297
298#endif	/* EFSYS_OPT_VPD */
299
300typedef struct siena_link_state_s {
301	uint32_t		sls_adv_cap_mask;
302	uint32_t		sls_lp_cap_mask;
303	unsigned int		sls_fcntl;
304	efx_link_mode_t		sls_link_mode;
305#if EFSYS_OPT_LOOPBACK
306	efx_loopback_type_t	sls_loopback;
307#endif
308	boolean_t		sls_mac_up;
309} siena_link_state_t;
310
311extern			void
312siena_phy_link_ev(
313	__in		efx_nic_t *enp,
314	__in		efx_qword_t *eqp,
315	__out		efx_link_mode_t *link_modep);
316
317extern	__checkReturn	efx_rc_t
318siena_phy_get_link(
319	__in		efx_nic_t *enp,
320	__out		siena_link_state_t *slsp);
321
322extern	__checkReturn	efx_rc_t
323siena_phy_power(
324	__in		efx_nic_t *enp,
325	__in		boolean_t on);
326
327extern	__checkReturn	efx_rc_t
328siena_phy_reconfigure(
329	__in		efx_nic_t *enp);
330
331extern	__checkReturn	efx_rc_t
332siena_phy_verify(
333	__in		efx_nic_t *enp);
334
335extern	__checkReturn	efx_rc_t
336siena_phy_oui_get(
337	__in		efx_nic_t *enp,
338	__out		uint32_t *ouip);
339
340#if EFSYS_OPT_PHY_STATS
341
342extern						void
343siena_phy_decode_stats(
344	__in					efx_nic_t *enp,
345	__in					uint32_t vmask,
346	__in_opt				efsys_mem_t *esmp,
347	__out_opt				uint64_t *smaskp,
348	__inout_ecount_opt(EFX_PHY_NSTATS)	uint32_t *stat);
349
350extern	__checkReturn			efx_rc_t
351siena_phy_stats_update(
352	__in				efx_nic_t *enp,
353	__in				efsys_mem_t *esmp,
354	__inout_ecount(EFX_PHY_NSTATS)	uint32_t *stat);
355
356#endif	/* EFSYS_OPT_PHY_STATS */
357
358#if EFSYS_OPT_BIST
359
360extern	__checkReturn		efx_rc_t
361siena_phy_bist_start(
362	__in			efx_nic_t *enp,
363	__in			efx_bist_type_t type);
364
365extern	__checkReturn		efx_rc_t
366siena_phy_bist_poll(
367	__in			efx_nic_t *enp,
368	__in			efx_bist_type_t type,
369	__out			efx_bist_result_t *resultp,
370	__out_opt __drv_when(count > 0, __notnull)
371	uint32_t	*value_maskp,
372	__out_ecount_opt(count)	__drv_when(count > 0, __notnull)
373	unsigned long	*valuesp,
374	__in			size_t count);
375
376extern				void
377siena_phy_bist_stop(
378	__in			efx_nic_t *enp,
379	__in			efx_bist_type_t type);
380
381#endif	/* EFSYS_OPT_BIST */
382
383extern	__checkReturn	efx_rc_t
384siena_mac_poll(
385	__in		efx_nic_t *enp,
386	__out		efx_link_mode_t *link_modep);
387
388extern	__checkReturn	efx_rc_t
389siena_mac_up(
390	__in		efx_nic_t *enp,
391	__out		boolean_t *mac_upp);
392
393extern	__checkReturn	efx_rc_t
394siena_mac_reconfigure(
395	__in	efx_nic_t *enp);
396
397extern	__checkReturn	efx_rc_t
398siena_mac_pdu_get(
399	__in	efx_nic_t *enp,
400	__out	size_t *pdu);
401
402#if EFSYS_OPT_LOOPBACK
403
404extern	__checkReturn	efx_rc_t
405siena_mac_loopback_set(
406	__in		efx_nic_t *enp,
407	__in		efx_link_mode_t link_mode,
408	__in		efx_loopback_type_t loopback_type);
409
410#endif	/* EFSYS_OPT_LOOPBACK */
411
412#if EFSYS_OPT_MAC_STATS
413
414extern	__checkReturn			efx_rc_t
415siena_mac_stats_get_mask(
416	__in				efx_nic_t *enp,
417	__inout_bcount(mask_size)	uint32_t *maskp,
418	__in				size_t mask_size);
419
420extern	__checkReturn			efx_rc_t
421siena_mac_stats_update(
422	__in				efx_nic_t *enp,
423	__in				efsys_mem_t *esmp,
424	__inout_ecount(EFX_MAC_NSTATS)	efsys_stat_t *stat,
425	__inout_opt			uint32_t *generationp);
426
427#endif	/* EFSYS_OPT_MAC_STATS */
428
429#ifdef	__cplusplus
430}
431#endif
432
433#endif	/* _SYS_SIENA_IMPL_H */
434