siena_impl.h revision 310934 
1/*-
2 * Copyright (c) 2009-2016 Solarflare Communications Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 *    this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 *    this list of conditions and the following disclaimer in the documentation
12 *    and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
29 *
30 * $FreeBSD: stable/11/sys/dev/sfxge/common/siena_impl.h 310934 2016-12-31 11:15:25Z arybchik $
31 */
32
33#ifndef _SYS_SIENA_IMPL_H
34#define	_SYS_SIENA_IMPL_H
35
36#include "efx.h"
37#include "efx_regs.h"
38#include "efx_mcdi.h"
39#include "siena_flash.h"
40
41#ifdef	__cplusplus
42extern "C" {
43#endif
44
45#define	SIENA_NVRAM_CHUNK 0x80
46
47extern	__checkReturn	efx_rc_t
48siena_nic_probe(
49	__in		efx_nic_t *enp);
50
51extern	__checkReturn	efx_rc_t
52siena_nic_reset(
53	__in		efx_nic_t *enp);
54
55extern	__checkReturn	efx_rc_t
56siena_nic_init(
57	__in		efx_nic_t *enp);
58
59#if EFSYS_OPT_DIAG
60
61extern	__checkReturn	efx_rc_t
62siena_nic_register_test(
63	__in		efx_nic_t *enp);
64
65#endif	/* EFSYS_OPT_DIAG */
66
67extern			void
68siena_nic_fini(
69	__in		efx_nic_t *enp);
70
71extern			void
72siena_nic_unprobe(
73	__in		efx_nic_t *enp);
74
75#define	SIENA_SRAM_ROWS	0x12000
76
77extern			void
78siena_sram_init(
79	__in		efx_nic_t *enp);
80
81#if EFSYS_OPT_DIAG
82
83extern	__checkReturn	efx_rc_t
84siena_sram_test(
85	__in		efx_nic_t *enp,
86	__in		efx_sram_pattern_fn_t func);
87
88#endif	/* EFSYS_OPT_DIAG */
89
90#if EFSYS_OPT_MCDI
91
92extern	__checkReturn	efx_rc_t
93siena_mcdi_init(
94	__in		efx_nic_t *enp,
95	__in		const efx_mcdi_transport_t *mtp);
96
97extern			void
98siena_mcdi_send_request(
99	__in			efx_nic_t *enp,
100	__in_bcount(hdr_len)	void *hdrp,
101	__in			size_t hdr_len,
102	__in_bcount(sdu_len)	void *sdup,
103	__in			size_t sdu_len);
104
105extern	__checkReturn	boolean_t
106siena_mcdi_poll_response(
107	__in		efx_nic_t *enp);
108
109extern			void
110siena_mcdi_read_response(
111	__in			efx_nic_t *enp,
112	__out_bcount(length)	void *bufferp,
113	__in			size_t offset,
114	__in			size_t length);
115
116extern			efx_rc_t
117siena_mcdi_poll_reboot(
118	__in		efx_nic_t *enp);
119
120extern			void
121siena_mcdi_fini(
122	__in		efx_nic_t *enp);
123
124extern	__checkReturn	efx_rc_t
125siena_mcdi_feature_supported(
126	__in		efx_nic_t *enp,
127	__in		efx_mcdi_feature_id_t id,
128	__out		boolean_t *supportedp);
129
130#endif /* EFSYS_OPT_MCDI */
131
132#if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
133
134extern	__checkReturn		efx_rc_t
135siena_nvram_partn_lock(
136	__in			efx_nic_t *enp,
137	__in			uint32_t partn);
138
139extern				void
140siena_nvram_partn_unlock(
141	__in			efx_nic_t *enp,
142	__in			uint32_t partn);
143
144extern	__checkReturn		efx_rc_t
145siena_nvram_get_dynamic_cfg(
146	__in			efx_nic_t *enp,
147	__in			uint32_t partn,
148	__in			boolean_t vpd,
149	__out			siena_mc_dynamic_config_hdr_t **dcfgp,
150	__out			size_t *sizep);
151
152#endif	/* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
153
154#if EFSYS_OPT_NVRAM
155
156#if EFSYS_OPT_DIAG
157
158extern	__checkReturn		efx_rc_t
159siena_nvram_test(
160	__in			efx_nic_t *enp);
161
162#endif	/* EFSYS_OPT_DIAG */
163
164extern	__checkReturn		efx_rc_t
165siena_nvram_get_subtype(
166	__in			efx_nic_t *enp,
167	__in			uint32_t partn,
168	__out			uint32_t *subtypep);
169
170extern	__checkReturn		efx_rc_t
171siena_nvram_type_to_partn(
172	__in			efx_nic_t *enp,
173	__in			efx_nvram_type_t type,
174	__out			uint32_t *partnp);
175
176extern	__checkReturn		efx_rc_t
177siena_nvram_partn_size(
178	__in			efx_nic_t *enp,
179	__in			uint32_t partn,
180	__out			size_t *sizep);
181
182extern	__checkReturn		efx_rc_t
183siena_nvram_partn_rw_start(
184	__in			efx_nic_t *enp,
185	__in			uint32_t partn,
186	__out			size_t *chunk_sizep);
187
188extern	__checkReturn		efx_rc_t
189siena_nvram_partn_read(
190	__in			efx_nic_t *enp,
191	__in			uint32_t partn,
192	__in			unsigned int offset,
193	__out_bcount(size)	caddr_t data,
194	__in			size_t size);
195
196extern	__checkReturn		efx_rc_t
197siena_nvram_partn_erase(
198	__in			efx_nic_t *enp,
199	__in			uint32_t partn,
200	__in			unsigned int offset,
201	__in			size_t size);
202
203extern	__checkReturn		efx_rc_t
204siena_nvram_partn_write(
205	__in			efx_nic_t *enp,
206	__in			uint32_t partn,
207	__in			unsigned int offset,
208	__out_bcount(size)	caddr_t data,
209	__in			size_t size);
210
211extern				void
212siena_nvram_partn_rw_finish(
213	__in			efx_nic_t *enp,
214	__in			uint32_t partn);
215
216extern	__checkReturn		efx_rc_t
217siena_nvram_partn_get_version(
218	__in			efx_nic_t *enp,
219	__in			uint32_t partn,
220	__out			uint32_t *subtypep,
221	__out_ecount(4)		uint16_t version[4]);
222
223extern	__checkReturn		efx_rc_t
224siena_nvram_partn_set_version(
225	__in			efx_nic_t *enp,
226	__in			uint32_t partn,
227	__in_ecount(4)		uint16_t version[4]);
228
229#endif	/* EFSYS_OPT_NVRAM */
230
231#if EFSYS_OPT_VPD
232
233extern	__checkReturn		efx_rc_t
234siena_vpd_init(
235	__in			efx_nic_t *enp);
236
237extern	__checkReturn		efx_rc_t
238siena_vpd_size(
239	__in			efx_nic_t *enp,
240	__out			size_t *sizep);
241
242extern	__checkReturn		efx_rc_t
243siena_vpd_read(
244	__in			efx_nic_t *enp,
245	__out_bcount(size)	caddr_t data,
246	__in			size_t size);
247
248extern	__checkReturn		efx_rc_t
249siena_vpd_verify(
250	__in			efx_nic_t *enp,
251	__in_bcount(size)	caddr_t data,
252	__in			size_t size);
253
254extern	__checkReturn		efx_rc_t
255siena_vpd_reinit(
256	__in			efx_nic_t *enp,
257	__in_bcount(size)	caddr_t data,
258	__in			size_t size);
259
260extern	__checkReturn		efx_rc_t
261siena_vpd_get(
262	__in			efx_nic_t *enp,
263	__in_bcount(size)	caddr_t data,
264	__in			size_t size,
265	__inout			efx_vpd_value_t *evvp);
266
267extern	__checkReturn		efx_rc_t
268siena_vpd_set(
269	__in			efx_nic_t *enp,
270	__in_bcount(size)	caddr_t data,
271	__in			size_t size,
272	__in			efx_vpd_value_t *evvp);
273
274extern	__checkReturn		efx_rc_t
275siena_vpd_next(
276	__in			efx_nic_t *enp,
277	__in_bcount(size)	caddr_t data,
278	__in			size_t size,
279	__out			efx_vpd_value_t *evvp,
280	__inout			unsigned int *contp);
281
282extern __checkReturn		efx_rc_t
283siena_vpd_write(
284	__in			efx_nic_t *enp,
285	__in_bcount(size)	caddr_t data,
286	__in			size_t size);
287
288extern				void
289siena_vpd_fini(
290	__in			efx_nic_t *enp);
291
292#endif	/* EFSYS_OPT_VPD */
293
294typedef struct siena_link_state_s {
295	uint32_t		sls_adv_cap_mask;
296	uint32_t		sls_lp_cap_mask;
297	unsigned int		sls_fcntl;
298	efx_link_mode_t		sls_link_mode;
299#if EFSYS_OPT_LOOPBACK
300	efx_loopback_type_t	sls_loopback;
301#endif
302	boolean_t		sls_mac_up;
303} siena_link_state_t;
304
305extern			void
306siena_phy_link_ev(
307	__in		efx_nic_t *enp,
308	__in		efx_qword_t *eqp,
309	__out		efx_link_mode_t *link_modep);
310
311extern	__checkReturn	efx_rc_t
312siena_phy_get_link(
313	__in		efx_nic_t *enp,
314	__out		siena_link_state_t *slsp);
315
316extern	__checkReturn	efx_rc_t
317siena_phy_power(
318	__in		efx_nic_t *enp,
319	__in		boolean_t on);
320
321extern	__checkReturn	efx_rc_t
322siena_phy_reconfigure(
323	__in		efx_nic_t *enp);
324
325extern	__checkReturn	efx_rc_t
326siena_phy_verify(
327	__in		efx_nic_t *enp);
328
329extern	__checkReturn	efx_rc_t
330siena_phy_oui_get(
331	__in		efx_nic_t *enp,
332	__out		uint32_t *ouip);
333
334#if EFSYS_OPT_PHY_STATS
335
336extern						void
337siena_phy_decode_stats(
338	__in					efx_nic_t *enp,
339	__in					uint32_t vmask,
340	__in_opt				efsys_mem_t *esmp,
341	__out_opt				uint64_t *smaskp,
342	__inout_ecount_opt(EFX_PHY_NSTATS)	uint32_t *stat);
343
344extern	__checkReturn			efx_rc_t
345siena_phy_stats_update(
346	__in				efx_nic_t *enp,
347	__in				efsys_mem_t *esmp,
348	__inout_ecount(EFX_PHY_NSTATS)	uint32_t *stat);
349
350#endif	/* EFSYS_OPT_PHY_STATS */
351
352#if EFSYS_OPT_BIST
353
354extern	__checkReturn		efx_rc_t
355siena_phy_bist_start(
356	__in			efx_nic_t *enp,
357	__in			efx_bist_type_t type);
358
359extern	__checkReturn		efx_rc_t
360siena_phy_bist_poll(
361	__in			efx_nic_t *enp,
362	__in			efx_bist_type_t type,
363	__out			efx_bist_result_t *resultp,
364	__out_opt __drv_when(count > 0, __notnull)
365	uint32_t	*value_maskp,
366	__out_ecount_opt(count)	__drv_when(count > 0, __notnull)
367	unsigned long	*valuesp,
368	__in			size_t count);
369
370extern				void
371siena_phy_bist_stop(
372	__in			efx_nic_t *enp,
373	__in			efx_bist_type_t type);
374
375#endif	/* EFSYS_OPT_BIST */
376
377extern	__checkReturn	efx_rc_t
378siena_mac_poll(
379	__in		efx_nic_t *enp,
380	__out		efx_link_mode_t *link_modep);
381
382extern	__checkReturn	efx_rc_t
383siena_mac_up(
384	__in		efx_nic_t *enp,
385	__out		boolean_t *mac_upp);
386
387extern	__checkReturn	efx_rc_t
388siena_mac_reconfigure(
389	__in	efx_nic_t *enp);
390
391extern	__checkReturn	efx_rc_t
392siena_mac_pdu_get(
393	__in	efx_nic_t *enp,
394	__out	size_t *pdu);
395
396#if EFSYS_OPT_LOOPBACK
397
398extern	__checkReturn	efx_rc_t
399siena_mac_loopback_set(
400	__in		efx_nic_t *enp,
401	__in		efx_link_mode_t link_mode,
402	__in		efx_loopback_type_t loopback_type);
403
404#endif	/* EFSYS_OPT_LOOPBACK */
405
406#if EFSYS_OPT_MAC_STATS
407
408extern	__checkReturn			efx_rc_t
409siena_mac_stats_update(
410	__in				efx_nic_t *enp,
411	__in				efsys_mem_t *esmp,
412	__inout_ecount(EFX_MAC_NSTATS)	efsys_stat_t *stat,
413	__inout_opt			uint32_t *generationp);
414
415#endif	/* EFSYS_OPT_MAC_STATS */
416
417#ifdef	__cplusplus
418}
419#endif
420
421#endif	/* _SYS_SIENA_IMPL_H */
422