sdhci_pci.c revision 276469
1241600Sgonzo/*- 2241600Sgonzo * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org> 3241600Sgonzo * All rights reserved. 4241600Sgonzo * 5241600Sgonzo * Redistribution and use in source and binary forms, with or without 6241600Sgonzo * modification, are permitted provided that the following conditions 7241600Sgonzo * are met: 8241600Sgonzo * 1. Redistributions of source code must retain the above copyright 9241600Sgonzo * notice, this list of conditions and the following disclaimer. 10241600Sgonzo * 2. Redistributions in binary form must reproduce the above copyright 11241600Sgonzo * notice, this list of conditions and the following disclaimer in the 12241600Sgonzo * documentation and/or other materials provided with the distribution. 13241600Sgonzo * 14241600Sgonzo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15241600Sgonzo * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16241600Sgonzo * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17241600Sgonzo * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18241600Sgonzo * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19241600Sgonzo * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20241600Sgonzo * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21241600Sgonzo * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22241600Sgonzo * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23241600Sgonzo * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24241600Sgonzo */ 25241600Sgonzo 26241600Sgonzo#include <sys/cdefs.h> 27241600Sgonzo__FBSDID("$FreeBSD: head/sys/dev/sdhci/sdhci_pci.c 276469 2014-12-31 16:06:26Z marius $"); 28241600Sgonzo 29241600Sgonzo#include <sys/param.h> 30241600Sgonzo#include <sys/systm.h> 31241600Sgonzo#include <sys/bus.h> 32241600Sgonzo#include <sys/conf.h> 33241600Sgonzo#include <sys/kernel.h> 34241600Sgonzo#include <sys/lock.h> 35241600Sgonzo#include <sys/module.h> 36241600Sgonzo#include <sys/mutex.h> 37241600Sgonzo#include <sys/resource.h> 38241600Sgonzo#include <sys/rman.h> 39241600Sgonzo#include <sys/sysctl.h> 40241600Sgonzo#include <sys/taskqueue.h> 41241600Sgonzo 42241600Sgonzo#include <dev/pci/pcireg.h> 43241600Sgonzo#include <dev/pci/pcivar.h> 44241600Sgonzo 45241600Sgonzo#include <machine/bus.h> 46241600Sgonzo#include <machine/resource.h> 47241600Sgonzo#include <machine/stdarg.h> 48241600Sgonzo 49241600Sgonzo#include <dev/mmc/bridge.h> 50241600Sgonzo#include <dev/mmc/mmcreg.h> 51241600Sgonzo#include <dev/mmc/mmcbrvar.h> 52241600Sgonzo 53241600Sgonzo#include "sdhci.h" 54241600Sgonzo#include "mmcbr_if.h" 55241600Sgonzo#include "sdhci_if.h" 56241600Sgonzo 57241600Sgonzo/* 58241600Sgonzo * PCI registers 59241600Sgonzo */ 60241600Sgonzo 61241600Sgonzo#define PCI_SDHCI_IFPIO 0x00 62241600Sgonzo#define PCI_SDHCI_IFDMA 0x01 63241600Sgonzo#define PCI_SDHCI_IFVENDOR 0x02 64241600Sgonzo 65241600Sgonzo#define PCI_SLOT_INFO 0x40 /* 8 bits */ 66241600Sgonzo#define PCI_SLOT_INFO_SLOTS(x) (((x >> 4) & 7) + 1) 67241600Sgonzo#define PCI_SLOT_INFO_FIRST_BAR(x) ((x) & 7) 68241600Sgonzo 69241600Sgonzo/* 70241600Sgonzo * RICOH specific PCI registers 71241600Sgonzo */ 72241600Sgonzo#define SDHC_PCI_MODE_KEY 0xf9 73241600Sgonzo#define SDHC_PCI_MODE 0x150 74276469Smarius#define SDHC_PCI_MODE_SD20 0x10 75241600Sgonzo#define SDHC_PCI_BASE_FREQ_KEY 0xfc 76241600Sgonzo#define SDHC_PCI_BASE_FREQ 0xe1 77241600Sgonzo 78241600Sgonzostatic const struct sdhci_device { 79241600Sgonzo uint32_t model; 80241600Sgonzo uint16_t subvendor; 81270885Smarius const char *desc; 82241600Sgonzo u_int quirks; 83241600Sgonzo} sdhci_devices[] = { 84241600Sgonzo { 0x08221180, 0xffff, "RICOH R5C822 SD", 85241600Sgonzo SDHCI_QUIRK_FORCE_DMA }, 86276469Smarius { 0xe8221180, 0xffff, "RICOH R5CE822 SD", 87276469Smarius SDHCI_QUIRK_FORCE_DMA | 88276469Smarius SDHCI_QUIRK_LOWER_FREQUENCY }, 89241600Sgonzo { 0xe8231180, 0xffff, "RICOH R5CE823 SD", 90241600Sgonzo SDHCI_QUIRK_LOWER_FREQUENCY }, 91241600Sgonzo { 0x8034104c, 0xffff, "TI XX21/XX11 SD", 92241600Sgonzo SDHCI_QUIRK_FORCE_DMA }, 93241600Sgonzo { 0x05501524, 0xffff, "ENE CB712 SD", 94241600Sgonzo SDHCI_QUIRK_BROKEN_TIMINGS }, 95241600Sgonzo { 0x05511524, 0xffff, "ENE CB712 SD 2", 96241600Sgonzo SDHCI_QUIRK_BROKEN_TIMINGS }, 97241600Sgonzo { 0x07501524, 0xffff, "ENE CB714 SD", 98241600Sgonzo SDHCI_QUIRK_RESET_ON_IOS | 99241600Sgonzo SDHCI_QUIRK_BROKEN_TIMINGS }, 100241600Sgonzo { 0x07511524, 0xffff, "ENE CB714 SD 2", 101241600Sgonzo SDHCI_QUIRK_RESET_ON_IOS | 102241600Sgonzo SDHCI_QUIRK_BROKEN_TIMINGS }, 103241600Sgonzo { 0x410111ab, 0xffff, "Marvell CaFe SD", 104241600Sgonzo SDHCI_QUIRK_INCR_TIMEOUT_CONTROL }, 105241600Sgonzo { 0x2381197B, 0xffff, "JMicron JMB38X SD", 106241600Sgonzo SDHCI_QUIRK_32BIT_DMA_SIZE | 107241600Sgonzo SDHCI_QUIRK_RESET_AFTER_REQUEST }, 108241600Sgonzo { 0, 0xffff, NULL, 109241600Sgonzo 0 } 110241600Sgonzo}; 111241600Sgonzo 112241600Sgonzostruct sdhci_pci_softc { 113241600Sgonzo u_int quirks; /* Chip specific quirks */ 114241600Sgonzo struct resource *irq_res; /* IRQ resource */ 115241600Sgonzo void *intrhand; /* Interrupt handle */ 116241600Sgonzo 117241600Sgonzo int num_slots; /* Number of slots on this controller */ 118241600Sgonzo struct sdhci_slot slots[6]; 119241600Sgonzo struct resource *mem_res[6]; /* Memory resource */ 120276469Smarius uint8_t cfg_freq; /* Saved mode */ 121276469Smarius uint8_t cfg_mode; /* Saved frequency */ 122241600Sgonzo}; 123241600Sgonzo 124270885Smariusstatic int sdhci_enable_msi = 1; 125270885SmariusSYSCTL_INT(_hw_sdhci, OID_AUTO, enable_msi, CTLFLAG_RDTUN, &sdhci_enable_msi, 126270885Smarius 0, "Enable MSI interrupts"); 127241600Sgonzo 128241600Sgonzostatic uint8_t 129241600Sgonzosdhci_pci_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off) 130241600Sgonzo{ 131241600Sgonzo struct sdhci_pci_softc *sc = device_get_softc(dev); 132241600Sgonzo 133241600Sgonzo bus_barrier(sc->mem_res[slot->num], 0, 0xFF, 134241600Sgonzo BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 135241600Sgonzo return bus_read_1(sc->mem_res[slot->num], off); 136241600Sgonzo} 137241600Sgonzo 138241600Sgonzostatic void 139241600Sgonzosdhci_pci_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint8_t val) 140241600Sgonzo{ 141241600Sgonzo struct sdhci_pci_softc *sc = device_get_softc(dev); 142241600Sgonzo 143241600Sgonzo bus_barrier(sc->mem_res[slot->num], 0, 0xFF, 144241600Sgonzo BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 145241600Sgonzo bus_write_1(sc->mem_res[slot->num], off, val); 146241600Sgonzo} 147241600Sgonzo 148241600Sgonzostatic uint16_t 149241600Sgonzosdhci_pci_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off) 150241600Sgonzo{ 151241600Sgonzo struct sdhci_pci_softc *sc = device_get_softc(dev); 152241600Sgonzo 153241600Sgonzo bus_barrier(sc->mem_res[slot->num], 0, 0xFF, 154241600Sgonzo BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 155241600Sgonzo return bus_read_2(sc->mem_res[slot->num], off); 156241600Sgonzo} 157241600Sgonzo 158241600Sgonzostatic void 159241600Sgonzosdhci_pci_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint16_t val) 160241600Sgonzo{ 161241600Sgonzo struct sdhci_pci_softc *sc = device_get_softc(dev); 162241600Sgonzo 163241600Sgonzo bus_barrier(sc->mem_res[slot->num], 0, 0xFF, 164241600Sgonzo BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 165241600Sgonzo bus_write_2(sc->mem_res[slot->num], off, val); 166241600Sgonzo} 167241600Sgonzo 168241600Sgonzostatic uint32_t 169241600Sgonzosdhci_pci_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off) 170241600Sgonzo{ 171241600Sgonzo struct sdhci_pci_softc *sc = device_get_softc(dev); 172241600Sgonzo 173241600Sgonzo bus_barrier(sc->mem_res[slot->num], 0, 0xFF, 174241600Sgonzo BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 175241600Sgonzo return bus_read_4(sc->mem_res[slot->num], off); 176241600Sgonzo} 177241600Sgonzo 178241600Sgonzostatic void 179241600Sgonzosdhci_pci_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint32_t val) 180241600Sgonzo{ 181241600Sgonzo struct sdhci_pci_softc *sc = device_get_softc(dev); 182241600Sgonzo 183241600Sgonzo bus_barrier(sc->mem_res[slot->num], 0, 0xFF, 184241600Sgonzo BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 185241600Sgonzo bus_write_4(sc->mem_res[slot->num], off, val); 186241600Sgonzo} 187241600Sgonzo 188241600Sgonzostatic void 189241600Sgonzosdhci_pci_read_multi_4(device_t dev, struct sdhci_slot *slot, 190241600Sgonzo bus_size_t off, uint32_t *data, bus_size_t count) 191241600Sgonzo{ 192241600Sgonzo struct sdhci_pci_softc *sc = device_get_softc(dev); 193241600Sgonzo 194241600Sgonzo bus_read_multi_stream_4(sc->mem_res[slot->num], off, data, count); 195241600Sgonzo} 196241600Sgonzo 197241600Sgonzostatic void 198241600Sgonzosdhci_pci_write_multi_4(device_t dev, struct sdhci_slot *slot, 199241600Sgonzo bus_size_t off, uint32_t *data, bus_size_t count) 200241600Sgonzo{ 201241600Sgonzo struct sdhci_pci_softc *sc = device_get_softc(dev); 202241600Sgonzo 203241600Sgonzo bus_write_multi_stream_4(sc->mem_res[slot->num], off, data, count); 204241600Sgonzo} 205241600Sgonzo 206241600Sgonzostatic void sdhci_pci_intr(void *arg); 207241600Sgonzo 208241600Sgonzostatic void 209241600Sgonzosdhci_lower_frequency(device_t dev) 210241600Sgonzo{ 211276469Smarius struct sdhci_pci_softc *sc = device_get_softc(dev); 212241600Sgonzo 213276469Smarius /* 214276469Smarius * Enable SD2.0 mode. 215276469Smarius * NB: for RICOH R5CE823, this changes the PCI device ID to 0xe822. 216276469Smarius */ 217241600Sgonzo pci_write_config(dev, SDHC_PCI_MODE_KEY, 0xfc, 1); 218276469Smarius sc->cfg_mode = pci_read_config(dev, SDHC_PCI_MODE, 1); 219241600Sgonzo pci_write_config(dev, SDHC_PCI_MODE, SDHC_PCI_MODE_SD20, 1); 220241600Sgonzo pci_write_config(dev, SDHC_PCI_MODE_KEY, 0x00, 1); 221241600Sgonzo 222241600Sgonzo /* 223241600Sgonzo * Some SD/MMC cards don't work with the default base 224276469Smarius * clock frequency of 200 MHz. Lower it to 50 MHz. 225241600Sgonzo */ 226241600Sgonzo pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x01, 1); 227276469Smarius sc->cfg_freq = pci_read_config(dev, SDHC_PCI_BASE_FREQ, 1); 228241600Sgonzo pci_write_config(dev, SDHC_PCI_BASE_FREQ, 50, 1); 229241600Sgonzo pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x00, 1); 230241600Sgonzo} 231241600Sgonzo 232276469Smariusstatic void 233276469Smariussdhci_restore_frequency(device_t dev) 234276469Smarius{ 235276469Smarius struct sdhci_pci_softc *sc = device_get_softc(dev); 236276469Smarius 237276469Smarius /* Restore mode. */ 238276469Smarius pci_write_config(dev, SDHC_PCI_MODE_KEY, 0xfc, 1); 239276469Smarius pci_write_config(dev, SDHC_PCI_MODE, sc->cfg_mode, 1); 240276469Smarius pci_write_config(dev, SDHC_PCI_MODE_KEY, 0x00, 1); 241276469Smarius 242276469Smarius /* Restore frequency. */ 243276469Smarius pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x01, 1); 244276469Smarius pci_write_config(dev, SDHC_PCI_BASE_FREQ, sc->cfg_freq, 1); 245276469Smarius pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x00, 1); 246276469Smarius} 247276469Smarius 248241600Sgonzostatic int 249241600Sgonzosdhci_pci_probe(device_t dev) 250241600Sgonzo{ 251241600Sgonzo uint32_t model; 252241600Sgonzo uint16_t subvendor; 253241600Sgonzo uint8_t class, subclass; 254241600Sgonzo int i, result; 255270885Smarius 256241600Sgonzo model = (uint32_t)pci_get_device(dev) << 16; 257241600Sgonzo model |= (uint32_t)pci_get_vendor(dev) & 0x0000ffff; 258241600Sgonzo subvendor = pci_get_subvendor(dev); 259241600Sgonzo class = pci_get_class(dev); 260241600Sgonzo subclass = pci_get_subclass(dev); 261270885Smarius 262241600Sgonzo result = ENXIO; 263241600Sgonzo for (i = 0; sdhci_devices[i].model != 0; i++) { 264241600Sgonzo if (sdhci_devices[i].model == model && 265241600Sgonzo (sdhci_devices[i].subvendor == 0xffff || 266241600Sgonzo sdhci_devices[i].subvendor == subvendor)) { 267241600Sgonzo device_set_desc(dev, sdhci_devices[i].desc); 268241600Sgonzo result = BUS_PROBE_DEFAULT; 269241600Sgonzo break; 270241600Sgonzo } 271241600Sgonzo } 272241600Sgonzo if (result == ENXIO && class == PCIC_BASEPERIPH && 273241600Sgonzo subclass == PCIS_BASEPERIPH_SDHC) { 274241600Sgonzo device_set_desc(dev, "Generic SD HCI"); 275241600Sgonzo result = BUS_PROBE_GENERIC; 276241600Sgonzo } 277270885Smarius 278241600Sgonzo return (result); 279241600Sgonzo} 280241600Sgonzo 281241600Sgonzostatic int 282241600Sgonzosdhci_pci_attach(device_t dev) 283241600Sgonzo{ 284241600Sgonzo struct sdhci_pci_softc *sc = device_get_softc(dev); 285241600Sgonzo uint32_t model; 286241600Sgonzo uint16_t subvendor; 287270885Smarius int bar, err, rid, slots, i; 288241600Sgonzo 289241600Sgonzo model = (uint32_t)pci_get_device(dev) << 16; 290241600Sgonzo model |= (uint32_t)pci_get_vendor(dev) & 0x0000ffff; 291241600Sgonzo subvendor = pci_get_subvendor(dev); 292241600Sgonzo /* Apply chip specific quirks. */ 293241600Sgonzo for (i = 0; sdhci_devices[i].model != 0; i++) { 294241600Sgonzo if (sdhci_devices[i].model == model && 295241600Sgonzo (sdhci_devices[i].subvendor == 0xffff || 296241600Sgonzo sdhci_devices[i].subvendor == subvendor)) { 297241600Sgonzo sc->quirks = sdhci_devices[i].quirks; 298241600Sgonzo break; 299241600Sgonzo } 300241600Sgonzo } 301241600Sgonzo /* Some controllers need to be bumped into the right mode. */ 302241600Sgonzo if (sc->quirks & SDHCI_QUIRK_LOWER_FREQUENCY) 303241600Sgonzo sdhci_lower_frequency(dev); 304241600Sgonzo /* Read slots info from PCI registers. */ 305241600Sgonzo slots = pci_read_config(dev, PCI_SLOT_INFO, 1); 306241600Sgonzo bar = PCI_SLOT_INFO_FIRST_BAR(slots); 307241600Sgonzo slots = PCI_SLOT_INFO_SLOTS(slots); 308241600Sgonzo if (slots > 6 || bar > 5) { 309241600Sgonzo device_printf(dev, "Incorrect slots information (%d, %d).\n", 310241600Sgonzo slots, bar); 311241600Sgonzo return (EINVAL); 312241600Sgonzo } 313241600Sgonzo /* Allocate IRQ. */ 314270885Smarius i = 1; 315270885Smarius rid = 0; 316270885Smarius if (sdhci_enable_msi != 0 && pci_alloc_msi(dev, &i) == 0) 317270885Smarius rid = 1; 318270885Smarius sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 319270885Smarius RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE)); 320241600Sgonzo if (sc->irq_res == NULL) { 321241600Sgonzo device_printf(dev, "Can't allocate IRQ\n"); 322270885Smarius pci_release_msi(dev); 323241600Sgonzo return (ENOMEM); 324241600Sgonzo } 325241600Sgonzo /* Scan all slots. */ 326241600Sgonzo for (i = 0; i < slots; i++) { 327241600Sgonzo struct sdhci_slot *slot = &sc->slots[sc->num_slots]; 328241600Sgonzo 329241600Sgonzo /* Allocate memory. */ 330270885Smarius rid = PCIR_BAR(bar + i); 331270885Smarius sc->mem_res[i] = bus_alloc_resource(dev, SYS_RES_MEMORY, 332270885Smarius &rid, 0ul, ~0ul, 0x100, RF_ACTIVE); 333241600Sgonzo if (sc->mem_res[i] == NULL) { 334241600Sgonzo device_printf(dev, "Can't allocate memory for slot %d\n", i); 335241600Sgonzo continue; 336241600Sgonzo } 337241600Sgonzo 338241600Sgonzo if (sdhci_init_slot(dev, slot, i) != 0) 339241600Sgonzo continue; 340241600Sgonzo 341241600Sgonzo sc->num_slots++; 342241600Sgonzo } 343241600Sgonzo device_printf(dev, "%d slot(s) allocated\n", sc->num_slots); 344241600Sgonzo /* Activate the interrupt */ 345241600Sgonzo err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE, 346241600Sgonzo NULL, sdhci_pci_intr, sc, &sc->intrhand); 347241600Sgonzo if (err) 348241600Sgonzo device_printf(dev, "Can't setup IRQ\n"); 349241600Sgonzo pci_enable_busmaster(dev); 350241600Sgonzo /* Process cards detection. */ 351241600Sgonzo for (i = 0; i < sc->num_slots; i++) { 352241600Sgonzo struct sdhci_slot *slot = &sc->slots[i]; 353241600Sgonzo 354241600Sgonzo sdhci_start_slot(slot); 355241600Sgonzo } 356270885Smarius 357241600Sgonzo return (0); 358241600Sgonzo} 359241600Sgonzo 360241600Sgonzostatic int 361241600Sgonzosdhci_pci_detach(device_t dev) 362241600Sgonzo{ 363241600Sgonzo struct sdhci_pci_softc *sc = device_get_softc(dev); 364241600Sgonzo int i; 365241600Sgonzo 366241600Sgonzo bus_teardown_intr(dev, sc->irq_res, sc->intrhand); 367241600Sgonzo bus_release_resource(dev, SYS_RES_IRQ, 368270885Smarius rman_get_rid(sc->irq_res), sc->irq_res); 369270885Smarius pci_release_msi(dev); 370241600Sgonzo 371241600Sgonzo for (i = 0; i < sc->num_slots; i++) { 372241600Sgonzo struct sdhci_slot *slot = &sc->slots[i]; 373241600Sgonzo 374241600Sgonzo sdhci_cleanup_slot(slot); 375241600Sgonzo bus_release_resource(dev, SYS_RES_MEMORY, 376270885Smarius rman_get_rid(sc->mem_res[i]), sc->mem_res[i]); 377241600Sgonzo } 378276469Smarius if (sc->quirks & SDHCI_QUIRK_LOWER_FREQUENCY) 379276469Smarius sdhci_restore_frequency(dev); 380241600Sgonzo return (0); 381241600Sgonzo} 382241600Sgonzo 383241600Sgonzostatic int 384276469Smariussdhci_pci_shutdown(device_t dev) 385276469Smarius{ 386276469Smarius struct sdhci_pci_softc *sc = device_get_softc(dev); 387276469Smarius 388276469Smarius if (sc->quirks & SDHCI_QUIRK_LOWER_FREQUENCY) 389276469Smarius sdhci_restore_frequency(dev); 390276469Smarius return (0); 391276469Smarius} 392276469Smarius 393276469Smariusstatic int 394241600Sgonzosdhci_pci_suspend(device_t dev) 395241600Sgonzo{ 396241600Sgonzo struct sdhci_pci_softc *sc = device_get_softc(dev); 397241600Sgonzo int i, err; 398241600Sgonzo 399241600Sgonzo err = bus_generic_suspend(dev); 400241600Sgonzo if (err) 401241600Sgonzo return (err); 402241600Sgonzo for (i = 0; i < sc->num_slots; i++) 403270885Smarius sdhci_generic_suspend(&sc->slots[i]); 404241600Sgonzo return (0); 405241600Sgonzo} 406241600Sgonzo 407241600Sgonzostatic int 408241600Sgonzosdhci_pci_resume(device_t dev) 409241600Sgonzo{ 410241600Sgonzo struct sdhci_pci_softc *sc = device_get_softc(dev); 411241600Sgonzo int i; 412241600Sgonzo 413241600Sgonzo for (i = 0; i < sc->num_slots; i++) 414241600Sgonzo sdhci_generic_resume(&sc->slots[i]); 415241600Sgonzo return (bus_generic_resume(dev)); 416241600Sgonzo} 417241600Sgonzo 418241600Sgonzostatic void 419241600Sgonzosdhci_pci_intr(void *arg) 420241600Sgonzo{ 421241600Sgonzo struct sdhci_pci_softc *sc = (struct sdhci_pci_softc *)arg; 422241600Sgonzo int i; 423241600Sgonzo 424241600Sgonzo for (i = 0; i < sc->num_slots; i++) { 425241600Sgonzo struct sdhci_slot *slot = &sc->slots[i]; 426241600Sgonzo sdhci_generic_intr(slot); 427241600Sgonzo } 428241600Sgonzo} 429241600Sgonzo 430241600Sgonzostatic device_method_t sdhci_methods[] = { 431241600Sgonzo /* device_if */ 432241600Sgonzo DEVMETHOD(device_probe, sdhci_pci_probe), 433241600Sgonzo DEVMETHOD(device_attach, sdhci_pci_attach), 434241600Sgonzo DEVMETHOD(device_detach, sdhci_pci_detach), 435276469Smarius DEVMETHOD(device_shutdown, sdhci_pci_shutdown), 436241600Sgonzo DEVMETHOD(device_suspend, sdhci_pci_suspend), 437241600Sgonzo DEVMETHOD(device_resume, sdhci_pci_resume), 438241600Sgonzo 439241600Sgonzo /* Bus interface */ 440241600Sgonzo DEVMETHOD(bus_read_ivar, sdhci_generic_read_ivar), 441241600Sgonzo DEVMETHOD(bus_write_ivar, sdhci_generic_write_ivar), 442241600Sgonzo 443241600Sgonzo /* mmcbr_if */ 444241600Sgonzo DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios), 445241600Sgonzo DEVMETHOD(mmcbr_request, sdhci_generic_request), 446241600Sgonzo DEVMETHOD(mmcbr_get_ro, sdhci_generic_get_ro), 447241600Sgonzo DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host), 448241600Sgonzo DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host), 449241600Sgonzo 450241600Sgonzo /* SDHCI registers accessors */ 451241600Sgonzo DEVMETHOD(sdhci_read_1, sdhci_pci_read_1), 452241600Sgonzo DEVMETHOD(sdhci_read_2, sdhci_pci_read_2), 453241600Sgonzo DEVMETHOD(sdhci_read_4, sdhci_pci_read_4), 454241600Sgonzo DEVMETHOD(sdhci_read_multi_4, sdhci_pci_read_multi_4), 455241600Sgonzo DEVMETHOD(sdhci_write_1, sdhci_pci_write_1), 456241600Sgonzo DEVMETHOD(sdhci_write_2, sdhci_pci_write_2), 457241600Sgonzo DEVMETHOD(sdhci_write_4, sdhci_pci_write_4), 458241600Sgonzo DEVMETHOD(sdhci_write_multi_4, sdhci_pci_write_multi_4), 459241600Sgonzo 460246128Ssbz DEVMETHOD_END 461241600Sgonzo}; 462241600Sgonzo 463241600Sgonzostatic driver_t sdhci_pci_driver = { 464241600Sgonzo "sdhci_pci", 465241600Sgonzo sdhci_methods, 466241600Sgonzo sizeof(struct sdhci_pci_softc), 467241600Sgonzo}; 468241600Sgonzostatic devclass_t sdhci_pci_devclass; 469241600Sgonzo 470270885SmariusDRIVER_MODULE(sdhci_pci, pci, sdhci_pci_driver, sdhci_pci_devclass, NULL, 471270885Smarius NULL); 472241600SgonzoMODULE_DEPEND(sdhci_pci, sdhci, 1, 1, 1); 473