1331722Seadler/* 2284741Sdavidcs * Copyright (c) 2013-2016 Qlogic Corporation 3250661Sdavidcs * All rights reserved. 4250661Sdavidcs * 5250661Sdavidcs * Redistribution and use in source and binary forms, with or without 6250661Sdavidcs * modification, are permitted provided that the following conditions 7250661Sdavidcs * are met: 8250661Sdavidcs * 9250661Sdavidcs * 1. Redistributions of source code must retain the above copyright 10250661Sdavidcs * notice, this list of conditions and the following disclaimer. 11250661Sdavidcs * 2. Redistributions in binary form must reproduce the above copyright 12250661Sdavidcs * notice, this list of conditions and the following disclaimer in the 13250661Sdavidcs * documentation and/or other materials provided with the distribution. 14250661Sdavidcs * 15250661Sdavidcs * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16250661Sdavidcs * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17250661Sdavidcs * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18250661Sdavidcs * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19250661Sdavidcs * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20250661Sdavidcs * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21250661Sdavidcs * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22250661Sdavidcs * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23250661Sdavidcs * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24250661Sdavidcs * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25250661Sdavidcs * POSSIBILITY OF SUCH DAMAGE. 26250661Sdavidcs * 27250661Sdavidcs * $FreeBSD: stable/11/sys/dev/qlxgbe/ql_ioctl.h 331722 2018-03-29 02:50:57Z eadler $ 28250661Sdavidcs */ 29250661Sdavidcs/* 30250661Sdavidcs * File: ql_ioctl.h 31250661Sdavidcs * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 32250661Sdavidcs */ 33250661Sdavidcs 34250661Sdavidcs#ifndef _QL_IOCTL_H_ 35250661Sdavidcs#define _QL_IOCTL_H_ 36250661Sdavidcs 37250661Sdavidcs#include <sys/ioccom.h> 38250661Sdavidcs 39250661Sdavidcsstruct qla_reg_val { 40250661Sdavidcs uint16_t rd; 41250661Sdavidcs uint16_t direct; 42250661Sdavidcs uint32_t reg; 43250661Sdavidcs uint32_t val; 44250661Sdavidcs}; 45250661Sdavidcstypedef struct qla_reg_val qla_reg_val_t; 46250661Sdavidcs 47250661Sdavidcsstruct qla_rd_flash { 48250661Sdavidcs uint32_t off; 49250661Sdavidcs uint32_t data; 50250661Sdavidcs}; 51250661Sdavidcstypedef struct qla_rd_flash qla_rd_flash_t; 52250661Sdavidcs 53250661Sdavidcsstruct qla_wr_flash { 54250661Sdavidcs uint32_t off; 55250661Sdavidcs uint32_t size; 56250661Sdavidcs void *buffer; 57250661Sdavidcs uint32_t pattern; 58250661Sdavidcs}; 59250661Sdavidcstypedef struct qla_wr_flash qla_wr_flash_t; 60250661Sdavidcs 61250661Sdavidcsstruct qla_erase_flash { 62250661Sdavidcs uint32_t off; 63250661Sdavidcs uint32_t size; 64250661Sdavidcs}; 65250661Sdavidcstypedef struct qla_erase_flash qla_erase_flash_t; 66250661Sdavidcs 67250661Sdavidcsstruct qla_rd_pci_ids { 68250661Sdavidcs uint16_t ven_id; 69250661Sdavidcs uint16_t dev_id; 70250661Sdavidcs uint16_t subsys_ven_id; 71250661Sdavidcs uint16_t subsys_dev_id; 72250661Sdavidcs uint8_t rev_id; 73250661Sdavidcs}; 74250661Sdavidcstypedef struct qla_rd_pci_ids qla_rd_pci_ids_t; 75250661Sdavidcs 76330555Sdavidcs#define NUM_LOG_ENTRY_PARAMS 5 77330555Sdavidcs#define NUM_LOG_ENTRIES 512 78330555Sdavidcs 79330555Sdavidcsstruct qla_sp_log_entry { 80330555Sdavidcs uint32_t fmtstr_idx; 81330555Sdavidcs uint32_t num_params; 82330555Sdavidcs uint64_t usec_ts; 83330555Sdavidcs uint32_t params[NUM_LOG_ENTRY_PARAMS]; 84330555Sdavidcs}; 85330555Sdavidcstypedef struct qla_sp_log_entry qla_sp_log_entry_t; 86330555Sdavidcs 87250661Sdavidcs/* 88250661Sdavidcs * structure encapsulating the value to read/write from/to offchip (MS) memory 89250661Sdavidcs */ 90250661Sdavidcsstruct qla_offchip_mem_val { 91250661Sdavidcs uint16_t rd; 92250661Sdavidcs uint64_t off; 93250661Sdavidcs uint32_t data_lo; 94250661Sdavidcs uint32_t data_hi; 95250661Sdavidcs uint32_t data_ulo; 96250661Sdavidcs uint32_t data_uhi; 97250661Sdavidcs}; 98250661Sdavidcstypedef struct qla_offchip_mem_val qla_offchip_mem_val_t; 99250661Sdavidcs 100250661Sdavidcsstruct qla_rd_fw_dump { 101250661Sdavidcs uint16_t pci_func; 102330555Sdavidcs uint16_t saved; 103330555Sdavidcs uint64_t usec_ts; 104305487Sdavidcs uint32_t minidump_size; 105305487Sdavidcs void *minidump; 106250661Sdavidcs}; 107250661Sdavidcstypedef struct qla_rd_fw_dump qla_rd_fw_dump_t; 108250661Sdavidcs 109324762Sdavidcsstruct qla_drvr_state_tx { 110324762Sdavidcs uint64_t base_p_addr; 111324762Sdavidcs uint64_t cons_p_addr; 112324762Sdavidcs uint32_t tx_prod_reg; 113324762Sdavidcs uint32_t tx_cntxt_id; 114324762Sdavidcs uint32_t txr_free; 115324762Sdavidcs uint32_t txr_next; 116324762Sdavidcs uint32_t txr_comp; 117324762Sdavidcs}; 118324762Sdavidcstypedef struct qla_drvr_state_tx qla_drvr_state_tx_t; 119324762Sdavidcs 120324762Sdavidcsstruct qla_drvr_state_sds { 121324762Sdavidcs uint32_t sdsr_next; /* next entry in SDS ring to process */ 122324762Sdavidcs uint32_t sds_consumer; 123324762Sdavidcs}; 124324762Sdavidcstypedef struct qla_drvr_state_sds qla_drvr_state_sds_t; 125324762Sdavidcs 126324762Sdavidcsstruct qla_drvr_state_rx { 127324762Sdavidcs uint32_t prod_std; 128324762Sdavidcs uint32_t rx_next; /* next standard rcv ring to arm fw */; 129324762Sdavidcs}; 130324762Sdavidcstypedef struct qla_drvr_state_rx qla_drvr_state_rx_t; 131324762Sdavidcs 132324762Sdavidcsstruct qla_drvr_state_hdr { 133324762Sdavidcs uint32_t drvr_version_major; 134324762Sdavidcs uint32_t drvr_version_minor; 135324762Sdavidcs uint32_t drvr_version_build; 136324762Sdavidcs 137324762Sdavidcs uint8_t mac_addr[ETHER_ADDR_LEN]; 138330555Sdavidcs uint16_t saved; 139330555Sdavidcs uint64_t usec_ts; 140324762Sdavidcs uint16_t link_speed; 141324762Sdavidcs uint16_t cable_length; 142324762Sdavidcs uint32_t cable_oui; 143324762Sdavidcs uint8_t link_up; 144324762Sdavidcs uint8_t module_type; 145324762Sdavidcs uint8_t link_faults; 146324762Sdavidcs uint32_t rcv_intr_coalesce; 147324762Sdavidcs uint32_t xmt_intr_coalesce; 148324762Sdavidcs 149324762Sdavidcs uint32_t tx_state_offset;/* size = sizeof (qla_drvr_state_tx_t) * num_tx_rings */ 150324762Sdavidcs uint32_t rx_state_offset;/* size = sizeof (qla_drvr_state_rx_t) * num_rx_rings */ 151324762Sdavidcs uint32_t sds_state_offset;/* size = sizeof (qla_drvr_state_sds_t) * num_sds_rings */ 152324762Sdavidcs 153324762Sdavidcs uint32_t num_tx_rings; /* number of tx rings */ 154324762Sdavidcs uint32_t txr_size; /* size of each tx ring in bytes */ 155324762Sdavidcs uint32_t txr_entries; /* number of descriptors in each tx ring */ 156324762Sdavidcs uint32_t txr_offset; /* start of tx ring [0 - #rings] content */ 157324762Sdavidcs 158324762Sdavidcs uint32_t num_rx_rings; /* number of rx rings */ 159324762Sdavidcs uint32_t rxr_size; /* size of each rx ring in bytes */ 160324762Sdavidcs uint32_t rxr_entries; /* number of descriptors in each rx ring */ 161324762Sdavidcs uint32_t rxr_offset; /* start of rx ring [0 - #rings] content */ 162324762Sdavidcs 163324762Sdavidcs uint32_t num_sds_rings; /* number of sds rings */ 164324762Sdavidcs uint32_t sds_ring_size; /* size of each sds ring in bytes */ 165324762Sdavidcs uint32_t sds_entries; /* number of descriptors in each sds ring */ 166324762Sdavidcs uint32_t sds_offset; /* start of sds ring [0 - #rings] content */ 167324762Sdavidcs}; 168324762Sdavidcs 169324762Sdavidcstypedef struct qla_drvr_state_hdr qla_drvr_state_hdr_t; 170324762Sdavidcs 171324762Sdavidcsstruct qla_driver_state { 172324762Sdavidcs uint32_t size; 173324762Sdavidcs void *buffer; 174324762Sdavidcs}; 175324762Sdavidcstypedef struct qla_driver_state qla_driver_state_t; 176324762Sdavidcs 177330555Sdavidcsstruct qla_sp_log { 178330555Sdavidcs uint32_t next_idx; /* index of next entry in slowpath trace log */ 179330555Sdavidcs uint32_t num_entries; /* number of entries in slowpath trace log */ 180330555Sdavidcs void *buffer; 181330555Sdavidcs}; 182330555Sdavidcstypedef struct qla_sp_log qla_sp_log_t; 183330555Sdavidcs 184250661Sdavidcs/* 185250661Sdavidcs * Read/Write Register 186250661Sdavidcs */ 187250661Sdavidcs#define QLA_RDWR_REG _IOWR('q', 1, qla_reg_val_t) 188250661Sdavidcs 189250661Sdavidcs/* 190250661Sdavidcs * Read Flash 191250661Sdavidcs */ 192250661Sdavidcs#define QLA_RD_FLASH _IOWR('q', 2, qla_rd_flash_t) 193250661Sdavidcs 194250661Sdavidcs/* 195250661Sdavidcs * Write Flash 196250661Sdavidcs */ 197250661Sdavidcs#define QLA_WR_FLASH _IOWR('q', 3, qla_wr_flash_t) 198250661Sdavidcs 199250661Sdavidcs/* 200250661Sdavidcs * Read Offchip (MS) Memory 201250661Sdavidcs */ 202250661Sdavidcs#define QLA_RDWR_MS_MEM _IOWR('q', 4, qla_offchip_mem_val_t) 203250661Sdavidcs 204250661Sdavidcs/* 205250661Sdavidcs * Erase Flash 206250661Sdavidcs */ 207250661Sdavidcs#define QLA_ERASE_FLASH _IOWR('q', 5, qla_erase_flash_t) 208250661Sdavidcs 209250661Sdavidcs/* 210250661Sdavidcs * Read PCI IDs 211250661Sdavidcs */ 212250661Sdavidcs#define QLA_RD_PCI_IDS _IOWR('q', 6, qla_rd_pci_ids_t) 213250661Sdavidcs 214250661Sdavidcs/* 215250661Sdavidcs * Read Minidump Template Size 216250661Sdavidcs */ 217250661Sdavidcs#define QLA_RD_FW_DUMP_SIZE _IOWR('q', 7, qla_rd_fw_dump_t) 218250661Sdavidcs 219250661Sdavidcs/* 220250661Sdavidcs * Read Minidump Template 221250661Sdavidcs */ 222250661Sdavidcs#define QLA_RD_FW_DUMP _IOWR('q', 8, qla_rd_fw_dump_t) 223250661Sdavidcs 224324762Sdavidcs/* 225324762Sdavidcs * Read Driver State 226324762Sdavidcs */ 227324762Sdavidcs#define QLA_RD_DRVR_STATE _IOWR('q', 9, qla_driver_state_t) 228324762Sdavidcs 229330555Sdavidcs/* 230330555Sdavidcs * Read Slowpath Log 231330555Sdavidcs */ 232330555Sdavidcs#define QLA_RD_SLOWPATH_LOG _IOWR('q', 10, qla_sp_log_t) 233324762Sdavidcs 234330555Sdavidcs/* 235330555Sdavidcs * Format Strings For Slowpath Trace Logs 236330555Sdavidcs */ 237330555Sdavidcs#define SP_TLOG_FMT_STR_0 \ 238330555Sdavidcs "qla_mbx_cmd [%ld]: enter no_pause = %d [0x%08x 0x%08x 0x%08x 0x%08x]\n" 239330555Sdavidcs 240330555Sdavidcs#define SP_TLOG_FMT_STR_1 \ 241330555Sdavidcs "qla_mbx_cmd [%ld]: offline = 0x%08x qla_initiate_recovery = 0x%08x exit1\n" 242330555Sdavidcs 243330555Sdavidcs#define SP_TLOG_FMT_STR_2 \ 244330555Sdavidcs "qla_mbx_cmd [%ld]: qla_initiate_recovery = 0x%08x exit2\n" 245330555Sdavidcs 246330555Sdavidcs#define SP_TLOG_FMT_STR_3 \ 247330555Sdavidcs "qla_mbx_cmd [%ld]: timeout exit3 [host_mbx_cntrl = 0x%08x]\n" 248330555Sdavidcs 249330555Sdavidcs#define SP_TLOG_FMT_STR_4 \ 250330555Sdavidcs "qla_mbx_cmd [%ld]: qla_initiate_recovery = 0x%08x exit4\n" 251330555Sdavidcs 252330555Sdavidcs#define SP_TLOG_FMT_STR_5 \ 253330555Sdavidcs "qla_mbx_cmd [%ld]: timeout exit5 [fw_mbx_cntrl = 0x%08x]\n" 254330555Sdavidcs 255330555Sdavidcs#define SP_TLOG_FMT_STR_6 \ 256330555Sdavidcs "qla_mbx_cmd [%ld]: qla_initiate_recovery = 0x%08x exit6\n" 257330555Sdavidcs 258330555Sdavidcs#define SP_TLOG_FMT_STR_7 \ 259330555Sdavidcs "qla_mbx_cmd [%ld]: exit [0x%08x 0x%08x 0x%08x 0x%08x 0x%08x]\n" 260330555Sdavidcs 261330555Sdavidcs#define SP_TLOG_FMT_STR_8 \ 262330555Sdavidcs "qla_ioctl [%ld]: SIOCSIFADDR if_drv_flags = 0x%08x [0x%08x] ipv4 = 0x%08x\n" 263330555Sdavidcs 264330555Sdavidcs#define SP_TLOG_FMT_STR_9 \ 265330555Sdavidcs "qla_ioctl [%ld]: SIOCSIFMTU if_drv_flags = 0x%08x [0x%08x] max_frame_size = 0x%08x if_mtu = 0x%08x\n" 266330555Sdavidcs 267330555Sdavidcs#define SP_TLOG_FMT_STR_10 \ 268330555Sdavidcs "qla_ioctl [%ld]: SIOCSIFFLAGS if_drv_flags = 0x%08x [0x%08x] ha->if_flags = 0x%08x ifp->if_flags = 0x%08x\n" 269330555Sdavidcs 270330555Sdavidcs#define SP_TLOG_FMT_STR_11 \ 271330555Sdavidcs "qla_ioctl [%ld]: SIOCSIFCAP if_drv_flags = 0x%08x [0x%08x] mask = 0x%08x ifp->if_capenable = 0x%08x\n" 272330555Sdavidcs 273330555Sdavidcs#define SP_TLOG_FMT_STR_12 \ 274330555Sdavidcs "qla_set_multi [%ld]: if_drv_flags = 0x%08x [0x%08x] add_multi = 0x%08x mcnt = 0x%08x\n" 275330555Sdavidcs 276330555Sdavidcs#define SP_TLOG_FMT_STR_13 \ 277330555Sdavidcs "qla_stop [%ld]: \n" 278330555Sdavidcs 279330555Sdavidcs#define SP_TLOG_FMT_STR_14 \ 280330555Sdavidcs "qla_init_locked [%ld]: \n" 281330555Sdavidcs 282330555Sdavidcs 283250661Sdavidcs#endif /* #ifndef _QL_IOCTL_H_ */ 284