1316485Sdavidcs/* 2316485Sdavidcs * Copyright (c) 2017-2018 Cavium, Inc. 3316485Sdavidcs * All rights reserved. 4316485Sdavidcs * 5316485Sdavidcs * Redistribution and use in source and binary forms, with or without 6316485Sdavidcs * modification, are permitted provided that the following conditions 7316485Sdavidcs * are met: 8316485Sdavidcs * 9316485Sdavidcs * 1. Redistributions of source code must retain the above copyright 10316485Sdavidcs * notice, this list of conditions and the following disclaimer. 11316485Sdavidcs * 2. Redistributions in binary form must reproduce the above copyright 12316485Sdavidcs * notice, this list of conditions and the following disclaimer in the 13316485Sdavidcs * documentation and/or other materials provided with the distribution. 14316485Sdavidcs * 15316485Sdavidcs * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16316485Sdavidcs * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17316485Sdavidcs * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18316485Sdavidcs * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19316485Sdavidcs * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20316485Sdavidcs * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21316485Sdavidcs * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22316485Sdavidcs * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23316485Sdavidcs * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24316485Sdavidcs * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25316485Sdavidcs * POSSIBILITY OF SUCH DAMAGE. 26316485Sdavidcs * 27316485Sdavidcs * $FreeBSD: stable/11/sys/dev/qlnx/qlnxe/ecore_utils.h 337517 2018-08-09 01:17:35Z davidcs $ 28316485Sdavidcs * 29316485Sdavidcs */ 30316485Sdavidcs 31316485Sdavidcs#ifndef __ECORE_UTILS_H__ 32316485Sdavidcs#define __ECORE_UTILS_H__ 33316485Sdavidcs 34316485Sdavidcs/* dma_addr_t manip */ 35316485Sdavidcs/* Suppress "right shift count >= width of type" warning when that quantity is 36316485Sdavidcs * 32-bits rquires the >> 16) >> 16) 37316485Sdavidcs */ 38316485Sdavidcs#define PTR_LO(x) ((u32)(((osal_uintptr_t)(x)) & 0xffffffff)) 39316485Sdavidcs#define PTR_HI(x) ((u32)((((osal_uintptr_t)(x)) >> 16) >> 16)) 40316485Sdavidcs 41316485Sdavidcs#define DMA_LO(x) ((u32)(((dma_addr_t)(x)) & 0xffffffff)) 42316485Sdavidcs#define DMA_HI(x) ((u32)(((dma_addr_t)(x)) >> 32)) 43316485Sdavidcs 44316485Sdavidcs#define DMA_LO_LE(x) OSAL_CPU_TO_LE32(DMA_LO(x)) 45316485Sdavidcs#define DMA_HI_LE(x) OSAL_CPU_TO_LE32(DMA_HI(x)) 46316485Sdavidcs 47316485Sdavidcs/* It's assumed that whoever includes this has previously included an hsi 48316485Sdavidcs * file defining the regpair. 49316485Sdavidcs */ 50316485Sdavidcs#define DMA_REGPAIR_LE(x, val) (x).hi = DMA_HI_LE((val)); \ 51316485Sdavidcs (x).lo = DMA_LO_LE((val)) 52316485Sdavidcs 53316485Sdavidcs#define HILO_GEN(hi, lo, type) ((((type)(hi)) << 32) + (lo)) 54316485Sdavidcs#define HILO_DMA(hi, lo) HILO_GEN(hi, lo, dma_addr_t) 55316485Sdavidcs#define HILO_64(hi, lo) HILO_GEN(hi, lo, u64) 56316485Sdavidcs#define HILO_DMA_REGPAIR(regpair) (HILO_DMA(regpair.hi, regpair.lo)) 57316485Sdavidcs#define HILO_64_REGPAIR(regpair) (HILO_64(regpair.hi, regpair.lo)) 58316485Sdavidcs 59337517Sdavidcs#ifndef USHRT_MAX 60337517Sdavidcs#define USHRT_MAX ((u16)(~0U)) 61316485Sdavidcs#endif 62337517Sdavidcs 63337517Sdavidcs#endif 64