1316485Sdavidcs/*
2316485Sdavidcs * Copyright (c) 2017-2018 Cavium, Inc.
3316485Sdavidcs * All rights reserved.
4316485Sdavidcs *
5316485Sdavidcs *  Redistribution and use in source and binary forms, with or without
6316485Sdavidcs *  modification, are permitted provided that the following conditions
7316485Sdavidcs *  are met:
8316485Sdavidcs *
9316485Sdavidcs *  1. Redistributions of source code must retain the above copyright
10316485Sdavidcs *     notice, this list of conditions and the following disclaimer.
11316485Sdavidcs *  2. Redistributions in binary form must reproduce the above copyright
12316485Sdavidcs *     notice, this list of conditions and the following disclaimer in the
13316485Sdavidcs *     documentation and/or other materials provided with the distribution.
14316485Sdavidcs *
15316485Sdavidcs *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16316485Sdavidcs *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17316485Sdavidcs *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18316485Sdavidcs *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
19316485Sdavidcs *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20316485Sdavidcs *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21316485Sdavidcs *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22316485Sdavidcs *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23316485Sdavidcs *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24316485Sdavidcs *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25316485Sdavidcs *  POSSIBILITY OF SUCH DAMAGE.
26316485Sdavidcs *
27316485Sdavidcs * $FreeBSD: stable/11/sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h 337517 2018-08-09 01:17:35Z davidcs $
28316485Sdavidcs *
29316485Sdavidcs */
30316485Sdavidcs
31316485Sdavidcs#ifndef _INIT_FW_FUNCS_H
32316485Sdavidcs#define _INIT_FW_FUNCS_H
33316485Sdavidcs/* Forward declarations */
34316485Sdavidcs
35316485Sdavidcsstruct init_qm_pq_params;
36316485Sdavidcs
37316485Sdavidcs/**
38316485Sdavidcs * @brief ecore_qm_pf_mem_size - Prepare QM ILT sizes
39316485Sdavidcs *
40316485Sdavidcs * Returns the required host memory size in 4KB units.
41316485Sdavidcs * Must be called before all QM init HSI functions.
42316485Sdavidcs *
43316485Sdavidcs * @param num_pf_cids - number of connections used by this PF
44316485Sdavidcs * @param num_vf_cids -	number of connections used by VFs of this PF
45316485Sdavidcs * @param num_tids -	number of tasks used by this PF
46316485Sdavidcs * @param num_pf_pqs -	number of PQs used by this PF
47316485Sdavidcs * @param num_vf_pqs -	number of PQs used by VFs of this PF
48316485Sdavidcs *
49316485Sdavidcs * @return The required host memory size in 4KB units.
50316485Sdavidcs */
51320164Sdavidcsu32 ecore_qm_pf_mem_size(u32 num_pf_cids,
52337517Sdavidcs						 u32 num_vf_cids,
53337517Sdavidcs						 u32 num_tids,
54337517Sdavidcs						 u16 num_pf_pqs,
55337517Sdavidcs						 u16 num_vf_pqs);
56316485Sdavidcs
57316485Sdavidcs/**
58316485Sdavidcs * @brief ecore_qm_common_rt_init - Prepare QM runtime init values for the
59316485Sdavidcs * engine phase.
60316485Sdavidcs *
61316485Sdavidcs * @param p_hwfn -			  HW device data
62316485Sdavidcs * @param max_ports_per_engine -  max number of ports per engine in HW
63316485Sdavidcs * @param max_phys_tcs_per_port	- max number of physical TCs per port in HW
64316485Sdavidcs * @param pf_rl_en -		  enable per-PF rate limiters
65316485Sdavidcs * @param pf_wfq_en -		  enable per-PF WFQ
66316485Sdavidcs * @param vport_rl_en -		  enable per-VPORT rate limiters
67316485Sdavidcs * @param vport_wfq_en -	  enable per-VPORT WFQ
68316485Sdavidcs * @param port_params -		  array of size MAX_NUM_PORTS with parameters
69316485Sdavidcs *				  for each port
70316485Sdavidcs *
71316485Sdavidcs * @return 0 on success, -1 on error.
72316485Sdavidcs */
73316485Sdavidcsint ecore_qm_common_rt_init(struct ecore_hwfn *p_hwfn,
74316485Sdavidcs							u8 max_ports_per_engine,
75316485Sdavidcs							u8 max_phys_tcs_per_port,
76316485Sdavidcs							bool pf_rl_en,
77316485Sdavidcs							bool pf_wfq_en,
78316485Sdavidcs							bool vport_rl_en,
79316485Sdavidcs							bool vport_wfq_en,
80316485Sdavidcs							struct init_qm_port_params port_params[MAX_NUM_PORTS]);
81316485Sdavidcs
82316485Sdavidcs/**
83316485Sdavidcs * @brief ecore_qm_pf_rt_init - Prepare QM runtime init values for the PF phase
84316485Sdavidcs *
85316485Sdavidcs * @param p_hwfn -			  HW device data
86316485Sdavidcs * @param p_ptt -			  ptt window used for writing the registers
87316485Sdavidcs * @param port_id -		  port ID
88316485Sdavidcs * @param pf_id -		  PF ID
89316485Sdavidcs * @param max_phys_tcs_per_port	- max number of physical TCs per port in HW
90337517Sdavidcs * @param is_pf_loading -	  indicates if the PF is currently loading,
91337517Sdavidcs *				  i.e. it has no allocated QM resources.
92316485Sdavidcs * @param num_pf_cids -		  number of connections used by this PF
93316485Sdavidcs * @param num_vf_cids -		  number of connections used by VFs of this PF
94316485Sdavidcs * @param num_tids -		  number of tasks used by this PF
95316485Sdavidcs * @param start_pq -		  first Tx PQ ID associated with this PF
96316485Sdavidcs * @param num_pf_pqs -		  number of Tx PQs associated with this PF
97316485Sdavidcs *				  (non-VF)
98316485Sdavidcs * @param num_vf_pqs -		  number of Tx PQs associated with a VF
99316485Sdavidcs * @param start_vport -		  first VPORT ID associated with this PF
100316485Sdavidcs * @param num_vports -		  number of VPORTs associated with this PF
101316485Sdavidcs * @param pf_wfq -		  WFQ weight. if PF WFQ is globally disabled,
102316485Sdavidcs *				  the weight must be 0. otherwise, the weight
103316485Sdavidcs *				  must be non-zero.
104316485Sdavidcs * @param pf_rl -		  rate limit in Mb/sec units. a value of 0
105316485Sdavidcs *				  means don't configure. ignored if PF RL is
106316485Sdavidcs *				  globally disabled.
107337517Sdavidcs * @param link_speed -		  link speed in Mbps.
108316485Sdavidcs * @param pq_params -		  array of size (num_pf_pqs + num_vf_pqs) with
109316485Sdavidcs *				  parameters for each Tx PQ associated with the
110316485Sdavidcs *				  specified PF.
111316485Sdavidcs * @param vport_params -	  array of size num_vports with parameters for
112316485Sdavidcs *				  each associated VPORT.
113316485Sdavidcs *
114316485Sdavidcs * @return 0 on success, -1 on error.
115316485Sdavidcs */
116316485Sdavidcsint ecore_qm_pf_rt_init(struct ecore_hwfn *p_hwfn,
117337517Sdavidcs						struct ecore_ptt *p_ptt,
118337517Sdavidcs						u8 port_id,
119337517Sdavidcs						u8 pf_id,
120337517Sdavidcs						u8 max_phys_tcs_per_port,
121337517Sdavidcs						bool is_pf_loading,
122337517Sdavidcs						u32 num_pf_cids,
123337517Sdavidcs						u32 num_vf_cids,
124337517Sdavidcs						u32 num_tids,
125337517Sdavidcs						u16 start_pq,
126337517Sdavidcs						u16 num_pf_pqs,
127337517Sdavidcs						u16 num_vf_pqs,
128337517Sdavidcs						u8 start_vport,
129337517Sdavidcs						u8 num_vports,
130337517Sdavidcs						u16 pf_wfq,
131337517Sdavidcs						u32 pf_rl,
132337517Sdavidcs						u32 link_speed,
133337517Sdavidcs						struct init_qm_pq_params *pq_params,
134337517Sdavidcs						struct init_qm_vport_params *vport_params);
135316485Sdavidcs
136316485Sdavidcs/**
137316485Sdavidcs * @brief ecore_init_pf_wfq - Initializes the WFQ weight of the specified PF
138316485Sdavidcs *
139316485Sdavidcs * @param p_hwfn -	   HW device data
140316485Sdavidcs * @param p_ptt -	   ptt window used for writing the registers
141316485Sdavidcs * @param pf_id	-  PF ID
142316485Sdavidcs * @param pf_wfq - WFQ weight. Must be non-zero.
143316485Sdavidcs *
144316485Sdavidcs * @return 0 on success, -1 on error.
145316485Sdavidcs */
146316485Sdavidcsint ecore_init_pf_wfq(struct ecore_hwfn *p_hwfn,
147316485Sdavidcs					  struct ecore_ptt *p_ptt,
148316485Sdavidcs					  u8 pf_id,
149316485Sdavidcs					  u16 pf_wfq);
150316485Sdavidcs
151316485Sdavidcs/**
152316485Sdavidcs * @brief ecore_init_pf_rl - Initializes the rate limit of the specified PF
153316485Sdavidcs *
154316485Sdavidcs * @param p_hwfn
155316485Sdavidcs * @param p_ptt -   ptt window used for writing the registers
156316485Sdavidcs * @param pf_id	- PF ID
157316485Sdavidcs * @param pf_rl	- rate limit in Mb/sec units
158316485Sdavidcs *
159316485Sdavidcs * @return 0 on success, -1 on error.
160316485Sdavidcs */
161316485Sdavidcsint ecore_init_pf_rl(struct ecore_hwfn *p_hwfn,
162316485Sdavidcs					 struct ecore_ptt *p_ptt,
163316485Sdavidcs					 u8 pf_id,
164316485Sdavidcs					 u32 pf_rl);
165316485Sdavidcs
166316485Sdavidcs/**
167316485Sdavidcs * @brief ecore_init_vport_wfq - Initializes the WFQ weight of the specified VPORT
168316485Sdavidcs *
169316485Sdavidcs * @param p_hwfn -		   HW device data
170316485Sdavidcs * @param p_ptt -		   ptt window used for writing the registers
171316485Sdavidcs * @param first_tx_pq_id - An array containing the first Tx PQ ID associated
172316485Sdavidcs *                         with the VPORT for each TC. This array is filled by
173316485Sdavidcs *                         ecore_qm_pf_rt_init
174316485Sdavidcs * @param vport_wfq -	   WFQ weight. Must be non-zero.
175316485Sdavidcs *
176316485Sdavidcs * @return 0 on success, -1 on error.
177316485Sdavidcs */
178316485Sdavidcsint ecore_init_vport_wfq(struct ecore_hwfn *p_hwfn,
179316485Sdavidcs						 struct ecore_ptt *p_ptt,
180316485Sdavidcs						 u16 first_tx_pq_id[NUM_OF_TCS],
181316485Sdavidcs						 u16 vport_wfq);
182316485Sdavidcs
183316485Sdavidcs/**
184316485Sdavidcs * @brief ecore_init_vport_rl - Initializes the rate limit of the specified
185316485Sdavidcs * VPORT.
186316485Sdavidcs *
187337517Sdavidcs * @param p_hwfn -	       HW device data
188337517Sdavidcs * @param p_ptt -	       ptt window used for writing the registers
189337517Sdavidcs * @param vport_id -   VPORT ID
190337517Sdavidcs * @param vport_rl -   rate limit in Mb/sec units
191337517Sdavidcs * @param link_speed - link speed in Mbps.
192316485Sdavidcs *
193316485Sdavidcs * @return 0 on success, -1 on error.
194316485Sdavidcs */
195316485Sdavidcsint ecore_init_vport_rl(struct ecore_hwfn *p_hwfn,
196316485Sdavidcs						struct ecore_ptt *p_ptt,
197316485Sdavidcs						u8 vport_id,
198337517Sdavidcs						u32 vport_rl,
199337517Sdavidcs						u32 link_speed);
200316485Sdavidcs
201316485Sdavidcs/**
202316485Sdavidcs * @brief ecore_send_qm_stop_cmd - Sends a stop command to the QM
203316485Sdavidcs *
204316485Sdavidcs * @param p_hwfn -		   HW device data
205316485Sdavidcs * @param p_ptt -		   ptt window used for writing the registers
206316485Sdavidcs * @param is_release_cmd - true for release, false for stop.
207316485Sdavidcs * @param is_tx_pq -	   true for Tx PQs, false for Other PQs.
208316485Sdavidcs * @param start_pq -	   first PQ ID to stop
209316485Sdavidcs * @param num_pqs -	   Number of PQs to stop, starting from start_pq.
210316485Sdavidcs *
211316485Sdavidcs * @return bool, true if successful, false if timeout occured while waiting for
212316485Sdavidcs * QM command done.
213316485Sdavidcs */
214316485Sdavidcsbool ecore_send_qm_stop_cmd(struct ecore_hwfn *p_hwfn,
215316485Sdavidcs							struct ecore_ptt *p_ptt,
216316485Sdavidcs							bool is_release_cmd,
217316485Sdavidcs							bool is_tx_pq,
218316485Sdavidcs							u16 start_pq,
219316485Sdavidcs							u16 num_pqs);
220316485Sdavidcs
221316485Sdavidcs#ifndef UNUSED_HSI_FUNC
222316485Sdavidcs
223316485Sdavidcs/**
224316485Sdavidcs * @brief ecore_init_nig_ets - Initializes the NIG ETS arbiter
225316485Sdavidcs *
226316485Sdavidcs * Based on weight/priority requirements per-TC.
227316485Sdavidcs *
228316485Sdavidcs * @param p_hwfn -   HW device data
229316485Sdavidcs * @param p_ptt -   ptt window used for writing the registers.
230316485Sdavidcs * @param req -   the NIG ETS initialization requirements.
231316485Sdavidcs * @param is_lb	- if set, the loopback port arbiter is initialized, otherwise
232316485Sdavidcs *		  the physical port arbiter is initialized. The pure-LB TC
233316485Sdavidcs *		  requirements are ignored when is_lb is cleared.
234316485Sdavidcs */
235316485Sdavidcsvoid ecore_init_nig_ets(struct ecore_hwfn *p_hwfn,
236316485Sdavidcs						struct ecore_ptt *p_ptt,
237316485Sdavidcs						struct init_ets_req* req,
238316485Sdavidcs						bool is_lb);
239316485Sdavidcs
240316485Sdavidcs/**
241316485Sdavidcs * @brief ecore_init_nig_lb_rl - Initializes the NIG LB RLs
242316485Sdavidcs *
243316485Sdavidcs * Based on global and per-TC rate requirements
244316485Sdavidcs *
245316485Sdavidcs * @param p_hwfn -	HW device data
246316485Sdavidcs * @param p_ptt - ptt window used for writing the registers.
247316485Sdavidcs * @param req -	the NIG LB RLs initialization requirements.
248316485Sdavidcs */
249316485Sdavidcsvoid ecore_init_nig_lb_rl(struct ecore_hwfn *p_hwfn,
250316485Sdavidcs						  struct ecore_ptt *p_ptt,
251316485Sdavidcs						  struct init_nig_lb_rl_req* req);
252316485Sdavidcs
253316485Sdavidcs#endif /* UNUSED_HSI_FUNC */
254316485Sdavidcs
255316485Sdavidcs/**
256316485Sdavidcs * @brief ecore_init_nig_pri_tc_map - Initializes the NIG priority to TC map.
257316485Sdavidcs *
258316485Sdavidcs * Assumes valid arguments.
259316485Sdavidcs *
260316485Sdavidcs * @param p_hwfn -	HW device data
261316485Sdavidcs * @param p_ptt - ptt window used for writing the registers.
262316485Sdavidcs * @param req - required mapping from prioirties to TCs.
263316485Sdavidcs */
264316485Sdavidcsvoid ecore_init_nig_pri_tc_map(struct ecore_hwfn *p_hwfn,
265316485Sdavidcs							   struct ecore_ptt *p_ptt,
266316485Sdavidcs							   struct init_nig_pri_tc_map_req* req);
267316485Sdavidcs
268316485Sdavidcs#ifndef UNUSED_HSI_FUNC
269316485Sdavidcs
270316485Sdavidcs/**
271316485Sdavidcs * @brief ecore_init_prs_ets - Initializes the PRS Rx ETS arbiter
272316485Sdavidcs *
273316485Sdavidcs * Based on weight/priority requirements per-TC.
274316485Sdavidcs *
275316485Sdavidcs * @param p_hwfn -	HW device data
276316485Sdavidcs * @param p_ptt - ptt window used for writing the registers.
277316485Sdavidcs * @param req -	the PRS ETS initialization requirements.
278316485Sdavidcs */
279316485Sdavidcsvoid ecore_init_prs_ets(struct ecore_hwfn *p_hwfn,
280316485Sdavidcs						struct ecore_ptt *p_ptt,
281316485Sdavidcs						struct init_ets_req* req);
282316485Sdavidcs
283316485Sdavidcs#endif /* UNUSED_HSI_FUNC */
284316485Sdavidcs#ifndef UNUSED_HSI_FUNC
285316485Sdavidcs
286316485Sdavidcs/**
287316485Sdavidcs * @brief ecore_init_brb_ram - Initializes BRB RAM sizes per TC.
288316485Sdavidcs *
289316485Sdavidcs * Based on weight/priority requirements per-TC.
290316485Sdavidcs *
291316485Sdavidcs * @param p_hwfn -   HW device data
292316485Sdavidcs * @param p_ptt	- ptt window used for writing the registers.
293316485Sdavidcs * @param req -   the BRB RAM initialization requirements.
294316485Sdavidcs */
295316485Sdavidcsvoid ecore_init_brb_ram(struct ecore_hwfn *p_hwfn,
296316485Sdavidcs						struct ecore_ptt *p_ptt,
297316485Sdavidcs						struct init_brb_ram_req* req);
298316485Sdavidcs
299316485Sdavidcs#endif /* UNUSED_HSI_FUNC */
300316485Sdavidcs#ifndef UNUSED_HSI_FUNC
301316485Sdavidcs
302316485Sdavidcs/**
303316485Sdavidcs * @brief ecore_set_port_mf_ovlan_eth_type - initializes DORQ ethType Regs to
304316485Sdavidcs * input ethType. should Be called once per port.
305316485Sdavidcs *
306316485Sdavidcs * @param p_hwfn -     HW device data
307316485Sdavidcs * @param ethType - etherType to configure
308316485Sdavidcs */
309337517Sdavidcsvoid ecore_set_port_mf_ovlan_eth_type(struct ecore_hwfn *p_hwfn,
310337517Sdavidcs									  u32 ethType);
311316485Sdavidcs
312316485Sdavidcs#endif /* UNUSED_HSI_FUNC */
313316485Sdavidcs
314316485Sdavidcs/**
315316485Sdavidcs * @brief ecore_set_vxlan_dest_port - Initializes vxlan tunnel destination udp
316316485Sdavidcs * port.
317316485Sdavidcs *
318316485Sdavidcs * @param p_hwfn -	      HW device data
319316485Sdavidcs * @param p_ptt -       ptt window used for writing the registers.
320316485Sdavidcs * @param dest_port - vxlan destination udp port.
321316485Sdavidcs */
322316485Sdavidcsvoid ecore_set_vxlan_dest_port(struct ecore_hwfn *p_hwfn,
323316485Sdavidcs                               struct ecore_ptt *p_ptt,
324316485Sdavidcs                               u16 dest_port);
325316485Sdavidcs
326316485Sdavidcs/**
327316485Sdavidcs * @brief ecore_set_vxlan_enable - Enable or disable VXLAN tunnel in HW
328316485Sdavidcs *
329316485Sdavidcs * @param p_hwfn -		 HW device data
330316485Sdavidcs * @param p_ptt -		 ptt window used for writing the registers.
331316485Sdavidcs * @param vxlan_enable - vxlan enable flag.
332316485Sdavidcs */
333316485Sdavidcsvoid ecore_set_vxlan_enable(struct ecore_hwfn *p_hwfn,
334316485Sdavidcs                            struct ecore_ptt *p_ptt,
335316485Sdavidcs                            bool vxlan_enable);
336316485Sdavidcs
337316485Sdavidcs/**
338316485Sdavidcs * @brief ecore_set_gre_enable - Enable or disable GRE tunnel in HW
339316485Sdavidcs *
340316485Sdavidcs * @param p_hwfn -		   HW device data
341316485Sdavidcs * @param p_ptt -		   ptt window used for writing the registers.
342316485Sdavidcs * @param eth_gre_enable - eth GRE enable enable flag.
343316485Sdavidcs * @param ip_gre_enable -  IP GRE enable enable flag.
344316485Sdavidcs */
345316485Sdavidcsvoid ecore_set_gre_enable(struct ecore_hwfn *p_hwfn,
346316485Sdavidcs                          struct ecore_ptt *p_ptt,
347316485Sdavidcs                          bool eth_gre_enable,
348316485Sdavidcs                          bool ip_gre_enable);
349316485Sdavidcs
350316485Sdavidcs/**
351316485Sdavidcs * @brief ecore_set_geneve_dest_port - Initializes geneve tunnel destination
352316485Sdavidcs * udp port.
353316485Sdavidcs *
354316485Sdavidcs * @param p_hwfn -	      HW device data
355316485Sdavidcs * @param p_ptt -       ptt window used for writing the registers.
356316485Sdavidcs * @param dest_port - geneve destination udp port.
357316485Sdavidcs */
358316485Sdavidcsvoid ecore_set_geneve_dest_port(struct ecore_hwfn *p_hwfn,
359316485Sdavidcs                                struct ecore_ptt *p_ptt,
360316485Sdavidcs                                u16 dest_port);
361316485Sdavidcs
362316485Sdavidcs/**
363316485Sdavidcs * @brief ecore_set_geneve_enable - Enable or disable GRE tunnel in HW
364316485Sdavidcs *
365316485Sdavidcs * @param p_hwfn -			HW device data
366316485Sdavidcs * @param p_ptt -			ptt window used for writing the registers.
367316485Sdavidcs * @param eth_geneve_enable -	eth GENEVE enable enable flag.
368316485Sdavidcs * @param ip_geneve_enable -	IP GENEVE enable enable flag.
369316485Sdavidcs  */
370316485Sdavidcsvoid ecore_set_geneve_enable(struct ecore_hwfn *p_hwfn,
371316485Sdavidcs                             struct ecore_ptt *p_ptt,
372316485Sdavidcs                             bool eth_geneve_enable,
373316485Sdavidcs                             bool ip_geneve_enable);
374316485Sdavidcs
375337517Sdavidcs/**
376337517Sdavidcs* @brief ecore_set_vxlan_no_l2_enable - enable or disable VXLAN no L2 parsing
377337517Sdavidcs*
378337517Sdavidcs* @param p_ptt             - ptt window used for writing the registers.
379337517Sdavidcs* @param enable            - VXLAN no L2 enable flag.
380337517Sdavidcs*/
381337517Sdavidcsvoid ecore_set_vxlan_no_l2_enable(struct ecore_hwfn *p_hwfn,
382337517Sdavidcs    struct ecore_ptt *p_ptt,
383337517Sdavidcs    bool enable);
384337517Sdavidcs
385316485Sdavidcs#ifndef UNUSED_HSI_FUNC
386316485Sdavidcs
387316485Sdavidcs/**
388316485Sdavidcs * @brief ecore_set_gft_event_id_cm_hdr - Configure GFT event id and cm header
389316485Sdavidcs *
390316485Sdavidcs * @param p_hwfn - HW device data
391316485Sdavidcs * @param p_ptt - ptt window used for writing the registers.
392316485Sdavidcs */
393316485Sdavidcsvoid ecore_set_gft_event_id_cm_hdr(struct ecore_hwfn *p_hwfn,
394316485Sdavidcs								   struct ecore_ptt *p_ptt);
395316485Sdavidcs
396316485Sdavidcs/**
397337517Sdavidcs * @brief ecore_gft_disable - Disable and GFT
398316485Sdavidcs *
399316485Sdavidcs * @param p_hwfn -   HW device data
400316485Sdavidcs * @param p_ptt -   ptt window used for writing the registers.
401337517Sdavidcs * @param pf_id - pf on which to disable GFT.
402316485Sdavidcs */
403337517Sdavidcsvoid ecore_gft_disable(struct ecore_hwfn *p_hwfn,
404337517Sdavidcs						struct ecore_ptt *p_ptt,
405337517Sdavidcs						u16 pf_id);
406316485Sdavidcs
407316485Sdavidcs/**
408337517Sdavidcs * @brief ecore_gft_config - Enable and configure HW for GFT
409316485Sdavidcs *
410316485Sdavidcs * @param p_hwfn -	  HW device data
411316485Sdavidcs * @param p_ptt -   ptt window used for writing the registers.
412337517Sdavidcs * @param pf_id - pf on which to enable GFT.
413316485Sdavidcs * @param tcp -   set profile tcp packets.
414316485Sdavidcs * @param udp -   set profile udp  packet.
415316485Sdavidcs * @param ipv4 -  set profile ipv4 packet.
416316485Sdavidcs * @param ipv6 -  set profile ipv6 packet.
417337517Sdavidcs * @param profile_type -  define packet same fields. Use enum gft_profile_type.
418316485Sdavidcs */
419337517Sdavidcsvoid ecore_gft_config(struct ecore_hwfn *p_hwfn,
420316485Sdavidcs	struct ecore_ptt *p_ptt,
421316485Sdavidcs	u16 pf_id,
422316485Sdavidcs	bool tcp,
423316485Sdavidcs	bool udp,
424316485Sdavidcs	bool ipv4,
425337517Sdavidcs	bool ipv6,
426337517Sdavidcs    enum gft_profile_type profile_type);
427316485Sdavidcs
428316485Sdavidcs#endif /* UNUSED_HSI_FUNC */
429316485Sdavidcs
430316485Sdavidcs/**
431316485Sdavidcs * @brief ecore_config_vf_zone_size_mode - Configure VF zone size mode. Must be
432316485Sdavidcs * used before first ETH queue started.
433316485Sdavidcs *
434316485Sdavidcs * @param p_hwfn -		 HW device data
435316485Sdavidcs * @param p_ptt -		 ptt window used for writing the registers. Don't care
436316485Sdavidcs *			 if runtime_init used.
437316485Sdavidcs * @param mode -	 VF zone size mode. Use enum vf_zone_size_mode.
438316485Sdavidcs * @param runtime_init - Set 1 to init runtime registers in engine phase.
439316485Sdavidcs *			 Set 0 if VF zone size mode configured after engine
440316485Sdavidcs *			 phase.
441316485Sdavidcs */
442316485Sdavidcsvoid ecore_config_vf_zone_size_mode(struct ecore_hwfn *p_hwfn,
443316485Sdavidcs									struct ecore_ptt *p_ptt,
444316485Sdavidcs									u16 mode,
445316485Sdavidcs									bool runtime_init);
446316485Sdavidcs
447316485Sdavidcs/**
448316485Sdavidcs * @brief ecore_get_mstorm_queue_stat_offset - Get mstorm statistics offset by
449316485Sdavidcs * VF zone size mode.
450316485Sdavidcs *
451316485Sdavidcs * @param p_hwfn -			HW device data
452316485Sdavidcs * @param stat_cnt_id -		statistic counter id
453316485Sdavidcs * @param vf_zone_size_mode -	VF zone size mode. Use enum vf_zone_size_mode.
454316485Sdavidcs */
455316485Sdavidcsu32 ecore_get_mstorm_queue_stat_offset(struct ecore_hwfn *p_hwfn,
456316485Sdavidcs									   u16 stat_cnt_id,
457316485Sdavidcs									   u16 vf_zone_size_mode);
458316485Sdavidcs
459316485Sdavidcs/**
460316485Sdavidcs * @brief ecore_get_mstorm_eth_vf_prods_offset - VF producer offset by VF zone
461316485Sdavidcs * size mode.
462316485Sdavidcs *
463316485Sdavidcs * @param p_hwfn -		      HW device data
464316485Sdavidcs * @param vf_id -	      vf id.
465316485Sdavidcs * @param vf_queue_id -	      per VF rx queue id.
466316485Sdavidcs * @param vf_zone_size_mode - vf zone size mode. Use enum vf_zone_size_mode.
467316485Sdavidcs */
468316485Sdavidcsu32 ecore_get_mstorm_eth_vf_prods_offset(struct ecore_hwfn *p_hwfn,
469316485Sdavidcs										 u8 vf_id,
470316485Sdavidcs										 u8 vf_queue_id,
471316485Sdavidcs										 u16 vf_zone_size_mode);
472316485Sdavidcs
473316485Sdavidcs/**
474316485Sdavidcs * @brief ecore_enable_context_validation - Enable and configure context
475316485Sdavidcs * validation.
476316485Sdavidcs *
477316485Sdavidcs * @param p_hwfn -   HW device data
478316485Sdavidcs * @param p_ptt - ptt window used for writing the registers.
479316485Sdavidcs */
480316485Sdavidcsvoid ecore_enable_context_validation(struct ecore_hwfn *p_hwfn,
481316485Sdavidcs									 struct ecore_ptt *p_ptt);
482316485Sdavidcs
483316485Sdavidcs/**
484320164Sdavidcs * @brief ecore_calc_session_ctx_validation - Calcualte validation byte for
485320164Sdavidcs * session context.
486320164Sdavidcs *
487320164Sdavidcs * @param p_ctx_mem -	pointer to context memory.
488320164Sdavidcs * @param ctx_size -	context size.
489320164Sdavidcs * @param ctx_type -	context type.
490320164Sdavidcs * @param cid -		context cid.
491320164Sdavidcs */
492337517Sdavidcsvoid ecore_calc_session_ctx_validation(void *p_ctx_mem,
493337517Sdavidcs				       u16 ctx_size,
494337517Sdavidcs				       u8 ctx_type,
495337517Sdavidcs				       u32 cid);
496316485Sdavidcs
497316485Sdavidcs/**
498320164Sdavidcs * @brief ecore_calc_task_ctx_validation - Calcualte validation byte for task
499320164Sdavidcs * context.
500320164Sdavidcs *
501320164Sdavidcs * @param p_ctx_mem -	pointer to context memory.
502320164Sdavidcs * @param ctx_size -	context size.
503320164Sdavidcs * @param ctx_type -	context type.
504320164Sdavidcs * @param tid -		    context tid.
505320164Sdavidcs */
506337517Sdavidcsvoid ecore_calc_task_ctx_validation(void *p_ctx_mem,
507337517Sdavidcs				    u16 ctx_size,
508337517Sdavidcs				    u8 ctx_type,
509316485Sdavidcs				    u32 tid);
510316485Sdavidcs
511316485Sdavidcs/**
512320164Sdavidcs * @brief ecore_memset_session_ctx - Memset session context to 0 while
513320164Sdavidcs * preserving validation bytes.
514320164Sdavidcs *
515320164Sdavidcs * @param p_hwfn -		  HW device data
516320164Sdavidcs * @param p_ctx_mem - pointer to context memory.
517320164Sdavidcs * @param ctx_size -  size to initialzie.
518320164Sdavidcs * @param ctx_type -  context type.
519320164Sdavidcs */
520316485Sdavidcsvoid ecore_memset_session_ctx(void *p_ctx_mem,
521316485Sdavidcs			      u32 ctx_size,
522316485Sdavidcs			      u8 ctx_type);
523316485Sdavidcs
524316485Sdavidcs/**
525320164Sdavidcs * @brief ecore_memset_task_ctx - Memset task context to 0 while preserving
526320164Sdavidcs * validation bytes.
527320164Sdavidcs *
528320164Sdavidcs * @param p_ctx_mem - pointer to context memory.
529320164Sdavidcs * @param ctx_size -  size to initialzie.
530320164Sdavidcs * @param ctx_type -  context type.
531320164Sdavidcs */
532316485Sdavidcsvoid ecore_memset_task_ctx(void *p_ctx_mem,
533316485Sdavidcs			   u32 ctx_size,
534316485Sdavidcs			   u8 ctx_type);
535316485Sdavidcs
536337517Sdavidcs/**
537337517Sdavidcs* @brief ecore_update_eth_rss_ind_table_entry - Update RSS indirection table entry.
538337517Sdavidcs* The function must run in exclusive mode to prevent wrong RSS configuration.
539337517Sdavidcs*
540337517Sdavidcs* @param p_hwfn    - HW device data
541337517Sdavidcs* @param p_ptt  - ptt window used for writing the registers.
542337517Sdavidcs* @param rss_id - RSS engine ID.
543337517Sdavidcs* @param ind_table_index -  RSS indirect table index.
544337517Sdavidcs* @param ind_table_value -  RSS indirect table new value.
545337517Sdavidcs*/
546337517Sdavidcsvoid ecore_update_eth_rss_ind_table_entry(struct ecore_hwfn * p_hwfn,
547337517Sdavidcs                                          struct ecore_ptt *p_ptt,
548337517Sdavidcs                                          u8 rss_id,
549337517Sdavidcs                                          u8 ind_table_index,
550337517Sdavidcs                                          u16 ind_table_value);
551337517Sdavidcs
552316485Sdavidcs#endif
553