ppbconf.h revision 185003
128219Smsmith/*- 255939Snsouch * Copyright (c) 1997, 1998, 1999 Nicolas Souchu 328219Smsmith * All rights reserved. 428219Smsmith * 528219Smsmith * Redistribution and use in source and binary forms, with or without 628219Smsmith * modification, are permitted provided that the following conditions 728219Smsmith * are met: 828219Smsmith * 1. Redistributions of source code must retain the above copyright 928219Smsmith * notice, this list of conditions and the following disclaimer. 1028219Smsmith * 2. Redistributions in binary form must reproduce the above copyright 1128219Smsmith * notice, this list of conditions and the following disclaimer in the 1228219Smsmith * documentation and/or other materials provided with the distribution. 1328219Smsmith * 1428219Smsmith * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1528219Smsmith * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1628219Smsmith * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1728219Smsmith * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1828219Smsmith * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1928219Smsmith * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2028219Smsmith * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2128219Smsmith * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2228219Smsmith * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2328219Smsmith * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2428219Smsmith * SUCH DAMAGE. 2528219Smsmith * 2650477Speter * $FreeBSD: head/sys/dev/ppbus/ppbconf.h 185003 2008-11-16 17:42:02Z jhb $ 2728219Smsmith * 2828219Smsmith */ 2928219Smsmith#ifndef __PPBCONF_H 3028219Smsmith#define __PPBCONF_H 3128219Smsmith 3229020Sbde#include <sys/queue.h> 3329020Sbde 3428219Smsmith/* 3528257Smsmith * Parallel Port Bus sleep/wakeup queue. 3628257Smsmith */ 3743293Sdillon#define PPBPRI (PZERO+8) 3828257Smsmith 3928257Smsmith/* 4038061Smsmith * Parallel Port Chipset mode masks. 4138061Smsmith * NIBBLE mode is supposed to be available under each other modes. 4228219Smsmith */ 4338061Smsmith#define PPB_COMPATIBLE 0x0 /* Centronics compatible mode */ 4438061Smsmith 4538061Smsmith#define PPB_NIBBLE 0x1 /* reverse 4 bit mode */ 4628219Smsmith#define PPB_PS2 0x2 /* PS/2 byte mode */ 4738061Smsmith#define PPB_EPP 0x4 /* EPP mode, 32 bit */ 4838061Smsmith#define PPB_ECP 0x8 /* ECP mode */ 4928219Smsmith 5042475Snsouch/* mode aliases */ 5142475Snsouch#define PPB_SPP PPB_NIBBLE|PPB_PS2 5242475Snsouch#define PPB_BYTE PPB_PS2 5328219Smsmith 5442475Snsouch#define PPB_MASK 0x0f 5542475Snsouch#define PPB_OPTIONS_MASK 0xf0 5642475Snsouch 5738061Smsmith#define PPB_IS_EPP(mode) (mode & PPB_EPP) 5855939Snsouch#define PPB_IN_EPP_MODE(bus) (PPB_IS_EPP (ppb_get_mode (bus))) 5955939Snsouch#define PPB_IN_NIBBLE_MODE(bus) (ppb_get_mode (bus) & PPB_NIBBLE) 6055939Snsouch#define PPB_IN_PS2_MODE(bus) (ppb_get_mode (bus) & PPB_PS2) 6128219Smsmith 6238061Smsmith#define n(flags) (~(flags) & (flags)) 6338061Smsmith 6428219Smsmith/* 6528219Smsmith * Parallel Port Chipset control bits. 6628219Smsmith */ 6728219Smsmith#define STROBE 0x01 6828219Smsmith#define AUTOFEED 0x02 6928219Smsmith#define nINIT 0x04 7028219Smsmith#define SELECTIN 0x08 7136739Sphk#define IRQENABLE 0x10 7228219Smsmith#define PCD 0x20 7328219Smsmith 7438061Smsmith#define nSTROBE n(STROBE) 7538061Smsmith#define nAUTOFEED n(AUTOFEED) 7638061Smsmith#define INIT n(nINIT) 7738061Smsmith#define nSELECTIN n(SELECTIN) 7838061Smsmith#define nPCD n(PCD) 7938061Smsmith 8028219Smsmith/* 8128219Smsmith * Parallel Port Chipset status bits. 8228219Smsmith */ 8328219Smsmith#define TIMEOUT 0x01 8428219Smsmith#define nFAULT 0x08 8528219Smsmith#define SELECT 0x10 8639134Snsouch#define PERROR 0x20 8728219Smsmith#define nACK 0x40 8828219Smsmith#define nBUSY 0x80 8928219Smsmith 9028219Smsmith/* 9128219Smsmith * Structure to store status information. 9228219Smsmith */ 9328219Smsmithstruct ppb_status { 9428219Smsmith unsigned char status; 9528219Smsmith 9628219Smsmith unsigned int timeout:1; 9728219Smsmith unsigned int error:1; 9828219Smsmith unsigned int select:1; 9928219Smsmith unsigned int paper_end:1; 10028219Smsmith unsigned int ack:1; 10128219Smsmith unsigned int busy:1; 10228219Smsmith}; 10328219Smsmith 10455939Snsouch/* Parallel port bus I/O opcodes */ 10555939Snsouch#define PPB_OUTSB_EPP 1 10655939Snsouch#define PPB_OUTSW_EPP 2 10755939Snsouch#define PPB_OUTSL_EPP 3 10855939Snsouch#define PPB_INSB_EPP 4 10955939Snsouch#define PPB_INSW_EPP 5 11055939Snsouch#define PPB_INSL_EPP 6 11155939Snsouch#define PPB_RDTR 7 11255939Snsouch#define PPB_RSTR 8 11355939Snsouch#define PPB_RCTR 9 11455939Snsouch#define PPB_REPP_A 10 11555939Snsouch#define PPB_REPP_D 11 11655939Snsouch#define PPB_RECR 12 11755939Snsouch#define PPB_RFIFO 13 11855939Snsouch#define PPB_WDTR 14 11955939Snsouch#define PPB_WSTR 15 12055939Snsouch#define PPB_WCTR 16 12155939Snsouch#define PPB_WEPP_A 17 12255939Snsouch#define PPB_WEPP_D 18 12355939Snsouch#define PPB_WECR 19 12455939Snsouch#define PPB_WFIFO 20 12555939Snsouch 12628219Smsmith/* 12738061Smsmith * How tsleep() is called in ppb_request_bus(). 12828219Smsmith */ 12928219Smsmith#define PPB_DONTWAIT 0 13028219Smsmith#define PPB_NOINTR 0 13128219Smsmith#define PPB_WAIT 0x1 13228219Smsmith#define PPB_INTR 0x2 13342475Snsouch#define PPB_POLL 0x4 13442475Snsouch#define PPB_FOREVER -1 13528219Smsmith 13638061Smsmith/* 13738061Smsmith * Microsequence stuff. 13838061Smsmith */ 13938061Smsmith#define PPB_MS_MAXLEN 64 /* XXX according to MS_INS_MASK */ 14038061Smsmith#define PPB_MS_MAXARGS 3 /* according to MS_ARG_MASK */ 14128219Smsmith 14238061Smsmith/* maximum number of mode dependent 14338061Smsmith * submicrosequences for in/out operations 14438061Smsmith */ 14538061Smsmith#define PPB_MAX_XFER 6 14638061Smsmith 14738061Smsmithunion ppb_insarg { 14838061Smsmith int i; 14938061Smsmith void *p; 15045342Speter char *c; 15138061Smsmith int (* f)(void *, char *); 15238061Smsmith}; 15338061Smsmith 15438061Smsmithstruct ppb_microseq { 15538061Smsmith int opcode; /* microins. opcode */ 15638061Smsmith union ppb_insarg arg[PPB_MS_MAXARGS]; /* arguments */ 15738061Smsmith}; 15838061Smsmith 15938061Smsmith/* microseqences used for GET/PUT operations */ 16038061Smsmithstruct ppb_xfer { 16138061Smsmith struct ppb_microseq *loop; /* the loop microsequence */ 16238061Smsmith}; 16338061Smsmith 16428219Smsmith/* 16528219Smsmith * Parallel Port Bus Device structure. 16628219Smsmith */ 16738061Smsmithstruct ppb_data; /* see below */ 16838061Smsmith 16938061Smsmithstruct ppb_context { 17038061Smsmith int valid; /* 1 if the struct is valid */ 17138061Smsmith int mode; /* XXX chipset operating mode */ 17238061Smsmith 17338061Smsmith struct microseq *curpc; /* pc in curmsq */ 17438061Smsmith struct microseq *curmsq; /* currently executed microseqence */ 17538061Smsmith}; 17638061Smsmith 17755939Snsouch/* 17855939Snsouch * List of IVARS available to ppb device drivers 17955939Snsouch */ 18055939Snsouch#define PPBUS_IVAR_MODE 0 18155939Snsouch 18255939Snsouch/* other fields are reserved to the ppbus internals */ 18355939Snsouch 18428219Smsmithstruct ppb_device { 18528219Smsmith 18655939Snsouch const char *name; /* name of the device */ 18728219Smsmith 188118607Sjhb u_int flags; /* flags */ 18938061Smsmith 19038061Smsmith struct ppb_context ctx; /* context of the device */ 19138061Smsmith 19238061Smsmith /* mode dependent get msq. If NULL, 19338061Smsmith * IEEE1284 code is used */ 19438061Smsmith struct ppb_xfer 19538061Smsmith get_xfer[PPB_MAX_XFER]; 19638061Smsmith 19738061Smsmith /* mode dependent put msq. If NULL, 19838061Smsmith * IEEE1284 code is used */ 19938061Smsmith struct ppb_xfer 20038061Smsmith put_xfer[PPB_MAX_XFER]; 201185003Sjhb 20255939Snsouch struct resource *intr_resource; 20355939Snsouch void *intr_cookie; 20428219Smsmith}; 20528219Smsmith 20655939Snsouch/* EPP standards */ 20728219Smsmith#define EPP_1_9 0x0 /* default */ 20828219Smsmith#define EPP_1_7 0x1 209185003Sjhb 21055939Snsouch/* Parallel Port Chipset IVARS */ /* elsewhere XXX */ 21155939Snsouch#define PPC_IVAR_EPP_PROTO 0 212185003Sjhb 21328219Smsmith/* 21428257Smsmith * Maximum size of the PnP info string 21528257Smsmith */ 21642475Snsouch#define PPB_PnP_STRING_SIZE 256 /* XXX */ 21728257Smsmith 21828257Smsmith/* 21928219Smsmith * Parallel Port Bus structure. 22028219Smsmith */ 22128219Smsmithstruct ppb_data { 22228219Smsmith 22328257Smsmith#define PPB_PnP_PRINTER 0 22428257Smsmith#define PPB_PnP_MODEM 1 22528257Smsmith#define PPB_PnP_NET 2 22628257Smsmith#define PPB_PnP_HDC 3 22728257Smsmith#define PPB_PnP_PCMCIA 4 22828257Smsmith#define PPB_PnP_MEDIA 5 22928257Smsmith#define PPB_PnP_FDC 6 23028257Smsmith#define PPB_PnP_PORTS 7 23128257Smsmith#define PPB_PnP_SCANNER 8 23228257Smsmith#define PPB_PnP_DIGICAM 9 23328257Smsmith#define PPB_PnP_UNKNOWN 10 23455939Snsouch int class_id; /* not a PnP device if class_id < 0 */ 23528257Smsmith 23655939Snsouch int state; /* current IEEE1284 state */ 23755939Snsouch int error; /* last IEEE1284 error */ 23842475Snsouch 23955939Snsouch int mode; /* IEEE 1284-1994 mode 24055939Snsouch * NIBBLE, PS2, EPP or ECP */ 24138061Smsmith 24255939Snsouch void *ppb_owner; /* device which owns the bus */ 24328219Smsmith}; 24428219Smsmith 24559712Sn_hibma#ifdef _KERNEL 24655939Snsouchextern int ppb_attach_device(device_t); 24755939Snsouchextern int ppb_request_bus(device_t, device_t, int); 24855939Snsouchextern int ppb_release_bus(device_t, device_t); 24928219Smsmith 25055939Snsouch/* bus related functions */ 25155939Snsouchextern int ppb_get_status(device_t, struct ppb_status *); 25255939Snsouchextern int ppb_poll_bus(device_t, int, char, char, int); 25355939Snsouchextern int ppb_reset_epp_timeout(device_t); 25455939Snsouchextern int ppb_ecp_sync(device_t); 25555939Snsouchextern int ppb_get_epp_protocol(device_t); 25655939Snsouchextern int ppb_set_mode(device_t, int); /* returns old mode */ 25755939Snsouchextern int ppb_get_mode(device_t); /* returns current mode */ 25855939Snsouchextern int ppb_write(device_t, char *, int, int); 25959712Sn_hibma#endif /* _KERNEL */ 26028219Smsmith 26128219Smsmith/* 26228219Smsmith * These are defined as macros for speedup. 26338061Smsmith#define ppb_get_base_addr(dev) ((dev)->ppb->ppb_link->base) 26438061Smsmith#define ppb_get_epp_protocol(dev) ((dev)->ppb->ppb_link->epp_protocol) 26555939Snsouch */ 26638061Smsmith 26728219Smsmith#endif 268