128219Smsmith/*- 255939Snsouch * Copyright (c) 1997, 1998, 1999 Nicolas Souchu 328219Smsmith * All rights reserved. 428219Smsmith * 528219Smsmith * Redistribution and use in source and binary forms, with or without 628219Smsmith * modification, are permitted provided that the following conditions 728219Smsmith * are met: 828219Smsmith * 1. Redistributions of source code must retain the above copyright 928219Smsmith * notice, this list of conditions and the following disclaimer. 1028219Smsmith * 2. Redistributions in binary form must reproduce the above copyright 1128219Smsmith * notice, this list of conditions and the following disclaimer in the 1228219Smsmith * documentation and/or other materials provided with the distribution. 1328219Smsmith * 1428219Smsmith * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1528219Smsmith * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1628219Smsmith * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1728219Smsmith * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1828219Smsmith * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1928219Smsmith * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2028219Smsmith * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2128219Smsmith * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2228219Smsmith * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2328219Smsmith * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2428219Smsmith * SUCH DAMAGE. 2528219Smsmith * 2650477Speter * $FreeBSD$ 2728219Smsmith * 2828219Smsmith */ 2928219Smsmith#ifndef __PPBCONF_H 3028219Smsmith#define __PPBCONF_H 3128219Smsmith 32188093Sjhb#define n(flags) (~(flags) & (flags)) 33188093Sjhb 34188093Sjhb/* 35188093Sjhb * Parallel Port Chipset control bits. 36188093Sjhb */ 37188093Sjhb#define STROBE 0x01 38188093Sjhb#define AUTOFEED 0x02 39188093Sjhb#define nINIT 0x04 40188093Sjhb#define SELECTIN 0x08 41188093Sjhb#define IRQENABLE 0x10 42188093Sjhb#define PCD 0x20 43188093Sjhb 44188093Sjhb#define nSTROBE n(STROBE) 45188093Sjhb#define nAUTOFEED n(AUTOFEED) 46188093Sjhb#define INIT n(nINIT) 47188093Sjhb#define nSELECTIN n(SELECTIN) 48188093Sjhb#define nPCD n(PCD) 49188093Sjhb 50188093Sjhb/* 51188093Sjhb * Parallel Port Chipset status bits. 52188093Sjhb */ 53188093Sjhb#define TIMEOUT 0x01 54188093Sjhb#define nFAULT 0x08 55188093Sjhb#define SELECT 0x10 56188093Sjhb#define PERROR 0x20 57188093Sjhb#define nACK 0x40 58188093Sjhb#define nBUSY 0x80 59188093Sjhb 60188093Sjhb#ifdef _KERNEL 6129020Sbde#include <sys/queue.h> 6229020Sbde 6328219Smsmith/* 6428257Smsmith * Parallel Port Bus sleep/wakeup queue. 6528257Smsmith */ 6643293Sdillon#define PPBPRI (PZERO+8) 6728257Smsmith 6828257Smsmith/* 6938061Smsmith * Parallel Port Chipset mode masks. 7038061Smsmith * NIBBLE mode is supposed to be available under each other modes. 7128219Smsmith */ 7238061Smsmith#define PPB_COMPATIBLE 0x0 /* Centronics compatible mode */ 7338061Smsmith 7438061Smsmith#define PPB_NIBBLE 0x1 /* reverse 4 bit mode */ 7528219Smsmith#define PPB_PS2 0x2 /* PS/2 byte mode */ 7638061Smsmith#define PPB_EPP 0x4 /* EPP mode, 32 bit */ 7738061Smsmith#define PPB_ECP 0x8 /* ECP mode */ 7828219Smsmith 7942475Snsouch/* mode aliases */ 8042475Snsouch#define PPB_SPP PPB_NIBBLE|PPB_PS2 8142475Snsouch#define PPB_BYTE PPB_PS2 8228219Smsmith 8342475Snsouch#define PPB_MASK 0x0f 8442475Snsouch#define PPB_OPTIONS_MASK 0xf0 8542475Snsouch 8638061Smsmith#define PPB_IS_EPP(mode) (mode & PPB_EPP) 8755939Snsouch#define PPB_IN_EPP_MODE(bus) (PPB_IS_EPP (ppb_get_mode (bus))) 8855939Snsouch#define PPB_IN_NIBBLE_MODE(bus) (ppb_get_mode (bus) & PPB_NIBBLE) 8955939Snsouch#define PPB_IN_PS2_MODE(bus) (ppb_get_mode (bus) & PPB_PS2) 9028219Smsmith 9128219Smsmith/* 9228219Smsmith * Structure to store status information. 9328219Smsmith */ 9428219Smsmithstruct ppb_status { 9528219Smsmith unsigned char status; 9628219Smsmith 9728219Smsmith unsigned int timeout:1; 9828219Smsmith unsigned int error:1; 9928219Smsmith unsigned int select:1; 10028219Smsmith unsigned int paper_end:1; 10128219Smsmith unsigned int ack:1; 10228219Smsmith unsigned int busy:1; 10328219Smsmith}; 10428219Smsmith 10555939Snsouch/* Parallel port bus I/O opcodes */ 10655939Snsouch#define PPB_OUTSB_EPP 1 10755939Snsouch#define PPB_OUTSW_EPP 2 10855939Snsouch#define PPB_OUTSL_EPP 3 10955939Snsouch#define PPB_INSB_EPP 4 11055939Snsouch#define PPB_INSW_EPP 5 11155939Snsouch#define PPB_INSL_EPP 6 11255939Snsouch#define PPB_RDTR 7 11355939Snsouch#define PPB_RSTR 8 11455939Snsouch#define PPB_RCTR 9 11555939Snsouch#define PPB_REPP_A 10 11655939Snsouch#define PPB_REPP_D 11 11755939Snsouch#define PPB_RECR 12 11855939Snsouch#define PPB_RFIFO 13 11955939Snsouch#define PPB_WDTR 14 12055939Snsouch#define PPB_WSTR 15 12155939Snsouch#define PPB_WCTR 16 12255939Snsouch#define PPB_WEPP_A 17 12355939Snsouch#define PPB_WEPP_D 18 12455939Snsouch#define PPB_WECR 19 12555939Snsouch#define PPB_WFIFO 20 12655939Snsouch 12728219Smsmith/* 12838061Smsmith * How tsleep() is called in ppb_request_bus(). 12928219Smsmith */ 13028219Smsmith#define PPB_DONTWAIT 0 13128219Smsmith#define PPB_NOINTR 0 13228219Smsmith#define PPB_WAIT 0x1 13328219Smsmith#define PPB_INTR 0x2 13442475Snsouch#define PPB_POLL 0x4 13542475Snsouch#define PPB_FOREVER -1 13628219Smsmith 13738061Smsmith/* 13838061Smsmith * Microsequence stuff. 13938061Smsmith */ 14038061Smsmith#define PPB_MS_MAXLEN 64 /* XXX according to MS_INS_MASK */ 14138061Smsmith#define PPB_MS_MAXARGS 3 /* according to MS_ARG_MASK */ 14228219Smsmith 14338061Smsmith/* maximum number of mode dependent 14438061Smsmith * submicrosequences for in/out operations 14538061Smsmith */ 14638061Smsmith#define PPB_MAX_XFER 6 14738061Smsmith 14838061Smsmithunion ppb_insarg { 14938061Smsmith int i; 15038061Smsmith void *p; 15145342Speter char *c; 15238061Smsmith int (* f)(void *, char *); 15338061Smsmith}; 15438061Smsmith 15538061Smsmithstruct ppb_microseq { 15638061Smsmith int opcode; /* microins. opcode */ 15738061Smsmith union ppb_insarg arg[PPB_MS_MAXARGS]; /* arguments */ 15838061Smsmith}; 15938061Smsmith 16038061Smsmith/* microseqences used for GET/PUT operations */ 16138061Smsmithstruct ppb_xfer { 16238061Smsmith struct ppb_microseq *loop; /* the loop microsequence */ 16338061Smsmith}; 16438061Smsmith 16528219Smsmith/* 16628219Smsmith * Parallel Port Bus Device structure. 16728219Smsmith */ 16838061Smsmithstruct ppb_data; /* see below */ 16938061Smsmith 17038061Smsmithstruct ppb_context { 17138061Smsmith int valid; /* 1 if the struct is valid */ 17238061Smsmith int mode; /* XXX chipset operating mode */ 17338061Smsmith 17438061Smsmith struct microseq *curpc; /* pc in curmsq */ 17538061Smsmith struct microseq *curmsq; /* currently executed microseqence */ 17638061Smsmith}; 17738061Smsmith 17855939Snsouch/* 17955939Snsouch * List of IVARS available to ppb device drivers 18055939Snsouch */ 18155939Snsouch#define PPBUS_IVAR_MODE 0 18255939Snsouch 18355939Snsouch/* other fields are reserved to the ppbus internals */ 18455939Snsouch 18528219Smsmithstruct ppb_device { 18628219Smsmith 18755939Snsouch const char *name; /* name of the device */ 18828219Smsmith 189118607Sjhb u_int flags; /* flags */ 19038061Smsmith 19138061Smsmith struct ppb_context ctx; /* context of the device */ 19238061Smsmith 19338061Smsmith /* mode dependent get msq. If NULL, 19438061Smsmith * IEEE1284 code is used */ 19538061Smsmith struct ppb_xfer 19638061Smsmith get_xfer[PPB_MAX_XFER]; 19738061Smsmith 19838061Smsmith /* mode dependent put msq. If NULL, 19938061Smsmith * IEEE1284 code is used */ 20038061Smsmith struct ppb_xfer 20138061Smsmith put_xfer[PPB_MAX_XFER]; 202185003Sjhb 203187576Sjhb driver_intr_t *intr_hook; 204187576Sjhb void *intr_arg; 20528219Smsmith}; 20628219Smsmith 20755939Snsouch/* EPP standards */ 20828219Smsmith#define EPP_1_9 0x0 /* default */ 20928219Smsmith#define EPP_1_7 0x1 210185003Sjhb 21155939Snsouch/* Parallel Port Chipset IVARS */ /* elsewhere XXX */ 21255939Snsouch#define PPC_IVAR_EPP_PROTO 0 213187576Sjhb#define PPC_IVAR_LOCK 1 214187576Sjhb#define PPC_IVAR_INTR_HANDLER 2 215185003Sjhb 21628219Smsmith/* 21728257Smsmith * Maximum size of the PnP info string 21828257Smsmith */ 21942475Snsouch#define PPB_PnP_STRING_SIZE 256 /* XXX */ 22028257Smsmith 22128257Smsmith/* 22228219Smsmith * Parallel Port Bus structure. 22328219Smsmith */ 22428219Smsmithstruct ppb_data { 22528219Smsmith 22628257Smsmith#define PPB_PnP_PRINTER 0 22728257Smsmith#define PPB_PnP_MODEM 1 22828257Smsmith#define PPB_PnP_NET 2 22928257Smsmith#define PPB_PnP_HDC 3 23028257Smsmith#define PPB_PnP_PCMCIA 4 23128257Smsmith#define PPB_PnP_MEDIA 5 23228257Smsmith#define PPB_PnP_FDC 6 23328257Smsmith#define PPB_PnP_PORTS 7 23428257Smsmith#define PPB_PnP_SCANNER 8 23528257Smsmith#define PPB_PnP_DIGICAM 9 23628257Smsmith#define PPB_PnP_UNKNOWN 10 23755939Snsouch int class_id; /* not a PnP device if class_id < 0 */ 23828257Smsmith 23955939Snsouch int state; /* current IEEE1284 state */ 24055939Snsouch int error; /* last IEEE1284 error */ 24142475Snsouch 24255939Snsouch int mode; /* IEEE 1284-1994 mode 24355939Snsouch * NIBBLE, PS2, EPP or ECP */ 24438061Smsmith 245187576Sjhb device_t ppb_owner; /* device which owns the bus */ 246187576Sjhb 247187576Sjhb struct mtx *ppc_lock; /* lock of parent device */ 248187576Sjhb struct resource *ppc_irq_res; 24928219Smsmith}; 25028219Smsmith 251187576Sjhbstruct callout; 252187576Sjhb 253187576Sjhbtypedef int (*ppc_intr_handler)(void *); 254187576Sjhb 25555939Snsouchextern int ppb_attach_device(device_t); 25655939Snsouchextern int ppb_request_bus(device_t, device_t, int); 25755939Snsouchextern int ppb_release_bus(device_t, device_t); 25828219Smsmith 25955939Snsouch/* bus related functions */ 260187576Sjhbextern void ppb_lock(device_t); 261187576Sjhbextern void ppb_unlock(device_t); 262187576Sjhbextern void _ppb_assert_locked(device_t, const char *, int); 263187576Sjhbextern void ppb_init_callout(device_t, struct callout *, int); 264187576Sjhbextern int ppb_sleep(device_t, void *, int, const char *, int); 26555939Snsouchextern int ppb_get_status(device_t, struct ppb_status *); 266305555Sdimextern int ppb_poll_bus(device_t, int, uint8_t, uint8_t, int); 26755939Snsouchextern int ppb_reset_epp_timeout(device_t); 26855939Snsouchextern int ppb_ecp_sync(device_t); 26955939Snsouchextern int ppb_get_epp_protocol(device_t); 27055939Snsouchextern int ppb_set_mode(device_t, int); /* returns old mode */ 27155939Snsouchextern int ppb_get_mode(device_t); /* returns current mode */ 27255939Snsouchextern int ppb_write(device_t, char *, int, int); 273187576Sjhb 274187576Sjhb#ifdef INVARIANTS 275187576Sjhb#define ppb_assert_locked(dev) _ppb_assert_locked(dev, __FILE__, __LINE__) 276187576Sjhb#else 277187576Sjhb#define ppb_assert_locked(dev) 278187576Sjhb#endif 27959712Sn_hibma#endif /* _KERNEL */ 28028219Smsmith 281187576Sjhb#endif /* !__PPBCONF_H */ 282