1285242Sachim/*******************************************************************************
2285242Sachim*Copyright (c) 2014 PMC-Sierra, Inc.  All rights reserved.
3285242Sachim*
4285242Sachim*Redistribution and use in source and binary forms, with or without modification, are permitted provided
5285242Sachim*that the following conditions are met:
6285242Sachim*1. Redistributions of source code must retain the above copyright notice, this list of conditions and the
7285242Sachim*following disclaimer.
8285242Sachim*2. Redistributions in binary form must reproduce the above copyright notice,
9285242Sachim*this list of conditions and the following disclaimer in the documentation and/or other materials provided
10285242Sachim*with the distribution.
11285242Sachim*
12285242Sachim*THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED
13285242Sachim*WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
14285242Sachim*FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
15285242Sachim*FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16285242Sachim*NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
17285242Sachim*BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18285242Sachim*LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
19285242Sachim*SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
20285242Sachim
21285242Sachim*******************************************************************************/
22285242Sachim
23285242Sachim
24285242SachimMALLOC_DEFINE( M_PMC_OSTI, "osti_cacheable", "allocated from ostiAllocMemory as cacheable memory" );
25285242Sachim
26285242Sachim
27285242Sachim/******************************************************************************
28285242SachimostiAllocMemory()
29285242SachimPurpose:
30285242Sachim  TD layer calls to get dma memory
31285242SachimParameters:
32285242Sachim  tiRoot_t *ptiRoot (IN)            Pointer refers to the current root
33285242Sachim  void **osMemHandle (IN_OUT)       Pointer To OS Mem handle to fill in
34285242Sachim  void **agVirtAddr (IN_OUT)        Pointer to allocated memory address
35285242Sachim  U32  *agPhysUpper32 (IN_OUT)      Pointer to Up 32 bit mem phys addr.
36285242Sachim  U32  *agPhysLower32 (IN_OUT)      Pointer to low 32 bit mem phys addr.
37285242Sachim  U32  alignment (IN)               Alignment requirement
38285242Sachim  U32  allocLength (IN)             Required memory length
39285242Sachim  agBOOLEAN isChacheable (IN)       Required memory type
40285242SachimReturn:
41285242Sachim  tiSuccess - success
42285242Sachim  tiMemoryTooLarge - requested memory size too large
43285242Sachim  tiMemoryNotAvail - no dma memory available
44285242SachimNote:
45285242Sachim  for sata use.
46285242Sachim  where a cacheable allocation inherently may be swapped, the values
47285242Sachim   agPhysUpper32 and agPhysLower32 are understood to mean nothing when the
48285242Sachim   value isCacheable is set to true.  these phys values must not be used by
49285242Sachim   the caller.
50285242Sachim******************************************************************************/
51285242SachimosGLOBAL U32 ostiAllocMemory( tiRoot_t *ptiRoot,
52285242Sachim                              void    **osMemHandle,
53285242Sachim                              void    **agVirtAddr,
54285242Sachim                              U32      *agPhysUpper32,
55285242Sachim                              U32      *agPhysLower32,
56285242Sachim                              U32       alignment,
57285242Sachim                              U32       allocLength,
58285242Sachim                              agBOOLEAN isCacheable )
59285242Sachim{
60285242Sachim  ag_card_info_t *pCardInfo = TIROOT_TO_CARDINFO( ptiRoot );
61285242Sachim  ag_dma_addr_t  *pMem;
62285242Sachim  struct agtiapi_softc  *pCard;
63285242Sachim  pCard = TIROOT_TO_CARD(ptiRoot);
64285242Sachim
65285242Sachim  AGTIAPI_PRINTK( "ostiAllocMemory: debug, cache? %d size %d alloc algn %d ### \n",
66285242Sachim          isCacheable, allocLength, alignment );
67285242Sachim
68285242Sachim  if( pCardInfo->topOfFreeDynamicMem == 0 ) {
69285242Sachim    AGTIAPI_PRINTK( "ostiAllocMemory: No space left, increase "
70285242Sachim	    "AGTIAPI_DYNAMIC_MAX! ERROR\n" );
71285242Sachim    return tiMemoryNotAvail;
72285242Sachim  }
73285242Sachim
74285242Sachim  pMem = pCardInfo->freeDynamicMem[pCardInfo->topOfFreeDynamicMem - 1];
75285242Sachim
76285242Sachim  // where this memory has bee preallocated, be sure requirements do not
77285242Sachim  //  exceed the limits of resources available
78285242Sachim  if( allocLength > 4096 ) {
79285242Sachim    AGTIAPI_PRINTK( "ostiAllocMemory: no-cache size 0x%x alloc NOT AVAILABLE\n",
80285242Sachim            allocLength );
81285242Sachim    return tiMemoryNotAvail;
82285242Sachim  }
83285242Sachim  if( alignment > 32 ) {
84285242Sachim    AGTIAPI_PRINTK( "ostiAllocMemory: no-cache alignment 0x%x NOT AVAILABLE\n",
85285242Sachim            alignment );
86285242Sachim    return tiMemoryNotAvail;
87285242Sachim  }
88285242Sachim
89285242Sachim  pMem->dmaPhysAddr = pMem->nocache_busaddr;
90285242Sachim  pMem->dmaVirtAddr = pMem->nocache_mem;
91285242Sachim  pMem->memSize     = allocLength;
92285242Sachim  *agVirtAddr  = pMem->dmaVirtAddr;
93285242Sachim
94285242Sachim  *agPhysUpper32 = HIGH_32_BITS( pMem->dmaPhysAddr );
95285242Sachim  *agPhysLower32 = LOW_32_BITS( pMem->dmaPhysAddr );
96285242Sachim
97285242Sachim  mtx_lock(&pCard->memLock);
98285242Sachim  pCardInfo->topOfFreeDynamicMem--;
99285242Sachim  *osMemHandle = (void *)pMem; // virtAddr;
100285242Sachim  mtx_unlock(&pCard->memLock);
101285242Sachim
102285242Sachim  return tiSuccess;
103285242Sachim}
104285242Sachim
105285242Sachim/******************************************************************************
106285242SachimostiIOCTLWaitForSignal()
107285242SachimPurpose:
108285242Sachim  Function to wait semaphore during ioctl
109285242SachimParameters:
110285242Sachim  tiRoot_t *ptiRoot (IN)     Pointer to the current HBA
111285242Sachim  void **agParam1 (IN_OUT)   Pointer to context to be passed
112285242Sachim  void **agParam2 (IN_OUT)   Pointer to context to be passed
113285242Sachim  void **agParam (IN_OUT)    Pointer to context to be passed
114285242SachimReturn:
115285242SachimNote:
116285242Sachim******************************************************************************/
117285242SachimosGLOBAL void
118285242SachimostiIOCTLWaitForSignal(tiRoot_t *ptiRoot,
119285242Sachim                       void *agParam1,
120285242Sachim                       void *agParam2,
121285242Sachim                       void *agParam3)
122285242Sachim{
123285242Sachim  struct agtiapi_softc  *pCard;
124285242Sachim  pCard = TIROOT_TO_CARD(ptiRoot);
125285242Sachim
126285242Sachim  pCard->down_count++;
127285242Sachim  sema_wait (pCard->pIoctlSem);
128285242Sachim}
129285242Sachim
130285242Sachim/* Below function has to be changed to use wait for completion */
131285242SachimosGLOBAL void
132285242SachimostiIOCTLWaitForComplete(tiRoot_t *ptiRoot,
133285242Sachim                       void *agParam1,
134285242Sachim                       void *agParam2,
135285242Sachim                       void *agParam3)
136285242Sachim{
137285242Sachim  struct agtiapi_softc  *pCard;
138285242Sachim  pCard = TIROOT_TO_CARD(ptiRoot);
139285242Sachim
140285242Sachim  pCard->down_count++;
141285242Sachim  sema_wait (pCard->pIoctlSem);
142285242Sachim}
143285242Sachim
144285242Sachim
145285242Sachim/******************************************************************************
146285242SachimostiChipConfigReadBit32()
147285242SachimPurpose:
148285242Sachim  Read 32-bit value from PCI configuration register
149285242SachimParameters:
150285242Sachim  tiRoot_t *ptiRoot (IN)     Pointer to tiRoot structure
151285242Sachim  U32 chipConfigOffset (IN)  Offset to PCI configuration register
152285242SachimReturn:
153285242Sachim  32 bit data
154285242Sachim******************************************************************************/
155285242SachimU32 ostiChipConfigReadBit32( tiRoot_t *ptiRoot, U32 chipConfigOffset )
156285242Sachim{
157285242Sachim  device_t lDev = TIROOT_TO_PCIDEV(ptiRoot);
158285242Sachim  u_int32_t lData = 0;
159285242Sachim
160285242Sachim  lData = pci_read_config( lDev, chipConfigOffset, 4 );
161285242Sachim
162285242Sachim  return (U32)lData;
163285242Sachim}
164285242Sachim
165285242Sachim
166285242Sachim/******************************************************************************
167285242SachimostiChipConfigWriteBit32()
168285242SachimPurpose:
169285242Sachim  Write 32-bit value to PCI configuration register
170285242SachimParameters:
171285242Sachim  tiRoot_t *ptiRoot (IN)     Pointer to tiRoot structure
172285242Sachim  U32 chipConfigOffset (IN)  Offset to PCI configuration register
173285242Sachim  U32 chipConfigValue (IN)   Value to be written
174285242SachimReturn: none
175285242Sachim******************************************************************************/
176285242Sachimvoid ostiChipConfigWriteBit32( tiRoot_t *ptiRoot,
177285242Sachim			       U32       chipConfigOffset,
178285242Sachim			       U32       chipConfigValue   )
179285242Sachim{
180285242Sachim  device_t lDev = TIROOT_TO_PCIDEV(ptiRoot);
181285242Sachim  pci_write_config( lDev, chipConfigOffset, chipConfigValue, 4 );
182285242Sachim}
183285242Sachim
184285242Sachim/******************************************************************************
185285242SachimostiChipReadBit32()
186285242SachimPurpose:
187285242Sachim  Read 32-bit value from PCI address register
188285242SachimParameters:
189285242Sachim  tiRoot_t *ptiRoot (IN)  Pointer to tiRoot structure
190285242Sachim  U32 chipOffset (IN)     Offset to PCI configuration register
191285242SachimReturn:
192285242Sachim  32 bit data
193285242Sachim******************************************************************************/
194285242SachimU32 ostiChipReadBit32(tiRoot_t *ptiRoot, U32 chipOffset)
195285242Sachim{
196285242Sachim  U32  data;
197285242Sachim  ag_card_info_t *pCardInfo;
198285242Sachim
199285242Sachim  pCardInfo = TIROOT_TO_CARDINFO(ptiRoot);
200285242Sachim  data = *(U32 *)(pCardInfo->pciMemVirtAddr + chipOffset);
201285242Sachim  return data;
202285242Sachim}
203285242Sachim
204285242Sachim/******************************************************************************
205285242SachimostiChipWriteBit32()
206285242SachimPurpose:
207285242Sachim  Write 32-bit value to PCI address register
208285242SachimParameters:
209285242Sachim  tiRoot_t *ptiRoot (IN)  Pointer to tiRoot structure
210285242Sachim  U32 chipOffset (IN)     Offset to PCI configuration register
211285242Sachim  U32 chipValue (IN)      Value to be written
212285242SachimReturn: none
213285242Sachim******************************************************************************/
214285242Sachimvoid ostiChipWriteBit32( tiRoot_t *ptiRoot, U32 chipOffset, U32 chipValue )
215285242Sachim{
216285242Sachim  ag_card_info_t *pCardInfo;
217285242Sachim  pCardInfo = TIROOT_TO_CARDINFO(ptiRoot);
218285242Sachim  *(U32 *)(pCardInfo->pciMemVirtAddr + chipOffset) = chipValue;
219285242Sachim}
220285242Sachim
221285242Sachim/******************************************************************************
222285242SachimostiChipReadBit32Ext()
223285242SachimPurpose:
224285242Sachim  Read 32-bit value from PCI address register
225285242SachimParameters:
226285242Sachim  tiRoot_t *ptiRoot (IN)  Pointer to tiRoot structure
227285242Sachim  busBaseNumber            PCI BAR number
228285242Sachim  U32 chipOffset (IN)     Offset to PCI configuration register
229285242SachimReturn:
230285242Sachim  32 bit data
231285242Sachim******************************************************************************/
232285242SachimU32 ostiChipReadBit32Ext( tiRoot_t *ptiRoot,
233285242Sachim			  U32 busBaseNumber,
234285242Sachim			  U32 chipOffset )
235285242Sachim{
236285242Sachim  U32  data;
237285242Sachim  ag_card_info_t *pCardInfo;
238285242Sachim
239285242Sachim  pCardInfo = TIROOT_TO_CARDINFO(ptiRoot);
240285242Sachim  data = *(U32 *)((pCardInfo->pciMemVirtAddrSpc[busBaseNumber]) + chipOffset );
241285242Sachim  return data;
242285242Sachim}
243285242Sachim
244285242Sachim/******************************************************************************
245285242SachimostiChipWriteBit32Ext()
246285242SachimPurpose:
247285242Sachim  Write 32-bit value to PCI address register
248285242SachimParameters:
249285242Sachim  tiRoot_t *ptiRoot (IN)  Pointer to tiRoot structure
250285242Sachim  busBaseNumber           PCI BAR number
251285242Sachim  U32 chipOffset (IN)     Offset to PCI configuration register
252285242Sachim  U32 chipValue (IN)      Value to be written
253285242SachimReturn: none
254285242Sachim******************************************************************************/
255285242Sachimvoid ostiChipWriteBit32Ext( tiRoot_t *ptiRoot,
256285242Sachim			    U32 busBaseNumber,
257285242Sachim			    U32 chipOffset,
258285242Sachim			    U32 aData )
259285242Sachim{
260285242Sachim  ag_card_info_t *pCardInfo;
261285242Sachim  pCardInfo = TIROOT_TO_CARDINFO(ptiRoot);
262285242Sachim  *(U32 *)((pCardInfo->pciMemVirtAddrSpc[busBaseNumber]) + chipOffset ) = aData;
263285242Sachim}
264285242Sachim
265285242Sachim/******************************************************************************
266285242SachimostiChipReadBit8()
267285242SachimPurpose:
268285242Sachim  Read 8-bit value from PCI address register
269285242SachimParameters:
270285242Sachim  tiRoot_t *ptiRoot (IN)  Pointer to tiRoot structure
271285242Sachim  U32 chipOffset (IN)     Offset to PCI configuration register
272285242SachimReturn:
273285242Sachim  8 bit data
274285242Sachim******************************************************************************/
275285242SachimU08 ostiChipReadBit8( tiRoot_t *ptiRoot, U32 chipOffset )
276285242Sachim{
277285242Sachim  ag_card_info_t *pCardInfo;
278285242Sachim  pCardInfo = TIROOT_TO_CARDINFO(ptiRoot);
279285242Sachim  return *(U08 *)( pCardInfo->pciMemVirtAddr + chipOffset );
280285242Sachim}
281285242Sachim
282285242Sachim/******************************************************************************
283285242SachimostiChipWriteBit8()
284285242SachimPurpose:
285285242Sachim  Write 8-bit value to PCI address register
286285242SachimParameters:
287285242Sachim  tiRoot_t *ptiRoot (IN)  Pointer to tiRoot structure
288285242Sachim  U32 chipOffset (IN)     Offset to PCI configuration register
289285242Sachim  U8 chipValue (IN)       Value to be written
290285242SachimReturn: none
291285242Sachim******************************************************************************/
292285242Sachimvoid ostiChipWriteBit8( tiRoot_t *ptiRoot, U32 chipOffset, U08 chipValue )
293285242Sachim{
294285242Sachim  ag_card_info_t *pCardInfo;
295285242Sachim  pCardInfo = TIROOT_TO_CARDINFO(ptiRoot);
296285242Sachim  *(U08 *)( pCardInfo->pciMemVirtAddr + chipOffset ) = chipValue;
297285242Sachim}
298285242Sachim
299285242Sachim
300285242Sachimvoid ostiFlashReadBlock(tiRoot_t *ptiRoot,
301285242Sachim                   U32      offset,
302285242Sachim                   void     *bufPtr,
303285242Sachim                   U32      nbytes)
304285242Sachim{
305285242Sachim  AGTIAPI_PRINTK( "ostiFlashReadBlock: No support for iscsi device\n" );
306285242Sachim}
307285242Sachim
308285242Sachim/******************************************************************************
309285242SachimostiFreeMemory()
310285242SachimPurpose:
311285242Sachim  TD layer calls to free allocated dma memory
312285242SachimParameters:
313285242Sachim  tiRoot_t *ptiRoot (IN)  Pointer refers to the current root
314285242Sachim  void *osMemHandle (IN)  Pointer to OS mem handle to be released
315285242Sachim  u32  allocLength (IN)   Aloocated memory length in byte
316285242SachimReturn:
317285242Sachim  tiSuccess       - success
318285242Sachim  tiInvalidHandle - handle is invalid
319285242Sachim******************************************************************************/
320285242SachimosGLOBAL U32 ostiFreeMemory( tiRoot_t *ptiRoot,
321285242Sachim                             void *osMemHandle,
322285242Sachim                             U32 allocLength )
323285242Sachim{
324285242Sachim  ag_card_info_t *pCardInfo = TIROOT_TO_CARDINFO( ptiRoot );
325285242Sachim  ag_dma_addr_t  *pMem = (ag_dma_addr_t*)osMemHandle;
326285242Sachim  struct agtiapi_softc  *pCard;
327285242Sachim  pCard = TIROOT_TO_CARD(ptiRoot);
328285242Sachim
329285242Sachim  if( !osMemHandle ) {
330285242Sachim      AGTIAPI_PRINTK( "ostiFreeMemory: NULL handle ERROR\n" );
331285242Sachim      return tiInvalidHandle;
332285242Sachim  }
333285242Sachim
334285242Sachim  AGTIAPI_PRINTK( "ostiFreeMemory: debug messsage %p ### \n",
335285242Sachim                  (void*)pMem->dmaPhysAddr );
336285242Sachim
337285242Sachim  // mark as unused
338285242Sachim  pMem->memSize = 0;
339285242Sachim  pMem->dmaVirtAddr = NULL;
340285242Sachim  pMem->dmaPhysAddr = 0;
341285242Sachim
342285242Sachim  if (pCardInfo->topOfFreeDynamicMem == AGTIAPI_DYNAMIC_MAX) {
343285242Sachim    AGTIAPI_PRINTK( "ostiFreeMemory: too many free slots ERROR\n" );
344285242Sachim    return tiInvalidHandle;
345285242Sachim  }
346285242Sachim
347285242Sachim  mtx_lock(&pCard->memLock);
348285242Sachim  pCardInfo->freeDynamicMem[pCardInfo->topOfFreeDynamicMem++] = pMem;
349285242Sachim  mtx_unlock(&pCard->memLock);
350285242Sachim
351285242Sachim  return tiSuccess;
352285242Sachim}
353285242Sachim
354285242Sachim
355285242Sachim/******************************************************************************
356285242SachimostiMakeParamString()
357285242SachimPurpose:
358285242Sachim  Utility function to simplify flow in ostiGetTransportParam().  Produces
359285242Sachim  a string handle constructed from ostiGetTransportParam() values:
360285242Sachim  key, subkey1, subkey2, subkey3, subkey4, subkey5, and valueName.
361285242SachimParameters:
362285242Sachim  S08 *aKey (IN)             Pointer to 1st level parameter string
363285242Sachim  S08 *aSubkey1 (IN)         Pointer to 2nd level parameter string
364285242Sachim  S08 *aSubkey2 (IN)         Pointer to 3rd level parameter string
365285242Sachim  S08 *aSubkey3 (IN)         Pointer to 4th level parameter string
366285242Sachim  S08 *aSubkey4 (IN)         Pointer to 5th level parameter string
367285242Sachim  S08 *aSubkey5 (IN)         Pointer to 6th level parameter string
368285242Sachim  S08 *aValueName (IN)       Pointer to name string of the value under keys
369285242Sachim  S08 *aFullKey (OUT)        Pointer to returned key-value-handle buffer
370285242Sachim  U32 *apLenFullKey (OUT)    String length in the key-value-handle buffer
371285242SachimReturn:
372285242Sachim  tiSuccess - Success
373285242Sachim  tiError   - Failed
374285242SachimNote:
375285242Sachim  If all input strings are NULL, tiError will return with zero in apLenFullKey
376285242Sachim*****************************************************************************/
377285242Sachiminline static U32 ostiMakeParamString( S08 *aKey,
378285242Sachim                                       S08 *aSubkey1,
379285242Sachim                                       S08 *aSubkey2,
380285242Sachim                                       S08 *aSubkey3,
381285242Sachim                                       S08 *aSubkey4,
382285242Sachim                                       S08 *aSubkey5,
383285242Sachim                                       S08 *aValueName,
384285242Sachim                                       S08 *aFullKey,
385285242Sachim                                       U32 *apLenFullKey )
386285242Sachim{
387285242Sachim  // preliminary sanity checks
388285242Sachim  if( agNULL == aKey ) {
389285242Sachim    *apLenFullKey = 0;
390285242Sachim    printf( "ostiGetTransportParam called with no key.  how odd.\n" );
391285242Sachim    return tiError;
392285242Sachim  }
393285242Sachim  if( agNULL == aValueName ) {
394285242Sachim    *apLenFullKey = 0;
395285242Sachim    printf( "ostiGetTransportParam called with no value-name.  how odd.\n" );
396285242Sachim    return tiError;
397285242Sachim  }
398285242Sachim
399285242Sachim  strcpy( aFullKey, "DPMC_" );  // start at the beginning of the string
400285242Sachim  strcat( aFullKey, aKey );
401285242Sachim
402285242Sachim  int lIdx;
403285242Sachim  S08 *lStrIdx = agNULL;
404285242Sachim  for( lIdx = 1; lIdx <= 5; lIdx++ ) {
405285242Sachim    if( 1 == lIdx) lStrIdx = aSubkey1;
406285242Sachim    if( 2 == lIdx) lStrIdx = aSubkey2;
407285242Sachim    if( 3 == lIdx) lStrIdx = aSubkey3;
408285242Sachim    if( 4 == lIdx) lStrIdx = aSubkey4;
409285242Sachim    if( 5 == lIdx) lStrIdx = aSubkey5;
410285242Sachim    if( agNULL == lStrIdx ) break; // no more key information
411285242Sachim    // append key information
412285242Sachim    strcat( aFullKey, "_" );
413285242Sachim    strcat( aFullKey, lStrIdx );
414285242Sachim  }
415285242Sachim
416285242Sachim  // only the value name is left to append
417285242Sachim  strcat( aFullKey, "_" );
418285242Sachim  strcat( aFullKey, aValueName );
419285242Sachim
420285242Sachim  *apLenFullKey = strlen( aFullKey ); // 58 is max len seen; June 11, 2012
421285242Sachim  // printf( "ostiMakeParamString: x%d out-str:%s\n", // debug print
422285242Sachim  //        *apLenFullKey, aFullKey );
423285242Sachim
424285242Sachim  return tiSuccess; // ship it chief
425285242Sachim}
426285242Sachim
427285242Sachim
428285242Sachim/******************************************************************************
429285242SachimostiGetTransportParam()
430285242SachimPurpose:
431285242Sachim  Call back function from lower layer to get parameters.
432285242SachimParameters:
433285242Sachim  tiRoot_t *ptiRoot (IN)     Pointer to driver root data structure
434285242Sachim  S08 *key (IN)              Pointer to 1st level parameter
435285242Sachim  S08 *subkey1 (IN)          Pointer to 2nd level parameter
436285242Sachim  S08 *subkey2 (IN)          Pointer to 3rd level parameter
437285242Sachim  S08 *subkey3 (IN)          Pointer to 4th level parameter
438285242Sachim  S08 *subkey4 (IN)          Pointer to 5th level parameter
439285242Sachim  S08 *subkey5 (IN)          Pointer to 6th level parameter
440285242Sachim  S08 *valueName (IN)        Pointer to name of the value under keys
441285242Sachim  S08 *buffer (OUT)          Pointer to returned information buffer
442285242Sachim  U32 bufferLen (OUT)        Buffer length
443285242Sachim  U32 *lenReceived (OUT)     String length in the buffer
444285242SachimReturn:
445285242Sachim  tiSuccess - Success
446285242Sachim  Other     - Failed
447285242SachimNote:
448285242Sachim  The scheme of searching adjustable parameter tree is the following:
449285242Sachim  key
450285242Sachim    - subkey1
451285242Sachim      - subkey2
452285242Sachim        - subkey3
453285242Sachim          - subkey4
454285242Sachim            - subkey5
455285242Sachim              - value
456285242Sachim  If no match in any case, tiError will return with zero length.
457285242Sachim
458285242Sachim  Where there is no indication of max key and subkey length,
459285242Sachim  an upper limit guess of 200 is used.
460285242Sachim  Perhaps a prudent revision would be to add some argument(s) to be
461285242Sachim  able to manage/check these "key" string lengths.
462285242Sachim  This function does no checking of buffer being a valid pointer.
463285242Sachim*****************************************************************************/
464285242SachimU32 ostiGetTransportParam( tiRoot_t *ptiRoot,
465285242Sachim                           S08      *key,
466285242Sachim                           S08      *subkey1,
467285242Sachim                           S08      *subkey2,
468285242Sachim                           S08      *subkey3,
469285242Sachim                           S08      *subkey4,
470285242Sachim                           S08      *subkey5,
471285242Sachim                           S08      *valueName,
472285242Sachim                           S08      *buffer,
473285242Sachim                           U32       bufferLen,
474285242Sachim                           U32      *lenReceived )
475285242Sachim{
476285242Sachim  S08 lFullKey[200];
477285242Sachim  U32 lLenFullKey = 0;
478285242Sachim  *lenReceived = 0;
479285242Sachim
480285242Sachim  if( bufferLen > 1 )
481285242Sachim    strcpy( buffer, "" );
482285242Sachim  else {
483285242Sachim    printf( "ostiGetTransportParam: buffer too small at only %d",
484285242Sachim            bufferLen );
485285242Sachim    return tiError; // not a reasonable buffer to work with
486285242Sachim  }
487285242Sachim  ostiMakeParamString( key, subkey1, subkey2, subkey3, subkey4, subkey5,
488285242Sachim                       valueName, lFullKey, &lLenFullKey );
489285242Sachim  if( lLenFullKey )  // clean ParamString extraction
490285242Sachim    TUNABLE_STR_FETCH( lFullKey, buffer, bufferLen );
491285242Sachim  else
492285242Sachim    return tiError;  // not working out, bail now
493285242Sachim
494285242Sachim  *lenReceived = strlen( buffer );
495285242Sachim
496285242Sachim  //if( *lenReceived ) // handy debug print
497285242Sachim  //  printf( "ostiGetTransportParam: sz%d val:%s hdl-str:%s\n",
498285242Sachim  //          *lenReceived, buffer, lFullKey );
499285242Sachim
500285242Sachim  return tiSuccess;  // ship it chief
501285242Sachim}
502285242Sachim
503285242Sachim
504285242Sachim/******************************************************************************
505285242SachimostiIOCTLClearSignal()
506285242Sachim
507285242SachimPurpose:
508285242Sachim  Function to clear or reset semaphore during ioctl
509285242SachimParameters:
510285242Sachim  tiRoot_t *ptiRoot (IN)     Pointer to the current HBA
511285242Sachim  void **agParam1 (IN_OUT)   Pointer to context to be passed
512285242Sachim  void **agParam2 (IN_OUT)   Pointer to context to be passed
513285242Sachim  void **agParam (IN_OUT)    Pointer to context to be passed
514285242SachimReturn:
515285242SachimNote:
516285242Sachim  TBD, need more work for card based semaphore.  Also needs to
517285242Sachim  consider the calling sequence.
518285242Sachim******************************************************************************/
519285242SachimosGLOBAL void
520285242SachimostiIOCTLClearSignal(tiRoot_t *ptiRoot,
521285242Sachim                     void **agParam1,
522285242Sachim                     void **agParam2,
523285242Sachim                     void **agParam3)
524285242Sachim{
525285242Sachim}
526285242Sachim
527285242Sachim
528285242Sachim/******************************************************************************
529285242SachimostiIOCTLSetSignal()  ### function currently stubbed out
530285242SachimPurpose:
531285242Sachim  Function to set semaphore during ioctl
532285242SachimParameters:
533285242Sachim  tiRoot_t *ptiRoot (IN)     Pointer to the current HBA
534285242Sachim  void **agParam1 (IN_OUT)   Pointer to context to be passed
535285242Sachim  void **agParam2 (IN_OUT)   Pointer to context to be passed
536285242Sachim  void **agParam (IN_OUT)    Pointer to context to be passed
537285242SachimReturn:
538285242SachimNote:
539285242Sachim******************************************************************************/
540285242SachimosGLOBAL void
541285242SachimostiIOCTLSetSignal(tiRoot_t *ptiRoot,
542285242Sachim                   void *agParam1,
543285242Sachim                   void *agParam2,
544285242Sachim                   void *agParam3)
545285242Sachim{
546285242Sachim  struct agtiapi_softc  *pCard;
547285242Sachim  pCard = TIROOT_TO_CARD(ptiRoot);
548285242Sachim  if (pCard->down_count != pCard->up_count)
549285242Sachim  {
550285242Sachim    pCard->up_count++;
551285242Sachim    sema_post (pCard->pIoctlSem);
552285242Sachim  }
553285242Sachim}
554285242Sachim
555285242SachimosGLOBAL void
556285242SachimostiIOCTLComplete(tiRoot_t *ptiRoot,
557285242Sachim                   void *agParam1,
558285242Sachim                   void *agParam2,
559285242Sachim                   void *agParam3)
560285242Sachim{
561285242Sachim  struct agtiapi_softc  *pCard;
562285242Sachim  pCard = TIROOT_TO_CARD(ptiRoot);
563285242Sachim  if (pCard->down_count != pCard->up_count)
564285242Sachim  {
565285242Sachim    pCard->up_count++;
566285242Sachim    sema_post (pCard->pIoctlSem);
567285242Sachim  }
568285242Sachim}
569285242Sachim
570285242Sachim/******************************************************************************
571285242SachimostiPortEvent()
572285242SachimPurpose:
573285242Sachim  Call back function to inform OS the events of port state change.
574285242SachimParameters:
575285242Sachim  tiRoot_t *ptiRoot(IN)          Pointer to driver root data structure
576285242Sachim  tiPortEvent_t eventType (IN)   Type of port event:
577285242Sachim                                 tiPortPanic
578285242Sachim                                 tiPortResetComplete
579285242Sachim                                 tiPortNameServerDown
580285242Sachim                                 tiPortLinkDown
581285242Sachim                                 tiPortLinkUp
582285242Sachim                                 tiPortStarted
583285242Sachim                                 tiPortStopped
584285242Sachim                                 tiPortShutdown
585285242Sachim                                 tiPortInitComplete
586285242Sachim  void *pParm(IN)                Pointer to event specific structure
587285242SachimReturn:
588285242Sachim  None
589285242Sachim******************************************************************************/
590285242Sachimvoid
591285242SachimostiPortEvent(tiRoot_t      *ptiRoot,
592285242Sachim              tiPortEvent_t eventType,
593285242Sachim              U32           status,
594285242Sachim              void          *pParm)
595285242Sachim{
596285242Sachim  struct agtiapi_softc  *pCard;
597285242Sachim  ag_portal_data_t *pPortalData;
598285242Sachim
599285242Sachim  AGTIAPI_PRINTK("ostiPortEvent: start eventType 0x%x\n", eventType);
600285242Sachim
601285242Sachim  pCard = TIROOT_TO_CARD(ptiRoot);
602285242Sachim
603285242Sachim  switch (eventType)
604285242Sachim  {
605285242Sachim  case tiPortStarted:
606285242Sachim       pCard->flags |= AGTIAPI_CB_DONE;
607285242Sachim       pPortalData = PORTAL_CONTEXT_TO_PORTALDATA(pParm);
608285242Sachim       PORTAL_STATUS(pPortalData) |= AGTIAPI_PORT_START;
609285242Sachim       AGTIAPI_PRINTK("PortStarted - portal %p, status %x\n",
610285242Sachim                      pPortalData, PORTAL_STATUS(pPortalData));
611285242Sachim       break;
612285242Sachim  case tiPortLinkDown:
613285242Sachim       pPortalData = PORTAL_CONTEXT_TO_PORTALDATA(pParm);
614285242Sachim       PORTAL_STATUS(pPortalData) &= ~AGTIAPI_PORT_LINK_UP;
615285242Sachim       AGTIAPI_PRINTK("PortLinkDown - portal %p\n", pPortalData);
616285242Sachim       break;
617285242Sachim  case tiPortLinkUp:
618285242Sachim       pPortalData = PORTAL_CONTEXT_TO_PORTALDATA(pParm);
619285242Sachim       PORTAL_STATUS(pPortalData) |= AGTIAPI_PORT_LINK_UP;
620285242Sachim       AGTIAPI_PRINTK("PortLinkUp - portal %p\n", pPortalData);
621285242Sachim#ifdef INITIATOR_DRIVER
622285242Sachim#ifndef HOTPLUG_SUPPORT
623285242Sachim       if (!(pCard->flags & AGTIAPI_INIT_TIME))
624285242Sachim#endif
625285242Sachim//         agtiapi_StartIO(pCard);
626285242Sachim#endif
627285242Sachim       break;
628285242Sachimcase tiPortDiscoveryReady:
629285242Sachim       pCard->flags |= AGTIAPI_CB_DONE;
630285242Sachim       pPortalData = PORTAL_CONTEXT_TO_PORTALDATA(pParm);
631285242Sachim       PORTAL_STATUS(pPortalData) |= AGTIAPI_PORT_DISC_READY;
632285242Sachim       AGTIAPI_PRINTK("PortDiscoveryReady - portal %p, status 0x%x\n",
633285242Sachim                      pPortalData, PORTAL_STATUS(pPortalData));
634285242Sachim#ifdef INITIATOR_DRIVER
635285242Sachim#ifndef HOTPLUG_SUPPORT
636285242Sachim       if (!(pCard->flags & AGTIAPI_INIT_TIME))
637285242Sachim#endif
638285242Sachim         tiINIDiscoverTargets(&pCard->tiRoot,
639285242Sachim                              &pPortalData->portalInfo.tiPortalContext,
640285242Sachim                              FORCE_PERSISTENT_ASSIGN_MASK);
641285242Sachim#endif
642285242Sachim       break;
643285242Sachim  case tiPortNameServerDown:
644285242Sachim       AGTIAPI_PRINTK("PortNameSeverDown\n");
645285242Sachim       pPortalData = PORTAL_CONTEXT_TO_PORTALDATA(pParm);
646285242Sachim       PORTAL_STATUS(pPortalData) &= ~AGTIAPI_NAME_SERVER_UP;
647285242Sachim       break;
648285242Sachim  case tiPortPanic:
649285242Sachim       AGTIAPI_PRINTK("PortPanic\n");
650285242Sachim       AGTIAPI_PRINTK( "## PortEvent\n" );
651285242Sachim       pCard->flags |= AGTIAPI_PORT_PANIC;
652285242Sachim       break;
653285242Sachim  case tiPortResetComplete:
654285242Sachim       AGTIAPI_PRINTK("PortResetComplete\n");
655285242Sachim       pCard->flags |= AGTIAPI_CB_DONE;
656285242Sachim       if (status == tiSuccess)
657285242Sachim         pCard->flags |= AGTIAPI_RESET_SUCCESS;
658285242Sachim       break;
659285242Sachim  case tiPortShutdown:
660285242Sachim       AGTIAPI_PRINTK("PortShutdown\n");
661285242Sachim       pCard->flags |= AGTIAPI_CB_DONE;
662285242Sachim       pCard->flags |= AGTIAPI_PORT_SHUTDOWN;
663285242Sachim       break;
664285242Sachim  case tiPortStopped:
665285242Sachim       pCard->flags |= AGTIAPI_CB_DONE;
666285242Sachim       pPortalData = PORTAL_CONTEXT_TO_PORTALDATA(pParm);
667285242Sachim       PORTAL_STATUS(pPortalData) |= AGTIAPI_PORT_STOPPED;
668285242Sachim       AGTIAPI_PRINTK("PortStopped - portal %p\n", pPortalData);
669285242Sachim       break;
670285242Sachim  case tiEncryptOperation:
671285242Sachim       break;
672285242Sachim  case tiModePageOperation:
673285242Sachim       break;
674285242Sachim  default:
675285242Sachim       AGTIAPI_PRINTK("PortEvent - %d (Unknown)\n", eventType);
676285242Sachim       break;
677285242Sachim  }
678285242Sachim  return;
679285242Sachim}
680285242Sachim
681285242Sachim
682285242Sachim/******************************************************************************
683285242SachimostiStallThread()
684285242SachimPurpose:
685285242Sachim  Stall the thread (busy wait) for a number of microseconds.
686285242SachimParameters:
687285242Sachim  tiRoot_t *ptiRoot (IN)  Pointer to the tiRoot data structure
688285242Sachim  U32 microseconds (IN)   Micro-seconds to be hold
689285242SachimReturns: none
690285242Sachim******************************************************************************/
691285242Sachimvoid ostiStallThread( tiRoot_t *ptiRoot, U32 microseconds )
692285242Sachim{
693285242Sachim  DELAY( microseconds );
694285242Sachim}
695285242Sachim
696285242Sachim
697285242Sachim/******************************************************************************
698285242SachimostiTimeStamp()   ### stubbed out for now
699285242SachimPurpose:
700285242Sachim  Time stamp
701285242SachimParameters:
702285242Sachim  tiRoot_t *ptiRoot (IN)  Pointer to the tiRoot data structure
703285242SachimReturns:
704285242Sachim  Time stamp in milisecond
705285242Sachim******************************************************************************/
706285242SachimU32
707285242SachimostiTimeStamp(tiRoot_t *ptiRoot)
708285242Sachim{
709285242Sachim  return 0;
710285242Sachim}
711285242Sachim
712285242Sachim// meant as stubbed out 64 bit version.
713285242SachimU64 ostiTimeStamp64( tiRoot_t *ptiRoot )
714285242Sachim{
715285242Sachim  U64 retVal;
716285242Sachim  retVal = ostiTimeStamp( ptiRoot );
717285242Sachim  return retVal;
718285242Sachim}
719285242Sachim
720285242Sachim/******************************************************************************
721285242SachimostiCacheFlush()    ### stubbed out for now
722285242SachimostiCacheInvalidate()
723285242SachimostiCachePreFlush()
724285242Sachim
725285242SachimPurpose:
726285242Sachim  Cache-coherency APIs
727285242SachimParameters:
728285242Sachim
729285242SachimReturns:
730285242Sachim
731285242SachimNote:
732285242Sachim  These 3 functions are to support new cache coherency applications.
733285242Sachim  Currently the APIs are implemented in FC for PPC platform. The
734285242Sachim  define CACHED_DMA enable for dma_cache_sync function call. However
735285242Sachim  this define is restricted for certain version of linux, such as
736285242Sachim  Linux 2.6.x and above, and certain platform such as PPC.
737285242Sachim
738285242Sachim  DO NOT define the CACHED_DMA if the cache coherency is not required
739285242Sachim  or the environment does not match.
740285242Sachim******************************************************************************/
741285242SachimosGLOBAL void ostiCacheFlush(
742285242Sachim                        tiRoot_t    *ptiRoot,
743285242Sachim                        void        *osMemHandle,
744285242Sachim                        void        *virtPtr,
745285242Sachim                        bit32       length
746285242Sachim                        )
747285242Sachim{
748285242Sachim}
749285242Sachim
750285242SachimosGLOBAL void ostiCacheInvalidate(
751285242Sachim                        tiRoot_t    *ptiRoot,
752285242Sachim                        void        *osMemHandle,
753285242Sachim                        void        *virtPtr,
754285242Sachim                        bit32       length
755285242Sachim                        )
756285242Sachim{
757285242Sachim}
758285242Sachim
759285242SachimosGLOBAL void ostiCachePreFlush(
760285242Sachim                        tiRoot_t    *tiRoot,
761285242Sachim                        void    *osMemHandle,
762285242Sachim                        void    *virtPtr,
763285242Sachim                        bit32     length
764285242Sachim                        )
765285242Sachim{
766285242Sachim}
767285242Sachim
768285242Sachim
769285242Sachim/*
770285242Sachim   added for SAS/SATA
771285242Sachim   this is called by ossaInterrruptEnable
772285242Sachim*/
773285242SachimGLOBAL void ostiInterruptEnable( tiRoot_t  *ptiRoot, bit32 channelNum )
774285242Sachim{
775285242Sachim  // yep, really nothing.
776285242Sachim}
777285242Sachim
778285242Sachim/*
779285242Sachim   this is called by ossaInterrruptDisable
780285242Sachim*/
781285242SachimGLOBAL void ostiInterruptDisable( tiRoot_t  *ptiRoot, bit32 channelNum )
782285242Sachim{
783285242Sachim  // yep, really nothing.
784285242Sachim}
785285242Sachim
786