lxcommon.h revision 285662
126373Sdfr/******************************************************************************* 226373Sdfr*Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved. 326373Sdfr* 426373Sdfr*Redistribution and use in source and binary forms, with or without modification, are permitted provided 526373Sdfr*that the following conditions are met: 626373Sdfr*1. Redistributions of source code must retain the above copyright notice, this list of conditions and the 726373Sdfr*following disclaimer. 826373Sdfr*2. Redistributions in binary form must reproduce the above copyright notice, 926373Sdfr*this list of conditions and the following disclaimer in the documentation and/or other materials provided 1026373Sdfr*with the distribution. 1126373Sdfr* 1226373Sdfr*THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED 1326373Sdfr*WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 1426373Sdfr*FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1526373Sdfr*FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 1626373Sdfr*NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 1726373Sdfr*BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 1826373Sdfr*LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 1926373Sdfr*SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE 2026373Sdfr* 2126373Sdfr* $FreeBSD: head/sys/dev/pms/freebsd/driver/common/lxcommon.h 285242 2015-07-07 13:17:02Z achim $ 2226373Sdfr* 2326373Sdfr*******************************************************************************/ 2426373Sdfr/****************************************************************************** 2526373Sdfr 2626373SdfrModule Name: 2726373Sdfr lxcommon.h 2826373SdfrAbstract: 2926373Sdfr TISA Initiator/target driver module constant define header file 3026373SdfrEnvironment: 3126373Sdfr Kernel or loadable module 3226373Sdfr 3326373Sdfr******************************************************************************/ 3426373Sdfr 3526373Sdfr 3626373Sdfr#include <dev/pms/RefTisa/tisa/api/titypes.h> 3750477Speter 3826373Sdfr 3926373Sdfr#define LINUX_DMA_MEM_MAX 0x1ffe0 /* 128k - 32, real 128k - 24 */ 4026373Sdfr#define DEK_MAX_TABLE_ITEMS DEK_MAX_TABLE_ENTRIES // from tisa/api/titypes.h 4171785Speter 4271797Speter/* 4326373Sdfr** IP address length based on character. 4426373Sdfr*/ 4565822Sjhb#ifdef AGTIAPI_IP6_SUPPORT 4642410Sbde# define IP_ADDR_CHAR_LEN 64 4742410Sbde#else 4842410Sbde# define IP_ADDR_CHAR_LEN 16 4965557Sjasone#endif 5026373Sdfr 5126373Sdfr#define MSEC_PER_TICK (1000/hz) /* milisecond per tick */ 5267361Sjhb#define USEC_PER_TICK (1000000/hz) /* microsecond per tick */ 5361994Smsmith#define AGTIAPI_64BIT_ALIGN 8 /* 64 bit environment alignment */ 5465557Sjasone 5545897Speter/* 5661994Smsmith** Max device supported 5767361Sjhb*/ 5865557Sjasone#define AGTIAPI_MAX_CARDS 4 /* card supported up to system limit */ 5945897Speter#define AGTIAPI_TOO_MANY_CARDS -1 /* beyond defined max support */ 6045897Speter#define AGTIAPI_MAX_PORTALS 16 /* max portal per card */ 6126373Sdfr/* max device per portal */ 6226373Sdfr 6345897Speter/* 6445897Speter** Adjustable Parameter Options 6526373Sdfr*/ 6671236Speter#define AGTIAPI_OPTION_ON 1 /* adjustable parameter available */ 6726373Sdfr#define AGTIAPI_KEY_MAX 64 /* max number of keys */ 6862042Sfsmp#define AGTIAPI_STRING_MAX 512 /* max length for string */ 6926373Sdfr#define AGTIAPI_PARAM_MAX 256 /* max number of parameters */ 7026383Skato#ifdef TARGET_DRIVER 7126383Skato#define AGTIAPI_DMA_MEM_LIST_MAX 4096 /* max number of DMA memory list */ 7226383Skato#define AGTIAPI_CACHE_MEM_LIST_MAX 24 /* max number of CACHE memory list */ 7326383Skato#else /* INITIATOR_DRIVER */ 7426383Skato#define AGTIAPI_DMA_MEM_LIST_MAX 1024 /* max number of DMA memory list */ 7526373Sdfr#define AGTIAPI_CACHE_MEM_LIST_MAX 1024 /* max number of CACHE memory list */ 7626383Skato#endif 7726373Sdfr#ifndef AGTIAPI_DYNAMIC_MAX 7826373Sdfr#define AGTIAPI_DYNAMIC_MAX 4096 /* max unreleased dynamic memory */ 7971785Speter#endif 8045897Speter#define AGTIAPI_LOOP_MAX 4 /* max loop for init process */ 8155117Sbde 8226373Sdfr#define AGTIAPI_MAX_NAME 70 // Max string name length 8326373Sdfr#define AGTIAPI_MIN_NAME 10 // minimum space for SAS name string 8436132Stegge#define AGTIAPI_MAX_ID 8 // Max string id length 8536132Stegge 8636132Stegge/* 8726373Sdfr** Card-port status definitions 8871797Speter*/ 8950823Smdodd#define AGTIAPI_INIT_TIME 0x00000001 9050823Smdodd#define AGTIAPI_SOFT_RESET 0x00000002 9150823Smdodd#define AGTIAPI_HAD_RESET 0x00000004 // ### 9226373Sdfr#define AGTIAPI_DISC_DONE 0x00000008 9366698Sjhb#define AGTIAPI_INSTALLED 0x00000010 9426373Sdfr#define AGTIAPI_RESET 0x00000020 9566698Sjhb#define AGTIAPI_FLAG_UP 0x00000040 9666698Sjhb#define AGTIAPI_CB_DONE 0x00000080 9766698Sjhb#define AGTIAPI_DISC_COMPLETE 0x00000100 9866698Sjhb#define AGTIAPI_IOREGION_REQUESTED 0x00000200 9926373Sdfr#define AGTIAPI_IRQ_REQUESTED 0x00000400 10026373Sdfr#define AGTIAPI_SCSI_REGISTERED 0x00000800 10126373Sdfr#define AGTIAPI_NAME_SERVER_UP 0x00001000 10226373Sdfr#define AGTIAPI_PORT_INITIALIZED 0x00002000 10326373Sdfr#define AGTIAPI_PORT_LINK_UP 0x00004000 10426373Sdfr#define AGTIAPI_LGN_LINK_UP 0x00008000 10526373Sdfr#define AGTIAPI_PORT_PANIC 0x00010000 10626373Sdfr#define AGTIAPI_RESET_SUCCESS 0x00020000 10726373Sdfr#define AGTIAPI_PORT_START 0x00040000 10847390Speter#define AGTIAPI_PORT_STOPPED 0x00080000 10926373Sdfr#define AGTIAPI_PORT_SHUTDOWN 0x00100000 11047390Speter#define AGTIAPI_IN_USE 0x00200000 11126373Sdfr#define AGTIAPI_SYS_INTR_ON 0x00400000 11226373Sdfr#define AGTIAPI_PORT_DISC_READY 0x00800000 11347390Speter#define AGTIAPI_SIG_DOWN 0x01000000 11471247Speter#define AGTIAPI_SIG_UP 0x02000000 11571247Speter#define AGTIAPI_TASK 0x04000000 11671247Speter#define AGTIAPI_INITIATOR 0x08000000 11771247Speter#define AGTIAPI_TARGET 0x10000000 11826373Sdfr#define AGTIAPI_TIMER_ON 0x20000000 11926373Sdfr#define AGTIAPI_SHUT_DOWN 0x40000000 12026373Sdfr/* reserved for ccb flag TASK_MANAGEMENT 12126373Sdfr#define AGTIAPI_RESERVED 0x80000000 12226373Sdfr*/ 12326373Sdfr#define AGTIAPI_RESET_ALL 0xFFFFFFFF 12426373Sdfr 12547390Speter/* 12626373Sdfr** PCI defines 12747390Speter*/ 12847390Speter#ifndef PCI_VENDOR_ID_HP 12971247Speter#define PCI_VENDOR_ID_HP 0x103c 13071247Speter#endif 13126373Sdfr 13226373Sdfr#ifndef PCI_VENDOR_ID_PMC_SIERRA 13326373Sdfr#define PCI_VENDOR_ID_PMC_SIERRA 0x11F8 13465822Sjhb#endif 13526373Sdfr 13626383Skato#ifndef PCI_VENDOR_ID_AGILENT 13726383Skato#define PCI_VENDOR_ID_AGILENT 0x15bc 13826383Skato#endif 13926383Skato 14026373Sdfr#ifndef PCI_VENDOR_ID_CYCLONE 14126373Sdfr#define PCI_VENDOR_ID_CYCLONE 0x113C 14226373Sdfr#endif 14326373Sdfr 14426373Sdfr#ifndef PCI_VENDOR_ID_SPCV_FPGA 14526383Skato#define PCI_VENDOR_ID_SPCV_FPGA 0x1855 14626373Sdfr#endif 14726373Sdfr 14861994Smsmith#ifndef PCI_VENDOR_ID_HIALEAH 14961994Smsmith#define PCI_VENDOR_ID_HIALEAH 0x9005 15061994Smsmith#endif 15161994Smsmith 15261994Smsmith#define PCI_DEVICE_ID_HP_TS 0x102a 15361994Smsmith#define PCI_DEVICE_ID_HP_TL 0x1028 15461994Smsmith#define PCI_DEVICE_ID_HP_XL2 0x1029 15561994Smsmith#define PCI_DEVICE_ID_AG_DX2 0x0100 15661994Smsmith#define PCI_DEVICE_ID_AG_DX2PLUS 0x0101 15761994Smsmith#define PCI_DEVICE_ID_AG_QX2 0x0102 15861994Smsmith#define PCI_DEVICE_ID_AG_QX4 0x0103 15961994Smsmith#define PCI_DEVICE_ID_AG_QE4 0x1200 16061994Smsmith#define PCI_DEVICE_ID_AG_DE4 0x1203 16161994Smsmith#define PCI_DEVICE_ID_AG_XL10 0x0104 16261994Smsmith#define PCI_DEVICE_ID_AG_DX4PLUS 0x0105 16361994Smsmith#define PCI_DEVICE_ID_AG_DIXL 0x0110 16461994Smsmith#define PCI_DEVICE_ID_AG_IDX1 0x050A 16561994Smsmith#define PCI_DEVICE_ID_PMC_SIERRA_SPC 0x8001 16661994Smsmith#define PCI_DEVICE_ID_PMC_SIERRA_SPCV 0x8008 16761994Smsmith#define PCI_DEVICE_ID_PMC_SIERRA_SPCVE 0x8009 16861994Smsmith#define PCI_DEVICE_ID_PMC_SIERRA_SPCVPLUS 0x8018 16961994Smsmith#define PCI_DEVICE_ID_PMC_SIERRA_SPCVE_16 0x8019 17061994Smsmith#define PCI_DEVICE_ID_SPCV_FPGA 0xabcd 17161994Smsmith#define PCI_DEVICE_ID_PMC_SIERRA_SPCV12G 0x8070 17261994Smsmith#define PCI_DEVICE_ID_PMC_SIERRA_SPCVE12G 0x8071 17361994Smsmith#define PCI_DEVICE_ID_PMC_SIERRA_SPCV12G_16 0x8072 17461994Smsmith#define PCI_DEVICE_ID_PMC_SIERRA_SPCVE12G_16 0x8073 17561994Smsmith#define PCI_DEVICE_ID_HIALEAH_HBA_SPC 0x8081 17661994Smsmith#define PCI_DEVICE_ID_HIALEAH_RAID_SPC 0x8091 17761994Smsmith#define PCI_DEVICE_ID_HIALEAH_HBA_SPCV 0x8088 17861994Smsmith#define PCI_DEVICE_ID_HIALEAH_RAID_SPCV 0x8098 17962042Sfsmp#define PCI_DEVICE_ID_HIALEAH_HBA_SPCVE 0x8089 18061994Smsmith#define PCI_DEVICE_ID_HIALEAH_RAID_SPCVE 0x8099 18161994Smsmith#define PCI_DEVICE_ID_DELRAY_HBA_8PORTS_SPCV 0x8074 18261994Smsmith#define PCI_DEVICE_ID_DELRAY_HBA_8PORTS_SPCVE 0x8075 18361994Smsmith#define PCI_DEVICE_ID_DELRAY_HBA_16PORTS_SPCV 0x8076 18461994Smsmith#define PCI_DEVICE_ID_DELRAY_HBA_16PORTS_SPCVE 0x8077 18561994Smsmith#define PCI_DEVICE_ID_DELRAY_HBA_16PORTS_SPCV_SATA 0x8006 18661994Smsmith 18761994Smsmith 18861994Smsmith#define PCI_SUB_VENDOR_ID_HP PCI_VENDOR_ID_HP 18961994Smsmith#define PCI_SUB_VENDOR_ID_AG PCI_VENDOR_ID_AGILENT 19061994Smsmith#define PCI_SUB_VENDOR_ID_MASK 0xFFFF 19161994Smsmith#define PCI_SUB_SYSTEM_ID_AG 0x0001 19261994Smsmith#define PCI_BASE_MEM_MASK (~0x0F) 19361994Smsmith 19461994Smsmith#define PCI_DEVICE_ID_CYCLONE 0xB555 19561994Smsmith#define PCI_ENABLE_VALUE 0x0157 19661994Smsmith#ifdef PMC_SPC 19761994Smsmith#define PCI_NUMBER_BARS 6 19861994Smsmith#endif 19961994Smsmith#define IOCTL_MN_GET_CARD_INFO 0x11 20061994Smsmith/* 20161994Smsmith** Constant defines 20261994Smsmith*/ 20361994Smsmith#define _08B 8 20461994Smsmith#define _16B 16 20561994Smsmith#define _24B 24 20661994Smsmith#define _32B 32 20761994Smsmith#define _64B 64 20861994Smsmith#define _128B 128 20961994Smsmith#define _256B 256 21061994Smsmith#define _512B 512 21161994Smsmith 21226373Sdfr#define _1K 1024 21326373Sdfr#define _2K 2048 21426373Sdfr#define _4K 4096 21526373Sdfr#define _128K (128*(_1K)) 21626373Sdfr 21726373Sdfr// Card property related info. 21826373Sdfrtypedef struct _ag_card_id { 21964294Sps U16 vendorId; /* pci vendor id */ 22026383Skato U16 deviceId; /* pci device id */ 22126383Skato S32 cardNameIndex; /* structure index */ 22264294Sps U16 membar; /* pci memory bar offset */ 22364294Sps U16 iobar1; /* pci io bar 1 offset */ 22426383Skato U16 iobar2; /* pci io bar 2 offest */ 22526383Skato U16 reg; /* pci memory bar number */ 22626383Skato} ag_card_id_t; 22764294Sps 22864294Sps 22926383Skato#define PCI_BASE_ADDRESS_0 PCIR_BAR(0) 23064294Sps#define PCI_BASE_ADDRESS_1 PCIR_BAR(1) 23164294Sps#define PCI_BASE_ADDRESS_2 PCIR_BAR(2) 23226383Skato#define PCI_BASE_ADDRESS_3 PCIR_BAR(3) 23364294Sps#define PCI_BASE_ADDRESS_4 PCIR_BAR(4) 23426383Skato 23526383Skato 23626373Sdfrag_card_id_t ag_card_type[] = { 23726373Sdfr#ifdef AGTIAPI_ISCSI 23829936Smckay {PCI_VENDOR_ID_AGILENTj, PCI_DEVICE_ID_AG_DIXL, 1, 23964294Sps PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_1, PCI_BASE_ADDRESS_0, 0}, 24071797Speter {PCI_VENDOR_ID_AGILENT, PCI_DEVICE_ID_AG_IDX1, 2, 24150823Smdodd PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_1, PCI_BASE_ADDRESS_0, 0}, 24254967Seivind#endif 24350823Smdodd#ifdef AGTIAPI_FC 24450823Smdodd {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_TS, 3, 24564294Sps PCI_BASE_ADDRESS_3, PCI_BASE_ADDRESS_1, PCI_BASE_ADDRESS_2, 3}, 24664294Sps {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_TL, 4, 24764294Sps PCI_BASE_ADDRESS_3, PCI_BASE_ADDRESS_1, PCI_BASE_ADDRESS_2, 3}, 24864294Sps {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_XL2, 5, 24929936Smckay PCI_BASE_ADDRESS_3, PCI_BASE_ADDRESS_1, PCI_BASE_ADDRESS_2, 3}, 25064294Sps {PCI_VENDOR_ID_AGILENT, PCI_DEVICE_ID_AG_DX2, 6, 25164294Sps PCI_BASE_ADDRESS_4, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 4}, 25264294Sps {PCI_VENDOR_ID_AGILENT, PCI_DEVICE_ID_AG_DX2PLUS, 7, 25364294Sps PCI_BASE_ADDRESS_4, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 4}, 25429936Smckay {PCI_VENDOR_ID_AGILENT, PCI_DEVICE_ID_AG_DX4PLUS, 8, 25529936Smckay PCI_BASE_ADDRESS_4, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 4}, 25629936Smckay {PCI_VENDOR_ID_AGILENT, PCI_DEVICE_ID_AG_QX2, 9, 25729936Smckay PCI_BASE_ADDRESS_4, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 4}, 25829936Smckay {PCI_VENDOR_ID_AGILENT, PCI_DEVICE_ID_AG_QX4, 10, 25929936Smckay PCI_BASE_ADDRESS_4, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 4}, 26029936Smckay {PCI_VENDOR_ID_AGILENT, PCI_DEVICE_ID_AG_DE4, 11, 26164294Sps PCI_BASE_ADDRESS_4, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 4}, 26229936Smckay {PCI_VENDOR_ID_AGILENT, PCI_DEVICE_ID_AG_QE4, 12, 26364294Sps PCI_BASE_ADDRESS_4, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 4}, 26464294Sps {PCI_VENDOR_ID_AGILENT, PCI_DEVICE_ID_AG_XL10, 13, 26564294Sps PCI_BASE_ADDRESS_4, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 4}, 26664294Sps#endif 26729936Smckay#ifdef AGTIAPI_SA 26864294Sps#ifdef PMC_SPC 26964294Sps {PCI_VENDOR_ID_PMC_SIERRA, PCI_DEVICE_ID_PMC_SIERRA_SPC, 14, 27064294Sps PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 27164294Sps {PCI_VENDOR_ID_PMC_SIERRA, PCI_DEVICE_ID_PMC_SIERRA_SPCV, 15, 27229936Smckay PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 27364294Sps {PCI_VENDOR_ID_PMC_SIERRA, PCI_DEVICE_ID_PMC_SIERRA_SPCVE, 16, 27464294Sps PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 27564294Sps {PCI_VENDOR_ID_PMC_SIERRA, PCI_DEVICE_ID_PMC_SIERRA_SPCVPLUS, 17, 27664294Sps PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 27726383Skato {PCI_VENDOR_ID_PMC_SIERRA, PCI_DEVICE_ID_PMC_SIERRA_SPCVE_16, 18, 27864294Sps PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 27926373Sdfr {PCI_VENDOR_ID_SPCV_FPGA, PCI_DEVICE_ID_SPCV_FPGA, 19, 28026373Sdfr PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 28126373Sdfr {PCI_VENDOR_ID_PMC_SIERRA, PCI_DEVICE_ID_PMC_SIERRA_SPCV12G, 20, 28265557Sjasone PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 28365557Sjasone {PCI_VENDOR_ID_PMC_SIERRA, PCI_DEVICE_ID_PMC_SIERRA_SPCVE12G, 21, 28465557Sjasone PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 28526373Sdfr {PCI_VENDOR_ID_PMC_SIERRA, PCI_DEVICE_ID_PMC_SIERRA_SPCV12G_16, 22, 28626373Sdfr PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 28726373Sdfr {PCI_VENDOR_ID_PMC_SIERRA, PCI_DEVICE_ID_PMC_SIERRA_SPCVE12G_16, 23, 28826373Sdfr PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 28926373Sdfr {PCI_VENDOR_ID_HIALEAH, PCI_DEVICE_ID_HIALEAH_HBA_SPC, 24, 29026373Sdfr PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 29126373Sdfr {PCI_VENDOR_ID_HIALEAH, PCI_DEVICE_ID_HIALEAH_RAID_SPC, 25, 29226373Sdfr PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 29365822Sjhb {PCI_VENDOR_ID_HIALEAH, PCI_DEVICE_ID_HIALEAH_HBA_SPCV, 26, 29426373Sdfr PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 29526373Sdfr {PCI_VENDOR_ID_HIALEAH, PCI_DEVICE_ID_HIALEAH_RAID_SPCV, 27, 29671797Speter PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 29750823Smdodd {PCI_VENDOR_ID_HIALEAH, PCI_DEVICE_ID_HIALEAH_HBA_SPCVE, 28, 29850823Smdodd PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 29950823Smdodd {PCI_VENDOR_ID_HIALEAH, PCI_DEVICE_ID_HIALEAH_RAID_SPCVE, 29, 30050823Smdodd PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 30150823Smdodd {PCI_VENDOR_ID_HIALEAH, PCI_DEVICE_ID_DELRAY_HBA_8PORTS_SPCV, 30, 30226383Skato PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 30326383Skato {PCI_VENDOR_ID_HIALEAH, PCI_DEVICE_ID_DELRAY_HBA_8PORTS_SPCVE, 31, 30426383Skato PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 30526383Skato {PCI_VENDOR_ID_HIALEAH, PCI_DEVICE_ID_DELRAY_HBA_16PORTS_SPCV, 32, 30626373Sdfr PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 30726383Skato {PCI_VENDOR_ID_HIALEAH, PCI_DEVICE_ID_DELRAY_HBA_16PORTS_SPCVE, 33, 30826373Sdfr PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 30926383Skato {PCI_VENDOR_ID_HIALEAH, PCI_DEVICE_ID_DELRAY_HBA_16PORTS_SPCV_SATA, 34, 31026373Sdfr PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, 0}, 31126383Skato 31226383Skato#endif 31326383Skato#endif //AGTIAPI_SA 31426383Skato}; 31526383Skato 31626383Skatostatic const char *ag_card_names[] = { 31726383Skato "Unknown", 31826383Skato "iSCSI DiXL Card", 31926373Sdfr "iSCSI iDX1 Card", 32026383Skato "Tachyon TS Fibre Channel Card", 32126373Sdfr "Tachyon TL Fibre Channel Card", 32226383Skato "Tachyon XL2 Fibre Channel Card", 32326373Sdfr "Tachyon DX2 Fibre Channel Card", 32471797Speter "Tachyon DX2+ Fibre Channel Card", 32550823Smdodd "Tachyon DX4+ Fibre Channel Card", 32650823Smdodd "Tachyon QX2 Fibre Channel Card", 32750823Smdodd "Tachyon QX4 Fibre Channel Card", 32850823Smdodd "Tachyon DE4 Fibre Channel Card", 32950823Smdodd "Tachyon QE4 Fibre Channel Card", 33050823Smdodd "Tachyon XL10 Fibre Channel Card", 33126383Skato#ifdef AGTIAPI_SA 33226383Skato#ifdef PMC_SPC 33326383Skato "PMC Sierra SPC SAS-SATA Card", 33426383Skato "PMC Sierra SPC-V SAS-SATA Card", 33526383Skato "PMC Sierra SPC-VE SAS-SATA Card", 33626373Sdfr "PMC Sierra SPC-V 16 Port SAS-SATA Card", 33726383Skato "PMC Sierra SPC-VE 16 Port SAS-SATA Card", 33826373Sdfr "PMC Sierra FPGA", 33926383Skato "PMC Sierra SPC-V SAS-SATA Card 12Gig", 34026373Sdfr "PMC Sierra SPC-VE SAS-SATA Card 12Gig", 34126383Skato "PMC Sierra SPC-V 16 Port SAS-SATA Card 12Gig", 34226383Skato "PMC Sierra SPC-VE 16 Port SAS-SATA Card 12Gig", 34326373Sdfr "Adaptec Hialeah 4/8 Port SAS-SATA HBA Card 6Gig", 34426373Sdfr "Adaptec Hialeah 4/8 Port SAS-SATA RAID Card 6Gig", 34526373Sdfr "Adaptec Hialeah 8/16 Port SAS-SATA HBA Card 6Gig", 34626373Sdfr "Adaptec Hialeah 8/16 Port SAS-SATA RAID Card 6Gig", 34726373Sdfr "Adaptec Hialeah 8/16 Port SAS-SATA HBA Encryption Card 6Gig", 34826373Sdfr "Adaptec Hialeah 8/16 Port SAS-SATA RAID Encryption Card 6Gig", 34926373Sdfr "Adaptec Delray 8 Port SAS-SATA HBA Card 12Gig", 35037051Sbde "Adaptec Delray 8 Port SAS-SATA HBA Encryption Card 12Gig", 35137051Sbde "Adaptec Delray 16 Port SAS-SATA HBA Card 12Gig", 35226373Sdfr "Adaptec Delray 16 Port SAS-SATA HBA Encryption Card 12Gig", 35337051Sbde "Adaptec SATA Adapter", 35426373Sdfr 35526373Sdfr#endif 35626373Sdfr#endif 35726373Sdfr}; 35826373Sdfr 35926373Sdfr 36026373Sdfr 36126373Sdfr/* 36245676Sbde** Resource Info Structure 36337051Sbde*/ 36445676Sbdetypedef struct _ag_resource_info { 36526373Sdfr tiLoLevelResource_t tiLoLevelResource; // Low level resource required 36637051Sbde tiInitiatorResource_t tiInitiatorResource; // Initiator resource required 36726373Sdfr tiTargetResource_t tiTargetResource; // Target resource required 36826373Sdfr tiTdSharedMem_t tiSharedMem; // Shared memory by ti and td 36971785Speter} ag_resource_info_t; 37026373Sdfr 37136492Sbde 37236492Sbde// DMA memory address pair 37326373Sdfrtypedef struct _ag_dma_addr { 37436492Sbde void *dmaVirtAddr; 37536492Sbde vm_paddr_t dmaPhysAddr; 37626373Sdfr U32 memSize; 37736492Sbde bit32 type; 37836492Sbde bus_addr_t nocache_busaddr; 37926373Sdfr void *nocache_mem; 38036492Sbde} ag_dma_addr_t; 38136492Sbde 38236492Sbde 38326373Sdfrtypedef struct _CardInfo 38455117Sbde{ 38526373Sdfr U32 pciIOAddrLow; /* PCI IOBASE lower */ 38665557Sjasone U32 pciIOAddrUp; /* PCI IOBASE Upper */ 38765557Sjasone U32_64 pciMemBase; /* PCI MEMBASE, physical */ 38865557Sjasone U32_64 pciMemBaseSpc[PCI_NUMBER_BARS]; // PCI MEMBASE, physical 38965557Sjasone U16 deviceId; // PCI device id 39045897Speter U16 vendorId; // PCI Vendor id 39145897Speter U32 busNum; 39226373Sdfr U32 deviceNum; 39345676Sbde}CardInfo_t; 39445676Sbde 39545676Sbde// Card info. for all cards and drivers 39626373Sdfrtypedef struct _ag_card_info { 39745676Sbde struct mtx pmIOLock; 39845676Sbde device_t pPCIDev; // PCI device pointer 39945676Sbde void *pCard; // pointer to per card data structure 40045676Sbde S32 cardNameIndex; 40145676Sbde U32 cardID; // card system ID 40245676Sbde U32 cardIdIndex; 40345676Sbde U32 pciIOAddrLow; // PCI IOBASE lower 40445676Sbde U32 pciIOAddrUp; // PCI IOBASE Upper 40545676Sbde U32_64 pciMemBase; // PCI MEMBASE, physical 40645676Sbde caddr_t pciMemVirtAddr; // PCI MEMBASE, virtual ptr 40726373Sdfr U32 pciMemSize; // PCI MEMBASE memory size 40845897Speter#ifdef AGTIAPI_SA 40945897Speter#ifdef FPGA_CARD 41045676Sbde U32_64 pciMemBase0; // PCI MEMBASE, physical 41145676Sbde caddr_t pciMemVirtAddr0; // PCI MEMBASE, virtual ptr 41226373Sdfr U32 pciMemSize0; // PCI MEMBASE memory size 41345676Sbde#endif 41445676Sbde#ifdef PMC_SPC 41545676Sbde struct resource *pciMemBaseRscSpc[PCI_NUMBER_BARS]; 41645676Sbde int pciMemBaseRIDSpc[PCI_NUMBER_BARS]; 41745676Sbde U32_64 pciMemBaseSpc[PCI_NUMBER_BARS]; // PCI MEMBASE, physical 41845676Sbde caddr_t pciMemVirtAddrSpc[PCI_NUMBER_BARS];//PCI MEMBASE, virt ptr 41945676Sbde U32 pciMemSizeSpc[PCI_NUMBER_BARS]; // PCI MEMBASE memory size 42045676Sbde#endif 42145676Sbde#endif 42245676Sbde U16 memBar; 42345676Sbde U16 memReg; 42445676Sbde U32 cacheIndex; 42545676Sbde U32 dmaIndex; 42645676Sbde ag_dma_addr_t tiDmaMem[AGTIAPI_DMA_MEM_LIST_MAX]; // dma addr list 42745676Sbde 42845676Sbde // all (free and allocated) mem slots 42945676Sbde ag_dma_addr_t dynamicMem[AGTIAPI_DYNAMIC_MAX]; 43026373Sdfr 43145676Sbde // ptr to free mem slots 43245676Sbde ag_dma_addr_t *freeDynamicMem[AGTIAPI_DYNAMIC_MAX]; 43345676Sbde 43445676Sbde U16 topOfFreeDynamicMem; // idx to the first free slot ptr 43545676Sbde 43645676Sbde void *tiCachedMem[AGTIAPI_CACHE_MEM_LIST_MAX];// cached mem list 43726373Sdfr ag_resource_info_t tiRscInfo; /* low level resource requirement */ 43826373Sdfr U08 WWN[AGTIAPI_MAX_NAME]; /* WWN for this card */ 43926373Sdfr U08 WWNLen; 44065822Sjhb 44126373Sdfr// #define MAX_MSIX_NUM_VECTOR 64 ## 44228910Sfsmp#define MAX_MSIX_NUM_VECTOR 16 // 1 then 16 just for testing; 44328910Sfsmp#define MAX_MSIX_NUM_DPC 64 // 16 44428910Sfsmp#define MAX_MSIX_NUM_ISR 64 // 16 44528910Sfsmp#ifdef SPC_MSIX_INTR 44628910Sfsmp 44726373Sdfr // ## use as a map instead of presirq 44826373Sdfr struct resource *msix_entries[MAX_MSIX_NUM_VECTOR]; 44926373Sdfr#endif 45026373Sdfr U32 maxInterruptVectors; 45126373Sdfr} ag_card_info_t; 45226383Skato 45326373Sdfr/* 45426373Sdfr** Optional Adjustable Parameters Structures. 45526373Sdfr** Not using pointer stucture for easy read and access tree structure. 45626373Sdfr** In the future if more layer of key tree involved, it might be a good 45726373Sdfr** idea to change the structure and program. 45826373Sdfr*/ 45926373Sdfrtypedef struct _ag_param_value{ 46037050Sbde char valueName[AGTIAPI_MAX_NAME]; 46128910Sfsmp char valueString[AGTIAPI_STRING_MAX]; 46228910Sfsmp struct _ag_param_value *next; 46328910Sfsmp} ag_value_t; 46428910Sfsmp 46528910Sfsmptypedef struct _ag_param_key{ 46628910Sfsmp char keyName[AGTIAPI_MAX_NAME]; 46734021Stegge ag_value_t *pValueHead; 46834021Stegge ag_value_t *pValueTail; 46934021Stegge struct _ag_param_key *pSubkeyHead; 47034021Stegge struct _ag_param_key *pSubkeyTail; 47134021Stegge struct _ag_param_key *next; 47236132Stegge} ag_key_t; 47334021Stegge 47434021Stegge/* 47534021Stegge** Portal info data structure 47634021Stegge*/ 47734021Steggetypedef struct _ag_portal_info { 47828910Sfsmp U32 portID; 47934021Stegge U32 portStatus; 48034021Stegge U32 devTotal; 48134021Stegge U32 devPrev; 48234021Stegge tiPortInfo_t tiPortInfo; 48334021Stegge tiPortalContext_t tiPortalContext; 48434021Stegge#ifdef INITIATOR_DRIVER 48534021Stegge void *pDevList[AGTIAPI_HW_LIMIT_DEVICE]; 48638888Stegge#endif 48738888Stegge} ag_portal_info_t; 48838888Stegge 48938888Stegge#define MAP_TABLE_ENTRY(pC, c, d, l) (pC->encrypt_map + \ 49038888Stegge (c * pC->devDiscover * AGTIAPI_MAX_LUN) + \ 49138888Stegge (d * AGTIAPI_MAX_LUN) + \ 49238888Stegge (l)) 49328910Sfsmp 49426373Sdfr#ifdef CHAR_DEVICE 49526373Sdfr/************************************************************************* 49626373SdfrPurpose: Payload Wraper for ioctl commands 49728910Sfsmp***********************************************************************/ 49826373Sdfrtypedef struct datatosendt{ 49926373Sdfrbit32 datasize; //buffer size 50026373Sdfrbit8 *data; //buffer 50126373Sdfr}datatosend; 50226373Sdfr/***********************************************************************/ 50365557Sjasone#define AGTIAPI_IOCTL_BASE 'x' 50465557Sjasone#define AGTIAPI_IOCTL _IOWR(AGTIAPI_IOCTL_BASE, 0,datatosend ) //receiving payload here// 50565557Sjasone#define AGTIAPI_IOCTL_MAX 1 50665557Sjasone#endif 50765557Sjasone 50826373Sdfr#ifdef AGTIAPI_FLOW_DEBUG 50926373Sdfr#define AGTIAPI_FLOW(format, a...) printf(format, ## a) 51026373Sdfr#else 51165822Sjhb#define AGTIAPI_FLOW(format, a...) 51226373Sdfr#endif 51326373Sdfr 51426373Sdfr#ifdef AGTIAPI_DEBUG 51526373Sdfr#define AGTIAPI_PRINTK(format, a...) printf(format, ## a) 51626373Sdfr#else 51726373Sdfr#define AGTIAPI_PRINTK(format, a...) 51826373Sdfr#endif 51926373Sdfr 52026373Sdfr#ifdef AGTIAPI_INIT_DEBUG 52145676Sbde#define AGTIAPI_INIT(format, a...) printf(format, ## a) 52226373Sdfr/* to avoid losing the logs */ 52337051Sbde#define AGTIAPI_INIT_MDELAY(dly) mdelay(dly) 52428921Sfsmp#else 52528921Sfsmp#define AGTIAPI_INIT(format, a...) 52628921Sfsmp#define AGTIAPI_INIT_MDELAY(dly) 52728921Sfsmp#endif 52828921Sfsmp 52934021Stegge#ifdef AGTIAPI_INIT2_DEBUG 53034021Stegge#define AGTIAPI_INIT2(format, a...) printf(format, ## a) 53134021Stegge#else 53226373Sdfr#define AGTIAPI_INIT2(format, a...) 53326373Sdfr#endif 53428921Sfsmp 53526373Sdfr#ifdef AGTIAPI_INIT_MEM_DEBUG 53626373Sdfr#define AGTIAPI_INITMEM(format, a...) printf(format, ## a) 53726373Sdfr#else 53845897Speter#define AGTIAPI_INITMEM(format, a...) 53967551Sjhb#endif 54065822Sjhb 54165557Sjasone#ifdef AGTIAPI_IO_DEBUG 54245897Speter#define AGTIAPI_IO(format, a...) printf(format, ## a) 54365822Sjhb#else 54467551Sjhb#define AGTIAPI_IO(format, a...) 54567551Sjhb#endif 54665557Sjasone 54765557Sjasone#ifdef AGTIAPI_LOAD_DELAY 54845897Speter#define AGTIAPI_INIT_DELAY(delay_time) \ 54965557Sjasone { \ 55065557Sjasone agtiapi_DelayMSec(delay_time); \ 55165557Sjasone } 55265557Sjasone#else 55365557Sjasone#define AGTIAPI_INIT_DELAY(delay_time) 55469781Sdwmalone#endif 55569781Sdwmalone 55665557Sjasone/* 55765557Sjasone * AGTIAPI_KDB() will be used to drop into kernel debugger 55865557Sjasone * from driver code if kdb is involved. 55965557Sjasone */ 56045897Speter#ifdef AGTIAPI_KDB_ENABLE 56165557Sjasone#define AGTIAPI_KDB() KDB_ENTER() 56265557Sjasone#else 56365557Sjasone#define AGTIAPI_KDB() 56465557Sjasone#endif 56565557Sjasone 56665557Sjasone#if (BITS_PER_LONG == 64) 56765557Sjasone//#if 1 56865557Sjasone#define LOW_32_BITS(addr) (U32)(addr & 0xffffffff) 56965557Sjasone#define HIGH_32_BITS(addr) (U32)((addr >> 32) & 0xffffffff) 57065557Sjasone#else 57165557Sjasone#define LOW_32_BITS(addr) (U32)addr 57265557Sjasone#define HIGH_32_BITS(addr) 0 57365557Sjasone#endif 57465557Sjasone 57565557Sjasone#define AG_SWAP16(data) (((data<<8) & 0xFF00) | (data>>8)) 57665557Sjasone#define AG_SWAP24(data) (((data<<16) & 0xFF0000) | \ 57765557Sjasone ((data>>16) & 0xFF) | (data & 0xFF00)) 57865557Sjasone#define AG_SWAP32(data) ((data<<24) | ((data<<8) & 0xFF0000) | \ 57971337Sjake ((data>>8) & 0xFF00) | (data>>24)) 58065557Sjasone 58165557Sjasone#define AG_PCI_DEV_INFO(pdev) ( \ 58245897Speter AGTIAPI_PRINTK("vendor id 0x%x device id 0x%x, slot %d, function %d\n", \ 58365557Sjasone pdev->vendor, pdev->device, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)) \ 58465557Sjasone ) 58565557Sjasone 58665557Sjasone#define COUNT(arr) (sizeof(arr) / sizeof(arr[0])) 58765557Sjasone 58865557Sjasone#define PORTAL_CONTEXT_TO_PORTALDATA(pPortalContext) \ 58965557Sjasone ((ag_portal_data_t *)(((tiPortalContext_t *)pPortalContext)->osData)) 59045897Speter#define PORTAL_STATUS(pPortalData) (pPortalData->portalInfo.portStatus) 59145897Speter 59265557Sjasone#if (defined(DEFINE_OSTI_PORT_EVENT_IN_IBE)) || \ 59365557Sjasone (defined(DEFINE_OSTI_PORT_EVENT_IN_TFE)) 59465557Sjasone#define TIROOT_TO_CARD(ptiRoot) \ 59565557Sjasone ((ag_card_t *)(((appRoot_t *)(ptiRoot->osData))->oscData)) 59645897Speter#define TIROOT_TO_CARDINFO(ptiRoot) (TIROOT_TO_CARD(ptiRoot)->pCardInfo) 59765557Sjasone#define TIROOT_TO_PCIDEV(ptiRoot) (TIROOT_TO_CARDINFO(ptiRoot)->pPCIDev) 59865557Sjasone#else 59945897Speter 60065557Sjasone#define TIROOT_TO_CARD(ptiRoot) ((struct agtiapi_softc *)(ptiRoot->osData)) 60167551Sjhb#define TIROOT_TO_CARDINFO(ptiRoot) (TIROOT_TO_CARD(ptiRoot)->pCardInfo) 60265557Sjasone#define TIROOT_TO_PCIDEV(ptiRoot) (TIROOT_TO_CARD(ptiRoot)->my_dev) 60365557Sjasone 60465557Sjasone#endif 60565557Sjasone 60665557Sjasone 60765557Sjasone#define Is_ADP7H(pmsc) ((0x90058088 == (pmsc->VidDid))?1:\ 60865557Sjasone (0x90058089 == (pmsc->VidDid))?1:0) 60965557Sjasone#define Is_ADP8H(pmsc) ((0x90058074 == (pmsc->VidDid))?1:\ 61067551Sjhb (0x90058076 == (pmsc->VidDid))?1:0) 61165557Sjasone 61265557Sjasone 61365557Sjasone#define __cacheline_aligned __attribute__((__aligned__(CACHE_LINE_SIZE))) 61465557Sjasone 61565557Sjasone/* 61665557Sjasone** link data, need to be included at the start (offset 0) 61767551Sjhb** of any strutures that are to be stored in the link list 61845897Speter*/ 61965557Sjasonetypedef struct _LINK_NODE 62065557Sjasone{ 62165557Sjasone struct _LINK_NODE *pNext; 62265557Sjasone struct _LINK_NODE *pPrev; 62365557Sjasone 62465557Sjasone /* 62565557Sjasone ** for assertion purpose only 62665557Sjasone */ 62765557Sjasone struct _LINK_NODE * pHead; // track the link list the link is a member of 62845897Speter void * pad; 62969781Sdwmalone 63065557Sjasone} LINK_NODE, * PLINK_NODE __cacheline_aligned; 63145897Speter 63245897Speter 63367551Sjhb/* 63467551Sjhb** link list basic pointers 63567551Sjhb*/ 63667551Sjhbtypedef struct _LINK_LIST 63745897Speter{ 63867551Sjhb PLINK_NODE pHead; 63967551Sjhb bit32 Count; 64045897Speter LINK_NODE Head __cacheline_aligned; // allways one link to speed up insert&rm 64165557Sjasone} LINK_LIST, * PLINK_LIST __cacheline_aligned; 64245897Speter 64367551Sjhb 64445897Speter/******************************************************************** 64565557Sjasone** MACROS 64665557Sjasone********************************************************************/ 64767551Sjhb/******************************************************************************* 64867551Sjhb** 64945897Speter** MODULE NAME: comListInitialize 65067732Sjhb** 65145897Speter** PURPOSE: Initialize a link list. 65267551Sjhb** 65345897Speter** PARAMETERS: PLINK_LIST OUT - Link list definition. 65467732Sjhb** 65545897Speter** SIDE EFFECTS & CAVEATS: 65665557Sjasone** 65765557Sjasone** ALGORITHM: 65867551Sjhb** 65967551Sjhb*******************************************************************************/ 66067551Sjhb#define comListInitialize(pList) {(pList)->pHead = &((pList)->Head); \ 66165557Sjasone (pList)->pHead->pNext = (pList)->pHead; \ 66265557Sjasone (pList)->pHead->pPrev = (pList)->pHead; \ 66367551Sjhb (pList)->Count = 0; \ 66445897Speter } 66545897Speter 66645897Speter/******************************************************************************* 66745897Speter** 66865557Sjasone** MODULE NAME: comLinkInitialize 66965557Sjasone** 67065557Sjasone** PURPOSE: Initialize a link. 67145897Speter** This function should be used to initialize a new link before it 67265557Sjasone** is used in the linked list. This will initialize the link so 67365557Sjasone** the assertion will work 67465557Sjasone** 67545897Speter** PARAMETERS: PLINK_NODE IN - Link to be initialized. 67645897Speter** 67745897Speter** SIDE EFFECTS & CAVEATS: 67867551Sjhb** 67945897Speter** ALGORITHM: 68065822Sjhb** 68167551Sjhb*******************************************************************************/ 68245897Speter 68345897Speter#define comLinkInitialize(pLink) { (pLink)->pHead = NULL; \ 68445897Speter (pLink)->pNext = NULL; \ 68567551Sjhb (pLink)->pPrev = NULL; \ 68665557Sjasone } 68745897Speter 68865557Sjasone/******************************************************************************* 68967551Sjhb** 69065557Sjasone** MODULE NAME: comListAdd 69165557Sjasone** 69267551Sjhb** PURPOSE: add a link at the tail of the list 69367551Sjhb** 69467551Sjhb** PARAMETERS: PLINK_LIST OUT - Link list definition. 69567551Sjhb** PLINK_NODE IN - Link to be inserted. 69667551Sjhb** 69767551Sjhb** SIDE EFFECTS & CAVEATS: 69865557Sjasone** !!! assumes that fcllistInitialize has been called on the linklist 69967361Sjhb** !!! if not, this function behavior is un-predictable 70067551Sjhb** 70167361Sjhb** ALGORITHM: 70267361Sjhb** 70367563Sps*******************************************************************************/ 70467563Sps#define comListAdd(pList, pLink) { \ 70567563Sps (pLink)->pNext = (pList)->pHead; \ 70671739Sjake (pLink)->pPrev = (pList)->pHead->pPrev; \ 70767563Sps (pLink)->pPrev->pNext = (pLink); \ 70867563Sps (pList)->pHead->pPrev = (pLink); \ 70967563Sps (pList)->Count ++; \ 71067563Sps (pLink)->pHead = (pList)->pHead; \ 71167563Sps } 71267563Sps 71367563Sps/******************************************************************************* 71467563Sps** 71567563Sps** MODULE NAME: comListInsert 71667563Sps** 71767361Sjhb** PURPOSE: insert a link preceding the given one 71867361Sjhb** 71971090Sjhb** PARAMETERS: PLINK_LIST OUT - Link list definition. 72045897Speter** PLINK_NODE IN - Link to be inserted after. 72145897Speter** PLINK_NODE IN - Link to be inserted. 72245897Speter** 723** SIDE EFFECTS & CAVEATS: 724** !!! assumes that fcllistInitialize has been called on the linklist 725** !!! if not, this function behavior is un-predictable 726** 727** ALGORITHM: 728** 729*******************************************************************************/ 730 731#define comListInsert(pList, pLink, pNew) { \ 732 (pNew)->pNext = (pLink); \ 733 (pNew)->pPrev = (pLink)->pPrev; \ 734 (pNew)->pPrev->pNext = (pNew); \ 735 (pLink)->pPrev = (pNew); \ 736 (pList)->Count ++; \ 737 (pNew)->pHead = (pList)->pHead; \ 738 } 739 740/******************************************************************************* 741** 742** MODULE NAME: comListRemove 743** 744** PURPOSE: remove the link from the list. 745** 746** PARAMETERS: PLINK_LIST OUT - Link list definition. 747** PLINK_NODE IN - Link to delet from list 748** 749** SIDE EFFECTS & CAVEATS: 750** !!! assumes that fcllistInitialize has been called on the linklist 751** !!! if not, this function behavior is un-predictable 752** 753** !!! No validation is made on the list or the validity of the link 754** !!! the caller must make sure that the link is in the list 755** 756** 757** ALGORITHM: 758** 759*******************************************************************************/ 760#define comListRemove(pList, pLink) { \ 761 (pLink)->pPrev->pNext = (pLink)->pNext; \ 762 (pLink)->pNext->pPrev = (pLink)->pPrev; \ 763 (pLink)->pHead = NULL; \ 764 (pList)->Count --; \ 765 } 766 767/******************************************************************************* 768** 769** MODULE NAME: comListGetHead 770** 771** PURPOSE: get the link following the head link. 772** 773** PARAMETERS: PLINK_LIST OUT - Link list definition. 774** RETURNS - PLINK_NODE the link following the head 775** NULL if the following link is the head 776** 777** SIDE EFFECTS & CAVEATS: 778** !!! assumes that fcllistInitialize has been called on the linklist 779** !!! if not, this function behavior is un-predictable 780** 781** ALGORITHM: 782** 783*******************************************************************************/ 784#define comListGetHead(pList) comListGetNext(pList,(pList)->pHead) 785 786/******************************************************************************* 787** 788** MODULE NAME: comListGetTail 789** 790** PURPOSE: get the link preceding the tail link. 791** 792** PARAMETERS: PLINK_LIST OUT - Link list definition. 793** RETURNS - PLINK_NODE the link preceding the head 794** NULL if the preceding link is the head 795** 796** SIDE EFFECTS & CAVEATS: 797** 798** ALGORITHM: 799** 800*******************************************************************************/ 801#define comListGetTail(pList) comListGetPrev((pList), (pList)->pHead) 802 803/******************************************************************************* 804** 805** MODULE NAME: comListGetCount 806** 807** PURPOSE: get the number of links in the list excluding head and tail. 808** 809** PARAMETERS: LINK_LIST OUT - Link list definition. 810** 811** SIDE EFFECTS & CAVEATS: 812** !!! assumes that fcllistInitialize has been called on the linklist 813** !!! if not, this function behavior is un-predictable 814** 815** ALGORITHM: 816** 817*******************************************************************************/ 818 819#define comListGetCount(pList) ((pList)->Count) 820 821 822 823/******************************************************************************* 824** 825** MODULE NAME: comListGetNext 826** 827** PURPOSE: get the next link in the list. (one toward tail) 828** 829** PARAMETERS: PLINK_LIST OUT - Link list definition. 830** PLINK_NODE IN - Link to get next to 831** 832** return PLINK - points to next link 833** NULL if next link is head 834** 835** SIDE EFFECTS & CAVEATS: 836** !!! assumes that fcllistInitialize has been called on the linklist 837** !!! if not, this function behavior is un-predictable 838** 839** !!! No validation is made on the list or the validity of the link 840** !!! the caller must make sure that the link is in the list 841** 842** ALGORITHM: 843** 844*******************************************************************************/ 845 846#define comListGetNext(pList, pLink) (((pLink)->pNext == (pList)->pHead) ? \ 847 NULL : (pLink)->pNext) 848 849 850/******************************************************************************* 851** 852** MODULE NAME: comListGetPrev 853** 854** PURPOSE: get the previous link in the list. (one toward head) 855** 856** PARAMETERS: PLINK_LIST OUT - Link list definition. 857** PLINK_NODE IN - Link to get prev to 858** 859** return PLINK - points to previous link 860** NULL if previous link is head 861** 862** SIDE EFFECTS & CAVEATS: 863** !!! assumes that fcllistInitialize has been called on the linklist 864** !!! if not, this function behavior is un-predictable 865** 866** !!! No validation is made on the list or the validity of the link 867** !!! the caller must make sure that the link is in the list 868** 869** ALGORITHM: 870** 871*******************************************************************************/ 872 873/*lint -emacro(613,fiLlistGetPrev) */ 874 875#define comListGetPrev(pList, pLink) (((pLink)->pPrev == (pList)->pHead) ? \ 876 NULL : (pLink)->pPrev) 877 878#define AGT_INTERRUPT IRQF_DISABLED 879#define AGT_SAMPLE_RANDOM IRQF_SAMPLE_RANDOM 880#define AGT_SHIRQ IRQF_SHARED 881#define AGT_PROBEIRQ IRQF_PROBE_SHARED 882#define AGT_PERCPU IRQF_PERCPU 883 884 885#include "lxproto.h" 886 887