pci_subr.c revision 223520
1/*- 2 * Copyright (c) 2011 Advanced Computing Technologies LLC 3 * Written by: John H. Baldwin <jhb@FreeBSD.org> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> 29__FBSDID("$FreeBSD: head/sys/dev/pci/pci_subr.c 223520 2011-06-24 21:39:38Z jhb $"); 30 31/* 32 * Support APIs for Host to PCI bridge drivers and drivers that 33 * provide PCI domains. 34 */ 35 36#include <sys/types.h> 37#include <sys/bus.h> 38#include <sys/rman.h> 39 40#include <dev/pci/pcireg.h> 41#include <dev/pci/pcivar.h> 42#include <dev/pci/pcib_private.h> 43 44/* 45 * Try to read the bus number of a host-PCI bridge using appropriate config 46 * registers. 47 */ 48int 49host_pcib_get_busno(pci_read_config_fn read_config, int bus, int slot, int func, 50 uint8_t *busnum) 51{ 52 uint32_t id; 53 54 id = read_config(bus, slot, func, PCIR_DEVVENDOR, 4); 55 if (id == 0xffffffff) 56 return (0); 57 58 switch (id) { 59 case 0x12258086: 60 /* Intel 824?? */ 61 /* XXX This is a guess */ 62 /* *busnum = read_config(bus, slot, func, 0x41, 1); */ 63 *busnum = bus; 64 break; 65 case 0x84c48086: 66 /* Intel 82454KX/GX (Orion) */ 67 *busnum = read_config(bus, slot, func, 0x4a, 1); 68 break; 69 case 0x84ca8086: 70 /* 71 * For the 450nx chipset, there is a whole bundle of 72 * things pretending to be host bridges. The MIOC will 73 * be seen first and isn't really a pci bridge (the 74 * actual busses are attached to the PXB's). We need to 75 * read the registers of the MIOC to figure out the 76 * bus numbers for the PXB channels. 77 * 78 * Since the MIOC doesn't have a pci bus attached, we 79 * pretend it wasn't there. 80 */ 81 return (0); 82 case 0x84cb8086: 83 switch (slot) { 84 case 0x12: 85 /* Intel 82454NX PXB#0, Bus#A */ 86 *busnum = read_config(bus, 0x10, func, 0xd0, 1); 87 break; 88 case 0x13: 89 /* Intel 82454NX PXB#0, Bus#B */ 90 *busnum = read_config(bus, 0x10, func, 0xd1, 1) + 1; 91 break; 92 case 0x14: 93 /* Intel 82454NX PXB#1, Bus#A */ 94 *busnum = read_config(bus, 0x10, func, 0xd3, 1); 95 break; 96 case 0x15: 97 /* Intel 82454NX PXB#1, Bus#B */ 98 *busnum = read_config(bus, 0x10, func, 0xd4, 1) + 1; 99 break; 100 } 101 break; 102 103 /* ServerWorks -- vendor 0x1166 */ 104 case 0x00051166: 105 case 0x00061166: 106 case 0x00081166: 107 case 0x00091166: 108 case 0x00101166: 109 case 0x00111166: 110 case 0x00171166: 111 case 0x01011166: 112 case 0x010f1014: 113 case 0x01101166: 114 case 0x02011166: 115 case 0x02251166: 116 case 0x03021014: 117 *busnum = read_config(bus, slot, func, 0x44, 1); 118 break; 119 120 /* Compaq/HP -- vendor 0x0e11 */ 121 case 0x60100e11: 122 *busnum = read_config(bus, slot, func, 0xc8, 1); 123 break; 124 default: 125 /* Don't know how to read bus number. */ 126 return 0; 127 } 128 129 return 1; 130} 131