pci_subr.c revision 189844
169783Smsmith/*- 269783Smsmith * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 369783Smsmith * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 469783Smsmith * Copyright (c) 2000 BSDi 569783Smsmith * All rights reserved. 669783Smsmith * 769783Smsmith * Redistribution and use in source and binary forms, with or without 869783Smsmith * modification, are permitted provided that the following conditions 969783Smsmith * are met: 1069783Smsmith * 1. Redistributions of source code must retain the above copyright 1169783Smsmith * notice, this list of conditions and the following disclaimer. 1269783Smsmith * 2. Redistributions in binary form must reproduce the above copyright 1369783Smsmith * notice, this list of conditions and the following disclaimer in the 1469783Smsmith * documentation and/or other materials provided with the distribution. 1569783Smsmith * 3. The name of the author may not be used to endorse or promote products 1669783Smsmith * derived from this software without specific prior written permission. 1769783Smsmith * 1869783Smsmith * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1969783Smsmith * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2069783Smsmith * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2169783Smsmith * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2269783Smsmith * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2369783Smsmith * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2469783Smsmith * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2569783Smsmith * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2669783Smsmith * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2769783Smsmith * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2869783Smsmith * SUCH DAMAGE. 2969783Smsmith */ 3069783Smsmith 31119418Sobrien#include <sys/cdefs.h> 32119418Sobrien__FBSDID("$FreeBSD: head/sys/dev/pci/pci_pci.c 189844 2009-03-15 06:40:57Z imp $"); 33119418Sobrien 3469783Smsmith/* 3569783Smsmith * PCI:PCI bridge support. 3669783Smsmith */ 3769783Smsmith 3869783Smsmith#include <sys/param.h> 3969783Smsmith#include <sys/systm.h> 4069783Smsmith#include <sys/kernel.h> 41129876Sphk#include <sys/module.h> 4269783Smsmith#include <sys/bus.h> 43107546Simp#include <machine/bus.h> 44107546Simp#include <sys/rman.h> 45106844Smdodd#include <sys/sysctl.h> 4669783Smsmith 4769783Smsmith#include <machine/resource.h> 4869783Smsmith 49119285Simp#include <dev/pci/pcivar.h> 50119285Simp#include <dev/pci/pcireg.h> 51119285Simp#include <dev/pci/pcib_private.h> 5269783Smsmith 5369783Smsmith#include "pcib_if.h" 5469783Smsmith 5569783Smsmithstatic int pcib_probe(device_t dev); 5669783Smsmith 5769783Smsmithstatic device_method_t pcib_methods[] = { 5869783Smsmith /* Device interface */ 5969783Smsmith DEVMETHOD(device_probe, pcib_probe), 6069783Smsmith DEVMETHOD(device_attach, pcib_attach), 61145661Simp DEVMETHOD(device_detach, bus_generic_detach), 6269783Smsmith DEVMETHOD(device_shutdown, bus_generic_shutdown), 6369783Smsmith DEVMETHOD(device_suspend, bus_generic_suspend), 6469783Smsmith DEVMETHOD(device_resume, bus_generic_resume), 6569783Smsmith 6669783Smsmith /* Bus interface */ 6769783Smsmith DEVMETHOD(bus_print_child, bus_generic_print_child), 6869783Smsmith DEVMETHOD(bus_read_ivar, pcib_read_ivar), 6969783Smsmith DEVMETHOD(bus_write_ivar, pcib_write_ivar), 7069783Smsmith DEVMETHOD(bus_alloc_resource, pcib_alloc_resource), 7169783Smsmith DEVMETHOD(bus_release_resource, bus_generic_release_resource), 7269783Smsmith DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 7369783Smsmith DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 7469783Smsmith DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 7569783Smsmith DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 7669783Smsmith 7769783Smsmith /* pcib interface */ 7869783Smsmith DEVMETHOD(pcib_maxslots, pcib_maxslots), 7969783Smsmith DEVMETHOD(pcib_read_config, pcib_read_config), 8069783Smsmith DEVMETHOD(pcib_write_config, pcib_write_config), 8169783Smsmith DEVMETHOD(pcib_route_interrupt, pcib_route_interrupt), 82164264Sjhb DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi), 83164264Sjhb DEVMETHOD(pcib_release_msi, pcib_release_msi), 84164264Sjhb DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix), 85164264Sjhb DEVMETHOD(pcib_release_msix, pcib_release_msix), 86169221Sjhb DEVMETHOD(pcib_map_msi, pcib_map_msi), 8769783Smsmith 8869783Smsmith { 0, 0 } 8969783Smsmith}; 9069783Smsmith 91154079Sjhbstatic devclass_t pcib_devclass; 9269783Smsmith 93154079SjhbDEFINE_CLASS_0(pcib, pcib_driver, pcib_methods, sizeof(struct pcib_softc)); 9469783SmsmithDRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, 0, 0); 9569783Smsmith 9669783Smsmith/* 97163805Simp * Is the prefetch window open (eg, can we allocate memory in it?) 98163805Simp */ 99163805Simpstatic int 100163805Simppcib_is_prefetch_open(struct pcib_softc *sc) 101163805Simp{ 102163805Simp return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit); 103163805Simp} 104163805Simp 105163805Simp/* 106163805Simp * Is the nonprefetch window open (eg, can we allocate memory in it?) 107163805Simp */ 108163805Simpstatic int 109163805Simppcib_is_nonprefetch_open(struct pcib_softc *sc) 110163805Simp{ 111163805Simp return (sc->membase > 0 && sc->membase < sc->memlimit); 112163805Simp} 113163805Simp 114163805Simp/* 115163805Simp * Is the io window open (eg, can we allocate ports in it?) 116163805Simp */ 117163805Simpstatic int 118163805Simppcib_is_io_open(struct pcib_softc *sc) 119163805Simp{ 120163805Simp return (sc->iobase > 0 && sc->iobase < sc->iolimit); 121163805Simp} 122163805Simp 123163805Simp/* 12469783Smsmith * Generic device interface 12569783Smsmith */ 12669783Smsmithstatic int 12769783Smsmithpcib_probe(device_t dev) 12869783Smsmith{ 12969783Smsmith if ((pci_get_class(dev) == PCIC_BRIDGE) && 13069783Smsmith (pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) { 13169783Smsmith device_set_desc(dev, "PCI-PCI bridge"); 13269783Smsmith return(-10000); 13369783Smsmith } 13469783Smsmith return(ENXIO); 13569783Smsmith} 13669783Smsmith 137102441Sjhbvoid 138102441Sjhbpcib_attach_common(device_t dev) 13969783Smsmith{ 14069783Smsmith struct pcib_softc *sc; 141119266Simp uint8_t iolow; 142181789Simp struct sysctl_ctx_list *sctx; 143181789Simp struct sysctl_oid *soid; 14469783Smsmith 14569783Smsmith sc = device_get_softc(dev); 14669783Smsmith sc->dev = dev; 14769783Smsmith 14869908Smsmith /* 14969908Smsmith * Get current bridge configuration. 15069908Smsmith */ 15169953Smsmith sc->command = pci_read_config(dev, PCIR_COMMAND, 1); 152172394Smarius sc->domain = pci_get_domain(dev); 153181789Simp sc->pribus = pci_read_config(dev, PCIR_PRIBUS_1, 1); 15469908Smsmith sc->secbus = pci_read_config(dev, PCIR_SECBUS_1, 1); 15569908Smsmith sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1); 15669908Smsmith sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2); 15769908Smsmith sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2); 15869908Smsmith sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1); 15969783Smsmith 16069908Smsmith /* 161181789Simp * Setup sysctl reporting nodes 162181789Simp */ 163181789Simp sctx = device_get_sysctl_ctx(dev); 164181789Simp soid = device_get_sysctl_tree(dev); 165181789Simp SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain", 166182706Simp CTLFLAG_RD, &sc->domain, 0, "Domain number"); 167181789Simp SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus", 168182706Simp CTLFLAG_RD, &sc->pribus, 0, "Primary bus number"); 169181789Simp SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus", 170182706Simp CTLFLAG_RD, &sc->secbus, 0, "Secondary bus number"); 171181789Simp SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus", 172182706Simp CTLFLAG_RD, &sc->subbus, 0, "Subordinate bus number"); 173181789Simp 174181789Simp /* 17569908Smsmith * Determine current I/O decode. 17669908Smsmith */ 17769953Smsmith if (sc->command & PCIM_CMD_PORTEN) { 17869953Smsmith iolow = pci_read_config(dev, PCIR_IOBASEL_1, 1); 17969953Smsmith if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) { 18069953Smsmith sc->iobase = PCI_PPBIOBASE(pci_read_config(dev, PCIR_IOBASEH_1, 2), 18169953Smsmith pci_read_config(dev, PCIR_IOBASEL_1, 1)); 18269953Smsmith } else { 18369953Smsmith sc->iobase = PCI_PPBIOBASE(0, pci_read_config(dev, PCIR_IOBASEL_1, 1)); 18469953Smsmith } 18569908Smsmith 18669953Smsmith iolow = pci_read_config(dev, PCIR_IOLIMITL_1, 1); 18769953Smsmith if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) { 18869953Smsmith sc->iolimit = PCI_PPBIOLIMIT(pci_read_config(dev, PCIR_IOLIMITH_1, 2), 18969953Smsmith pci_read_config(dev, PCIR_IOLIMITL_1, 1)); 19069953Smsmith } else { 19169953Smsmith sc->iolimit = PCI_PPBIOLIMIT(0, pci_read_config(dev, PCIR_IOLIMITL_1, 1)); 19269953Smsmith } 19369908Smsmith } 19469908Smsmith 19569908Smsmith /* 19669908Smsmith * Determine current memory decode. 19769908Smsmith */ 19869953Smsmith if (sc->command & PCIM_CMD_MEMEN) { 19969953Smsmith sc->membase = PCI_PPBMEMBASE(0, pci_read_config(dev, PCIR_MEMBASE_1, 2)); 20069953Smsmith sc->memlimit = PCI_PPBMEMLIMIT(0, pci_read_config(dev, PCIR_MEMLIMIT_1, 2)); 201181934Sjhb iolow = pci_read_config(dev, PCIR_PMBASEL_1, 1); 202181934Sjhb if ((iolow & PCIM_BRPM_MASK) == PCIM_BRPM_64) 203181934Sjhb sc->pmembase = PCI_PPBMEMBASE( 204181934Sjhb pci_read_config(dev, PCIR_PMBASEH_1, 4), 205181934Sjhb pci_read_config(dev, PCIR_PMBASEL_1, 2)); 206181934Sjhb else 207181934Sjhb sc->pmembase = PCI_PPBMEMBASE(0, 208181934Sjhb pci_read_config(dev, PCIR_PMBASEL_1, 2)); 209181934Sjhb iolow = pci_read_config(dev, PCIR_PMLIMITL_1, 1); 210181934Sjhb if ((iolow & PCIM_BRPM_MASK) == PCIM_BRPM_64) 211181934Sjhb sc->pmemlimit = PCI_PPBMEMLIMIT( 212181934Sjhb pci_read_config(dev, PCIR_PMLIMITH_1, 4), 213181934Sjhb pci_read_config(dev, PCIR_PMLIMITL_1, 2)); 214181934Sjhb else 215181934Sjhb sc->pmemlimit = PCI_PPBMEMLIMIT(0, 216181934Sjhb pci_read_config(dev, PCIR_PMLIMITL_1, 2)); 21769953Smsmith } 21869908Smsmith 21969908Smsmith /* 22069908Smsmith * Quirk handling. 22169908Smsmith */ 22269908Smsmith switch (pci_get_devid(dev)) { 223124365Simp case 0x12258086: /* Intel 82454KX/GX (Orion) */ 22469908Smsmith { 225119266Simp uint8_t supbus; 22669908Smsmith 22769908Smsmith supbus = pci_read_config(dev, 0x41, 1); 22869908Smsmith if (supbus != 0xff) { 22969908Smsmith sc->secbus = supbus + 1; 23069908Smsmith sc->subbus = supbus + 1; 23169908Smsmith } 232124365Simp break; 23369908Smsmith } 234124365Simp 235124365Simp /* 236124365Simp * The i82380FB mobile docking controller is a PCI-PCI bridge, 237124365Simp * and it is a subtractive bridge. However, the ProgIf is wrong 238124365Simp * so the normal setting of PCIB_SUBTRACTIVE bit doesn't 239124365Simp * happen. There's also a Toshiba bridge that behaves this 240124365Simp * way. 241124365Simp */ 242124365Simp case 0x124b8086: /* Intel 82380FB Mobile */ 243124365Simp case 0x060513d7: /* Toshiba ???? */ 244124365Simp sc->flags |= PCIB_SUBTRACTIVE; 24569908Smsmith break; 246149521Sjkim 247149521Sjkim /* Compaq R3000 BIOS sets wrong subordinate bus number. */ 248149521Sjkim case 0x00dd10de: 249149521Sjkim { 250149521Sjkim char *cp; 251149521Sjkim 252157949Sjkim if ((cp = getenv("smbios.planar.maker")) == NULL) 253149521Sjkim break; 254157949Sjkim if (strncmp(cp, "Compal", 6) != 0) { 255157949Sjkim freeenv(cp); 256149521Sjkim break; 257157949Sjkim } 258157949Sjkim freeenv(cp); 259157949Sjkim if ((cp = getenv("smbios.planar.product")) == NULL) 260157949Sjkim break; 261157949Sjkim if (strncmp(cp, "08A0", 4) != 0) { 262157949Sjkim freeenv(cp); 263157949Sjkim break; 264157949Sjkim } 265157949Sjkim freeenv(cp); 266149521Sjkim if (sc->subbus < 0xa) { 267149521Sjkim pci_write_config(dev, PCIR_SUBBUS_1, 0xa, 1); 268149521Sjkim sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1); 269149521Sjkim } 270149521Sjkim break; 271149521Sjkim } 27269908Smsmith } 27369908Smsmith 274165995Sjhb if (pci_msi_device_blacklisted(dev)) 275165995Sjhb sc->flags |= PCIB_DISABLE_MSI; 276165995Sjhb 277124365Simp /* 278124365Simp * Intel 815, 845 and other chipsets say they are PCI-PCI bridges, 279124365Simp * but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM, 280124365Simp * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese. 281124365Simp * This means they act as if they were subtractively decoding 282124365Simp * bridges and pass all transactions. Mark them and real ProgIf 1 283124365Simp * parts as subtractive. 284124365Simp */ 285124365Simp if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 || 286168157Sjhb pci_read_config(dev, PCIR_PROGIF, 1) == PCIP_BRIDGE_PCI_SUBTRACTIVE) 287124365Simp sc->flags |= PCIB_SUBTRACTIVE; 288124365Simp 28969783Smsmith if (bootverbose) { 290172394Smarius device_printf(dev, " domain %d\n", sc->domain); 29169783Smsmith device_printf(dev, " secondary bus %d\n", sc->secbus); 29269783Smsmith device_printf(dev, " subordinate bus %d\n", sc->subbus); 29369783Smsmith device_printf(dev, " I/O decode 0x%x-0x%x\n", sc->iobase, sc->iolimit); 294163805Simp if (pcib_is_nonprefetch_open(sc)) 295163805Simp device_printf(dev, " memory decode 0x%jx-0x%jx\n", 296163805Simp (uintmax_t)sc->membase, (uintmax_t)sc->memlimit); 297163805Simp if (pcib_is_prefetch_open(sc)) 298163805Simp device_printf(dev, " prefetched decode 0x%jx-0x%jx\n", 299163805Simp (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit); 300163805Simp else 301163805Simp device_printf(dev, " no prefetched decode\n"); 302124365Simp if (sc->flags & PCIB_SUBTRACTIVE) 303124365Simp device_printf(dev, " Subtractively decoded bridge.\n"); 30469783Smsmith } 30569783Smsmith 30669783Smsmith /* 30769783Smsmith * XXX If the secondary bus number is zero, we should assign a bus number 308181798Simp * since the BIOS hasn't, then initialise the bridge. A simple 309181798Simp * bus_alloc_resource with the a couple of busses seems like the right 310181798Simp * approach, but we don't know what busses the BIOS might have already 311181798Simp * assigned to other bridges on this bus that probe later than we do. 312181798Simp * 313181798Simp * If the subordinate bus number is less than the secondary bus number, 31469783Smsmith * we should pick a better value. One sensible alternative would be to 31569783Smsmith * pick 255; the only tradeoff here is that configuration transactions 316181798Simp * would be more widely routed than absolutely necessary. We could 317181798Simp * then do a walk of the tree later and fix it. 31869783Smsmith */ 319102441Sjhb} 32069783Smsmith 321103042Sjhbint 322102441Sjhbpcib_attach(device_t dev) 323102441Sjhb{ 324102441Sjhb struct pcib_softc *sc; 325102441Sjhb device_t child; 326102441Sjhb 327102441Sjhb pcib_attach_common(dev); 328102441Sjhb sc = device_get_softc(dev); 32969783Smsmith if (sc->secbus != 0) { 330103016Sjhb child = device_add_child(dev, "pci", sc->secbus); 33169783Smsmith if (child != NULL) 33269783Smsmith return(bus_generic_attach(dev)); 333181798Simp } 33469783Smsmith 33569783Smsmith /* no secondary bus; we should have fixed this */ 33669783Smsmith return(0); 33769783Smsmith} 33869783Smsmith 339102441Sjhbint 34069783Smsmithpcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 34169783Smsmith{ 34269783Smsmith struct pcib_softc *sc = device_get_softc(dev); 34369783Smsmith 34469783Smsmith switch (which) { 345172394Smarius case PCIB_IVAR_DOMAIN: 346172394Smarius *result = sc->domain; 347172394Smarius return(0); 34869783Smsmith case PCIB_IVAR_BUS: 34969783Smsmith *result = sc->secbus; 35069783Smsmith return(0); 35169783Smsmith } 35269783Smsmith return(ENOENT); 35369783Smsmith} 35469783Smsmith 355102441Sjhbint 35669783Smsmithpcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 35769783Smsmith{ 35869783Smsmith struct pcib_softc *sc = device_get_softc(dev); 35969783Smsmith 36069783Smsmith switch (which) { 361172394Smarius case PCIB_IVAR_DOMAIN: 362172394Smarius return(EINVAL); 36369783Smsmith case PCIB_IVAR_BUS: 36469783Smsmith sc->secbus = value; 365172394Smarius return(0); 36669783Smsmith } 36769783Smsmith return(ENOENT); 36869783Smsmith} 36969783Smsmith 37069783Smsmith/* 37169783Smsmith * We have to trap resource allocation requests and ensure that the bridge 37269783Smsmith * is set up to, or capable of handling them. 37369783Smsmith */ 374102441Sjhbstruct resource * 37569783Smsmithpcib_alloc_resource(device_t dev, device_t child, int type, int *rid, 376142051Simp u_long start, u_long end, u_long count, u_int flags) 37769783Smsmith{ 378124365Simp struct pcib_softc *sc = device_get_softc(dev); 379164130Sjhb const char *name, *suffix; 380124365Simp int ok; 38169783Smsmith 38269783Smsmith /* 38369783Smsmith * Fail the allocation for this range if it's not supported. 38469783Smsmith */ 385164130Sjhb name = device_get_nameunit(child); 386164130Sjhb if (name == NULL) { 387164130Sjhb name = ""; 388164130Sjhb suffix = ""; 389164130Sjhb } else 390164130Sjhb suffix = " "; 39169783Smsmith switch (type) { 39269783Smsmith case SYS_RES_IOPORT: 393107546Simp ok = 0; 394124365Simp if (!pcib_is_io_open(sc)) 395124365Simp break; 396124365Simp ok = (start >= sc->iobase && end <= sc->iolimit); 397145652Smarcel 398145652Smarcel /* 399145652Smarcel * Make sure we allow access to VGA I/O addresses when the 400145652Smarcel * bridge has the "VGA Enable" bit set. 401145652Smarcel */ 402145652Smarcel if (!ok && pci_is_vga_ioport_range(start, end)) 403145652Smarcel ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0; 404145652Smarcel 405124365Simp if ((sc->flags & PCIB_SUBTRACTIVE) == 0) { 406124365Simp if (!ok) { 407124365Simp if (start < sc->iobase) 408124365Simp start = sc->iobase; 409124365Simp if (end > sc->iolimit) 410124365Simp end = sc->iolimit; 411142051Simp if (start < end) 412142051Simp ok = 1; 413124365Simp } 414106844Smdodd } else { 415124365Simp ok = 1; 416189844Simp#if 0 417189792Simp /* 418189792Simp * If we overlap with the subtractive range, then 419189792Simp * pick the upper range to use. 420189792Simp */ 421189792Simp if (start < sc->iolimit && end > sc->iobase) 422189792Simp start = sc->iolimit + 1; 423189844Simp#endif 424106844Smdodd } 425124365Simp if (end < start) { 426142051Simp device_printf(dev, "ioport: end (%lx) < start (%lx)\n", 427142051Simp end, start); 428124365Simp start = 0; 429124365Simp end = 0; 430124365Simp ok = 0; 431124365Simp } 432124365Simp if (!ok) { 433164130Sjhb device_printf(dev, "%s%srequested unsupported I/O " 434124365Simp "range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n", 435164130Sjhb name, suffix, start, end, sc->iobase, sc->iolimit); 436124365Simp return (NULL); 437124365Simp } 438124365Simp if (bootverbose) 439142051Simp device_printf(dev, 440164130Sjhb "%s%srequested I/O range 0x%lx-0x%lx: in range\n", 441164130Sjhb name, suffix, start, end); 442124365Simp break; 44369783Smsmith 44469783Smsmith case SYS_RES_MEMORY: 445107546Simp ok = 0; 446107546Simp if (pcib_is_nonprefetch_open(sc)) 447124365Simp ok = ok || (start >= sc->membase && end <= sc->memlimit); 448107546Simp if (pcib_is_prefetch_open(sc)) 449124365Simp ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit); 450145652Smarcel 451145652Smarcel /* 452145652Smarcel * Make sure we allow access to VGA memory addresses when the 453145652Smarcel * bridge has the "VGA Enable" bit set. 454145652Smarcel */ 455145652Smarcel if (!ok && pci_is_vga_memory_range(start, end)) 456145652Smarcel ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0; 457145652Smarcel 458124365Simp if ((sc->flags & PCIB_SUBTRACTIVE) == 0) { 459124365Simp if (!ok) { 460124365Simp ok = 1; 461124365Simp if (flags & RF_PREFETCHABLE) { 462124365Simp if (pcib_is_prefetch_open(sc)) { 463124365Simp if (start < sc->pmembase) 464124365Simp start = sc->pmembase; 465124365Simp if (end > sc->pmemlimit) 466124365Simp end = sc->pmemlimit; 467124365Simp } else { 468124365Simp ok = 0; 469124365Simp } 470124365Simp } else { /* non-prefetchable */ 471124365Simp if (pcib_is_nonprefetch_open(sc)) { 472124365Simp if (start < sc->membase) 473124365Simp start = sc->membase; 474124365Simp if (end > sc->memlimit) 475124365Simp end = sc->memlimit; 476124365Simp } else { 477124365Simp ok = 0; 478124365Simp } 479124365Simp } 480107546Simp } 481107546Simp } else if (!ok) { 482124365Simp ok = 1; /* subtractive bridge: always ok */ 483189844Simp#if 0 484124365Simp if (pcib_is_nonprefetch_open(sc)) { 485189792Simp if (start < sc->memlimit && end > sc->membase) 486189792Simp start = sc->memlimit + 1; 487124365Simp } 488124365Simp if (pcib_is_prefetch_open(sc)) { 489189792Simp if (start < sc->pmemlimit && end > sc->pmembase) 490189792Simp start = sc->pmemlimit + 1; 491124365Simp } 492189844Simp#endif 493106844Smdodd } 494124365Simp if (end < start) { 495142051Simp device_printf(dev, "memory: end (%lx) < start (%lx)\n", 496142051Simp end, start); 497124365Simp start = 0; 498124365Simp end = 0; 499124365Simp ok = 0; 500124365Simp } 501124365Simp if (!ok && bootverbose) 502124365Simp device_printf(dev, 503164130Sjhb "%s%srequested unsupported memory range %#lx-%#lx " 504163805Simp "(decoding %#jx-%#jx, %#jx-%#jx)\n", 505164130Sjhb name, suffix, start, end, 506163805Simp (uintmax_t)sc->membase, (uintmax_t)sc->memlimit, 507163805Simp (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit); 508124365Simp if (!ok) 509124365Simp return (NULL); 510124365Simp if (bootverbose) 511164130Sjhb device_printf(dev,"%s%srequested memory range " 512142051Simp "0x%lx-0x%lx: good\n", 513164130Sjhb name, suffix, start, end); 514124365Simp break; 51569908Smsmith 51669783Smsmith default: 517124365Simp break; 51869783Smsmith } 519124365Simp /* 520124365Simp * Bridge is OK decoding this resource, so pass it up. 521124365Simp */ 522142051Simp return (bus_generic_alloc_resource(dev, child, type, rid, start, end, 523142051Simp count, flags)); 52469783Smsmith} 52569783Smsmith 52669783Smsmith/* 52769783Smsmith * PCIB interface. 52869783Smsmith */ 529102441Sjhbint 53069783Smsmithpcib_maxslots(device_t dev) 53169783Smsmith{ 53269908Smsmith return(PCI_SLOTMAX); 53369783Smsmith} 53469783Smsmith 53569783Smsmith/* 53669783Smsmith * Since we are a child of a PCI bus, its parent must support the pcib interface. 53769783Smsmith */ 538119266Simpuint32_t 539189792Simppcib_read_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, int width) 54069783Smsmith{ 54169783Smsmith return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, width)); 54269783Smsmith} 54369783Smsmith 544102441Sjhbvoid 545189792Simppcib_write_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, uint32_t val, int width) 54669783Smsmith{ 54769783Smsmith PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, val, width); 54869783Smsmith} 54969783Smsmith 55069783Smsmith/* 55169783Smsmith * Route an interrupt across a PCI bridge. 55269783Smsmith */ 553109229Sbennoint 55469783Smsmithpcib_route_interrupt(device_t pcib, device_t dev, int pin) 55569783Smsmith{ 55669783Smsmith device_t bus; 55769783Smsmith int parent_intpin; 55869783Smsmith int intnum; 55969783Smsmith 56069783Smsmith /* 56169783Smsmith * 56269783Smsmith * The PCI standard defines a swizzle of the child-side device/intpin to 56369783Smsmith * the parent-side intpin as follows. 56469783Smsmith * 56569783Smsmith * device = device on child bus 56669783Smsmith * child_intpin = intpin on child bus slot (0-3) 56769783Smsmith * parent_intpin = intpin on parent bus slot (0-3) 56869783Smsmith * 56969783Smsmith * parent_intpin = (device + child_intpin) % 4 57069783Smsmith */ 571115234Sticso parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4; 57269783Smsmith 57369783Smsmith /* 57469783Smsmith * Our parent is a PCI bus. Its parent must export the pcib interface 57569783Smsmith * which includes the ability to route interrupts. 57669783Smsmith */ 57769783Smsmith bus = device_get_parent(pcib); 57869783Smsmith intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1); 579131398Sjhb if (PCI_INTERRUPT_VALID(intnum) && bootverbose) { 580102977Sjhb device_printf(pcib, "slot %d INT%c is routed to irq %d\n", 581102977Sjhb pci_get_slot(dev), 'A' + pin - 1, intnum); 58290554Smsmith } 58369783Smsmith return(intnum); 58469783Smsmith} 585107172Sjhb 586169221Sjhb/* Pass request to alloc MSI/MSI-X messages up to the parent bridge. */ 587164264Sjhbint 588164264Sjhbpcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs) 589164264Sjhb{ 590169902Sgallatin struct pcib_softc *sc = device_get_softc(pcib); 591164264Sjhb device_t bus; 592164264Sjhb 593165995Sjhb if (sc->flags & PCIB_DISABLE_MSI) 594165995Sjhb return (ENXIO); 595164264Sjhb bus = device_get_parent(pcib); 596164264Sjhb return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount, 597164264Sjhb irqs)); 598164264Sjhb} 599164264Sjhb 600169221Sjhb/* Pass request to release MSI/MSI-X messages up to the parent bridge. */ 601164264Sjhbint 602164264Sjhbpcib_release_msi(device_t pcib, device_t dev, int count, int *irqs) 603164264Sjhb{ 604164264Sjhb device_t bus; 605164264Sjhb 606164264Sjhb bus = device_get_parent(pcib); 607164264Sjhb return (PCIB_RELEASE_MSI(device_get_parent(bus), dev, count, irqs)); 608164264Sjhb} 609164264Sjhb 610164264Sjhb/* Pass request to alloc an MSI-X message up to the parent bridge. */ 611164264Sjhbint 612169221Sjhbpcib_alloc_msix(device_t pcib, device_t dev, int *irq) 613164264Sjhb{ 614169902Sgallatin struct pcib_softc *sc = device_get_softc(pcib); 615164264Sjhb device_t bus; 616164264Sjhb 617165995Sjhb if (sc->flags & PCIB_DISABLE_MSI) 618165995Sjhb return (ENXIO); 619164264Sjhb bus = device_get_parent(pcib); 620169221Sjhb return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq)); 621164264Sjhb} 622164264Sjhb 623169221Sjhb/* Pass request to release an MSI-X message up to the parent bridge. */ 624166176Sjhbint 625169221Sjhbpcib_release_msix(device_t pcib, device_t dev, int irq) 626166176Sjhb{ 627166176Sjhb device_t bus; 628166176Sjhb 629166176Sjhb bus = device_get_parent(pcib); 630169221Sjhb return (PCIB_RELEASE_MSIX(device_get_parent(bus), dev, irq)); 631166176Sjhb} 632166176Sjhb 633169221Sjhb/* Pass request to map MSI/MSI-X message up to parent bridge. */ 634164264Sjhbint 635169221Sjhbpcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr, 636169221Sjhb uint32_t *data) 637164264Sjhb{ 638164264Sjhb device_t bus; 639180753Sluoqi int error; 640164264Sjhb 641164264Sjhb bus = device_get_parent(pcib); 642180753Sluoqi error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data); 643180753Sluoqi if (error) 644180753Sluoqi return (error); 645180753Sluoqi 646180753Sluoqi pci_ht_map_msi(pcib, *addr); 647180753Sluoqi return (0); 648164264Sjhb} 649164264Sjhb 650107172Sjhb/* 651107172Sjhb * Try to read the bus number of a host-PCI bridge using appropriate config 652107172Sjhb * registers. 653107172Sjhb */ 654107172Sjhbint 655107172Sjhbhost_pcib_get_busno(pci_read_config_fn read_config, int bus, int slot, int func, 656119266Simp uint8_t *busnum) 657107172Sjhb{ 658119266Simp uint32_t id; 659107172Sjhb 660107172Sjhb id = read_config(bus, slot, func, PCIR_DEVVENDOR, 4); 661107248Sjhb if (id == 0xffffffff) 662107172Sjhb return (0); 663107172Sjhb 664107172Sjhb switch (id) { 665107172Sjhb case 0x12258086: 666107172Sjhb /* Intel 824?? */ 667107172Sjhb /* XXX This is a guess */ 668107172Sjhb /* *busnum = read_config(bus, slot, func, 0x41, 1); */ 669107172Sjhb *busnum = bus; 670107172Sjhb break; 671107172Sjhb case 0x84c48086: 672107172Sjhb /* Intel 82454KX/GX (Orion) */ 673107172Sjhb *busnum = read_config(bus, slot, func, 0x4a, 1); 674107172Sjhb break; 675107172Sjhb case 0x84ca8086: 676107172Sjhb /* 677107172Sjhb * For the 450nx chipset, there is a whole bundle of 678107172Sjhb * things pretending to be host bridges. The MIOC will 679107172Sjhb * be seen first and isn't really a pci bridge (the 680107172Sjhb * actual busses are attached to the PXB's). We need to 681107172Sjhb * read the registers of the MIOC to figure out the 682107172Sjhb * bus numbers for the PXB channels. 683107172Sjhb * 684107172Sjhb * Since the MIOC doesn't have a pci bus attached, we 685107172Sjhb * pretend it wasn't there. 686107172Sjhb */ 687107172Sjhb return (0); 688107172Sjhb case 0x84cb8086: 689107172Sjhb switch (slot) { 690107172Sjhb case 0x12: 691107172Sjhb /* Intel 82454NX PXB#0, Bus#A */ 692107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd0, 1); 693107172Sjhb break; 694107172Sjhb case 0x13: 695107172Sjhb /* Intel 82454NX PXB#0, Bus#B */ 696107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd1, 1) + 1; 697107172Sjhb break; 698107172Sjhb case 0x14: 699107172Sjhb /* Intel 82454NX PXB#1, Bus#A */ 700107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd3, 1); 701107172Sjhb break; 702107172Sjhb case 0x15: 703107172Sjhb /* Intel 82454NX PXB#1, Bus#B */ 704107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd4, 1) + 1; 705107172Sjhb break; 706107172Sjhb } 707107172Sjhb break; 708107172Sjhb 709107172Sjhb /* ServerWorks -- vendor 0x1166 */ 710107172Sjhb case 0x00051166: 711107172Sjhb case 0x00061166: 712107172Sjhb case 0x00081166: 713107172Sjhb case 0x00091166: 714107172Sjhb case 0x00101166: 715107172Sjhb case 0x00111166: 716107172Sjhb case 0x00171166: 717107172Sjhb case 0x01011166: 718107172Sjhb case 0x010f1014: 719107172Sjhb case 0x02011166: 720107172Sjhb case 0x03021014: 721107172Sjhb *busnum = read_config(bus, slot, func, 0x44, 1); 722107172Sjhb break; 723144110Sjhb 724144110Sjhb /* Compaq/HP -- vendor 0x0e11 */ 725144110Sjhb case 0x60100e11: 726144110Sjhb *busnum = read_config(bus, slot, func, 0xc8, 1); 727144110Sjhb break; 728107172Sjhb default: 729107172Sjhb /* Don't know how to read bus number. */ 730107172Sjhb return 0; 731107172Sjhb } 732107172Sjhb 733107172Sjhb return 1; 734107172Sjhb} 735