pci_subr.c revision 119285
169783Smsmith/*- 269783Smsmith * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 369783Smsmith * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 469783Smsmith * Copyright (c) 2000 BSDi 569783Smsmith * All rights reserved. 669783Smsmith * 769783Smsmith * Redistribution and use in source and binary forms, with or without 869783Smsmith * modification, are permitted provided that the following conditions 969783Smsmith * are met: 1069783Smsmith * 1. Redistributions of source code must retain the above copyright 1169783Smsmith * notice, this list of conditions and the following disclaimer. 1269783Smsmith * 2. Redistributions in binary form must reproduce the above copyright 1369783Smsmith * notice, this list of conditions and the following disclaimer in the 1469783Smsmith * documentation and/or other materials provided with the distribution. 1569783Smsmith * 3. The name of the author may not be used to endorse or promote products 1669783Smsmith * derived from this software without specific prior written permission. 1769783Smsmith * 1869783Smsmith * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1969783Smsmith * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2069783Smsmith * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2169783Smsmith * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2269783Smsmith * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2369783Smsmith * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2469783Smsmith * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2569783Smsmith * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2669783Smsmith * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2769783Smsmith * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2869783Smsmith * SUCH DAMAGE. 2969783Smsmith * 3069783Smsmith * $FreeBSD: head/sys/dev/pci/pci_pci.c 119285 2003-08-22 06:42:59Z imp $ 3169783Smsmith */ 3269783Smsmith 3369783Smsmith/* 3469783Smsmith * PCI:PCI bridge support. 3569783Smsmith */ 3669783Smsmith 3769783Smsmith#include <sys/param.h> 3869783Smsmith#include <sys/systm.h> 3969783Smsmith#include <sys/kernel.h> 4069783Smsmith#include <sys/bus.h> 41107546Simp#include <machine/bus.h> 42107546Simp#include <sys/rman.h> 43106844Smdodd#include <sys/sysctl.h> 4469783Smsmith 4569783Smsmith#include <machine/resource.h> 4669783Smsmith 47119285Simp#include <dev/pci/pcivar.h> 48119285Simp#include <dev/pci/pcireg.h> 49119285Simp#include <dev/pci/pcib_private.h> 5069783Smsmith 5169783Smsmith#include "pcib_if.h" 5269783Smsmith 5369783Smsmithstatic int pcib_probe(device_t dev); 5469783Smsmith 5569783Smsmithstatic device_method_t pcib_methods[] = { 5669783Smsmith /* Device interface */ 5769783Smsmith DEVMETHOD(device_probe, pcib_probe), 5869783Smsmith DEVMETHOD(device_attach, pcib_attach), 5969783Smsmith DEVMETHOD(device_shutdown, bus_generic_shutdown), 6069783Smsmith DEVMETHOD(device_suspend, bus_generic_suspend), 6169783Smsmith DEVMETHOD(device_resume, bus_generic_resume), 6269783Smsmith 6369783Smsmith /* Bus interface */ 6469783Smsmith DEVMETHOD(bus_print_child, bus_generic_print_child), 6569783Smsmith DEVMETHOD(bus_read_ivar, pcib_read_ivar), 6669783Smsmith DEVMETHOD(bus_write_ivar, pcib_write_ivar), 6769783Smsmith DEVMETHOD(bus_alloc_resource, pcib_alloc_resource), 6869783Smsmith DEVMETHOD(bus_release_resource, bus_generic_release_resource), 6969783Smsmith DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 7069783Smsmith DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 7169783Smsmith DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 7269783Smsmith DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 7369783Smsmith 7469783Smsmith /* pcib interface */ 7569783Smsmith DEVMETHOD(pcib_maxslots, pcib_maxslots), 7669783Smsmith DEVMETHOD(pcib_read_config, pcib_read_config), 7769783Smsmith DEVMETHOD(pcib_write_config, pcib_write_config), 7869783Smsmith DEVMETHOD(pcib_route_interrupt, pcib_route_interrupt), 7969783Smsmith 8069783Smsmith { 0, 0 } 8169783Smsmith}; 8269783Smsmith 8369783Smsmithstatic driver_t pcib_driver = { 8469783Smsmith "pcib", 8569783Smsmith pcib_methods, 8669783Smsmith sizeof(struct pcib_softc), 8769783Smsmith}; 8869783Smsmith 89102441Sjhbdevclass_t pcib_devclass; 9069783Smsmith 9169783SmsmithDRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, 0, 0); 9269783Smsmith 9369783Smsmith/* 94106844Smdodd * sysctl and tunable vars 95106844Smdodd */ 96106844Smdoddstatic int pci_allow_unsupported_io_range = 0; 97106844SmdoddTUNABLE_INT("hw.pci.allow_unsupported_io_range", 98106844Smdodd (int *)&pci_allow_unsupported_io_range); 99106844SmdoddSYSCTL_DECL(_hw_pci); 100106844SmdoddSYSCTL_INT(_hw_pci, OID_AUTO, allow_unsupported_io_range, CTLFLAG_RD, 101106844Smdodd &pci_allow_unsupported_io_range, 0, 102106844Smdodd "Allows the PCI Bridge to pass through an unsupported memory range " 103106844Smdodd "assigned by the BIOS."); 104106844Smdodd 105106844Smdodd/* 10669783Smsmith * Generic device interface 10769783Smsmith */ 10869783Smsmithstatic int 10969783Smsmithpcib_probe(device_t dev) 11069783Smsmith{ 11169783Smsmith if ((pci_get_class(dev) == PCIC_BRIDGE) && 11269783Smsmith (pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) { 11369783Smsmith device_set_desc(dev, "PCI-PCI bridge"); 11469783Smsmith return(-10000); 11569783Smsmith } 11669783Smsmith return(ENXIO); 11769783Smsmith} 11869783Smsmith 119102441Sjhbvoid 120102441Sjhbpcib_attach_common(device_t dev) 12169783Smsmith{ 12269783Smsmith struct pcib_softc *sc; 123119266Simp uint8_t iolow; 12469783Smsmith 12569783Smsmith sc = device_get_softc(dev); 12669783Smsmith sc->dev = dev; 12769783Smsmith 12869908Smsmith /* 12969908Smsmith * Get current bridge configuration. 13069908Smsmith */ 13169953Smsmith sc->command = pci_read_config(dev, PCIR_COMMAND, 1); 13269908Smsmith sc->secbus = pci_read_config(dev, PCIR_SECBUS_1, 1); 13369908Smsmith sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1); 13469908Smsmith sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2); 13569908Smsmith sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2); 13669908Smsmith sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1); 13769783Smsmith 13869908Smsmith /* 13969908Smsmith * Determine current I/O decode. 14069908Smsmith */ 14169953Smsmith if (sc->command & PCIM_CMD_PORTEN) { 14269953Smsmith iolow = pci_read_config(dev, PCIR_IOBASEL_1, 1); 14369953Smsmith if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) { 14469953Smsmith sc->iobase = PCI_PPBIOBASE(pci_read_config(dev, PCIR_IOBASEH_1, 2), 14569953Smsmith pci_read_config(dev, PCIR_IOBASEL_1, 1)); 14669953Smsmith } else { 14769953Smsmith sc->iobase = PCI_PPBIOBASE(0, pci_read_config(dev, PCIR_IOBASEL_1, 1)); 14869953Smsmith } 14969908Smsmith 15069953Smsmith iolow = pci_read_config(dev, PCIR_IOLIMITL_1, 1); 15169953Smsmith if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) { 15269953Smsmith sc->iolimit = PCI_PPBIOLIMIT(pci_read_config(dev, PCIR_IOLIMITH_1, 2), 15369953Smsmith pci_read_config(dev, PCIR_IOLIMITL_1, 1)); 15469953Smsmith } else { 15569953Smsmith sc->iolimit = PCI_PPBIOLIMIT(0, pci_read_config(dev, PCIR_IOLIMITL_1, 1)); 15669953Smsmith } 15769908Smsmith } 15869908Smsmith 15969908Smsmith /* 16069908Smsmith * Determine current memory decode. 16169908Smsmith */ 16269953Smsmith if (sc->command & PCIM_CMD_MEMEN) { 16369953Smsmith sc->membase = PCI_PPBMEMBASE(0, pci_read_config(dev, PCIR_MEMBASE_1, 2)); 16469953Smsmith sc->memlimit = PCI_PPBMEMLIMIT(0, pci_read_config(dev, PCIR_MEMLIMIT_1, 2)); 16569953Smsmith sc->pmembase = PCI_PPBMEMBASE((pci_addr_t)pci_read_config(dev, PCIR_PMBASEH_1, 4), 16669953Smsmith pci_read_config(dev, PCIR_PMBASEL_1, 2)); 16769953Smsmith sc->pmemlimit = PCI_PPBMEMLIMIT((pci_addr_t)pci_read_config(dev, PCIR_PMLIMITH_1, 4), 16869953Smsmith pci_read_config(dev, PCIR_PMLIMITL_1, 2)); 16969953Smsmith } 17069908Smsmith 17169908Smsmith /* 17269908Smsmith * Quirk handling. 17369908Smsmith */ 17469908Smsmith switch (pci_get_devid(dev)) { 17569908Smsmith case 0x12258086: /* Intel 82454KX/GX (Orion) */ 17669908Smsmith { 177119266Simp uint8_t supbus; 17869908Smsmith 17969908Smsmith supbus = pci_read_config(dev, 0x41, 1); 18069908Smsmith if (supbus != 0xff) { 18169908Smsmith sc->secbus = supbus + 1; 18269908Smsmith sc->subbus = supbus + 1; 18369908Smsmith } 18469908Smsmith } 18569908Smsmith break; 18669908Smsmith } 18769908Smsmith 18869783Smsmith if (bootverbose) { 18969783Smsmith device_printf(dev, " secondary bus %d\n", sc->secbus); 19069783Smsmith device_printf(dev, " subordinate bus %d\n", sc->subbus); 19169783Smsmith device_printf(dev, " I/O decode 0x%x-0x%x\n", sc->iobase, sc->iolimit); 19269783Smsmith device_printf(dev, " memory decode 0x%x-0x%x\n", sc->membase, sc->memlimit); 19369783Smsmith device_printf(dev, " prefetched decode 0x%x-0x%x\n", sc->pmembase, sc->pmemlimit); 19469783Smsmith } 19569783Smsmith 19669783Smsmith /* 19769783Smsmith * XXX If the secondary bus number is zero, we should assign a bus number 19869783Smsmith * since the BIOS hasn't, then initialise the bridge. 19969783Smsmith */ 20069783Smsmith 20169783Smsmith /* 20269783Smsmith * XXX If the subordinate bus number is less than the secondary bus number, 20369783Smsmith * we should pick a better value. One sensible alternative would be to 20469783Smsmith * pick 255; the only tradeoff here is that configuration transactions 20569783Smsmith * would be more widely routed than absolutely necessary. 20669783Smsmith */ 207102441Sjhb} 20869783Smsmith 209103042Sjhbint 210102441Sjhbpcib_attach(device_t dev) 211102441Sjhb{ 212102441Sjhb struct pcib_softc *sc; 213102441Sjhb device_t child; 214102441Sjhb 215102441Sjhb pcib_attach_common(dev); 216102441Sjhb sc = device_get_softc(dev); 21769783Smsmith if (sc->secbus != 0) { 218103016Sjhb child = device_add_child(dev, "pci", sc->secbus); 21969783Smsmith if (child != NULL) 22069783Smsmith return(bus_generic_attach(dev)); 22169783Smsmith } 22269783Smsmith 22369783Smsmith /* no secondary bus; we should have fixed this */ 22469783Smsmith return(0); 22569783Smsmith} 22669783Smsmith 227102441Sjhbint 22869783Smsmithpcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 22969783Smsmith{ 23069783Smsmith struct pcib_softc *sc = device_get_softc(dev); 23169783Smsmith 23269783Smsmith switch (which) { 23369783Smsmith case PCIB_IVAR_BUS: 23469783Smsmith *result = sc->secbus; 23569783Smsmith return(0); 23669783Smsmith } 23769783Smsmith return(ENOENT); 23869783Smsmith} 23969783Smsmith 240102441Sjhbint 24169783Smsmithpcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 24269783Smsmith{ 24369783Smsmith struct pcib_softc *sc = device_get_softc(dev); 24469783Smsmith 24569783Smsmith switch (which) { 24669783Smsmith case PCIB_IVAR_BUS: 24769783Smsmith sc->secbus = value; 24869783Smsmith break; 24969783Smsmith } 25069783Smsmith return(ENOENT); 25169783Smsmith} 25269783Smsmith 25369783Smsmith/* 25490388Simp * Is this a decoded ISA I/O port address? Note, we need to do the mask that 25590388Simp * we do below because of the ISA alias addresses. I'm not 100% sure that 256107546Simp * this is correct. Maybe the bridge needs to be subtractive decode for 257107546Simp * this to work? 25890388Simp */ 25990388Simpstatic int 26090388Simppcib_is_isa_io(u_long start) 26190388Simp{ 26290898Simp if ((start & 0xfffUL) > 0x3ffUL || start == 0) 26390388Simp return (0); 26490388Simp return (1); 26590388Simp} 26690388Simp 26790388Simp/* 26890388Simp * Is this a decoded ISA memory address? 26990388Simp */ 27090388Simpstatic int 27190388Simppcib_is_isa_mem(u_long start) 27290388Simp{ 27390898Simp if (start > 0xfffffUL || start == 0) 27490388Simp return (0); 27590388Simp return (1); 27690388Simp} 27790388Simp 27890388Simp/* 279107546Simp * Is the prefetch window open (eg, can we allocate memory in it?) 280107546Simp */ 281107546Simpstatic int 282107546Simppcib_is_prefetch_open(struct pcib_softc *sc) 283107546Simp{ 284107546Simp return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit); 285107546Simp} 286107546Simp 287107546Simp/* 288107546Simp * Is the nonprefetch window open (eg, can we allocate memory in it?) 289107546Simp */ 290107546Simpstatic int 291107546Simppcib_is_nonprefetch_open(struct pcib_softc *sc) 292107546Simp{ 293107546Simp return (sc->membase > 0 && sc->membase < sc->memlimit); 294107546Simp} 295107546Simp 296107546Simp/* 297107546Simp * Is the io window open (eg, can we allocate ports in it?) 298107546Simp */ 299107546Simpstatic int 300107546Simppcib_is_io_open(struct pcib_softc *sc) 301107546Simp{ 302107546Simp return (sc->iobase > 0 && sc->iobase < sc->iolimit); 303107546Simp} 304107546Simp 305107546Simp/* 30669783Smsmith * We have to trap resource allocation requests and ensure that the bridge 30769783Smsmith * is set up to, or capable of handling them. 30869783Smsmith */ 309102441Sjhbstruct resource * 31069783Smsmithpcib_alloc_resource(device_t dev, device_t child, int type, int *rid, 31169783Smsmith u_long start, u_long end, u_long count, u_int flags) 31269783Smsmith{ 31369783Smsmith struct pcib_softc *sc = device_get_softc(dev); 314107546Simp int ok; 31569783Smsmith 31669783Smsmith /* 31769783Smsmith * If this is a "default" allocation against this rid, we can't work 31869783Smsmith * out where it's coming from (we should actually never see these) so we 31969783Smsmith * just have to punt. 32069783Smsmith */ 32169783Smsmith if ((start == 0) && (end == ~0)) { 32269783Smsmith device_printf(dev, "can't decode default resource id %d for %s%d, bypassing\n", 32369783Smsmith *rid, device_get_name(child), device_get_unit(child)); 32469783Smsmith } else { 32569783Smsmith /* 32669783Smsmith * Fail the allocation for this range if it's not supported. 32769783Smsmith */ 32869783Smsmith switch (type) { 32969783Smsmith case SYS_RES_IOPORT: 330107546Simp ok = 1; 33190898Simp if (!pcib_is_isa_io(start)) { 332107546Simp ok = 0; 333107546Simp if (pcib_is_io_open(sc)) 334107546Simp ok = (start >= sc->iobase && end <= sc->iolimit); 335106844Smdodd if (!pci_allow_unsupported_io_range) { 336107546Simp if (!ok) { 337107546Simp if (start < sc->iobase) 338107546Simp start = sc->iobase; 339107546Simp if (end > sc->iolimit) 340107546Simp end = sc->iolimit; 341107546Simp } 342106844Smdodd } else { 343106844Smdodd if (start < sc->iobase) 344106844Smdodd printf("start (%lx) < sc->iobase (%x)\n", start, 345106844Smdodd sc->iobase); 346106844Smdodd if (end > sc->iolimit) 347106844Smdodd printf("end (%lx) > sc->iolimit (%x)\n", 348106844Smdodd end, sc->iolimit); 349106844Smdodd if (end < start) 350106844Smdodd printf("end (%lx) < start (%lx)\n", end, start); 351106844Smdodd } 35290898Simp } 353107546Simp if (end < start) { 354107546Simp start = 0; 355107546Simp end = 0; 356107546Simp ok = 0; 357107546Simp } 358107546Simp if (!ok) { 359107546Simp device_printf(dev, "device %s%d requested unsupported I/O " 360107546Simp "range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n", 361107546Simp device_get_name(child), device_get_unit(child), start, end, 362107546Simp sc->iobase, sc->iolimit); 36390388Simp return (NULL); 36469783Smsmith } 36569908Smsmith if (bootverbose) 36669908Smsmith device_printf(sc->dev, "device %s%d requested decoded I/O range 0x%lx-0x%lx\n", 36769908Smsmith device_get_name(child), device_get_unit(child), start, end); 36869783Smsmith break; 36969783Smsmith 37069783Smsmith case SYS_RES_MEMORY: 371107546Simp ok = 1; 37290898Simp if (!pcib_is_isa_mem(start)) { 373107546Simp ok = 0; 374107546Simp if (pcib_is_nonprefetch_open(sc)) 375107546Simp ok = ok || (start >= sc->membase && end <= sc->memlimit); 376107546Simp if (pcib_is_prefetch_open(sc)) 377107546Simp ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit); 378106844Smdodd if (!pci_allow_unsupported_io_range) { 379107546Simp if (!ok) { 380107546Simp ok = 1; 381107546Simp if (flags & RF_PREFETCHABLE) { 382107546Simp if (pcib_is_prefetch_open(sc)) { 383107546Simp if (start < sc->pmembase) 384107546Simp start = sc->pmembase; 385107546Simp if (end > sc->pmemlimit) 386107546Simp end = sc->pmemlimit; 387107546Simp } else { 388107546Simp ok = 0; 389107546Simp } 390107546Simp } else { /* non-prefetchable */ 391107546Simp if (pcib_is_nonprefetch_open(sc)) { 392107546Simp if (start < sc->membase) 393107546Simp start = sc->membase; 394107546Simp if (end > sc->memlimit) 395107546Simp end = sc->memlimit; 396107546Simp } else { 397107546Simp ok = 0; 398107546Simp } 399107546Simp } 400107546Simp } 401107546Simp } else if (!ok) { 402107546Simp ok = 1; /* pci_allow_unsupported_ranges -> always ok */ 403107546Simp if (pcib_is_nonprefetch_open(sc)) { 404107546Simp if (start < sc->membase) 405107546Simp printf("start (%lx) < sc->membase (%x)\n", 406107546Simp start, sc->membase); 407107546Simp if (end > sc->memlimit) 408107546Simp printf("end (%lx) > sc->memlimit (%x)\n", 409107546Simp end, sc->memlimit); 410107546Simp } 411107546Simp if (pcib_is_prefetch_open(sc)) { 412107546Simp if (start < sc->pmembase) 413107546Simp printf("start (%lx) < sc->pmembase (%x)\n", 414107546Simp start, sc->pmembase); 415107546Simp if (end > sc->pmemlimit) 416107546Simp printf("end (%lx) > sc->pmemlimit (%x)\n", 417107546Simp end, sc->memlimit); 418107546Simp } 419106844Smdodd if (end < start) 420106844Smdodd printf("end (%lx) < start (%lx)\n", end, start); 421106844Smdodd } 42290898Simp } 423107546Simp if (end < start) { 424107546Simp start = 0; 425107546Simp end = 0; 426107546Simp ok = 0; 42769783Smsmith } 428107546Simp if (!ok && bootverbose) 429107546Simp device_printf(dev, 430107546Simp "device %s%d requested unsupported memory range " 431107546Simp "0x%lx-0x%lx (decoding 0x%x-0x%x, 0x%x-0x%x)\n", 432107546Simp device_get_name(child), device_get_unit(child), start, 433107546Simp end, sc->membase, sc->memlimit, sc->pmembase, 434107546Simp sc->pmemlimit); 435107546Simp if (!ok) 436107546Simp return (NULL); 43769908Smsmith if (bootverbose) 43869908Smsmith device_printf(sc->dev, "device %s%d requested decoded memory range 0x%lx-0x%lx\n", 439107546Simp device_get_name(child), device_get_unit(child), start, end); 44069908Smsmith break; 44169908Smsmith 44269783Smsmith default: 44369908Smsmith break; 44469783Smsmith } 44569783Smsmith } 44669908Smsmith 44769783Smsmith /* 44869783Smsmith * Bridge is OK decoding this resource, so pass it up. 44969783Smsmith */ 45069783Smsmith return(bus_generic_alloc_resource(dev, child, type, rid, start, end, count, flags)); 45169783Smsmith} 45269783Smsmith 45369783Smsmith/* 45469783Smsmith * PCIB interface. 45569783Smsmith */ 456102441Sjhbint 45769783Smsmithpcib_maxslots(device_t dev) 45869783Smsmith{ 45969908Smsmith return(PCI_SLOTMAX); 46069783Smsmith} 46169783Smsmith 46269783Smsmith/* 46369783Smsmith * Since we are a child of a PCI bus, its parent must support the pcib interface. 46469783Smsmith */ 465119266Simpuint32_t 46669783Smsmithpcib_read_config(device_t dev, int b, int s, int f, int reg, int width) 46769783Smsmith{ 46869783Smsmith return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, width)); 46969783Smsmith} 47069783Smsmith 471102441Sjhbvoid 472119266Simppcib_write_config(device_t dev, int b, int s, int f, int reg, uint32_t val, int width) 47369783Smsmith{ 47469783Smsmith PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, val, width); 47569783Smsmith} 47669783Smsmith 47769783Smsmith/* 47869783Smsmith * Route an interrupt across a PCI bridge. 47969783Smsmith */ 480109229Sbennoint 48169783Smsmithpcib_route_interrupt(device_t pcib, device_t dev, int pin) 48269783Smsmith{ 48369783Smsmith device_t bus; 48469783Smsmith int parent_intpin; 48569783Smsmith int intnum; 48669783Smsmith 48769783Smsmith /* 48869783Smsmith * 48969783Smsmith * The PCI standard defines a swizzle of the child-side device/intpin to 49069783Smsmith * the parent-side intpin as follows. 49169783Smsmith * 49269783Smsmith * device = device on child bus 49369783Smsmith * child_intpin = intpin on child bus slot (0-3) 49469783Smsmith * parent_intpin = intpin on parent bus slot (0-3) 49569783Smsmith * 49669783Smsmith * parent_intpin = (device + child_intpin) % 4 49769783Smsmith */ 498115234Sticso parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4; 49969783Smsmith 50069783Smsmith /* 50169783Smsmith * Our parent is a PCI bus. Its parent must export the pcib interface 50269783Smsmith * which includes the ability to route interrupts. 50369783Smsmith */ 50469783Smsmith bus = device_get_parent(pcib); 50569783Smsmith intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1); 50690554Smsmith if (PCI_INTERRUPT_VALID(intnum)) { 507102977Sjhb device_printf(pcib, "slot %d INT%c is routed to irq %d\n", 508102977Sjhb pci_get_slot(dev), 'A' + pin - 1, intnum); 50990554Smsmith } 51069783Smsmith return(intnum); 51169783Smsmith} 512107172Sjhb 513107172Sjhb/* 514107172Sjhb * Try to read the bus number of a host-PCI bridge using appropriate config 515107172Sjhb * registers. 516107172Sjhb */ 517107172Sjhbint 518107172Sjhbhost_pcib_get_busno(pci_read_config_fn read_config, int bus, int slot, int func, 519119266Simp uint8_t *busnum) 520107172Sjhb{ 521119266Simp uint32_t id; 522107172Sjhb 523107172Sjhb id = read_config(bus, slot, func, PCIR_DEVVENDOR, 4); 524107248Sjhb if (id == 0xffffffff) 525107172Sjhb return (0); 526107172Sjhb 527107172Sjhb switch (id) { 528107172Sjhb case 0x12258086: 529107172Sjhb /* Intel 824?? */ 530107172Sjhb /* XXX This is a guess */ 531107172Sjhb /* *busnum = read_config(bus, slot, func, 0x41, 1); */ 532107172Sjhb *busnum = bus; 533107172Sjhb break; 534107172Sjhb case 0x84c48086: 535107172Sjhb /* Intel 82454KX/GX (Orion) */ 536107172Sjhb *busnum = read_config(bus, slot, func, 0x4a, 1); 537107172Sjhb break; 538107172Sjhb case 0x84ca8086: 539107172Sjhb /* 540107172Sjhb * For the 450nx chipset, there is a whole bundle of 541107172Sjhb * things pretending to be host bridges. The MIOC will 542107172Sjhb * be seen first and isn't really a pci bridge (the 543107172Sjhb * actual busses are attached to the PXB's). We need to 544107172Sjhb * read the registers of the MIOC to figure out the 545107172Sjhb * bus numbers for the PXB channels. 546107172Sjhb * 547107172Sjhb * Since the MIOC doesn't have a pci bus attached, we 548107172Sjhb * pretend it wasn't there. 549107172Sjhb */ 550107172Sjhb return (0); 551107172Sjhb case 0x84cb8086: 552107172Sjhb switch (slot) { 553107172Sjhb case 0x12: 554107172Sjhb /* Intel 82454NX PXB#0, Bus#A */ 555107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd0, 1); 556107172Sjhb break; 557107172Sjhb case 0x13: 558107172Sjhb /* Intel 82454NX PXB#0, Bus#B */ 559107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd1, 1) + 1; 560107172Sjhb break; 561107172Sjhb case 0x14: 562107172Sjhb /* Intel 82454NX PXB#1, Bus#A */ 563107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd3, 1); 564107172Sjhb break; 565107172Sjhb case 0x15: 566107172Sjhb /* Intel 82454NX PXB#1, Bus#B */ 567107248Sjhb *busnum = read_config(bus, 0x10, func, 0xd4, 1) + 1; 568107172Sjhb break; 569107172Sjhb } 570107172Sjhb break; 571107172Sjhb 572107172Sjhb /* ServerWorks -- vendor 0x1166 */ 573107172Sjhb case 0x00051166: 574107172Sjhb case 0x00061166: 575107172Sjhb case 0x00081166: 576107172Sjhb case 0x00091166: 577107172Sjhb case 0x00101166: 578107172Sjhb case 0x00111166: 579107172Sjhb case 0x00171166: 580107172Sjhb case 0x01011166: 581107172Sjhb case 0x010f1014: 582107172Sjhb case 0x02011166: 583107172Sjhb case 0x03021014: 584107172Sjhb *busnum = read_config(bus, slot, func, 0x44, 1); 585107172Sjhb break; 586107172Sjhb default: 587107172Sjhb /* Don't know how to read bus number. */ 588107172Sjhb return 0; 589107172Sjhb } 590107172Sjhb 591107172Sjhb return 1; 592107172Sjhb} 593