if_otusreg.h revision 290407
1/* $OpenBSD: if_otusreg.h,v 1.9 2013/11/26 20:33:18 deraadt Exp $ */ 2 3/*- 4 * Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr> 5 * Copyright (c) 2007-2008 Atheros Communications, Inc. 6 * Copyright (c) 2015 Adrian Chadd <adrian@FreeBSD.org> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 * 20 * $FreeBSD: head/sys/dev/otus/if_otusreg.h 290407 2015-11-05 17:58:18Z avos $ 21 */ 22#ifndef __IF_OTUSREG_H__ 23#define __IF_OTUSREG_H__ 24 25/* USB Endpoints addresses. */ 26#define AR_EPT_BULK_TX_NO (UE_DIR_OUT | 1) 27#define AR_EPT_BULK_RX_NO (UE_DIR_IN | 2) 28#define AR_EPT_INTR_RX_NO (UE_DIR_IN | 3) 29#define AR_EPT_INTR_TX_NO (UE_DIR_OUT | 4) 30 31/* USB Requests. */ 32#define AR_FW_DOWNLOAD 0x30 33#define AR_FW_DOWNLOAD_COMPLETE 0x31 34 35/* Maximum number of writes that can fit in a single FW command is 7. */ 36#define AR_MAX_WRITE_IDX 6 /* 56 bytes */ 37 38#define AR_FW_INIT_ADDR 0x102800 39#define AR_FW_MAIN_ADDR 0x200000 40#define AR_USB_MODE_CTRL 0x1e1108 41 42/* 43 * AR9170 MAC registers. 44 */ 45#define AR_MAC_REG_BASE 0x1c3000 46#define AR_MAC_REG_DMA_TRIGGER (AR_MAC_REG_BASE + 0xd30) 47#define AR_MAC_REG_MAC_ADDR_L (AR_MAC_REG_BASE + 0x610) 48#define AR_MAC_REG_MAC_ADDR_H (AR_MAC_REG_BASE + 0x614) 49#define AR_MAC_REG_BSSID_L (AR_MAC_REG_BASE + 0x618) 50#define AR_MAC_REG_BSSID_H (AR_MAC_REG_BASE + 0x61c) 51#define AR_MAC_REG_GROUP_HASH_TBL_L (AR_MAC_REG_BASE + 0x624) 52#define AR_MAC_REG_GROUP_HASH_TBL_H (AR_MAC_REG_BASE + 0x628) 53#define AR_MAC_REG_RX_TIMEOUT (AR_MAC_REG_BASE + 0x62c) 54#define AR_MAC_REG_BASIC_RATE (AR_MAC_REG_BASE + 0x630) 55#define AR_MAC_REG_MANDATORY_RATE (AR_MAC_REG_BASE + 0x634) 56#define AR_MAC_REG_RTS_CTS_RATE (AR_MAC_REG_BASE + 0x638) 57#define AR_MAC_REG_BACKOFF_PROTECT (AR_MAC_REG_BASE + 0x63c) 58#define AR_MAC_REG_RX_THRESHOLD (AR_MAC_REG_BASE + 0x640) 59#define AR_MAC_REG_RX_PE_DELAY (AR_MAC_REG_BASE + 0x64c) 60#define AR_MAC_REG_DYNAMIC_SIFS_ACK (AR_MAC_REG_BASE + 0x658) 61#define AR_MAC_REG_SNIFFER (AR_MAC_REG_BASE + 0x674) 62#define AR_MAC_REG_ENCRYPTION (AR_MAC_REG_BASE + 0x678) 63#define AR_MAC_REG_MISC_680 (AR_MAC_REG_BASE + 0x680) 64#define AR_MAC_REG_FRAMETYPE_FILTER (AR_MAC_REG_BASE + 0x68c) 65#define AR_MAC_REG_ACK_EXTENSION (AR_MAC_REG_BASE + 0x690) 66#define AR_MAC_REG_ACK_TPC (AR_MAC_REG_BASE + 0x694) 67#define AR_MAC_REG_EIFS_AND_SIFS (AR_MAC_REG_BASE + 0x698) 68#define AR_MAC_REG_BUSY (AR_MAC_REG_BASE + 0x6e8) 69#define AR_MAC_REG_BUSY_EXT (AR_MAC_REG_BASE + 0x6ec) 70#define AR_MAC_REG_SLOT_TIME (AR_MAC_REG_BASE + 0x6f0) 71#define AR_MAC_REG_CAM_MODE (AR_MAC_REG_BASE + 0x700) 72#define AR_MAC_REG_AC0_CW (AR_MAC_REG_BASE + 0xb00) 73#define AR_MAC_REG_AC1_CW (AR_MAC_REG_BASE + 0xb04) 74#define AR_MAC_REG_AC2_CW (AR_MAC_REG_BASE + 0xb08) 75#define AR_MAC_REG_AC3_CW (AR_MAC_REG_BASE + 0xb0c) 76#define AR_MAC_REG_AC4_CW (AR_MAC_REG_BASE + 0xb10) 77#define AR_MAC_REG_AC1_AC0_AIFS (AR_MAC_REG_BASE + 0xb14) 78#define AR_MAC_REG_AC3_AC2_AIFS (AR_MAC_REG_BASE + 0xb18) 79#define AR_MAC_REG_RETRY_MAX (AR_MAC_REG_BASE + 0xb28) 80#define AR_MAC_REG_TID_CFACK_CFEND_RATE (AR_MAC_REG_BASE + 0xb2c) 81#define AR_MAC_REG_TXOP_NOT_ENOUGH_INDICATION \ 82 (AR_MAC_REG_BASE + 0xb30) 83#define AR_MAC_REG_TXOP_DURATION (AR_MAC_REG_BASE + 0xb38) 84#define AR_MAC_REG_AC1_AC0_TXOP (AR_MAC_REG_BASE + 0xb44) 85#define AR_MAC_REG_AC3_AC2_TXOP (AR_MAC_REG_BASE + 0xb48) 86#define AR_MAC_REG_AMPDU_FACTOR (AR_MAC_REG_BASE + 0xb9c) 87#define AR_MAC_REG_FCS_SELECT (AR_MAC_REG_BASE + 0xbb0) 88#define AR_MAC_REG_RX_CONTROL (AR_MAC_REG_BASE + 0xc40) 89#define AR_MAC_REG_AMPDU_RX_THRESH (AR_MAC_REG_BASE + 0xc50) 90#define AR_MAC_REG_OFDM_PHY_ERRORS (AR_MAC_REG_BASE + 0xcb4) 91#define AR_MAC_REG_CCK_PHY_ERRORS (AR_MAC_REG_BASE + 0xcb8) 92#define AR_MAC_REG_TXRX_MPI (AR_MAC_REG_BASE + 0xd7c) 93#define AR_MAC_REG_BCN_HT1 (AR_MAC_REG_BASE + 0xda0) 94 95/* Possible values for register AR_USB_MODE_CTRL. */ 96#define AR_USB_DS_ENA (1 << 0) 97#define AR_USB_US_ENA (1 << 1) 98#define AR_USB_US_PACKET_MODE (1 << 3) 99#define AR_USB_RX_STREAM_4K (0 << 4) 100#define AR_USB_RX_STREAM_8K (1 << 4) 101#define AR_USB_RX_STREAM_16K (2 << 4) 102#define AR_USB_RX_STREAM_32K (3 << 4) 103#define AR_USB_TX_STREAM_MODE (1 << 6) 104 105#define AR_LED0_ON (1 << 0) 106#define AR_LED1_ON (1 << 1) 107 108/* 109 * PHY registers. 110 */ 111#define AR_PHY_BASE 0x1c5800 112#define AR_PHY(reg) (AR_PHY_BASE + (reg) * 4) 113#define AR_PHY_TURBO (AR_PHY_BASE + 0x0004) 114#define AR_PHY_RF_CTL3 (AR_PHY_BASE + 0x0028) 115#define AR_PHY_RF_CTL4 (AR_PHY_BASE + 0x0034) 116#define AR_PHY_SETTLING (AR_PHY_BASE + 0x0044) 117#define AR_PHY_RXGAIN (AR_PHY_BASE + 0x0048) 118#define AR_PHY_DESIRED_SZ (AR_PHY_BASE + 0x0050) 119#define AR_PHY_FIND_SIG (AR_PHY_BASE + 0x0058) 120#define AR_PHY_AGC_CTL1 (AR_PHY_BASE + 0x005c) 121#define AR_PHY_SFCORR (AR_PHY_BASE + 0x0068) 122#define AR_PHY_SFCORR_LOW (AR_PHY_BASE + 0x006c) 123#define AR_PHY_TIMING_CTRL4 (AR_PHY_BASE + 0x0120) 124#define AR_PHY_TIMING5 (AR_PHY_BASE + 0x0124) 125#define AR_PHY_POWER_TX_RATE1 (AR_PHY_BASE + 0x0134) 126#define AR_PHY_POWER_TX_RATE2 (AR_PHY_BASE + 0x0138) 127#define AR_PHY_POWER_TX_RATE_MAX (AR_PHY_BASE + 0x013c) 128#define AR_PHY_SWITCH_CHAIN_0 (AR_PHY_BASE + 0x0160) 129#define AR_PHY_SWITCH_COM (AR_PHY_BASE + 0x0164) 130#define AR_PHY_HEAVY_CLIP_ENABLE (AR_PHY_BASE + 0x01e0) 131#define AR_PHY_CCK_DETECT (AR_PHY_BASE + 0x0a08) 132#define AR_PHY_GAIN_2GHZ (AR_PHY_BASE + 0x0a0c) 133#define AR_PHY_POWER_TX_RATE3 (AR_PHY_BASE + 0x0a34) 134#define AR_PHY_POWER_TX_RATE4 (AR_PHY_BASE + 0x0a38) 135#define AR_PHY_TPCRG1 (AR_PHY_BASE + 0x0a58) 136#define AR_PHY_POWER_TX_RATE5 (AR_PHY_BASE + 0x0b8c) 137#define AR_PHY_POWER_TX_RATE6 (AR_PHY_BASE + 0x0b90) 138#define AR_PHY_POWER_TX_RATE7 (AR_PHY_BASE + 0x0bcc) 139#define AR_PHY_POWER_TX_RATE8 (AR_PHY_BASE + 0x0bd0) 140#define AR_PHY_POWER_TX_RATE9 (AR_PHY_BASE + 0x0bd4) 141#define AR_PHY_CCA (AR_PHY_BASE + 0x3064) 142 143#define AR_SEEPROM_HW_TYPE_OFFSET 0x1374 144#define AR_EEPROM_OFFSET 0x1600 145 146#define AR_BANK4_CHUP (1 << 0) 147#define AR_BANK4_BMODE_LF_SYNTH_FREQ (1 << 1) 148#define AR_BANK4_AMODE_REFSEL(x) ((x) << 2) 149#define AR_BANK4_ADDR(x) ((x) << 5) 150 151/* 152 * Random number generator. 153 */ 154#define AR_RAND_REG_BASE 0x1d0000 155 156/* 157 * GPIO. 158 */ 159#define AR_GPIO_REG_BASE 0x1d0100 160 161#define AR_GPIO_REG_PORT_TYPE (AR_GPIO_REG_BASE + 0x000) 162#define AR_GPIO_REG_PORT_DATA (AR_GPIO_REG_BASE + 0x004) 163#define AR_GPIO_PORT_LED_0 1 164#define AR_GPIO_PORT_LED_1 2 165/* WPS Button GPIO for TP-Link TL-WN821N */ 166#define AR_GPIO_PORT_WPS_BUTTON_PRESSED 4 167 168/* 169 * Power Management. 170 */ 171#define AR_PWR_REG_BASE 0x1d4000 172 173#define AR_PWR_REG_RESET (AR_PWR_REG_BASE + 0x004) 174#define AR_PWR_REG_CLOCK_SEL (AR_PWR_REG_BASE + 0x008) 175#define AR_PWR_REG_PLL_ADDAC (AR_PWR_REG_BASE + 0x014) 176 177/* Tx descriptor. */ 178struct ar_tx_head { 179 uint16_t len; 180 uint16_t macctl; 181#define AR_TX_MAC_RTS (1 << 0) 182#define AR_TX_MAC_CTS (1 << 1) 183#define AR_TX_MAC_BACKOFF (1 << 3) 184#define AR_TX_MAC_NOACK (1 << 2) 185#define AR_TX_MAC_HW_DUR (1 << 9) 186#define AR_TX_MAC_QID(qid) ((qid) << 10) 187#define AR_TX_MAC_RATE_PROBING (1 << 15) 188 189 uint32_t phyctl; 190/* Modulation type. */ 191#define AR_TX_PHY_MT_CCK 0 192#define AR_TX_PHY_MT_OFDM 1 193#define AR_TX_PHY_MT_HT 2 194#define AR_TX_PHY_GF (1 << 2) 195#define AR_TX_PHY_BW_SHIFT 3 196#define AR_TX_PHY_TPC_SHIFT 9 197#define AR_TX_PHY_ANTMSK(msk) ((msk) << 15) 198#define AR_TX_PHY_MCS(mcs) ((mcs) << 18) 199#define AR_TX_PHY_SHGI (1U << 31) 200} __packed; 201 202/* USB Rx stream mode header. */ 203struct ar_rx_head { 204 uint16_t len; 205 uint16_t tag; 206#define AR_RX_HEAD_TAG 0x4e00 207} __packed; 208 209/* Rx descriptor. */ 210struct ar_rx_tail { 211 uint8_t rssi_ant[3]; 212 uint8_t rssi_ant_ext[3]; 213 uint8_t rssi; /* Combined RSSI. */ 214 uint8_t evm[2][6]; /* Error Vector Magnitude. */ 215 uint8_t phy_err; 216 uint8_t sa_idx; 217 uint8_t da_idx; 218 uint8_t error; 219#define AR_RX_ERROR_TIMEOUT (1 << 0) 220#define AR_RX_ERROR_OVERRUN (1 << 1) 221#define AR_RX_ERROR_DECRYPT (1 << 2) 222#define AR_RX_ERROR_FCS (1 << 3) 223#define AR_RX_ERROR_BAD_RA (1 << 4) 224#define AR_RX_ERROR_PLCP (1 << 5) 225#define AR_RX_ERROR_MMIC (1 << 6) 226 227 uint8_t status; 228/* Modulation type (same as AR_TX_PHY_MT). */ 229#define AR_RX_STATUS_MT_MASK 0x3 230#define AR_RX_STATUS_MT_CCK 0 231#define AR_RX_STATUS_MT_OFDM 1 232#define AR_RX_STATUS_MT_HT 2 233#define AR_RX_STATUS_SHPREAMBLE (1 << 3) 234} __packed; 235 236#define AR_PLCP_HDR_LEN 12 237/* Magic PLCP header for firmware notifications through Rx bulk pipe. */ 238static uint8_t AR_PLCP_HDR_INTR[] = { 239 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 240 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 241}; 242 243/* Firmware command/reply header. */ 244struct ar_cmd_hdr { 245 uint8_t len; 246 uint8_t code; 247#define AR_CMD_RREG 0x00 248#define AR_CMD_WREG 0x01 249#define AR_CMD_RMEM 0x02 250#define AR_CMD_WMEM 0x03 251#define AR_CMD_BITAND 0x04 252#define AR_CMD_BITOR 0x05 253#define AR_CMD_EKEY 0x28 254#define AR_CMD_DKEY 0x29 255#define AR_CMD_FREQUENCY 0x30 256#define AR_CMD_RF_INIT 0x31 257#define AR_CMD_SYNTH 0x32 258#define AR_CMD_FREQ_STRAT 0x33 259#define AR_CMD_ECHO 0x80 260#define AR_CMD_TALLY 0x81 261#define AR_CMD_TALLY_APD 0x82 262#define AR_CMD_CONFIG 0x83 263#define AR_CMD_RESET 0x90 264#define AR_CMD_DKRESET 0x91 265#define AR_CMD_DKTX_STATUS 0x92 266#define AR_CMD_FDC 0xa0 267#define AR_CMD_WREEPROM 0xb0 268#define AR_CMD_WFLASH AR_CMD_WREEPROM 269#define AR_CMD_FLASH_ERASE 0xb1 270#define AR_CMD_FLASH_PROG 0xb2 271#define AR_CMD_FLASH_CHKSUM 0xb3 272#define AR_CMD_FLASH_READ 0xb4 273#define AR_CMD_FW_DL_INIT 0xb5 274#define AR_CMD_MEM_WREEPROM 0xbb 275/* Those have the 2 MSB set to 1. */ 276#define AR_EVT_BEACON 0x00 277#define AR_EVT_TX_COMP 0x01 278#define AR_EVT_TBTT 0x02 279#define AR_EVT_ATIM 0x03 280#define AR_EVT_DO_BB_RESET 0x09 281 282 uint16_t token; /* Driver private data. */ 283} __packed; 284 285/* Structure for command AR_CMD_RF_INIT/AR_CMD_FREQUENCY. */ 286struct ar_cmd_frequency { 287 uint32_t freq; 288 uint32_t dynht2040; 289 uint32_t htena; 290 uint32_t dsc_exp; 291 uint32_t dsc_man; 292 uint32_t dsc_shgi_exp; 293 uint32_t dsc_shgi_man; 294 uint32_t check_loop_count; 295} __packed; 296 297/* Firmware reply for command AR_CMD_FREQUENCY. */ 298struct ar_rsp_frequency { 299 uint32_t status; 300#define AR_CAL_ERR_AGC (1 << 0) /* AGC cal unfinished. */ 301#define AR_CAL_ERR_NF (1 << 1) /* Noise cal unfinished. */ 302#define AR_CAL_ERR_NF_VAL (1 << 2) /* NF value unexpected. */ 303 304 uint32_t nf[3]; /* Noisefloor. */ 305 uint32_t nf_ext[3]; /* Noisefloor ext. */ 306} __packed; 307 308/* Structure for command AR_CMD_EKEY. */ 309struct ar_cmd_ekey { 310 uint16_t uid; /* user ID */ 311 uint16_t kix; 312 uint16_t cipher; 313#define AR_CIPHER_NONE 0 314#define AR_CIPHER_WEP64 1 315#define AR_CIPHER_TKIP 2 316#define AR_CIPHER_AES 4 317#define AR_CIPHER_WEP128 5 318#define AR_CIPHER_WEP256 6 319#define AR_CIPHER_CENC 7 320 321 uint8_t macaddr[IEEE80211_ADDR_LEN]; 322 uint8_t key[16]; 323} __packed; 324 325/* Structure for event AR_EVT_TX_COMP. */ 326struct ar_evt_tx_comp { 327 uint8_t macaddr[IEEE80211_ADDR_LEN]; 328 uint32_t phy; 329 uint16_t status; 330#define AR_TX_STATUS_COMP 0 331#define AR_TX_STATUS_RETRY_COMP 1 332#define AR_TX_STATUS_FAILED 2 333} __packed; 334 335/* List of supported channels. */ 336static const uint8_t ar_chans[] = { 337 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 338 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 339 128, 132, 136, 140, 149, 153, 157, 161, 165, 34, 38, 42, 46 340}; 341 342/* 343 * This data is automatically generated from the "otus.ini" file. 344 * It is stored in a different way though, to reduce kernel's .rodata 345 * section overhead (5.1KB instead of 8.5KB). 346 */ 347 348/* NB: apply AR_PHY(). */ 349static const uint16_t ar5416_phy_regs[] = { 350 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, 0x008, 351 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, 0x010, 0x011, 352 0x012, 0x013, 0x014, 0x015, 0x016, 0x017, 0x018, 0x01a, 0x01b, 353 0x040, 0x041, 0x042, 0x043, 0x045, 0x046, 0x047, 0x048, 0x049, 354 0x04a, 0x04b, 0x04d, 0x04e, 0x04f, 0x051, 0x052, 0x053, 0x055, 355 0x056, 0x058, 0x059, 0x05c, 0x05d, 0x05e, 0x05f, 0x060, 0x061, 356 0x062, 0x063, 0x064, 0x065, 0x066, 0x067, 0x068, 0x069, 0x06a, 357 0x06b, 0x06c, 0x06d, 0x070, 0x071, 0x072, 0x073, 0x074, 0x075, 358 0x076, 0x077, 0x078, 0x079, 0x07a, 0x07b, 0x07c, 0x07f, 0x080, 359 0x081, 0x082, 0x083, 0x084, 0x085, 0x086, 0x087, 0x088, 0x089, 360 0x08a, 0x08b, 0x08c, 0x08d, 0x08e, 0x08f, 0x090, 0x091, 0x092, 361 0x093, 0x094, 0x095, 0x096, 0x097, 0x098, 0x099, 0x09a, 0x09b, 362 0x09c, 0x09d, 0x09e, 0x09f, 0x0a0, 0x0a1, 0x0a2, 0x0a3, 0x0a4, 363 0x0a5, 0x0a6, 0x0a7, 0x0a8, 0x0a9, 0x0aa, 0x0ab, 0x0ac, 0x0ad, 364 0x0ae, 0x0af, 0x0b0, 0x0b1, 0x0b2, 0x0b3, 0x0b4, 0x0b5, 0x0b6, 365 0x0b7, 0x0b8, 0x0b9, 0x0ba, 0x0bb, 0x0bc, 0x0bd, 0x0be, 0x0bf, 366 0x0c0, 0x0c1, 0x0c2, 0x0c3, 0x0c4, 0x0c5, 0x0c6, 0x0c7, 0x0c8, 367 0x0c9, 0x0ca, 0x0cb, 0x0cc, 0x0cd, 0x0ce, 0x0cf, 0x0d0, 0x0d1, 368 0x0d2, 0x0d3, 0x0d4, 0x0d5, 0x0d6, 0x0d7, 0x0d8, 0x0d9, 0x0da, 369 0x0db, 0x0dc, 0x0dd, 0x0de, 0x0df, 0x0e0, 0x0e1, 0x0e2, 0x0e3, 370 0x0e4, 0x0e5, 0x0e6, 0x0e7, 0x0e8, 0x0e9, 0x0ea, 0x0eb, 0x0ec, 371 0x0ed, 0x0ee, 0x0ef, 0x0f0, 0x0f1, 0x0f2, 0x0f3, 0x0f4, 0x0f5, 372 0x0f6, 0x0f7, 0x0f8, 0x0f9, 0x0fa, 0x0fb, 0x0fc, 0x0fd, 0x0fe, 373 0x0ff, 0x100, 0x103, 0x104, 0x105, 0x106, 0x107, 0x108, 0x109, 374 0x10a, 0x10b, 0x10c, 0x10d, 0x10e, 0x10f, 0x13c, 0x13d, 0x13e, 375 0x13f, 0x280, 0x281, 0x282, 0x283, 0x284, 0x285, 0x286, 0x287, 376 0x288, 0x289, 0x28a, 0x28b, 0x28c, 0x28d, 0x28e, 0x28f, 0x290, 377 0x291, 0x292, 0x293, 0x294, 0x295, 0x296, 0x297, 0x298, 0x299, 378 0x29a, 0x29b, 0x29d, 0x29e, 0x29f, 0x2c0, 0x2c1, 0x2c2, 0x2c3, 379 0x2c4, 0x2c5, 0x2c6, 0x2c7, 0x2c8, 0x2c9, 0x2ca, 0x2cb, 0x2cc, 380 0x2cd, 0x2ce, 0x2cf, 0x2d0, 0x2d1, 0x2d2, 0x2d3, 0x2d4, 0x2d5, 381 0x2d6, 0x2e2, 0x2e3, 0x2e4, 0x2e5, 0x2e6, 0x2e7, 0x2e8, 0x2e9, 382 0x2ea, 0x2eb, 0x2ec, 0x2ed, 0x2ee, 0x2ef, 0x2f0, 0x2f1, 0x2f2, 383 0x2f3, 0x2f4, 0x2f5, 0x2f6, 0x2f7, 0x2f8, 0x412, 0x448, 0x458, 384 0x683, 0x69b, 0x812, 0x848, 0x858, 0xa83, 0xa9b, 0xc19, 0xc57, 385 0xc5a, 0xc6f, 0xe9c, 0xed7, 0xed8, 0xed9, 0xeda, 0xedb, 0xedc, 386 0xedd, 0xede, 0xedf, 0xee0, 0xee1 387}; 388 389static const uint32_t ar5416_phy_vals_5ghz_20mhz[] = { 390 0x00000007, 0x00000300, 0x00000000, 0xad848e19, 0x7d14e000, 391 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 392 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 393 0x00200400, 0x206a002e, 0x1372161e, 0x001a6a65, 0x1284233c, 394 0x6c48b4e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd10, 395 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 396 0x00000000, 0x000007d0, 0x00000118, 0x10000fff, 0x0510081c, 397 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 398 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 399 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 400 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 401 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 402 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 403 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 404 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 405 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 406 0x00000000, 0x00000040, 0x00000080, 0x000001a1, 0x000001e1, 407 0x00000021, 0x00000061, 0x00000168, 0x000001a8, 0x000001e8, 408 0x00000028, 0x00000068, 0x00000189, 0x000001c9, 0x00000009, 409 0x00000049, 0x00000089, 0x00000170, 0x000001b0, 0x000001f0, 410 0x00000030, 0x00000070, 0x00000191, 0x000001d1, 0x00000011, 411 0x00000051, 0x00000091, 0x000001b8, 0x000001f8, 0x00000038, 412 0x00000078, 0x00000199, 0x000001d9, 0x00000019, 0x00000059, 413 0x00000099, 0x000000d9, 0x000000f9, 0x000000f9, 0x000000f9, 414 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 415 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 416 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 417 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 418 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 419 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 420 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 421 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 422 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 423 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 424 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 425 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 426 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 427 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 428 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 429 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 430 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 431 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 432 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 433 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 434 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 435 0x00000000, 0x00000008, 0x00000440, 0xd6be4788, 0x012e8160, 436 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 437 0x00000400, 0x000009b5, 0x00000000, 0x00000108, 0x3f3f3f3f, 438 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 439 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 440 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a9caa, 441 0x1ce739ce, 0x051701ce, 0x18010000, 0x30032602, 0x48073e06, 442 0x560b4c0a, 0x641a600f, 0x7a4f6e1b, 0x8c5b7e5a, 0x9d0f96cf, 443 0xb51fa69f, 0xcb3fbd07, 0x0000d7bf, 0x00000000, 0x00000000, 444 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 445 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 446 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 447 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 448 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 449 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 450 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a65, 0x0510001c, 451 0x00009b40, 0x012e8160, 0x09249126, 0x00180a65, 0x0510001c, 452 0x00009b40, 0x012e8160, 0x09249126, 0x0001c600, 0x004b6a8e, 453 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 454 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 455 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 456}; 457 458#ifdef notyet 459static const uint32_t ar5416_phy_vals_5ghz_40mhz[] = { 460 0x00000007, 0x000003c4, 0x00000000, 0xad848e19, 0x7d14e000, 461 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 462 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 463 0x00200400, 0x206a002e, 0x13721c1e, 0x001a6a65, 0x1284233c, 464 0x6c48b4e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd10, 465 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 466 0x00000000, 0x000007d0, 0x00000230, 0x10000fff, 0x0510081c, 467 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 468 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 469 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 470 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 471 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 472 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 473 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 474 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 475 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 476 0x00000000, 0x00000040, 0x00000080, 0x000001a1, 0x000001e1, 477 0x00000021, 0x00000061, 0x00000168, 0x000001a8, 0x000001e8, 478 0x00000028, 0x00000068, 0x00000189, 0x000001c9, 0x00000009, 479 0x00000049, 0x00000089, 0x00000170, 0x000001b0, 0x000001f0, 480 0x00000030, 0x00000070, 0x00000191, 0x000001d1, 0x00000011, 481 0x00000051, 0x00000091, 0x000001b8, 0x000001f8, 0x00000038, 482 0x00000078, 0x00000199, 0x000001d9, 0x00000019, 0x00000059, 483 0x00000099, 0x000000d9, 0x000000f9, 0x000000f9, 0x000000f9, 484 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 485 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 486 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 487 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 488 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 489 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 490 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 491 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 492 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 493 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 494 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 495 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 496 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 497 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 498 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 499 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 500 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 501 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 502 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 503 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 504 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 505 0x00000000, 0x00000008, 0x00000440, 0xd6be4788, 0x012e8160, 506 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 507 0x00000400, 0x000009b5, 0x00000000, 0x00000210, 0x3f3f3f3f, 508 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 509 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 510 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a9caa, 511 0x1ce739ce, 0x051701ce, 0x18010000, 0x30032602, 0x48073e06, 512 0x560b4c0a, 0x641a600f, 0x7a4f6e1b, 0x8c5b7e5a, 0x9d0f96cf, 513 0xb51fa69f, 0xcb3fbcbf, 0x0000d7bf, 0x00000000, 0x00000000, 514 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 515 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 516 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 517 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 518 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 519 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 520 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a65, 0x0510001c, 521 0x00009b40, 0x012e8160, 0x09249126, 0x00180a65, 0x0510001c, 522 0x00009b40, 0x012e8160, 0x09249126, 0x0001c600, 0x004b6a8e, 523 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 524 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 525 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 526}; 527#endif 528 529#ifdef notyet 530static const uint32_t ar5416_phy_vals_2ghz_40mhz[] = { 531 0x00000007, 0x000003c4, 0x00000000, 0xad848e19, 0x7d14e000, 532 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 533 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 534 0x00200400, 0x206a002e, 0x13721c24, 0x00197a68, 0x1284233c, 535 0x6c48b0e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd20, 536 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 537 0x00000000, 0x00000898, 0x00000268, 0x10000fff, 0x0510001c, 538 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 539 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 540 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 541 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 542 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 543 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 544 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 545 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 546 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 547 0x00000000, 0x00000040, 0x00000080, 0x00000141, 0x00000181, 548 0x000001c1, 0x00000001, 0x00000041, 0x000001a8, 0x000001e8, 549 0x00000028, 0x00000068, 0x000000a8, 0x00000169, 0x000001a9, 550 0x000001e9, 0x00000029, 0x00000069, 0x00000190, 0x000001d0, 551 0x00000010, 0x00000050, 0x00000090, 0x00000151, 0x00000191, 552 0x000001d1, 0x00000011, 0x00000051, 0x00000198, 0x000001d8, 553 0x00000018, 0x00000058, 0x00000098, 0x00000159, 0x00000199, 554 0x000001d9, 0x00000019, 0x00000059, 0x00000099, 0x000000d9, 555 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 556 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 557 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 558 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 559 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 560 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 561 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 562 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 563 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 564 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 565 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 566 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 567 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 568 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 569 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 570 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 571 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 572 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 573 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 574 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 575 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 576 0x00000000, 0x0000000e, 0x00000440, 0xd03e4788, 0x012a8160, 577 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 578 0x00000400, 0x000009b5, 0x00000000, 0x00000210, 0x3f3f3f3f, 579 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 580 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 581 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a7caa, 582 0x1ce739ce, 0x051701ce, 0x18010000, 0x2e032402, 0x4a0a3c06, 583 0x621a540b, 0x764f6c1b, 0x845b7a5a, 0x950f8ccf, 0xa5cf9b4f, 584 0xbddfaf1f, 0xd1ffc93f, 0x00000000, 0x00000000, 0x00000000, 585 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 586 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 587 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 588 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 589 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 590 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 591 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a68, 0x0510001c, 592 0x00009b40, 0x012a8160, 0x09249126, 0x00180a68, 0x0510001c, 593 0x00009b40, 0x012a8160, 0x09249126, 0x0001c600, 0x004b6a8e, 594 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 595 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 596 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 597}; 598#endif 599 600static const uint32_t ar5416_phy_vals_2ghz_20mhz[] = { 601 0x00000007, 0x00000300, 0x00000000, 0xad848e19, 0x7d14e000, 602 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 603 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 604 0x00200400, 0x206a002e, 0x137216a4, 0x00197a68, 0x1284233c, 605 0x6c48b0e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd20, 606 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 607 0x00000000, 0x00000898, 0x00000134, 0x10000fff, 0x0510001c, 608 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 609 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 610 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 611 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 612 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 613 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 614 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 615 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 616 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 617 0x00000000, 0x00000040, 0x00000080, 0x00000141, 0x00000181, 618 0x000001c1, 0x00000001, 0x00000041, 0x000001a8, 0x000001e8, 619 0x00000028, 0x00000068, 0x000000a8, 0x00000169, 0x000001a9, 620 0x000001e9, 0x00000029, 0x00000069, 0x00000190, 0x000001d0, 621 0x00000010, 0x00000050, 0x00000090, 0x00000151, 0x00000191, 622 0x000001d1, 0x00000011, 0x00000051, 0x00000198, 0x000001d8, 623 0x00000018, 0x00000058, 0x00000098, 0x00000159, 0x00000199, 624 0x000001d9, 0x00000019, 0x00000059, 0x00000099, 0x000000d9, 625 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 626 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 627 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 628 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 629 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 630 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 631 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 632 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 633 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 634 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 635 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 636 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 637 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 638 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 639 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 640 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 641 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 642 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 643 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 644 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 645 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 646 0x00000000, 0x0000000e, 0x00000440, 0xd03e4788, 0x012a8160, 647 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 648 0x00000400, 0x000009b5, 0x00000000, 0x00000108, 0x3f3f3f3f, 649 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 650 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 651 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a7caa, 652 0x1ce739ce, 0x051701ce, 0x18010000, 0x2e032402, 0x4a0a3c06, 653 0x621a540b, 0x764f6c1b, 0x845b7a5a, 0x950f8ccf, 0xa5cf9b4f, 654 0xbddfaf1f, 0xd1ffc93f, 0x00000000, 0x00000000, 0x00000000, 655 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 656 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 657 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 658 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 659 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 660 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 661 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a68, 0x0510001c, 662 0x00009b40, 0x012a8160, 0x09249126, 0x00180a68, 0x0510001c, 663 0x00009b40, 0x012a8160, 0x09249126, 0x0001c600, 0x004b6a8e, 664 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 665 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 666 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 667}; 668 669/* NB: apply AR_PHY(). */ 670static const uint8_t ar5416_banks_regs[] = { 671 0x2c, 0x38, 0x2c, 0x3b, 0x2c, 0x38, 0x3c, 0x2c, 0x3a, 0x2c, 0x39, 672 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 673 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 674 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 675 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 676 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x38, 0x2c, 0x2c, 677 0x2c, 0x3c 678}; 679 680static const uint32_t ar5416_banks_vals_5ghz[] = { 681 0x1e5795e5, 0x02008020, 0x02108421, 0x00000008, 0x0e73ff17, 682 0x00000420, 0x01400018, 0x000001a1, 0x00000001, 0x00000013, 683 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 684 0x00000000, 0x00004000, 0x00006c00, 0x00002c00, 0x00004800, 685 0x00004000, 0x00006000, 0x00001000, 0x00004000, 0x00007c00, 686 0x00007c00, 0x00007c00, 0x00007c00, 0x00007c00, 0x00087c00, 687 0x00007c00, 0x00005400, 0x00000c00, 0x00001800, 0x00007c00, 688 0x00006c00, 0x00006c00, 0x00007c00, 0x00002c00, 0x00003c00, 689 0x00003800, 0x00001c00, 0x00000800, 0x00000408, 0x00004c15, 690 0x00004188, 0x0000201e, 0x00010408, 0x00000801, 0x00000c08, 691 0x0000181e, 0x00001016, 0x00002800, 0x00004010, 0x0000081c, 692 0x00000115, 0x00000015, 0x00000066, 0x0000001c, 0x00000000, 693 0x00000004, 0x00000015, 0x0000001f, 0x00000000, 0x000000a0, 694 0x00000000, 0x00000040, 0x0000001c 695}; 696 697static const uint32_t ar5416_banks_vals_2ghz[] = { 698 0x1e5795e5, 0x02008020, 0x02108421, 0x00000008, 0x0e73ff17, 699 0x00000420, 0x01c00018, 0x000001a1, 0x00000001, 0x00000013, 700 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 701 0x00000000, 0x00004000, 0x00006c00, 0x00002c00, 0x00004800, 702 0x00004000, 0x00006000, 0x00001000, 0x00004000, 0x00007c00, 703 0x00007c00, 0x00007c00, 0x00007c00, 0x00007c00, 0x00087c00, 704 0x00007c00, 0x00005400, 0x00000c00, 0x00001800, 0x00007c00, 705 0x00006c00, 0x00006c00, 0x00007c00, 0x00002c00, 0x00003c00, 706 0x00003800, 0x00001c00, 0x00000800, 0x00000408, 0x00004c15, 707 0x00004188, 0x0000201e, 0x00010408, 0x00000801, 0x00000c08, 708 0x0000181e, 0x00001016, 0x00002800, 0x00004010, 0x0000081c, 709 0x00000115, 0x00000015, 0x00000066, 0x0000001c, 0x00000000, 710 0x00000004, 0x00000015, 0x0000001f, 0x00000400, 0x000000a0, 711 0x00000000, 0x00000040, 0x0000001c 712}; 713 714/* 715 * EEPROM. 716 */ 717/* Possible flags for opCapFlags. */ 718#define AR5416_OPFLAGS_11A 0x01 719#define AR5416_OPFLAGS_11G 0x02 720#define AR5416_OPFLAGS_5G_HT40 0x04 721#define AR5416_OPFLAGS_2G_HT40 0x08 722#define AR5416_OPFLAGS_5G_HT20 0x10 723#define AR5416_OPFLAGS_2G_HT20 0x20 724 725#define AR5416_NUM_5G_CAL_PIERS 8 726#define AR5416_NUM_2G_CAL_PIERS 4 727#define AR5416_NUM_5G_20_TARGET_POWERS 8 728#define AR5416_NUM_5G_40_TARGET_POWERS 8 729#define AR5416_NUM_2G_CCK_TARGET_POWERS 3 730#define AR5416_NUM_2G_20_TARGET_POWERS 4 731#define AR5416_NUM_2G_40_TARGET_POWERS 4 732#define AR5416_NUM_CTLS 24 733#define AR5416_NUM_BAND_EDGES 8 734#define AR5416_NUM_PD_GAINS 4 735#define AR5416_PD_GAIN_ICEPTS 5 736#define AR5416_EEPROM_MODAL_SPURS 5 737#define AR5416_MAX_CHAINS 2 738 739struct BaseEepHeader { 740 uint16_t length; 741 uint16_t checksum; 742 uint16_t version; 743 uint8_t opCapFlags; 744 uint8_t eepMisc; 745 uint16_t regDmn[2]; 746 uint8_t macAddr[6]; 747 uint8_t rxMask; 748 uint8_t txMask; 749 uint16_t rfSilent; 750 uint16_t blueToothOptions; 751 uint16_t deviceCap; 752 uint32_t binBuildNumber; 753 uint8_t deviceType; 754 uint8_t futureBase[33]; 755} __packed; 756 757struct spurChanStruct { 758 uint16_t spurChan; 759 uint8_t spurRangeLow; 760 uint8_t spurRangeHigh; 761} __packed; 762 763struct ModalEepHeader { 764 uint32_t antCtrlChain[AR5416_MAX_CHAINS]; 765 uint32_t antCtrlCommon; 766 int8_t antennaGainCh[AR5416_MAX_CHAINS]; 767 uint8_t switchSettling; 768 uint8_t txRxAttenCh[AR5416_MAX_CHAINS]; 769 uint8_t rxTxMarginCh[AR5416_MAX_CHAINS]; 770 uint8_t adcDesiredSize; 771 int8_t pgaDesiredSize; 772 uint8_t xlnaGainCh[AR5416_MAX_CHAINS]; 773 uint8_t txEndToXpaOff; 774 uint8_t txEndToRxOn; 775 uint8_t txFrameToXpaOn; 776 uint8_t thresh62; 777 uint8_t noiseFloorThreshCh[AR5416_MAX_CHAINS]; 778 uint8_t xpdGain; 779 uint8_t xpd; 780 int8_t iqCalICh[AR5416_MAX_CHAINS]; 781 int8_t iqCalQCh[AR5416_MAX_CHAINS]; 782 uint8_t pdGainOverlap; 783 uint8_t ob; 784 uint8_t db; 785 uint8_t xpaBiasLvl; 786 uint8_t pwrDecreaseFor2Chain; 787 uint8_t pwrDecreaseFor3Chain; 788 uint8_t txFrameToDataStart; 789 uint8_t txFrameToPaOn; 790 uint8_t ht40PowerIncForPdadc; 791 uint8_t bswAtten[AR5416_MAX_CHAINS]; 792 uint8_t bswMargin[AR5416_MAX_CHAINS]; 793 uint8_t swSettleHt40; 794 uint8_t futureModal[22]; 795 struct spurChanStruct spurChans[AR5416_EEPROM_MODAL_SPURS]; 796} __packed; 797 798struct calDataPerFreq { 799 uint8_t pwrPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]; 800 uint8_t vpdPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]; 801} __packed; 802 803struct CalTargetPowerLegacy { 804 uint8_t bChannel; 805 uint8_t tPow2x[4]; 806} __packed; 807 808struct CalTargetPowerHt { 809 uint8_t bChannel; 810 uint8_t tPow2x[8]; 811} __packed; 812 813struct CalCtlEdges { 814 uint8_t bChannel; 815 uint8_t tPowerFlag; 816} __packed; 817 818struct CalCtlData { 819 struct CalCtlEdges ctlEdges[AR5416_MAX_CHAINS][AR5416_NUM_BAND_EDGES]; 820} __packed; 821 822struct ar5416eeprom { 823 struct BaseEepHeader baseEepHeader; 824 uint8_t custData[64]; 825 struct ModalEepHeader modalHeader[2]; 826 uint8_t calFreqPier5G[AR5416_NUM_5G_CAL_PIERS]; 827 uint8_t calFreqPier2G[AR5416_NUM_2G_CAL_PIERS]; 828 struct calDataPerFreq calPierData5G[AR5416_MAX_CHAINS] 829 [AR5416_NUM_5G_CAL_PIERS]; 830 struct calDataPerFreq calPierData2G[AR5416_MAX_CHAINS] 831 [AR5416_NUM_2G_CAL_PIERS]; 832 struct CalTargetPowerLegacy calTPow5G[AR5416_NUM_5G_20_TARGET_POWERS]; 833 struct CalTargetPowerHt calTPow5GHT20[AR5416_NUM_5G_20_TARGET_POWERS]; 834 struct CalTargetPowerHt calTPow5GHT40[AR5416_NUM_5G_40_TARGET_POWERS]; 835 struct CalTargetPowerLegacy calTPowCck[AR5416_NUM_2G_CCK_TARGET_POWERS]; 836 struct CalTargetPowerLegacy calTPow2G[AR5416_NUM_2G_20_TARGET_POWERS]; 837 struct CalTargetPowerHt calTPow2GHT20[AR5416_NUM_2G_20_TARGET_POWERS]; 838 struct CalTargetPowerHt calTPow2GHT40[AR5416_NUM_2G_40_TARGET_POWERS]; 839 uint8_t ctlIndex[AR5416_NUM_CTLS]; 840 struct CalCtlData ctlData[AR5416_NUM_CTLS]; 841 uint8_t padding; 842} __packed; 843 844#define OTUS_NUM_CHAINS 2 845 846#define OTUS_UID(aid) (IEEE80211_AID(aid) + 4) 847 848#define OTUS_MAX_TXCMDSZ 64 849#define OTUS_RXBUFSZ (8 * 1024) 850/* Bumped for later A-MSDU and legacy fast-frames TX support */ 851#define OTUS_TXBUFSZ (8 * 1024) 852 853/* Default EDCA parameters for when QoS is disabled. */ 854static const struct wmeParams otus_edca_def[WME_NUM_AC] = { 855 { 4, 10, 3, 0 }, 856 { 4, 10, 7, 0 }, 857 { 3, 4, 2, 94 }, 858 { 2, 3, 2, 47 } 859}; 860 861#define OTUS_RIDX_CCK1 0 862#define OTUS_RIDX_OFDM6 4 863#define OTUS_RIDX_OFDM24 8 864#define OTUS_RIDX_MAX 11 865static const struct otus_rate { 866 uint8_t rate; 867 uint8_t mcs; 868} otus_rates[] = { 869 { 2, 0x0 }, 870 { 4, 0x1 }, 871 { 11, 0x2 }, 872 { 22, 0x3 }, 873 { 12, 0xb }, 874 { 18, 0xf }, 875 { 24, 0xa }, 876 { 36, 0xe }, 877 { 48, 0x9 }, 878 { 72, 0xd }, 879 { 96, 0x8 }, 880 { 108, 0xc } 881}; 882 883struct otus_rx_radiotap_header { 884 struct ieee80211_radiotap_header wr_ihdr; 885 uint8_t wr_flags; 886 uint8_t wr_rate; 887 uint16_t wr_chan_freq; 888 uint16_t wr_chan_flags; 889 uint8_t wr_antsignal; 890} __packed; 891 892#define OTUS_RX_RADIOTAP_PRESENT \ 893 (1 << IEEE80211_RADIOTAP_FLAGS | \ 894 1 << IEEE80211_RADIOTAP_RATE | \ 895 1 << IEEE80211_RADIOTAP_CHANNEL | \ 896 1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL) 897 898struct otus_tx_radiotap_header { 899 struct ieee80211_radiotap_header wt_ihdr; 900 uint8_t wt_flags; 901 uint8_t wt_rate; 902 uint16_t wt_chan_freq; 903 uint16_t wt_chan_flags; 904} __packed; 905 906#define OTUS_TX_RADIOTAP_PRESENT \ 907 (1 << IEEE80211_RADIOTAP_FLAGS | \ 908 1 << IEEE80211_RADIOTAP_RATE | \ 909 1 << IEEE80211_RADIOTAP_CHANNEL) 910 911struct otus_softc; 912 913/* Firmware commands */ 914struct otus_tx_cmd { 915 uint8_t *buf; 916 uint16_t buflen; 917 void *odata; 918 uint16_t odatalen; 919 uint16_t token; 920 STAILQ_ENTRY(otus_tx_cmd) next_cmd; 921}; 922 923/* TX, RX buffers */ 924struct otus_data { 925 struct otus_softc *sc; 926 uint8_t *buf; 927 uint16_t buflen; 928 struct mbuf *m; 929 struct ieee80211_node *ni; 930 STAILQ_ENTRY(otus_data) next; 931}; 932 933struct otus_node { 934 struct ieee80211_node ni; 935 uint64_t tx_done; 936 uint64_t tx_err; 937 uint64_t tx_retries; 938}; 939 940#define OTUS_CONFIG_INDEX 0 941#define OTUS_IFACE_INDEX 0 942 943/* 944 * The carl9170 firmware has the following specification: 945 * 946 * 0 - USB control 947 * 1 - TX 948 * 2 - RX 949 * 3 - IRQ 950 * 4 - CMD 951 * .. 952 * 10 - end 953 */ 954enum { 955 OTUS_BULK_TX, 956 OTUS_BULK_RX, 957 OTUS_BULK_IRQ, 958 OTUS_BULK_CMD, 959 OTUS_N_XFER 960}; 961 962struct otus_vap { 963 struct ieee80211vap vap; 964 int (*newstate)(struct ieee80211vap *, 965 enum ieee80211_state, int); 966}; 967#define OTUS_VAP(vap) ((struct otus_vap *)(vap)) 968#define OTUS_NODE(ni) ((struct otus_node *)(ni)) 969 970#define OTUS_LOCK(sc) mtx_lock(&(sc)->sc_mtx) 971#define OTUS_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx) 972#define OTUS_LOCK_ASSERT(sc) mtx_assert(&(sc)->sc_mtx, MA_OWNED) 973#define OTUS_UNLOCK_ASSERT(sc) mtx_assert(&(sc)->sc_mtx, MA_NOTOWNED) 974 975/* XXX the TX/RX endpoint dump says it's 0x200, (512)? */ 976#define OTUS_MAX_TXSZ 512 977#define OTUS_MAX_RXSZ 512 978/* intr/cmd endpoint dump says 0x40 */ 979#define OTUS_MAX_CTRLSZ 64 980 981#define OTUS_CMD_LIST_COUNT 32 982#define OTUS_RX_LIST_COUNT 128 983#define OTUS_TX_LIST_COUNT 32 984 985struct otus_softc { 986 struct ieee80211com sc_ic; 987 struct mbufq sc_snd; 988 device_t sc_dev; 989 struct usb_device *sc_udev; 990 int (*sc_newstate)(struct ieee80211com *, 991 enum ieee80211_state, int); 992 void (*sc_led_newstate)(struct otus_softc *); 993 struct usbd_interface *sc_iface; 994 struct mtx sc_mtx; 995 996 struct ar5416eeprom eeprom; 997 uint8_t capflags; 998 uint8_t rxmask; 999 uint8_t txmask; 1000 int sc_running:1, 1001 sc_calibrating:1, 1002 sc_scanning:1; 1003 1004 int sc_if_flags; 1005 int sc_tx_timer; 1006 int fixed_ridx; 1007 int bb_reset; 1008 1009 struct ieee80211_channel *sc_curchan; 1010 1011 struct task tx_task; 1012 struct timeout_task scan_to; 1013 struct timeout_task calib_to; 1014 1015 /* register batch writes */ 1016 int write_idx; 1017 1018 uint32_t led_state; 1019 1020 /* current firmware message serial / token number */ 1021 int token; 1022 1023 /* current noisefloor, from SET_FREQUENCY */ 1024 int sc_nf[OTUS_NUM_CHAINS]; 1025 1026 /* How many pending, active transmit frames */ 1027 int sc_tx_n_pending; 1028 int sc_tx_n_active; 1029 1030 const uint32_t *phy_vals; 1031 1032 struct { 1033 uint32_t reg; 1034 uint32_t val; 1035 } __packed write_buf[AR_MAX_WRITE_IDX + 1]; 1036 1037 struct otus_data sc_rx[OTUS_RX_LIST_COUNT]; 1038 struct otus_data sc_tx[OTUS_TX_LIST_COUNT]; 1039 struct otus_tx_cmd sc_cmd[OTUS_CMD_LIST_COUNT]; 1040 1041 struct usb_xfer *sc_xfer[OTUS_N_XFER]; 1042 1043 STAILQ_HEAD(, otus_data) sc_rx_active; 1044 STAILQ_HEAD(, otus_data) sc_rx_inactive; 1045 STAILQ_HEAD(, otus_data) sc_tx_active[OTUS_N_XFER]; 1046 STAILQ_HEAD(, otus_data) sc_tx_inactive; 1047 STAILQ_HEAD(, otus_data) sc_tx_pending[OTUS_N_XFER]; 1048 1049 STAILQ_HEAD(, otus_tx_cmd) sc_cmd_active; 1050 STAILQ_HEAD(, otus_tx_cmd) sc_cmd_inactive; 1051 STAILQ_HEAD(, otus_tx_cmd) sc_cmd_pending; 1052 STAILQ_HEAD(, otus_tx_cmd) sc_cmd_waiting; 1053 1054 union { 1055 struct otus_rx_radiotap_header th; 1056 uint8_t pad[64]; 1057 } sc_rxtapu; 1058#define sc_rxtap sc_rxtapu.th 1059 1060 union { 1061 struct otus_tx_radiotap_header th; 1062 uint8_t pad[64]; 1063 } sc_txtapu; 1064#define sc_txtap sc_txtapu.th 1065}; 1066 1067#endif /* __IF_OTUSREG_H__ */ 1068