if_otusreg.h revision 288253
175295Sdes/* $OpenBSD: if_otusreg.h,v 1.9 2013/11/26 20:33:18 deraadt Exp $ */ 275295Sdes 375295Sdes/*- 475295Sdes * Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr> 575295Sdes * Copyright (c) 2007-2008 Atheros Communications, Inc. 675295Sdes * Copyright (c) 2015 Adrian Chadd <adrian@FreeBSD.org> 775295Sdes * 875295Sdes * Permission to use, copy, modify, and distribute this software for any 975295Sdes * purpose with or without fee is hereby granted, provided that the above 1075295Sdes * copyright notice and this permission notice appear in all copies. 1175295Sdes * 1275295Sdes * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 1375295Sdes * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 1475295Sdes * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 1575295Sdes * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 1675295Sdes * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 1775295Sdes * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 1875295Sdes * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 1975295Sdes * 2075295Sdes * $FreeBSD: head/sys/dev/otus/if_otusreg.h 288253 2015-09-26 07:08:35Z adrian $ 2175295Sdes */ 2275295Sdes#ifndef __IF_OTUSREG_H__ 2375295Sdes#define __IF_OTUSREG_H__ 2475295Sdes 2575295Sdes/* USB Endpoints addresses. */ 2675295Sdes#define AR_EPT_BULK_TX_NO (UE_DIR_OUT | 1) 2775295Sdes#define AR_EPT_BULK_RX_NO (UE_DIR_IN | 2) 2875295Sdes#define AR_EPT_INTR_RX_NO (UE_DIR_IN | 3) 2975295Sdes#define AR_EPT_INTR_TX_NO (UE_DIR_OUT | 4) 3075295Sdes 3175295Sdes/* USB Requests. */ 3275295Sdes#define AR_FW_DOWNLOAD 0x30 3375295Sdes#define AR_FW_DOWNLOAD_COMPLETE 0x31 3478073Sdes 3575295Sdes/* Maximum number of writes that can fit in a single FW command is 7. */ 3677965Sdes#define AR_MAX_WRITE_IDX 6 /* 56 bytes */ 3784246Sdes 3875295Sdes#define AR_FW_INIT_ADDR 0x102800 3975295Sdes#define AR_FW_MAIN_ADDR 0x200000 4075295Sdes#define AR_USB_MODE_CTRL 0x1e1108 4175295Sdes 4275295Sdes/* 4375295Sdes * AR9170 MAC registers. 4477998Sdes */ 4575295Sdes#define AR_MAC_REG_BASE 0x1c3000 4675295Sdes#define AR_MAC_REG_MAC_ADDR_L (AR_MAC_REG_BASE + 0x610) 4789071Smsmith#define AR_MAC_REG_MAC_ADDR_H (AR_MAC_REG_BASE + 0x614) 4884246Sdes#define AR_MAC_REG_BSSID_L (AR_MAC_REG_BASE + 0x618) 4975295Sdes#define AR_MAC_REG_BSSID_H (AR_MAC_REG_BASE + 0x61c) 5075295Sdes#define AR_MAC_REG_GROUP_HASH_TBL_L (AR_MAC_REG_BASE + 0x624) 5175295Sdes#define AR_MAC_REG_GROUP_HASH_TBL_H (AR_MAC_REG_BASE + 0x628) 5275295Sdes#define AR_MAC_REG_BASIC_RATE (AR_MAC_REG_BASE + 0x630) 5384246Sdes#define AR_MAC_REG_MANDATORY_RATE (AR_MAC_REG_BASE + 0x634) 5484246Sdes#define AR_MAC_REG_RTS_CTS_RATE (AR_MAC_REG_BASE + 0x638) 5584246Sdes#define AR_MAC_REG_BACKOFF_PROTECT (AR_MAC_REG_BASE + 0x63c) 5684246Sdes#define AR_MAC_REG_RX_THRESHOLD (AR_MAC_REG_BASE + 0x640) 5784246Sdes#define AR_MAC_REG_RX_PE_DELAY (AR_MAC_REG_BASE + 0x64c) 5884246Sdes#define AR_MAC_REG_DYNAMIC_SIFS_ACK (AR_MAC_REG_BASE + 0x658) 5984246Sdes#define AR_MAC_REG_SNIFFER (AR_MAC_REG_BASE + 0x674) 6084246Sdes#define AR_MAC_REG_ACK_EXTENSION (AR_MAC_REG_BASE + 0x690) 6184246Sdes#define AR_MAC_REG_EIFS_AND_SIFS (AR_MAC_REG_BASE + 0x698) 6284246Sdes#define AR_MAC_REG_BUSY (AR_MAC_REG_BASE + 0x6e8) 6375295Sdes#define AR_MAC_REG_BUSY_EXT (AR_MAC_REG_BASE + 0x6ec) 6484246Sdes#define AR_MAC_REG_SLOT_TIME (AR_MAC_REG_BASE + 0x6f0) 6584246Sdes#define AR_MAC_REG_AC0_CW (AR_MAC_REG_BASE + 0xb00) 6675295Sdes#define AR_MAC_REG_AC1_CW (AR_MAC_REG_BASE + 0xb04) 6775295Sdes#define AR_MAC_REG_AC2_CW (AR_MAC_REG_BASE + 0xb08) 6875295Sdes#define AR_MAC_REG_AC3_CW (AR_MAC_REG_BASE + 0xb0c) 6984246Sdes#define AR_MAC_REG_AC4_CW (AR_MAC_REG_BASE + 0xb10) 7084246Sdes#define AR_MAC_REG_AC1_AC0_AIFS (AR_MAC_REG_BASE + 0xb14) 7175295Sdes#define AR_MAC_REG_AC3_AC2_AIFS (AR_MAC_REG_BASE + 0xb18) 7275295Sdes#define AR_MAC_REG_RETRY_MAX (AR_MAC_REG_BASE + 0xb28) 7375295Sdes#define AR_MAC_REG_TXOP_NOT_ENOUGH_INDICATION \ 7475295Sdes (AR_MAC_REG_BASE + 0xb30) 7575295Sdes#define AR_MAC_REG_AC1_AC0_TXOP (AR_MAC_REG_BASE + 0xb44) 7675295Sdes#define AR_MAC_REG_AC3_AC2_TXOP (AR_MAC_REG_BASE + 0xb48) 7775295Sdes#define AR_MAC_REG_OFDM_PHY_ERRORS (AR_MAC_REG_BASE + 0xcb4) 7875295Sdes#define AR_MAC_REG_CCK_PHY_ERRORS (AR_MAC_REG_BASE + 0xcb8) 7975295Sdes#define AR_MAC_REG_BCN_HT1 (AR_MAC_REG_BASE + 0xda0) 8075295Sdes 8193818Sjhb/* Possible values for register AR_USB_MODE_CTRL. */ 8293818Sjhb#define AR_USB_DS_ENA (1 << 0) 8384246Sdes#define AR_USB_US_ENA (1 << 1) 8484246Sdes#define AR_USB_US_PACKET_MODE (1 << 3) 8575295Sdes#define AR_USB_RX_STREAM_4K (0 << 4) 8675295Sdes#define AR_USB_RX_STREAM_8K (1 << 4) 8775295Sdes#define AR_USB_RX_STREAM_16K (2 << 4) 8875295Sdes#define AR_USB_RX_STREAM_32K (3 << 4) 8975295Sdes#define AR_USB_TX_STREAM_MODE (1 << 6) 9075295Sdes 9175295Sdes#define AR_LED0_ON (1 << 0) 9275295Sdes#define AR_LED1_ON (1 << 1) 9384246Sdes 9484386Sdes/* 9584386Sdes * PHY registers. 9684386Sdes */ 9775295Sdes#define AR_PHY_BASE 0x1c5800 9875295Sdes#define AR_PHY(reg) (AR_PHY_BASE + (reg) * 4) 9975295Sdes#define AR_PHY_TURBO (AR_PHY_BASE + 0x0004) 10075295Sdes#define AR_PHY_RF_CTL3 (AR_PHY_BASE + 0x0028) 10175295Sdes#define AR_PHY_RF_CTL4 (AR_PHY_BASE + 0x0034) 10275295Sdes#define AR_PHY_SETTLING (AR_PHY_BASE + 0x0044) 10375295Sdes#define AR_PHY_RXGAIN (AR_PHY_BASE + 0x0048) 10477998Sdes#define AR_PHY_DESIRED_SZ (AR_PHY_BASE + 0x0050) 10577998Sdes#define AR_PHY_FIND_SIG (AR_PHY_BASE + 0x0058) 10675295Sdes#define AR_PHY_AGC_CTL1 (AR_PHY_BASE + 0x005c) 10777998Sdes#define AR_PHY_SFCORR (AR_PHY_BASE + 0x0068) 10875295Sdes#define AR_PHY_SFCORR_LOW (AR_PHY_BASE + 0x006c) 10988234Sdillon#define AR_PHY_TIMING_CTRL4 (AR_PHY_BASE + 0x0120) 11088234Sdillon#define AR_PHY_TIMING5 (AR_PHY_BASE + 0x0124) 11197940Sdes#define AR_PHY_POWER_TX_RATE1 (AR_PHY_BASE + 0x0134) 11288234Sdillon#define AR_PHY_POWER_TX_RATE2 (AR_PHY_BASE + 0x0138) 11388234Sdillon#define AR_PHY_POWER_TX_RATE_MAX (AR_PHY_BASE + 0x013c) 11475295Sdes#define AR_PHY_SWITCH_CHAIN_0 (AR_PHY_BASE + 0x0160) 11584246Sdes#define AR_PHY_SWITCH_COM (AR_PHY_BASE + 0x0164) 11677998Sdes#define AR_PHY_HEAVY_CLIP_ENABLE (AR_PHY_BASE + 0x01e0) 11784246Sdes#define AR_PHY_CCK_DETECT (AR_PHY_BASE + 0x0a08) 11875295Sdes#define AR_PHY_GAIN_2GHZ (AR_PHY_BASE + 0x0a0c) 11984246Sdes#define AR_PHY_POWER_TX_RATE3 (AR_PHY_BASE + 0x0a34) 12075295Sdes#define AR_PHY_POWER_TX_RATE4 (AR_PHY_BASE + 0x0a38) 12188234Sdillon#define AR_PHY_TPCRG1 (AR_PHY_BASE + 0x0a58) 12288234Sdillon#define AR_PHY_POWER_TX_RATE5 (AR_PHY_BASE + 0x0b8c) 12399566Sjeff#define AR_PHY_POWER_TX_RATE6 (AR_PHY_BASE + 0x0b90) 12499566Sjeff#define AR_PHY_POWER_TX_RATE7 (AR_PHY_BASE + 0x0bcc) 12575295Sdes#define AR_PHY_POWER_TX_RATE8 (AR_PHY_BASE + 0x0bd0) 12675295Sdes#define AR_PHY_POWER_TX_RATE9 (AR_PHY_BASE + 0x0bd4) 12777998Sdes#define AR_PHY_CCA (AR_PHY_BASE + 0x3064) 12877998Sdes 12977998Sdes#define AR_SEEPROM_HW_TYPE_OFFSET 0x1374 13077998Sdes#define AR_EEPROM_OFFSET 0x1600 13177998Sdes 13275295Sdes#define AR_BANK4_CHUP (1 << 0) 13375295Sdes#define AR_BANK4_BMODE_LF_SYNTH_FREQ (1 << 1) 13475295Sdes#define AR_BANK4_AMODE_REFSEL(x) ((x) << 2) 13577998Sdes#define AR_BANK4_ADDR(x) ((x) << 5) 13684246Sdes 13784246Sdes/* Tx descriptor. */ 13875295Sdesstruct ar_tx_head { 13977998Sdes uint16_t len; 14075295Sdes uint16_t macctl; 14177998Sdes#define AR_TX_MAC_RTS (1 << 0) 14277998Sdes#define AR_TX_MAC_CTS (1 << 1) 14377998Sdes#define AR_TX_MAC_BACKOFF (1 << 3) 14475295Sdes#define AR_TX_MAC_NOACK (1 << 2) 14575295Sdes#define AR_TX_MAC_HW_DUR (1 << 9) 146101308Sjeff#define AR_TX_MAC_QID(qid) ((qid) << 10) 14775295Sdes#define AR_TX_MAC_RATE_PROBING (1 << 15) 14875295Sdes 14975295Sdes uint32_t phyctl; 15084246Sdes/* Modulation type. */ 15175295Sdes#define AR_TX_PHY_MT_CCK 0 15275295Sdes#define AR_TX_PHY_MT_OFDM 1 15375295Sdes#define AR_TX_PHY_MT_HT 2 15477998Sdes#define AR_TX_PHY_GF (1 << 2) 15575295Sdes#define AR_TX_PHY_BW_SHIFT 3 15675295Sdes#define AR_TX_PHY_TPC_SHIFT 9 15775295Sdes#define AR_TX_PHY_ANTMSK(msk) ((msk) << 15) 15875295Sdes#define AR_TX_PHY_MCS(mcs) ((mcs) << 18) 15975295Sdes#define AR_TX_PHY_SHGI (1U << 31) 16075295Sdes} __packed; 16175295Sdes 16275295Sdes/* USB Rx stream mode header. */ 16377998Sdesstruct ar_rx_head { 16477998Sdes uint16_t len; 16575295Sdes uint16_t tag; 16675295Sdes#define AR_RX_HEAD_TAG 0x4e00 16775295Sdes} __packed; 16884246Sdes 16977998Sdes/* Rx descriptor. */ 17084246Sdesstruct ar_rx_tail { 17184246Sdes uint8_t rssi_ant[3]; 17284246Sdes uint8_t rssi_ant_ext[3]; 17384246Sdes uint8_t rssi; /* Combined RSSI. */ 17484246Sdes uint8_t evm[2][6]; /* Error Vector Magnitude. */ 17575295Sdes uint8_t phy_err; 17699566Sjeff uint8_t sa_idx; 17799566Sjeff uint8_t da_idx; 17899566Sjeff uint8_t error; 17975295Sdes#define AR_RX_ERROR_TIMEOUT (1 << 0) 18075295Sdes#define AR_RX_ERROR_OVERRUN (1 << 1) 18175295Sdes#define AR_RX_ERROR_DECRYPT (1 << 2) 18275295Sdes#define AR_RX_ERROR_FCS (1 << 3) 18375295Sdes#define AR_RX_ERROR_BAD_RA (1 << 4) 18475295Sdes#define AR_RX_ERROR_PLCP (1 << 5) 18575295Sdes#define AR_RX_ERROR_MMIC (1 << 6) 18675295Sdes 18775295Sdes uint8_t status; 18877998Sdes/* Modulation type (same as AR_TX_PHY_MT). */ 18988234Sdillon#define AR_RX_STATUS_MT_MASK 0x3 19088234Sdillon#define AR_RX_STATUS_MT_CCK 0 19197940Sdes#define AR_RX_STATUS_MT_OFDM 1 19275295Sdes#define AR_RX_STATUS_MT_HT 2 19384246Sdes#define AR_RX_STATUS_SHPREAMBLE (1 << 3) 19484246Sdes} __packed; 19584246Sdes 19684246Sdes#define AR_PLCP_HDR_LEN 12 19784246Sdes/* Magic PLCP header for firmware notifications through Rx bulk pipe. */ 19884246Sdesstatic uint8_t AR_PLCP_HDR_INTR[] = { 19977998Sdes 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 20084246Sdes 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 20177998Sdes}; 20284246Sdes 20384246Sdes/* Firmware command/reply header. */ 20477998Sdesstruct ar_cmd_hdr { 20575295Sdes uint8_t len; 20675295Sdes uint8_t code; 20775295Sdes#define AR_CMD_RREG 0x00 20884246Sdes#define AR_CMD_WREG 0x01 20984246Sdes#define AR_CMD_RMEM 0x02 21084246Sdes#define AR_CMD_WMEM 0x03 21184246Sdes#define AR_CMD_BITAND 0x04 21284246Sdes#define AR_CMD_BITOR 0x05 21384246Sdes#define AR_CMD_EKEY 0x28 21484246Sdes#define AR_CMD_DKEY 0x29 21584246Sdes#define AR_CMD_FREQUENCY 0x30 21684246Sdes#define AR_CMD_RF_INIT 0x31 21784246Sdes#define AR_CMD_SYNTH 0x32 21884246Sdes#define AR_CMD_FREQ_STRAT 0x33 21984246Sdes#define AR_CMD_ECHO 0x80 22084246Sdes#define AR_CMD_TALLY 0x81 22184246Sdes#define AR_CMD_TALLY_APD 0x82 22284246Sdes#define AR_CMD_CONFIG 0x83 22384246Sdes#define AR_CMD_RESET 0x90 22484246Sdes#define AR_CMD_DKRESET 0x91 22584246Sdes#define AR_CMD_DKTX_STATUS 0x92 22684246Sdes#define AR_CMD_FDC 0xa0 22784246Sdes#define AR_CMD_WREEPROM 0xb0 22884246Sdes#define AR_CMD_WFLASH AR_CMD_WREEPROM 22984246Sdes#define AR_CMD_FLASH_ERASE 0xb1 23088868Stanimura#define AR_CMD_FLASH_PROG 0xb2 23188868Stanimura#define AR_CMD_FLASH_CHKSUM 0xb3 23284246Sdes#define AR_CMD_FLASH_READ 0xb4 23384246Sdes#define AR_CMD_FW_DL_INIT 0xb5 23484246Sdes#define AR_CMD_MEM_WREEPROM 0xbb 23584386Sdes/* Those have the 2 MSB set to 1. */ 23684386Sdes#define AR_EVT_BEACON 0x00 23784386Sdes#define AR_EVT_TX_COMP 0x01 23884386Sdes#define AR_EVT_TBTT 0x02 23984386Sdes#define AR_EVT_ATIM 0x03 24084386Sdes#define AR_EVT_DO_BB_RESET 0x09 24184386Sdes 24284386Sdes uint16_t token; /* Driver private data. */ 24397940Sdes} __packed; 24484386Sdes 24584386Sdes/* Structure for command AR_CMD_RF_INIT/AR_CMD_FREQUENCY. */ 24684386Sdesstruct ar_cmd_frequency { 24784386Sdes uint32_t freq; 24884386Sdes uint32_t dynht2040; 24984386Sdes uint32_t htena; 25084386Sdes uint32_t dsc_exp; 25184386Sdes uint32_t dsc_man; 25284386Sdes uint32_t dsc_shgi_exp; 25384386Sdes uint32_t dsc_shgi_man; 25484386Sdes uint32_t check_loop_count; 25584386Sdes} __packed; 25688868Stanimura 25788868Stanimura/* Firmware reply for command AR_CMD_FREQUENCY. */ 25884386Sdesstruct ar_rsp_frequency { 25984386Sdes uint32_t status; 26084386Sdes#define AR_CAL_ERR_AGC (1 << 0) /* AGC cal unfinished. */ 26184386Sdes#define AR_CAL_ERR_NF (1 << 1) /* Noise cal unfinished. */ 26284386Sdes#define AR_CAL_ERR_NF_VAL (1 << 2) /* NF value unexpected. */ 26384386Sdes 26484386Sdes uint32_t nf[3]; /* Noisefloor. */ 26584386Sdes uint32_t nf_ext[3]; /* Noisefloor ext. */ 26684386Sdes} __packed; 26784386Sdes 26884386Sdes/* Structure for command AR_CMD_EKEY. */ 26984386Sdesstruct ar_cmd_ekey { 27084386Sdes uint16_t uid; /* user ID */ 27184386Sdes uint16_t kix; 272 uint16_t cipher; 273#define AR_CIPHER_NONE 0 274#define AR_CIPHER_WEP64 1 275#define AR_CIPHER_TKIP 2 276#define AR_CIPHER_AES 4 277#define AR_CIPHER_WEP128 5 278#define AR_CIPHER_WEP256 6 279#define AR_CIPHER_CENC 7 280 281 uint8_t macaddr[IEEE80211_ADDR_LEN]; 282 uint8_t key[16]; 283} __packed; 284 285/* Structure for event AR_EVT_TX_COMP. */ 286struct ar_evt_tx_comp { 287 uint8_t macaddr[IEEE80211_ADDR_LEN]; 288 uint32_t phy; 289 uint16_t status; 290#define AR_TX_STATUS_COMP 0 291#define AR_TX_STATUS_RETRY_COMP 1 292#define AR_TX_STATUS_FAILED 2 293} __packed; 294 295/* List of supported channels. */ 296static const uint8_t ar_chans[] = { 297 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 298 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 299 128, 132, 136, 140, 149, 153, 157, 161, 165, 34, 38, 42, 46 300}; 301 302/* 303 * This data is automatically generated from the "otus.ini" file. 304 * It is stored in a different way though, to reduce kernel's .rodata 305 * section overhead (5.1KB instead of 8.5KB). 306 */ 307 308/* NB: apply AR_PHY(). */ 309static const uint16_t ar5416_phy_regs[] = { 310 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, 0x008, 311 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, 0x010, 0x011, 312 0x012, 0x013, 0x014, 0x015, 0x016, 0x017, 0x018, 0x01a, 0x01b, 313 0x040, 0x041, 0x042, 0x043, 0x045, 0x046, 0x047, 0x048, 0x049, 314 0x04a, 0x04b, 0x04d, 0x04e, 0x04f, 0x051, 0x052, 0x053, 0x055, 315 0x056, 0x058, 0x059, 0x05c, 0x05d, 0x05e, 0x05f, 0x060, 0x061, 316 0x062, 0x063, 0x064, 0x065, 0x066, 0x067, 0x068, 0x069, 0x06a, 317 0x06b, 0x06c, 0x06d, 0x070, 0x071, 0x072, 0x073, 0x074, 0x075, 318 0x076, 0x077, 0x078, 0x079, 0x07a, 0x07b, 0x07c, 0x07f, 0x080, 319 0x081, 0x082, 0x083, 0x084, 0x085, 0x086, 0x087, 0x088, 0x089, 320 0x08a, 0x08b, 0x08c, 0x08d, 0x08e, 0x08f, 0x090, 0x091, 0x092, 321 0x093, 0x094, 0x095, 0x096, 0x097, 0x098, 0x099, 0x09a, 0x09b, 322 0x09c, 0x09d, 0x09e, 0x09f, 0x0a0, 0x0a1, 0x0a2, 0x0a3, 0x0a4, 323 0x0a5, 0x0a6, 0x0a7, 0x0a8, 0x0a9, 0x0aa, 0x0ab, 0x0ac, 0x0ad, 324 0x0ae, 0x0af, 0x0b0, 0x0b1, 0x0b2, 0x0b3, 0x0b4, 0x0b5, 0x0b6, 325 0x0b7, 0x0b8, 0x0b9, 0x0ba, 0x0bb, 0x0bc, 0x0bd, 0x0be, 0x0bf, 326 0x0c0, 0x0c1, 0x0c2, 0x0c3, 0x0c4, 0x0c5, 0x0c6, 0x0c7, 0x0c8, 327 0x0c9, 0x0ca, 0x0cb, 0x0cc, 0x0cd, 0x0ce, 0x0cf, 0x0d0, 0x0d1, 328 0x0d2, 0x0d3, 0x0d4, 0x0d5, 0x0d6, 0x0d7, 0x0d8, 0x0d9, 0x0da, 329 0x0db, 0x0dc, 0x0dd, 0x0de, 0x0df, 0x0e0, 0x0e1, 0x0e2, 0x0e3, 330 0x0e4, 0x0e5, 0x0e6, 0x0e7, 0x0e8, 0x0e9, 0x0ea, 0x0eb, 0x0ec, 331 0x0ed, 0x0ee, 0x0ef, 0x0f0, 0x0f1, 0x0f2, 0x0f3, 0x0f4, 0x0f5, 332 0x0f6, 0x0f7, 0x0f8, 0x0f9, 0x0fa, 0x0fb, 0x0fc, 0x0fd, 0x0fe, 333 0x0ff, 0x100, 0x103, 0x104, 0x105, 0x106, 0x107, 0x108, 0x109, 334 0x10a, 0x10b, 0x10c, 0x10d, 0x10e, 0x10f, 0x13c, 0x13d, 0x13e, 335 0x13f, 0x280, 0x281, 0x282, 0x283, 0x284, 0x285, 0x286, 0x287, 336 0x288, 0x289, 0x28a, 0x28b, 0x28c, 0x28d, 0x28e, 0x28f, 0x290, 337 0x291, 0x292, 0x293, 0x294, 0x295, 0x296, 0x297, 0x298, 0x299, 338 0x29a, 0x29b, 0x29d, 0x29e, 0x29f, 0x2c0, 0x2c1, 0x2c2, 0x2c3, 339 0x2c4, 0x2c5, 0x2c6, 0x2c7, 0x2c8, 0x2c9, 0x2ca, 0x2cb, 0x2cc, 340 0x2cd, 0x2ce, 0x2cf, 0x2d0, 0x2d1, 0x2d2, 0x2d3, 0x2d4, 0x2d5, 341 0x2d6, 0x2e2, 0x2e3, 0x2e4, 0x2e5, 0x2e6, 0x2e7, 0x2e8, 0x2e9, 342 0x2ea, 0x2eb, 0x2ec, 0x2ed, 0x2ee, 0x2ef, 0x2f0, 0x2f1, 0x2f2, 343 0x2f3, 0x2f4, 0x2f5, 0x2f6, 0x2f7, 0x2f8, 0x412, 0x448, 0x458, 344 0x683, 0x69b, 0x812, 0x848, 0x858, 0xa83, 0xa9b, 0xc19, 0xc57, 345 0xc5a, 0xc6f, 0xe9c, 0xed7, 0xed8, 0xed9, 0xeda, 0xedb, 0xedc, 346 0xedd, 0xede, 0xedf, 0xee0, 0xee1 347}; 348 349static const uint32_t ar5416_phy_vals_5ghz_20mhz[] = { 350 0x00000007, 0x00000300, 0x00000000, 0xad848e19, 0x7d14e000, 351 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 352 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 353 0x00200400, 0x206a002e, 0x1372161e, 0x001a6a65, 0x1284233c, 354 0x6c48b4e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd10, 355 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 356 0x00000000, 0x000007d0, 0x00000118, 0x10000fff, 0x0510081c, 357 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 358 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 359 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 360 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 361 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 362 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 363 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 364 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 365 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 366 0x00000000, 0x00000040, 0x00000080, 0x000001a1, 0x000001e1, 367 0x00000021, 0x00000061, 0x00000168, 0x000001a8, 0x000001e8, 368 0x00000028, 0x00000068, 0x00000189, 0x000001c9, 0x00000009, 369 0x00000049, 0x00000089, 0x00000170, 0x000001b0, 0x000001f0, 370 0x00000030, 0x00000070, 0x00000191, 0x000001d1, 0x00000011, 371 0x00000051, 0x00000091, 0x000001b8, 0x000001f8, 0x00000038, 372 0x00000078, 0x00000199, 0x000001d9, 0x00000019, 0x00000059, 373 0x00000099, 0x000000d9, 0x000000f9, 0x000000f9, 0x000000f9, 374 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 375 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 376 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 377 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 378 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 379 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 380 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 381 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 382 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 383 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 384 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 385 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 386 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 387 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 388 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 389 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 390 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 391 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 392 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 393 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 394 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 395 0x00000000, 0x00000008, 0x00000440, 0xd6be4788, 0x012e8160, 396 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 397 0x00000400, 0x000009b5, 0x00000000, 0x00000108, 0x3f3f3f3f, 398 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 399 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 400 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a9caa, 401 0x1ce739ce, 0x051701ce, 0x18010000, 0x30032602, 0x48073e06, 402 0x560b4c0a, 0x641a600f, 0x7a4f6e1b, 0x8c5b7e5a, 0x9d0f96cf, 403 0xb51fa69f, 0xcb3fbd07, 0x0000d7bf, 0x00000000, 0x00000000, 404 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 405 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 406 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 407 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 408 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 409 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 410 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a65, 0x0510001c, 411 0x00009b40, 0x012e8160, 0x09249126, 0x00180a65, 0x0510001c, 412 0x00009b40, 0x012e8160, 0x09249126, 0x0001c600, 0x004b6a8e, 413 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 414 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 415 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 416}; 417 418#ifdef notyet 419static const uint32_t ar5416_phy_vals_5ghz_40mhz[] = { 420 0x00000007, 0x000003c4, 0x00000000, 0xad848e19, 0x7d14e000, 421 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 422 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 423 0x00200400, 0x206a002e, 0x13721c1e, 0x001a6a65, 0x1284233c, 424 0x6c48b4e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd10, 425 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 426 0x00000000, 0x000007d0, 0x00000230, 0x10000fff, 0x0510081c, 427 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 428 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 429 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 430 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 431 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 432 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 433 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 434 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 435 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 436 0x00000000, 0x00000040, 0x00000080, 0x000001a1, 0x000001e1, 437 0x00000021, 0x00000061, 0x00000168, 0x000001a8, 0x000001e8, 438 0x00000028, 0x00000068, 0x00000189, 0x000001c9, 0x00000009, 439 0x00000049, 0x00000089, 0x00000170, 0x000001b0, 0x000001f0, 440 0x00000030, 0x00000070, 0x00000191, 0x000001d1, 0x00000011, 441 0x00000051, 0x00000091, 0x000001b8, 0x000001f8, 0x00000038, 442 0x00000078, 0x00000199, 0x000001d9, 0x00000019, 0x00000059, 443 0x00000099, 0x000000d9, 0x000000f9, 0x000000f9, 0x000000f9, 444 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 445 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 446 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 447 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 448 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 449 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 450 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 451 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 452 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 453 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 454 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 455 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 456 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 457 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 458 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 459 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 460 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 461 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 462 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 463 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 464 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 465 0x00000000, 0x00000008, 0x00000440, 0xd6be4788, 0x012e8160, 466 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 467 0x00000400, 0x000009b5, 0x00000000, 0x00000210, 0x3f3f3f3f, 468 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 469 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 470 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a9caa, 471 0x1ce739ce, 0x051701ce, 0x18010000, 0x30032602, 0x48073e06, 472 0x560b4c0a, 0x641a600f, 0x7a4f6e1b, 0x8c5b7e5a, 0x9d0f96cf, 473 0xb51fa69f, 0xcb3fbcbf, 0x0000d7bf, 0x00000000, 0x00000000, 474 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 475 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 476 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 477 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 478 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 479 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 480 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a65, 0x0510001c, 481 0x00009b40, 0x012e8160, 0x09249126, 0x00180a65, 0x0510001c, 482 0x00009b40, 0x012e8160, 0x09249126, 0x0001c600, 0x004b6a8e, 483 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 484 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 485 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 486}; 487#endif 488 489#ifdef notyet 490static const uint32_t ar5416_phy_vals_2ghz_40mhz[] = { 491 0x00000007, 0x000003c4, 0x00000000, 0xad848e19, 0x7d14e000, 492 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 493 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 494 0x00200400, 0x206a002e, 0x13721c24, 0x00197a68, 0x1284233c, 495 0x6c48b0e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd20, 496 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 497 0x00000000, 0x00000898, 0x00000268, 0x10000fff, 0x0510001c, 498 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 499 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 500 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 501 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 502 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 503 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 504 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 505 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 506 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 507 0x00000000, 0x00000040, 0x00000080, 0x00000141, 0x00000181, 508 0x000001c1, 0x00000001, 0x00000041, 0x000001a8, 0x000001e8, 509 0x00000028, 0x00000068, 0x000000a8, 0x00000169, 0x000001a9, 510 0x000001e9, 0x00000029, 0x00000069, 0x00000190, 0x000001d0, 511 0x00000010, 0x00000050, 0x00000090, 0x00000151, 0x00000191, 512 0x000001d1, 0x00000011, 0x00000051, 0x00000198, 0x000001d8, 513 0x00000018, 0x00000058, 0x00000098, 0x00000159, 0x00000199, 514 0x000001d9, 0x00000019, 0x00000059, 0x00000099, 0x000000d9, 515 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 516 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 517 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 518 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 519 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 520 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 521 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 522 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 523 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 524 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 525 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 526 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 527 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 528 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 529 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 530 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 531 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 532 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 533 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 534 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 535 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 536 0x00000000, 0x0000000e, 0x00000440, 0xd03e4788, 0x012a8160, 537 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 538 0x00000400, 0x000009b5, 0x00000000, 0x00000210, 0x3f3f3f3f, 539 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 540 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 541 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a7caa, 542 0x1ce739ce, 0x051701ce, 0x18010000, 0x2e032402, 0x4a0a3c06, 543 0x621a540b, 0x764f6c1b, 0x845b7a5a, 0x950f8ccf, 0xa5cf9b4f, 544 0xbddfaf1f, 0xd1ffc93f, 0x00000000, 0x00000000, 0x00000000, 545 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 546 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 547 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 548 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 549 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 550 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 551 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a68, 0x0510001c, 552 0x00009b40, 0x012a8160, 0x09249126, 0x00180a68, 0x0510001c, 553 0x00009b40, 0x012a8160, 0x09249126, 0x0001c600, 0x004b6a8e, 554 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 555 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 556 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 557}; 558#endif 559 560static const uint32_t ar5416_phy_vals_2ghz_20mhz[] = { 561 0x00000007, 0x00000300, 0x00000000, 0xad848e19, 0x7d14e000, 562 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 563 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 564 0x00200400, 0x206a002e, 0x137216a4, 0x00197a68, 0x1284233c, 565 0x6c48b0e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd20, 566 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 567 0x00000000, 0x00000898, 0x00000134, 0x10000fff, 0x0510001c, 568 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 569 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 570 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 571 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 572 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 573 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 574 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 575 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 576 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 577 0x00000000, 0x00000040, 0x00000080, 0x00000141, 0x00000181, 578 0x000001c1, 0x00000001, 0x00000041, 0x000001a8, 0x000001e8, 579 0x00000028, 0x00000068, 0x000000a8, 0x00000169, 0x000001a9, 580 0x000001e9, 0x00000029, 0x00000069, 0x00000190, 0x000001d0, 581 0x00000010, 0x00000050, 0x00000090, 0x00000151, 0x00000191, 582 0x000001d1, 0x00000011, 0x00000051, 0x00000198, 0x000001d8, 583 0x00000018, 0x00000058, 0x00000098, 0x00000159, 0x00000199, 584 0x000001d9, 0x00000019, 0x00000059, 0x00000099, 0x000000d9, 585 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 586 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 587 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 588 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 589 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 590 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 591 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 592 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 593 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 594 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 595 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 596 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 597 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 598 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 599 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 600 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 601 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 602 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 603 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 604 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 605 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 606 0x00000000, 0x0000000e, 0x00000440, 0xd03e4788, 0x012a8160, 607 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 608 0x00000400, 0x000009b5, 0x00000000, 0x00000108, 0x3f3f3f3f, 609 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 610 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 611 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a7caa, 612 0x1ce739ce, 0x051701ce, 0x18010000, 0x2e032402, 0x4a0a3c06, 613 0x621a540b, 0x764f6c1b, 0x845b7a5a, 0x950f8ccf, 0xa5cf9b4f, 614 0xbddfaf1f, 0xd1ffc93f, 0x00000000, 0x00000000, 0x00000000, 615 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 616 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 617 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 618 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 619 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 620 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 621 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a68, 0x0510001c, 622 0x00009b40, 0x012a8160, 0x09249126, 0x00180a68, 0x0510001c, 623 0x00009b40, 0x012a8160, 0x09249126, 0x0001c600, 0x004b6a8e, 624 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 625 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 626 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 627}; 628 629/* NB: apply AR_PHY(). */ 630static const uint8_t ar5416_banks_regs[] = { 631 0x2c, 0x38, 0x2c, 0x3b, 0x2c, 0x38, 0x3c, 0x2c, 0x3a, 0x2c, 0x39, 632 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 633 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 634 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 635 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 636 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x38, 0x2c, 0x2c, 637 0x2c, 0x3c 638}; 639 640static const uint32_t ar5416_banks_vals_5ghz[] = { 641 0x1e5795e5, 0x02008020, 0x02108421, 0x00000008, 0x0e73ff17, 642 0x00000420, 0x01400018, 0x000001a1, 0x00000001, 0x00000013, 643 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 644 0x00000000, 0x00004000, 0x00006c00, 0x00002c00, 0x00004800, 645 0x00004000, 0x00006000, 0x00001000, 0x00004000, 0x00007c00, 646 0x00007c00, 0x00007c00, 0x00007c00, 0x00007c00, 0x00087c00, 647 0x00007c00, 0x00005400, 0x00000c00, 0x00001800, 0x00007c00, 648 0x00006c00, 0x00006c00, 0x00007c00, 0x00002c00, 0x00003c00, 649 0x00003800, 0x00001c00, 0x00000800, 0x00000408, 0x00004c15, 650 0x00004188, 0x0000201e, 0x00010408, 0x00000801, 0x00000c08, 651 0x0000181e, 0x00001016, 0x00002800, 0x00004010, 0x0000081c, 652 0x00000115, 0x00000015, 0x00000066, 0x0000001c, 0x00000000, 653 0x00000004, 0x00000015, 0x0000001f, 0x00000000, 0x000000a0, 654 0x00000000, 0x00000040, 0x0000001c 655}; 656 657static const uint32_t ar5416_banks_vals_2ghz[] = { 658 0x1e5795e5, 0x02008020, 0x02108421, 0x00000008, 0x0e73ff17, 659 0x00000420, 0x01c00018, 0x000001a1, 0x00000001, 0x00000013, 660 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 661 0x00000000, 0x00004000, 0x00006c00, 0x00002c00, 0x00004800, 662 0x00004000, 0x00006000, 0x00001000, 0x00004000, 0x00007c00, 663 0x00007c00, 0x00007c00, 0x00007c00, 0x00007c00, 0x00087c00, 664 0x00007c00, 0x00005400, 0x00000c00, 0x00001800, 0x00007c00, 665 0x00006c00, 0x00006c00, 0x00007c00, 0x00002c00, 0x00003c00, 666 0x00003800, 0x00001c00, 0x00000800, 0x00000408, 0x00004c15, 667 0x00004188, 0x0000201e, 0x00010408, 0x00000801, 0x00000c08, 668 0x0000181e, 0x00001016, 0x00002800, 0x00004010, 0x0000081c, 669 0x00000115, 0x00000015, 0x00000066, 0x0000001c, 0x00000000, 670 0x00000004, 0x00000015, 0x0000001f, 0x00000400, 0x000000a0, 671 0x00000000, 0x00000040, 0x0000001c 672}; 673 674/* 675 * EEPROM. 676 */ 677/* Possible flags for opCapFlags. */ 678#define AR5416_OPFLAGS_11A 0x01 679#define AR5416_OPFLAGS_11G 0x02 680#define AR5416_OPFLAGS_5G_HT40 0x04 681#define AR5416_OPFLAGS_2G_HT40 0x08 682#define AR5416_OPFLAGS_5G_HT20 0x10 683#define AR5416_OPFLAGS_2G_HT20 0x20 684 685#define AR5416_NUM_5G_CAL_PIERS 8 686#define AR5416_NUM_2G_CAL_PIERS 4 687#define AR5416_NUM_5G_20_TARGET_POWERS 8 688#define AR5416_NUM_5G_40_TARGET_POWERS 8 689#define AR5416_NUM_2G_CCK_TARGET_POWERS 3 690#define AR5416_NUM_2G_20_TARGET_POWERS 4 691#define AR5416_NUM_2G_40_TARGET_POWERS 4 692#define AR5416_NUM_CTLS 24 693#define AR5416_NUM_BAND_EDGES 8 694#define AR5416_NUM_PD_GAINS 4 695#define AR5416_PD_GAIN_ICEPTS 5 696#define AR5416_EEPROM_MODAL_SPURS 5 697#define AR5416_MAX_CHAINS 2 698 699struct BaseEepHeader { 700 uint16_t length; 701 uint16_t checksum; 702 uint16_t version; 703 uint8_t opCapFlags; 704 uint8_t eepMisc; 705 uint16_t regDmn[2]; 706 uint8_t macAddr[6]; 707 uint8_t rxMask; 708 uint8_t txMask; 709 uint16_t rfSilent; 710 uint16_t blueToothOptions; 711 uint16_t deviceCap; 712 uint32_t binBuildNumber; 713 uint8_t deviceType; 714 uint8_t futureBase[33]; 715} __packed; 716 717struct spurChanStruct { 718 uint16_t spurChan; 719 uint8_t spurRangeLow; 720 uint8_t spurRangeHigh; 721} __packed; 722 723struct ModalEepHeader { 724 uint32_t antCtrlChain[AR5416_MAX_CHAINS]; 725 uint32_t antCtrlCommon; 726 int8_t antennaGainCh[AR5416_MAX_CHAINS]; 727 uint8_t switchSettling; 728 uint8_t txRxAttenCh[AR5416_MAX_CHAINS]; 729 uint8_t rxTxMarginCh[AR5416_MAX_CHAINS]; 730 uint8_t adcDesiredSize; 731 int8_t pgaDesiredSize; 732 uint8_t xlnaGainCh[AR5416_MAX_CHAINS]; 733 uint8_t txEndToXpaOff; 734 uint8_t txEndToRxOn; 735 uint8_t txFrameToXpaOn; 736 uint8_t thresh62; 737 uint8_t noiseFloorThreshCh[AR5416_MAX_CHAINS]; 738 uint8_t xpdGain; 739 uint8_t xpd; 740 int8_t iqCalICh[AR5416_MAX_CHAINS]; 741 int8_t iqCalQCh[AR5416_MAX_CHAINS]; 742 uint8_t pdGainOverlap; 743 uint8_t ob; 744 uint8_t db; 745 uint8_t xpaBiasLvl; 746 uint8_t pwrDecreaseFor2Chain; 747 uint8_t pwrDecreaseFor3Chain; 748 uint8_t txFrameToDataStart; 749 uint8_t txFrameToPaOn; 750 uint8_t ht40PowerIncForPdadc; 751 uint8_t bswAtten[AR5416_MAX_CHAINS]; 752 uint8_t bswMargin[AR5416_MAX_CHAINS]; 753 uint8_t swSettleHt40; 754 uint8_t futureModal[22]; 755 struct spurChanStruct spurChans[AR5416_EEPROM_MODAL_SPURS]; 756} __packed; 757 758struct calDataPerFreq { 759 uint8_t pwrPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]; 760 uint8_t vpdPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]; 761} __packed; 762 763struct CalTargetPowerLegacy { 764 uint8_t bChannel; 765 uint8_t tPow2x[4]; 766} __packed; 767 768struct CalTargetPowerHt { 769 uint8_t bChannel; 770 uint8_t tPow2x[8]; 771} __packed; 772 773struct CalCtlEdges { 774 uint8_t bChannel; 775 uint8_t tPowerFlag; 776} __packed; 777 778struct CalCtlData { 779 struct CalCtlEdges ctlEdges[AR5416_MAX_CHAINS][AR5416_NUM_BAND_EDGES]; 780} __packed; 781 782struct ar5416eeprom { 783 struct BaseEepHeader baseEepHeader; 784 uint8_t custData[64]; 785 struct ModalEepHeader modalHeader[2]; 786 uint8_t calFreqPier5G[AR5416_NUM_5G_CAL_PIERS]; 787 uint8_t calFreqPier2G[AR5416_NUM_2G_CAL_PIERS]; 788 struct calDataPerFreq calPierData5G[AR5416_MAX_CHAINS] 789 [AR5416_NUM_5G_CAL_PIERS]; 790 struct calDataPerFreq calPierData2G[AR5416_MAX_CHAINS] 791 [AR5416_NUM_2G_CAL_PIERS]; 792 struct CalTargetPowerLegacy calTPow5G[AR5416_NUM_5G_20_TARGET_POWERS]; 793 struct CalTargetPowerHt calTPow5GHT20[AR5416_NUM_5G_20_TARGET_POWERS]; 794 struct CalTargetPowerHt calTPow5GHT40[AR5416_NUM_5G_40_TARGET_POWERS]; 795 struct CalTargetPowerLegacy calTPowCck[AR5416_NUM_2G_CCK_TARGET_POWERS]; 796 struct CalTargetPowerLegacy calTPow2G[AR5416_NUM_2G_20_TARGET_POWERS]; 797 struct CalTargetPowerHt calTPow2GHT20[AR5416_NUM_2G_20_TARGET_POWERS]; 798 struct CalTargetPowerHt calTPow2GHT40[AR5416_NUM_2G_40_TARGET_POWERS]; 799 uint8_t ctlIndex[AR5416_NUM_CTLS]; 800 struct CalCtlData ctlData[AR5416_NUM_CTLS]; 801 uint8_t padding; 802} __packed; 803 804#define OTUS_NUM_CHAINS 2 805 806#define OTUS_UID(aid) (IEEE80211_AID(aid) + 4) 807 808#define OTUS_MAX_TXCMDSZ 64 809#define OTUS_RXBUFSZ (8 * 1024) 810/* Bumped for later A-MSDU and legacy fast-frames TX support */ 811#define OTUS_TXBUFSZ (8 * 1024) 812 813/* Default EDCA parameters for when QoS is disabled. */ 814static const struct wmeParams otus_edca_def[WME_NUM_AC] = { 815 { 4, 10, 3, 0 }, 816 { 4, 10, 7, 0 }, 817 { 3, 4, 2, 94 }, 818 { 2, 3, 2, 47 } 819}; 820 821#define OTUS_RIDX_CCK1 0 822#define OTUS_RIDX_OFDM6 4 823#define OTUS_RIDX_OFDM24 8 824#define OTUS_RIDX_MAX 11 825static const struct otus_rate { 826 uint8_t rate; 827 uint8_t mcs; 828} otus_rates[] = { 829 { 2, 0x0 }, 830 { 4, 0x1 }, 831 { 11, 0x2 }, 832 { 22, 0x3 }, 833 { 12, 0xb }, 834 { 18, 0xf }, 835 { 24, 0xa }, 836 { 36, 0xe }, 837 { 48, 0x9 }, 838 { 72, 0xd }, 839 { 96, 0x8 }, 840 { 108, 0xc } 841}; 842 843struct otus_rx_radiotap_header { 844 struct ieee80211_radiotap_header wr_ihdr; 845 uint8_t wr_flags; 846 uint8_t wr_rate; 847 uint16_t wr_chan_freq; 848 uint16_t wr_chan_flags; 849 uint8_t wr_antsignal; 850} __packed; 851 852#define OTUS_RX_RADIOTAP_PRESENT \ 853 (1 << IEEE80211_RADIOTAP_FLAGS | \ 854 1 << IEEE80211_RADIOTAP_RATE | \ 855 1 << IEEE80211_RADIOTAP_CHANNEL | \ 856 1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL) 857 858struct otus_tx_radiotap_header { 859 struct ieee80211_radiotap_header wt_ihdr; 860 uint8_t wt_flags; 861 uint8_t wt_rate; 862 uint16_t wt_chan_freq; 863 uint16_t wt_chan_flags; 864} __packed; 865 866#define OTUS_TX_RADIOTAP_PRESENT \ 867 (1 << IEEE80211_RADIOTAP_FLAGS | \ 868 1 << IEEE80211_RADIOTAP_RATE | \ 869 1 << IEEE80211_RADIOTAP_CHANNEL) 870 871struct otus_softc; 872 873/* Firmware commands */ 874struct otus_tx_cmd { 875 uint8_t *buf; 876 uint16_t buflen; 877 void * *odata; 878 uint16_t token; 879 STAILQ_ENTRY(otus_tx_cmd) next_cmd; 880}; 881 882/* TX, RX buffers */ 883struct otus_data { 884 struct otus_softc *sc; 885 uint8_t *buf; 886 uint16_t buflen; 887 struct mbuf *m; 888 struct ieee80211_node *ni; 889 STAILQ_ENTRY(otus_data) next; 890}; 891 892struct otus_node { 893 struct ieee80211_node ni; 894 uint64_t tx_done; 895 uint64_t tx_err; 896 uint64_t tx_retries; 897}; 898 899#define OTUS_CONFIG_INDEX 0 900#define OTUS_IFACE_INDEX 0 901 902/* 903 * The carl9170 firmware has the following specification: 904 * 905 * 0 - USB control 906 * 1 - TX 907 * 2 - RX 908 * 3 - IRQ 909 * 4 - CMD 910 * .. 911 * 10 - end 912 */ 913enum { 914 OTUS_BULK_TX, 915 OTUS_BULK_RX, 916 OTUS_BULK_IRQ, 917 OTUS_BULK_CMD, 918 OTUS_N_XFER 919}; 920 921struct otus_vap { 922 struct ieee80211vap vap; 923 int (*newstate)(struct ieee80211vap *, 924 enum ieee80211_state, int); 925}; 926#define OTUS_VAP(vap) ((struct otus_vap *)(vap)) 927#define OTUS_NODE(ni) ((struct otus_node *)(ni)) 928 929#define OTUS_LOCK(sc) mtx_lock(&(sc)->sc_mtx) 930#define OTUS_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx) 931#define OTUS_LOCK_ASSERT(sc) mtx_assert(&(sc)->sc_mtx, MA_OWNED) 932#define OTUS_UNLOCK_ASSERT(sc) mtx_assert(&(sc)->sc_mtx, MA_NOTOWNED) 933 934/* XXX the TX/RX endpoint dump says it's 0x200, (512)? */ 935#define OTUS_MAX_TXSZ 512 936#define OTUS_MAX_RXSZ 512 937/* intr/cmd endpoint dump says 0x40 */ 938#define OTUS_MAX_CTRLSZ 64 939 940#define OTUS_CMD_LIST_COUNT 32 941#define OTUS_RX_LIST_COUNT 128 942#define OTUS_TX_LIST_COUNT 32 943 944struct otus_softc { 945 struct ieee80211com sc_ic; 946 struct mbufq sc_snd; 947 device_t sc_dev; 948 struct usb_device *sc_udev; 949 int (*sc_newstate)(struct ieee80211com *, 950 enum ieee80211_state, int); 951 void (*sc_led_newstate)(struct otus_softc *); 952 struct usbd_interface *sc_iface; 953 struct mtx sc_mtx; 954 955 struct ar5416eeprom eeprom; 956 uint8_t capflags; 957 uint8_t rxmask; 958 uint8_t txmask; 959 int sc_running:1, 960 sc_calibrating:1, 961 sc_scanning:1; 962 963 int sc_if_flags; 964 int sc_tx_timer; 965 int fixed_ridx; 966 int bb_reset; 967 968 struct ieee80211_channel *sc_curchan; 969 970 struct task tx_task; 971 struct task wme_update_task; 972 struct timeout_task scan_to; 973 struct timeout_task calib_to; 974 975 /* register batch writes */ 976 int write_idx; 977 978 uint32_t led_state; 979 980 /* current firmware message serial / token number */ 981 int token; 982 983 /* current noisefloor, from SET_FREQUENCY */ 984 int sc_nf[OTUS_NUM_CHAINS]; 985 986 const uint32_t *phy_vals; 987 988 struct { 989 uint32_t reg; 990 uint32_t val; 991 } __packed write_buf[AR_MAX_WRITE_IDX + 1]; 992 993 struct otus_data sc_rx[OTUS_RX_LIST_COUNT]; 994 struct otus_data sc_tx[OTUS_TX_LIST_COUNT]; 995 struct otus_tx_cmd sc_cmd[OTUS_CMD_LIST_COUNT]; 996 997 struct usb_xfer *sc_xfer[OTUS_N_XFER]; 998 999 STAILQ_HEAD(, otus_data) sc_rx_active; 1000 STAILQ_HEAD(, otus_data) sc_rx_inactive; 1001 STAILQ_HEAD(, otus_data) sc_tx_active[OTUS_N_XFER]; 1002 STAILQ_HEAD(, otus_data) sc_tx_inactive; 1003 STAILQ_HEAD(, otus_data) sc_tx_pending[OTUS_N_XFER]; 1004 1005 STAILQ_HEAD(, otus_tx_cmd) sc_cmd_active; 1006 STAILQ_HEAD(, otus_tx_cmd) sc_cmd_inactive; 1007 STAILQ_HEAD(, otus_tx_cmd) sc_cmd_pending; 1008 STAILQ_HEAD(, otus_tx_cmd) sc_cmd_waiting; 1009 1010 union { 1011 struct otus_rx_radiotap_header th; 1012 uint8_t pad[64]; 1013 } sc_rxtapu; 1014#define sc_rxtap sc_rxtapu.th 1015 int sc_rxtap_len; 1016 1017 union { 1018 struct otus_tx_radiotap_header th; 1019 uint8_t pad[64]; 1020 } sc_txtapu; 1021#define sc_txtap sc_txtapu.th 1022 int sc_txtap_len; 1023}; 1024 1025#endif /* __IF_OTUSREG_H__ */ 1026