if_nxge.h revision 171095
1171095Ssam/*- 2171095Ssam * Copyright (c) 2002-2007 Neterion, Inc. 3171095Ssam * All rights reserved. 4171095Ssam * 5171095Ssam * Redistribution and use in source and binary forms, with or without 6171095Ssam * modification, are permitted provided that the following conditions 7171095Ssam * are met: 8171095Ssam * 1. Redistributions of source code must retain the above copyright 9171095Ssam * notice, this list of conditions and the following disclaimer. 10171095Ssam * 2. Redistributions in binary form must reproduce the above copyright 11171095Ssam * notice, this list of conditions and the following disclaimer in the 12171095Ssam * documentation and/or other materials provided with the distribution. 13171095Ssam * 14171095Ssam * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15171095Ssam * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16171095Ssam * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17171095Ssam * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18171095Ssam * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19171095Ssam * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20171095Ssam * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21171095Ssam * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22171095Ssam * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23171095Ssam * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24171095Ssam * SUCH DAMAGE. 25171095Ssam * 26171095Ssam * $FreeBSD: head/sys/dev/nxge/if_nxge.h 171095 2007-06-29 22:47:18Z sam $ 27171095Ssam */ 28171095Ssam 29171095Ssam/* 30171095Ssam * if_xge.h 31171095Ssam */ 32171095Ssam 33171095Ssam#ifndef _IF_XGE_H 34171095Ssam#define _IF_XGE_H 35171095Ssam 36171095Ssam#include <dev/nxge/include/xgehal.h> 37171095Ssam#include <dev/nxge/xge-osdep.h> 38171095Ssam 39171095Ssam#if defined(XGE_FEATURE_TSO) && (__FreeBSD_version < 700026) 40171095Ssam#undef XGE_FEATURE_TSO 41171095Ssam#endif 42171095Ssam 43171095Ssam#if defined(XGE_FEATURE_LRO) 44171095Ssam#if __FreeBSD_version < 700047 45171095Ssam#undef XGE_FEATURE_LRO 46171095Ssam#undef XGE_HAL_CONFIG_LRO 47171095Ssam#else 48171095Ssam#define XGE_HAL_CONFIG_LRO 49171095Ssam#endif 50171095Ssam#endif 51171095Ssam 52171095Ssam#ifdef FUNC_PRINT 53171095Ssam#define ENTER_FUNCTION xge_os_printf("Enter\t==>[%s]\n", __FUNCTION__); 54171095Ssam#define LEAVE_FUNCTION xge_os_printf("Leave\t<==[%s]\n", __FUNCTION__); 55171095Ssam#else 56171095Ssam#define ENTER_FUNCTION 57171095Ssam#define LEAVE_FUNCTION 58171095Ssam#endif 59171095Ssam 60171095Ssam/* Printing description, Copyright */ 61171095Ssam#define DRIVER_VERSION XGELL_VERSION_MAJOR"." \ 62171095Ssam XGELL_VERSION_MINOR"." \ 63171095Ssam XGELL_VERSION_FIX"." \ 64171095Ssam XGELL_VERSION_BUILD 65171095Ssam#define COPYRIGHT_STRING "Copyright(c) 2002-2007 Neterion Inc." 66171095Ssam#define PRINT_COPYRIGHT xge_os_printf("%s", COPYRIGHT_STRING) 67171095Ssam 68171095Ssam/* Printing */ 69171095Ssam#define xge_trace(trace, fmt, args...) xge_debug_ll(trace, fmt, ## args); 70171095Ssam#define xge_ctrace(trace, fmt...) xge_debug_ll(trace, fmt); 71171095Ssam 72171095Ssam#define BUFALIGN(buffer_length) \ 73171095Ssam if((buffer_length % 128) != 0) { \ 74171095Ssam buffer_length += (128 - (buffer_length % 128)); \ 75171095Ssam } 76171095Ssam 77171095Ssamstatic inline void * 78171095Ssamxge_malloc(unsigned long size) { 79171095Ssam void *vaddr = malloc(size, M_DEVBUF, M_NOWAIT); 80171095Ssam bzero(vaddr, size); 81171095Ssam return vaddr; 82171095Ssam} 83171095Ssam 84171095Ssam#define SINGLE_ALLOC 0 85171095Ssam#define MULTI_ALLOC 1 86171095Ssam#define SAVE 0 87171095Ssam#define RESTORE 1 88171095Ssam#define UP 1 89171095Ssam#define DOWN 0 90171095Ssam#define XGE_DEFAULT_USER_HARDCODED -1 91171095Ssam#define MAX_MBUF_FRAGS 20 /* Maximum number of fragments */ 92171095Ssam#define MAX_SEGS 100 /* Maximum number of segments */ 93171095Ssam#define XGELL_TX_LEVEL_LOW 16 94171095Ssam#define XGE_RING_COUNT XGE_HAL_MIN_RING_NUM 95171095Ssam#define BUFFER_SIZE 20 96171095Ssam 97171095Ssam/* Default values to configuration parameters */ 98171095Ssam#define XGE_DEFAULT_INITIAL_MTU 1500 99171095Ssam#define XGE_DEFAULT_LATENCY_TIMER -1 100171095Ssam#define XGE_DEFAULT_MAX_SPLITS_TRANS -1 101171095Ssam#define XGE_DEFAULT_MMRB_COUNT -1 102171095Ssam#define XGE_DEFAULT_SHARED_SPLITS 0 103171095Ssam#define XGE_DEFAULT_ISR_POLLING_CNT 8 104171095Ssam#define XGE_DEFAULT_STATS_REFRESH_TIME_SEC 4 105171095Ssam#define XGE_DEFAULT_MAC_RMAC_BCAST_EN 1 106171095Ssam#define XGE_DEFAULT_MAC_TMAC_UTIL_PERIOD 5 107171095Ssam#define XGE_DEFAULT_MAC_RMAC_UTIL_PERIOD 5 108171095Ssam#define XGE_DEFAULT_MAC_RMAC_PAUSE_GEN_EN 1 109171095Ssam#define XGE_DEFAULT_MAC_RMAC_PAUSE_RCV_EN 1 110171095Ssam#define XGE_DEFAULT_MAC_RMAC_PAUSE_TIME 65535 111171095Ssam#define XGE_DEFAULT_MAC_MC_PAUSE_THRESHOLD_Q0Q3 187 112171095Ssam#define XGE_DEFAULT_MAC_MC_PAUSE_THRESHOLD_Q4Q7 187 113171095Ssam#define XGE_DEFAULT_FIFO_MEMBLOCK_SIZE PAGE_SIZE 114171095Ssam#define XGE_DEFAULT_FIFO_RESERVE_THRESHOLD 0 115171095Ssam#define XGE_DEFAULT_FIFO_MAX_FRAGS 64 116171095Ssam#define XGE_DEFAULT_FIFO_QUEUE_INTR 0 117171095Ssam#define XGE_DEFAULT_FIFO_QUEUE_MAX 2048 118171095Ssam#define XGE_DEFAULT_FIFO_QUEUE_INITIAL 2048 119171095Ssam#define XGE_DEFAULT_FIFO_QUEUE_TTI_URANGE_A 5 120171095Ssam#define XGE_DEFAULT_FIFO_QUEUE_TTI_URANGE_B 10 121171095Ssam#define XGE_DEFAULT_FIFO_QUEUE_TTI_URANGE_C 20 122171095Ssam#define XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_A 15 123171095Ssam#define XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_B 30 124171095Ssam#define XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_C 45 125171095Ssam#define XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_D 60 126171095Ssam#define XGE_DEFAULT_FIFO_QUEUE_TTI_TIMER_CI_EN 1 127171095Ssam#define XGE_DEFAULT_FIFO_QUEUE_TTI_TIMER_AC_EN 1 128171095Ssam#define XGE_DEFAULT_FIFO_QUEUE_TTI_TIMER_VAL_US 8000 129171095Ssam#define XGE_DEFAULT_FIFO_ALIGNMENT_SIZE sizeof(u64) 130171095Ssam#define XGE_DEFAULT_RING_MEMBLOCK_SIZE PAGE_SIZE 131171095Ssam#define XGE_DEFAULT_RING_STRIP_VLAN_TAG 1 132171095Ssam#define XGE_DEFAULT_RING_QUEUE_MAX 16 133171095Ssam#define XGE_DEFAULT_RING_QUEUE_INITIAL 16 134171095Ssam#define XGE_DEFAULT_RING_QUEUE_DRAM_SIZE_MB 32 135171095Ssam#define XGE_DEFAULT_RING_QUEUE_INDICATE_MAX_PKTS 16 136171095Ssam#define XGE_DEFAULT_RING_QUEUE_BACKOFF_INTERVAL_US 1000 137171095Ssam#define XGE_DEFAULT_RING_QUEUE_RTI_URANGE_A 5 138171095Ssam#define XGE_DEFAULT_RING_QUEUE_RTI_URANGE_B 10 139171095Ssam#define XGE_DEFAULT_RING_QUEUE_RTI_URANGE_C 50 140171095Ssam#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_A 1 141171095Ssam#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_B 8 142171095Ssam#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_C 16 143171095Ssam#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_D 32 144171095Ssam#define XGE_DEFAULT_RING_QUEUE_RTI_TIMER_AC_EN 1 145171095Ssam#define XGE_DEFAULT_RING_QUEUE_RTI_TIMER_VAL_US 250 146171095Ssam 147171095Ssam/* Values to identify the requests from getinfo tool in ioctl */ 148171095Ssam#define XGE_QUERY_STATS 1 149171095Ssam#define XGE_QUERY_PCICONF 2 150171095Ssam#define XGE_QUERY_INTRSTATS 3 151171095Ssam#define XGE_QUERY_DEVCONF 4 152171095Ssam#define XGE_READ_VERSION 5 153171095Ssam#define XGE_QUERY_TCODE 6 154171095Ssam#define XGE_SET_BUFFER_MODE_1 7 155171095Ssam#define XGE_SET_BUFFER_MODE_2 8 156171095Ssam#define XGE_SET_BUFFER_MODE_3 9 157171095Ssam#define XGE_SET_BUFFER_MODE_5 10 158171095Ssam#define XGE_QUERY_BUFFER_MODE 11 159171095Ssam 160171095Ssam#define XGE_OFFSET_OF_LAST_REG 0x3180 161171095Ssam 162171095Ssam#define VENDOR_ID_AMD 0x1022 163171095Ssam#define DEVICE_ID_8131_PCI_BRIDGE 0x7450 164171095Ssam 165171095Ssamtypedef struct mbuf *mbuf_t; 166171095Ssam 167171095Ssamtypedef enum xgell_event_e { 168171095Ssam XGE_LL_EVENT_TRY_XMIT_AGAIN = XGE_LL_EVENT_BASE + 1, 169171095Ssam XGE_LL_EVENT_DEVICE_RESETTING = XGE_LL_EVENT_BASE + 2, 170171095Ssam} xgell_event_e; 171171095Ssam 172171095Ssam/* Adapter structure */ 173171095Ssamtypedef struct xgelldev { 174171095Ssam device_t device; /* Device */ 175171095Ssam struct ifnet *ifnetp; /* Interface ifnet structure */ 176171095Ssam struct resource *irq; /* Resource structure for IRQ */ 177171095Ssam void *irqhandle; /* IRQ handle */ 178171095Ssam pci_info_t *pdev; 179171095Ssam struct ifmedia xge_media; /* In-kernel representation of a */ 180171095Ssam /* single supported media type */ 181171095Ssam xge_hal_device_t *devh; /* HAL: Device Handle */ 182171095Ssam xge_hal_channel_h ring_channel[XGE_HAL_MAX_FIFO_NUM]; 183171095Ssam /* Ring channel */ 184171095Ssam xge_hal_channel_h fifo_channel_0; /* FIFO channel */ 185171095Ssam struct mtx xge_lock; /* Mutex - Default */ 186171095Ssam struct callout timer; /* Timer for polling */ 187171095Ssam struct xge_hal_stats_hw_info_t *hwstats; /* Hardware Statistics */ 188171095Ssam int saved_regs[16]; /* To save register space */ 189171095Ssam int xge_mtu; /* MTU */ 190171095Ssam int initialized; /* Flag: Initialized or not */ 191171095Ssam bus_dma_tag_t dma_tag_tx; /* Tag for dtr dma mapping (Tx) */ 192171095Ssam bus_dma_tag_t dma_tag_rx; /* Tag for dtr dma mapping (Rx) */ 193171095Ssam int all_multicast; /* All multicast flag */ 194171095Ssam int macaddr_count; /* Multicast address count */ 195171095Ssam int in_detach; /* To avoid ioctl during detach */ 196171095Ssam int buffer_mode; /* Buffer Mode */ 197171095Ssam int rxd_mbuf_cnt; /* Number of buffers used */ 198171095Ssam int rxd_mbuf_len[5];/* Buffer lengths */ 199171095Ssam} xgelldev_t; 200171095Ssam 201171095Ssam/* Rx descriptor private structure */ 202171095Ssamtypedef struct { 203171095Ssam mbuf_t *bufferArray; 204171095Ssam struct xge_dma_mbuf dmainfo[5]; 205171095Ssam} xgell_rx_priv_t; 206171095Ssam 207171095Ssam/* Tx descriptor private structure */ 208171095Ssamtypedef struct { 209171095Ssam mbuf_t buffer; 210171095Ssam bus_dmamap_t dma_map; 211171095Ssam} xgell_tx_priv_t; 212171095Ssam 213171095Ssam/* BAR0 Register */ 214171095Ssamtypedef struct barregister { 215171095Ssam char option[2]; 216171095Ssam u64 offset; 217171095Ssam u64 value; 218171095Ssam}bar0reg_t; 219171095Ssam 220171095Ssamvoid xge_init_params(xge_hal_device_config_t *dconfig, device_t dev); 221171095Ssamvoid xge_init(void *); 222171095Ssamvoid xge_init_locked(void *); 223171095Ssamvoid xge_stop(xgelldev_t *); 224171095Ssamvoid freeResources(device_t, int); 225171095Ssamvoid xgell_callback_link_up(void *); 226171095Ssamvoid xgell_callback_link_down(void *); 227171095Ssamvoid xgell_callback_crit_err(void *, xge_hal_event_e, u64); 228171095Ssamvoid xgell_callback_event(xge_queue_item_t *); 229171095Ssamint xge_ifmedia_change(struct ifnet *); 230171095Ssamvoid xge_ifmedia_status(struct ifnet *, struct ifmediareq *); 231171095Ssamint xge_ioctl(struct ifnet *, unsigned long, caddr_t); 232171095Ssamvoid xge_timer(void *); 233171095Ssamint xge_intr_filter(void *); 234171095Ssamvoid xge_intr(void *); 235171095Ssamint xgell_rx_open(int, xgelldev_t *, xge_hal_channel_reopen_e); 236171095Ssamint xgell_tx_open(xgelldev_t *, xge_hal_channel_reopen_e); 237171095Ssamint xgell_channel_close(xgelldev_t *, xge_hal_channel_reopen_e); 238171095Ssamint xgell_channel_open(xgelldev_t *, xge_hal_channel_reopen_e); 239171095Ssamxge_hal_status_e xgell_rx_compl(xge_hal_channel_h, xge_hal_dtr_h, u8, void *); 240171095Ssamxge_hal_status_e xgell_tx_compl(xge_hal_channel_h, xge_hal_dtr_h, u8, void *); 241171095Ssamxge_hal_status_e xgell_tx_initial_replenish(xge_hal_channel_h, xge_hal_dtr_h, 242171095Ssam int, void *, xge_hal_channel_reopen_e); 243171095Ssamxge_hal_status_e xgell_rx_initial_replenish(xge_hal_channel_h, xge_hal_dtr_h, 244171095Ssam int, void *, xge_hal_channel_reopen_e); 245171095Ssamvoid xgell_rx_term(xge_hal_channel_h, xge_hal_dtr_h, xge_hal_dtr_state_e, 246171095Ssam void *, xge_hal_channel_reopen_e); 247171095Ssamvoid xgell_tx_term(xge_hal_channel_h, xge_hal_dtr_h, xge_hal_dtr_state_e, 248171095Ssam void *, xge_hal_channel_reopen_e); 249171095Ssamvoid xgell_set_mbuf_cflags(mbuf_t); 250171095Ssamvoid xge_send(struct ifnet *); 251171095Ssamvoid xge_send_locked(struct ifnet *); 252171095Ssamint xgell_get_multimode_normalbuf(xge_hal_dtr_h dtrh, xgell_rx_priv_t *rxd_priv, 253171095Ssam xgelldev_t *lldev); 254171095Ssamint xgell_get_multimode_jumbobuf(xge_hal_dtr_h dtrh, xgell_rx_priv_t *rxd_priv, 255171095Ssam xgelldev_t *lldev, int lock); 256171095Ssamint xgell_get_second_buffer(xgell_rx_priv_t *rxd_priv, xgelldev_t *lldev); 257171095Ssamint xgell_get_buf(xge_hal_dtr_h dtrh, xgell_rx_priv_t *rxd_priv, 258171095Ssam xgelldev_t *lldev, int index); 259171095Ssamint xge_ring_dtr_get(mbuf_t mbuf_up, xge_hal_channel_h channelh, xge_hal_dtr_h dtr, 260171095Ssam xgelldev_t *lldev, xgell_rx_priv_t *rxd_priv); 261171095Ssamint xgell_get_buf_3b_5b(xge_hal_dtr_h dtrh, xgell_rx_priv_t *rxd_priv, 262171095Ssam xgelldev_t *lldev); 263171095Ssamvoid dmamap_cb(void *, bus_dma_segment_t *, int, int); 264171095Ssamvoid xgell_reset(xgelldev_t *); 265171095Ssamvoid xge_setmulti(xgelldev_t *); 266171095Ssamvoid xge_enable_promisc(xgelldev_t *); 267171095Ssamvoid xge_disable_promisc(xgelldev_t *); 268171095Ssamint changeMtu(xgelldev_t *, int); 269171095Ssamint changeBufmode(xgelldev_t *, int); 270171095Ssamvoid xge_initialize(device_t, xge_hal_channel_reopen_e); 271171095Ssamvoid xge_terminate(device_t, xge_hal_channel_reopen_e); 272171095Ssamvoid if_up_locked(xgelldev_t *); 273171095Ssamvoid if_down_locked(xgelldev_t *); 274171095Ssamint xge_probe(device_t); 275171095Ssamint xge_driver_initialize(void); 276171095Ssamvoid xge_media_init(device_t); 277171095Ssamvoid xge_pci_space_save(device_t); 278171095Ssamvoid xge_pci_space_restore(device_t); 279171095Ssamint xge_attach(device_t); 280171095Ssamint xge_interface_setup(device_t); 281171095Ssamint xge_detach(device_t); 282171095Ssamint xge_shutdown(device_t); 283171095Ssamint xge_suspend(device_t); 284171095Ssamint xge_resume(device_t); 285171095Ssam 286171095Ssam#endif // _IF_XGE_H 287171095Ssam 288