mpt_pci.c revision 249849
1/*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * Partially derived from Matt Jacob's ISP driver. 7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 8 * Feral Software 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32/*- 33 * Copyright (c) 2002, 2006 by Matthew Jacob 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions are 38 * met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 42 * substantially similar to the "NO WARRANTY" disclaimer below 43 * ("Disclaimer") and any redistribution must be conditioned upon including 44 * a substantially similar Disclaimer requirement for further binary 45 * redistribution. 46 * 3. Neither the names of the above listed copyright holders nor the names 47 * of any contributors may be used to endorse or promote products derived 48 * from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 * 62 * Support from Chris Ellsworth in order to make SAS adapters work 63 * is gratefully acknowledged. 64 * 65 * Support from LSI-Logic has also gone a great deal toward making this a 66 * workable subsystem and is gratefully acknowledged. 67 */ 68/* 69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 70 * Copyright (c) 2005, WHEEL Sp. z o.o. 71 * Copyright (c) 2004, 2005 Justin T. Gibbs 72 * All rights reserved. 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions are 76 * met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 80 * substantially similar to the "NO WARRANTY" disclaimer below 81 * ("Disclaimer") and any redistribution must be conditioned upon including 82 * a substantially similar Disclaimer requirement for further binary 83 * redistribution. 84 * 3. Neither the names of the above listed copyright holders nor the names 85 * of any contributors may be used to endorse or promote products derived 86 * from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 99 */ 100 101#include <sys/cdefs.h> 102__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 249849 2013-04-24 19:00:45Z mav $"); 103 104#include <dev/mpt/mpt.h> 105#include <dev/mpt/mpt_cam.h> 106#include <dev/mpt/mpt_raid.h> 107 108#if __FreeBSD_version < 700000 109#define pci_msix_count(x) 0 110#define pci_msi_count(x) 0 111#define pci_alloc_msi(x, y) 1 112#define pci_alloc_msix(x, y) 1 113#define pci_release_msi(x) do { ; } while (0) 114#endif 115 116/* 117 * XXX it seems no other MPT driver knows about the following chips. 118 */ 119 120#ifndef MPI_MANUFACTPAGE_DEVICEID_FC909_FB 121#define MPI_MANUFACTPAGE_DEVICEID_FC909_FB 0x0620 122#endif 123 124#ifndef MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB 125#define MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB 0x0625 126#endif 127 128#ifndef MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB 129#define MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB 0x0623 130#endif 131 132#ifndef MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB 133#define MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB 0x0627 134#endif 135 136#ifndef MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB 137#define MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB 0x0629 138#endif 139 140#ifndef MPI_MANUFACTPAGE_DEVID_SAS1068A_FB 141#define MPI_MANUFACTPAGE_DEVID_SAS1068A_FB 0x0055 142#endif 143 144#ifndef MPI_MANUFACTPAGE_DEVID_SAS1068E_FB 145#define MPI_MANUFACTPAGE_DEVID_SAS1068E_FB 0x0059 146#endif 147 148#ifndef MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB 149#define MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB 0x007C 150#endif 151 152#ifndef PCIM_CMD_SERRESPEN 153#define PCIM_CMD_SERRESPEN 0x0100 154#endif 155 156static int mpt_pci_probe(device_t); 157static int mpt_pci_attach(device_t); 158static void mpt_free_bus_resources(struct mpt_softc *mpt); 159static int mpt_pci_detach(device_t); 160static int mpt_pci_shutdown(device_t); 161static int mpt_dma_mem_alloc(struct mpt_softc *mpt); 162static void mpt_dma_mem_free(struct mpt_softc *mpt); 163#if 0 164static void mpt_read_config_regs(struct mpt_softc *mpt); 165static void mpt_set_config_regs(struct mpt_softc *mpt); 166#endif 167static void mpt_pci_intr(void *); 168 169static device_method_t mpt_methods[] = { 170 /* Device interface */ 171 DEVMETHOD(device_probe, mpt_pci_probe), 172 DEVMETHOD(device_attach, mpt_pci_attach), 173 DEVMETHOD(device_detach, mpt_pci_detach), 174 DEVMETHOD(device_shutdown, mpt_pci_shutdown), 175 DEVMETHOD_END 176}; 177 178static driver_t mpt_driver = { 179 "mpt", mpt_methods, sizeof(struct mpt_softc) 180}; 181static devclass_t mpt_devclass; 182DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, NULL, NULL); 183MODULE_DEPEND(mpt, pci, 1, 1, 1); 184MODULE_VERSION(mpt, 1); 185 186static int 187mpt_pci_probe(device_t dev) 188{ 189 const char *desc; 190 int rval; 191 192 if (pci_get_vendor(dev) != MPI_MANUFACTPAGE_VENDORID_LSILOGIC) 193 return (ENXIO); 194 195 rval = BUS_PROBE_DEFAULT; 196 switch (pci_get_device(dev)) { 197 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB: 198 desc = "LSILogic FC909 FC Adapter"; 199 break; 200 case MPI_MANUFACTPAGE_DEVICEID_FC909: 201 desc = "LSILogic FC909A FC Adapter"; 202 break; 203 case MPI_MANUFACTPAGE_DEVICEID_FC919: 204 desc = "LSILogic FC919 FC Adapter"; 205 break; 206 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB: 207 desc = "LSILogic FC919 LAN Adapter"; 208 break; 209 case MPI_MANUFACTPAGE_DEVICEID_FC929: 210 desc = "Dual LSILogic FC929 FC Adapter"; 211 break; 212 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 213 desc = "Dual LSILogic FC929 LAN Adapter"; 214 break; 215 case MPI_MANUFACTPAGE_DEVICEID_FC919X: 216 desc = "LSILogic FC919 FC PCI-X Adapter"; 217 break; 218 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB: 219 desc = "LSILogic FC919 LAN PCI-X Adapter"; 220 break; 221 case MPI_MANUFACTPAGE_DEVICEID_FC929X: 222 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter"; 223 break; 224 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB: 225 desc = "Dual LSILogic FC929X LAN PCI-X Adapter"; 226 break; 227 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 228 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter"; 229 break; 230 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 231 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter"; 232 break; 233 case MPI_MANUFACTPAGE_DEVID_53C1030: 234 case MPI_MANUFACTPAGE_DEVID_53C1030ZC: 235 desc = "LSILogic 1030 Ultra4 Adapter"; 236 break; 237 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB: 238 /* 239 * Allow mfi(4) to claim this device in case it's in MegaRAID 240 * mode. 241 */ 242 rval = BUS_PROBE_LOW_PRIORITY; 243 /* FALLTHROUGH */ 244 case MPI_MANUFACTPAGE_DEVID_SAS1064: 245 case MPI_MANUFACTPAGE_DEVID_SAS1064A: 246 case MPI_MANUFACTPAGE_DEVID_SAS1064E: 247 case MPI_MANUFACTPAGE_DEVID_SAS1066: 248 case MPI_MANUFACTPAGE_DEVID_SAS1066E: 249 case MPI_MANUFACTPAGE_DEVID_SAS1068: 250 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB: 251 case MPI_MANUFACTPAGE_DEVID_SAS1068E: 252 case MPI_MANUFACTPAGE_DEVID_SAS1078: 253 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB: 254 desc = "LSILogic SAS/SATA Adapter"; 255 break; 256 default: 257 return (ENXIO); 258 } 259 260 device_set_desc(dev, desc); 261 return (rval); 262} 263 264static void 265mpt_set_options(struct mpt_softc *mpt) 266{ 267 int tval; 268 269 tval = 0; 270 if (resource_int_value(device_get_name(mpt->dev), 271 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 272 mpt->verbose = tval; 273 } 274 tval = -1; 275 if (resource_int_value(device_get_name(mpt->dev), 276 device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 && 277 tval <= 3) { 278 mpt->cfg_role = tval; 279 mpt->do_cfg_role = 1; 280 } 281 tval = 0; 282 mpt->msi_enable = 0; 283 if (mpt->is_sas) 284 mpt->msi_enable = 1; 285 if (resource_int_value(device_get_name(mpt->dev), 286 device_get_unit(mpt->dev), "msi_enable", &tval) == 0) { 287 mpt->msi_enable = tval; 288 } 289} 290 291static void 292mpt_link_peer(struct mpt_softc *mpt) 293{ 294 struct mpt_softc *mpt2; 295 296 if (mpt->unit == 0) { 297 return; 298 } 299 /* 300 * XXX: depends on probe order 301 */ 302 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1); 303 304 if (mpt2 == NULL) { 305 return; 306 } 307 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 308 return; 309 } 310 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 311 return; 312 } 313 mpt->mpt2 = mpt2; 314 mpt2->mpt2 = mpt; 315 if (mpt->verbose >= MPT_PRT_DEBUG) { 316 mpt_prt(mpt, "linking with peer (mpt%d)\n", 317 device_get_unit(mpt2->dev)); 318 } 319} 320 321static void 322mpt_unlink_peer(struct mpt_softc *mpt) 323{ 324 325 if (mpt->mpt2) { 326 mpt->mpt2->mpt2 = NULL; 327 } 328} 329 330static int 331mpt_pci_attach(device_t dev) 332{ 333 struct mpt_softc *mpt; 334 int iqd; 335 uint32_t data, cmd; 336 int mpt_io_bar, mpt_mem_bar; 337 338 mpt = (struct mpt_softc*)device_get_softc(dev); 339 340 switch (pci_get_device(dev)) { 341 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB: 342 case MPI_MANUFACTPAGE_DEVICEID_FC909: 343 case MPI_MANUFACTPAGE_DEVICEID_FC919: 344 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB: 345 case MPI_MANUFACTPAGE_DEVICEID_FC929: 346 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 347 case MPI_MANUFACTPAGE_DEVICEID_FC929X: 348 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB: 349 case MPI_MANUFACTPAGE_DEVICEID_FC919X: 350 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB: 351 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 352 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 353 mpt->is_fc = 1; 354 break; 355 case MPI_MANUFACTPAGE_DEVID_SAS1078: 356 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB: 357 mpt->is_1078 = 1; 358 /* FALLTHROUGH */ 359 case MPI_MANUFACTPAGE_DEVID_SAS1064: 360 case MPI_MANUFACTPAGE_DEVID_SAS1064A: 361 case MPI_MANUFACTPAGE_DEVID_SAS1064E: 362 case MPI_MANUFACTPAGE_DEVID_SAS1066: 363 case MPI_MANUFACTPAGE_DEVID_SAS1066E: 364 case MPI_MANUFACTPAGE_DEVID_SAS1068: 365 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB: 366 case MPI_MANUFACTPAGE_DEVID_SAS1068E: 367 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB: 368 mpt->is_sas = 1; 369 break; 370 default: 371 mpt->is_spi = 1; 372 break; 373 } 374 mpt->dev = dev; 375 mpt->unit = device_get_unit(dev); 376 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT; 377 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT; 378 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT; 379 mpt->verbose = MPT_PRT_NONE; 380 mpt->role = MPT_ROLE_NONE; 381 mpt->mpt_ini_id = MPT_INI_ID_NONE; 382#ifdef __sparc64__ 383 if (mpt->is_spi) 384 mpt->mpt_ini_id = OF_getscsinitid(dev); 385#endif 386 mpt_set_options(mpt); 387 if (mpt->verbose == MPT_PRT_NONE) { 388 mpt->verbose = MPT_PRT_WARN; 389 /* Print INFO level (if any) if bootverbose is set */ 390 mpt->verbose += (bootverbose != 0)? 1 : 0; 391 } 392 /* Make sure memory access decoders are enabled */ 393 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 394 if ((cmd & PCIM_CMD_MEMEN) == 0) { 395 device_printf(dev, "Memory accesses disabled"); 396 return (ENXIO); 397 } 398 399 /* 400 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 401 */ 402 cmd |= 403 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 404 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 405 pci_write_config(dev, PCIR_COMMAND, cmd, 2); 406 407 /* 408 * Make sure we've disabled the ROM. 409 */ 410 data = pci_read_config(dev, PCIR_BIOS, 4); 411 data &= ~PCIM_BIOS_ENABLE; 412 pci_write_config(dev, PCIR_BIOS, data, 4); 413 414 /* 415 * Is this part a dual? 416 * If so, link with our partner (around yet) 417 */ 418 switch (pci_get_device(dev)) { 419 case MPI_MANUFACTPAGE_DEVICEID_FC929: 420 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 421 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 422 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 423 case MPI_MANUFACTPAGE_DEVID_53C1030: 424 case MPI_MANUFACTPAGE_DEVID_53C1030ZC: 425 mpt_link_peer(mpt); 426 break; 427 default: 428 break; 429 } 430 431 /* 432 * Figure out which are the I/O and MEM Bars 433 */ 434 data = pci_read_config(dev, PCIR_BAR(0), 4); 435 if (PCI_BAR_IO(data)) { 436 /* BAR0 is IO, BAR1 is memory */ 437 mpt_io_bar = 0; 438 mpt_mem_bar = 1; 439 } else { 440 /* BAR0 is memory, BAR1 is IO */ 441 mpt_mem_bar = 0; 442 mpt_io_bar = 1; 443 } 444 445 /* 446 * Set up register access. PIO mode is required for 447 * certain reset operations (but must be disabled for 448 * some cards otherwise). 449 */ 450 mpt_io_bar = PCIR_BAR(mpt_io_bar); 451 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, 452 &mpt_io_bar, RF_ACTIVE); 453 if (mpt->pci_pio_reg == NULL) { 454 if (bootverbose) { 455 device_printf(dev, 456 "unable to map registers in PIO mode\n"); 457 } 458 } else { 459 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg); 460 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg); 461 } 462 463 mpt_mem_bar = PCIR_BAR(mpt_mem_bar); 464 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 465 &mpt_mem_bar, RF_ACTIVE); 466 if (mpt->pci_reg == NULL) { 467 if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) { 468 device_printf(dev, 469 "Unable to memory map registers.\n"); 470 } 471 if (mpt->is_sas || mpt->pci_pio_reg == NULL) { 472 device_printf(dev, "Giving Up.\n"); 473 goto bad; 474 } 475 if (bootverbose) { 476 device_printf(dev, "Falling back to PIO mode.\n"); 477 } 478 mpt->pci_st = mpt->pci_pio_st; 479 mpt->pci_sh = mpt->pci_pio_sh; 480 } else { 481 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 482 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 483 } 484 485 /* Get a handle to the interrupt */ 486 iqd = 0; 487 if (mpt->msi_enable) { 488 /* 489 * First try to alloc an MSI-X message. If that 490 * fails, then try to alloc an MSI message instead. 491 */ 492 if (pci_msix_count(dev) == 1) { 493 mpt->pci_msi_count = 1; 494 if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) { 495 iqd = 1; 496 } else { 497 mpt->pci_msi_count = 0; 498 } 499 } 500 if (iqd == 0 && pci_msi_count(dev) == 1) { 501 mpt->pci_msi_count = 1; 502 if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) { 503 iqd = 1; 504 } else { 505 mpt->pci_msi_count = 0; 506 } 507 } 508 } 509 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 510 RF_ACTIVE | (mpt->pci_msi_count ? 0 : RF_SHAREABLE)); 511 if (mpt->pci_irq == NULL) { 512 device_printf(dev, "could not allocate interrupt\n"); 513 goto bad; 514 } 515 516 MPT_LOCK_SETUP(mpt); 517 518 /* Disable interrupts at the part */ 519 mpt_disable_ints(mpt); 520 521 /* Register the interrupt handler */ 522 if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr, 523 mpt, &mpt->ih)) { 524 device_printf(dev, "could not setup interrupt\n"); 525 goto bad; 526 } 527 528 /* Allocate dma memory */ 529 if (mpt_dma_mem_alloc(mpt)) { 530 mpt_prt(mpt, "Could not allocate DMA memory\n"); 531 goto bad; 532 } 533 534#if 0 535 /* 536 * Save the PCI config register values 537 * 538 * Hard resets are known to screw up the BAR for diagnostic 539 * memory accesses (Mem1). 540 * 541 * Using Mem1 is known to make the chip stop responding to 542 * configuration space transfers, so we need to save it now 543 */ 544 545 mpt_read_config_regs(mpt); 546#endif 547 548 /* 549 * Disable PIO until we need it 550 */ 551 if (mpt->is_sas) { 552 pci_disable_io(dev, SYS_RES_IOPORT); 553 } 554 555 /* Initialize the hardware */ 556 if (mpt->disabled == 0) { 557 if (mpt_attach(mpt) != 0) { 558 goto bad; 559 } 560 } else { 561 mpt_prt(mpt, "device disabled at user request\n"); 562 goto bad; 563 } 564 565 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown, 566 dev, SHUTDOWN_PRI_LAST); 567 568 if (mpt->eh == NULL) { 569 mpt_prt(mpt, "shutdown event registration failed\n"); 570 (void) mpt_detach(mpt); 571 goto bad; 572 } 573 return (0); 574 575bad: 576 mpt_dma_mem_free(mpt); 577 mpt_free_bus_resources(mpt); 578 mpt_unlink_peer(mpt); 579 580 MPT_LOCK_DESTROY(mpt); 581 582 /* 583 * but return zero to preserve unit numbering 584 */ 585 return (0); 586} 587 588/* 589 * Free bus resources 590 */ 591static void 592mpt_free_bus_resources(struct mpt_softc *mpt) 593{ 594 595 if (mpt->ih) { 596 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 597 mpt->ih = NULL; 598 } 599 600 if (mpt->pci_irq) { 601 bus_release_resource(mpt->dev, SYS_RES_IRQ, 602 rman_get_rid(mpt->pci_irq), mpt->pci_irq); 603 mpt->pci_irq = NULL; 604 } 605 606 if (mpt->pci_msi_count) { 607 pci_release_msi(mpt->dev); 608 mpt->pci_msi_count = 0; 609 } 610 611 if (mpt->pci_pio_reg) { 612 bus_release_resource(mpt->dev, SYS_RES_IOPORT, 613 rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg); 614 mpt->pci_pio_reg = NULL; 615 } 616 if (mpt->pci_reg) { 617 bus_release_resource(mpt->dev, SYS_RES_MEMORY, 618 rman_get_rid(mpt->pci_reg), mpt->pci_reg); 619 mpt->pci_reg = NULL; 620 } 621 MPT_LOCK_DESTROY(mpt); 622} 623 624/* 625 * Disconnect ourselves from the system. 626 */ 627static int 628mpt_pci_detach(device_t dev) 629{ 630 struct mpt_softc *mpt; 631 632 mpt = (struct mpt_softc*)device_get_softc(dev); 633 634 if (mpt) { 635 mpt_disable_ints(mpt); 636 mpt_detach(mpt); 637 mpt_reset(mpt, /*reinit*/FALSE); 638 mpt_dma_mem_free(mpt); 639 mpt_free_bus_resources(mpt); 640 mpt_raid_free_mem(mpt); 641 if (mpt->eh != NULL) { 642 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh); 643 } 644 } 645 return(0); 646} 647 648/* 649 * Disable the hardware 650 */ 651static int 652mpt_pci_shutdown(device_t dev) 653{ 654 struct mpt_softc *mpt; 655 656 mpt = (struct mpt_softc *)device_get_softc(dev); 657 if (mpt) { 658 int r; 659 r = mpt_shutdown(mpt); 660 return (r); 661 } 662 return(0); 663} 664 665static int 666mpt_dma_mem_alloc(struct mpt_softc *mpt) 667{ 668 size_t len; 669 struct mpt_map_info mi; 670 671 /* Check if we alreay have allocated the reply memory */ 672 if (mpt->reply_phys != 0) { 673 return 0; 674 } 675 676 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt); 677#ifdef RELENG_4 678 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK); 679 if (mpt->request_pool == NULL) { 680 mpt_prt(mpt, "cannot allocate request pool\n"); 681 return (1); 682 } 683 memset(mpt->request_pool, 0, len); 684#else 685 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO); 686 if (mpt->request_pool == NULL) { 687 mpt_prt(mpt, "cannot allocate request pool\n"); 688 return (1); 689 } 690#endif 691 692 /* 693 * Create a parent dma tag for this device. 694 * 695 * Align at byte boundaries, 696 * Limit to 32-bit addressing for request/reply queues. 697 */ 698 if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev), 699 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR, 700 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 701 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 702 /*nsegments*/BUS_SPACE_UNRESTRICTED, 703 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0, 704 &mpt->parent_dmat) != 0) { 705 mpt_prt(mpt, "cannot create parent dma tag\n"); 706 return (1); 707 } 708 709 /* Create a child tag for reply buffers */ 710 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 711 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 712 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 713 &mpt->reply_dmat) != 0) { 714 mpt_prt(mpt, "cannot create a dma tag for replies\n"); 715 return (1); 716 } 717 718 /* Allocate some DMA accessible memory for replies */ 719 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 720 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 721 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n", 722 (u_long) (2 * PAGE_SIZE)); 723 return (1); 724 } 725 726 mi.mpt = mpt; 727 mi.error = 0; 728 729 /* Load and lock it into "bus space" */ 730 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 731 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0); 732 733 if (mi.error) { 734 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n", 735 mi.error); 736 return (1); 737 } 738 mpt->reply_phys = mi.phys; 739 740 return (0); 741} 742 743/* Deallocate memory that was allocated by mpt_dma_mem_alloc 744 */ 745static void 746mpt_dma_mem_free(struct mpt_softc *mpt) 747{ 748 749 /* Make sure we aren't double destroying */ 750 if (mpt->reply_dmat == 0) { 751 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n"); 752 return; 753 } 754 755 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 756 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 757 bus_dma_tag_destroy(mpt->reply_dmat); 758 bus_dma_tag_destroy(mpt->parent_dmat); 759 mpt->reply_dmat = NULL; 760 free(mpt->request_pool, M_DEVBUF); 761 mpt->request_pool = NULL; 762} 763 764#if 0 765/* Reads modifiable (via PCI transactions) config registers */ 766static void 767mpt_read_config_regs(struct mpt_softc *mpt) 768{ 769 770 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 771 mpt->pci_cfg.LatencyTimer_LineSize = 772 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 773 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 774 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 775 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 776 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 777 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 778 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 779 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 780 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 781} 782 783/* Sets modifiable config registers */ 784static void 785mpt_set_config_regs(struct mpt_softc *mpt) 786{ 787 uint32_t val; 788 789#define MPT_CHECK(reg, offset, size) \ 790 val = pci_read_config(mpt->dev, offset, size); \ 791 if (mpt->pci_cfg.reg != val) { \ 792 mpt_prt(mpt, \ 793 "Restoring " #reg " to 0x%X from 0x%X\n", \ 794 mpt->pci_cfg.reg, val); \ 795 } 796 797 if (mpt->verbose >= MPT_PRT_DEBUG) { 798 MPT_CHECK(Command, PCIR_COMMAND, 2); 799 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 800 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 801 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 802 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 803 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 804 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 805 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 806 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 807 MPT_CHECK(PMCSR, 0x44, 4); 808 } 809#undef MPT_CHECK 810 811 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 812 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 813 mpt->pci_cfg.LatencyTimer_LineSize, 2); 814 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 815 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 816 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 817 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 818 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 819 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 820 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 821 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 822} 823#endif 824 825static void 826mpt_pci_intr(void *arg) 827{ 828 struct mpt_softc *mpt; 829 830 mpt = (struct mpt_softc *)arg; 831 MPT_LOCK(mpt); 832 mpt_intr(mpt); 833 MPT_UNLOCK(mpt); 834} 835