mpt_pci.c revision 241858
1/*-
2 * PCI specific probe and attach routines for LSI Fusion Adapters
3 * FreeBSD Version.
4 *
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8 * Feral Software
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice immediately at the beginning of the file, without modification,
16 *    this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32/*-
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
38 * met:
39 * 1. Redistributions of source code must retain the above copyright
40 *    notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 *    substantially similar to the "NO WARRANTY" disclaimer below
43 *    ("Disclaimer") and any redistribution must be conditioned upon including
44 *    a substantially similar Disclaimer requirement for further binary
45 *    redistribution.
46 * 3. Neither the names of the above listed copyright holders nor the names
47 *    of any contributors may be used to endorse or promote products derived
48 *    from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
64 *
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
67 */
68/*
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
73 *
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
76 * met:
77 * 1. Redistributions of source code must retain the above copyright
78 *    notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 *    substantially similar to the "NO WARRANTY" disclaimer below
81 *    ("Disclaimer") and any redistribution must be conditioned upon including
82 *    a substantially similar Disclaimer requirement for further binary
83 *    redistribution.
84 * 3. Neither the names of the above listed copyright holders nor the names
85 *    of any contributors may be used to endorse or promote products derived
86 *    from this software without specific prior written permission.
87 *
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
99 */
100
101#include <sys/cdefs.h>
102__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 241858 2012-10-22 03:41:24Z eadler $");
103
104#include <dev/mpt/mpt.h>
105#include <dev/mpt/mpt_cam.h>
106#include <dev/mpt/mpt_raid.h>
107
108#if __FreeBSD_version < 700000
109#define	pci_msix_count(x)	0
110#define	pci_msi_count(x)	0
111#define	pci_alloc_msi(x, y)	1
112#define	pci_alloc_msix(x, y)	1
113#define	pci_release_msi(x)	do { ; } while (0)
114#endif
115
116/*
117 * XXX it seems no other MPT driver knows about the following chips.
118 */
119
120#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC909_FB
121#define	MPI_MANUFACTPAGE_DEVICEID_FC909_FB	0x0620
122#endif
123
124#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB
125#define	MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB	0x0625
126#endif
127
128#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB
129#define	MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB	0x0623
130#endif
131
132#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB
133#define	MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB	0x0627
134#endif
135
136#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB
137#define	MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB	0x0629
138#endif
139
140#ifndef MPI_MANUFACTPAGE_DEVID_SAS1068A_FB
141#define MPI_MANUFACTPAGE_DEVID_SAS1068A_FB	0x0055
142#endif
143
144#ifndef	MPI_MANUFACTPAGE_DEVID_SAS1068E_FB
145#define	MPI_MANUFACTPAGE_DEVID_SAS1068E_FB	0x0059
146#endif
147
148#ifndef	MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB
149#define	MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB	0x007C
150#endif
151
152#ifndef	PCIM_CMD_SERRESPEN
153#define	PCIM_CMD_SERRESPEN	0x0100
154#endif
155
156static int mpt_pci_probe(device_t);
157static int mpt_pci_attach(device_t);
158static void mpt_free_bus_resources(struct mpt_softc *mpt);
159static int mpt_pci_detach(device_t);
160static int mpt_pci_shutdown(device_t);
161static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
162static void mpt_dma_mem_free(struct mpt_softc *mpt);
163#if 0
164static void mpt_read_config_regs(struct mpt_softc *mpt);
165static void mpt_set_config_regs(struct mpt_softc *mpt);
166#endif
167static void mpt_pci_intr(void *);
168
169static device_method_t mpt_methods[] = {
170	/* Device interface */
171	DEVMETHOD(device_probe,		mpt_pci_probe),
172	DEVMETHOD(device_attach,	mpt_pci_attach),
173	DEVMETHOD(device_detach,	mpt_pci_detach),
174	DEVMETHOD(device_shutdown,	mpt_pci_shutdown),
175	DEVMETHOD_END
176};
177
178static driver_t mpt_driver = {
179	"mpt", mpt_methods, sizeof(struct mpt_softc)
180};
181static devclass_t mpt_devclass;
182DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, NULL, NULL);
183MODULE_DEPEND(mpt, pci, 1, 1, 1);
184MODULE_VERSION(mpt, 1);
185
186static int
187mpt_pci_probe(device_t dev)
188{
189	const char *desc;
190	int rval;
191
192	if (pci_get_vendor(dev) != MPI_MANUFACTPAGE_VENDORID_LSILOGIC)
193		return (ENXIO);
194
195	rval = BUS_PROBE_DEFAULT;
196	switch (pci_get_device(dev)) {
197	case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
198		desc = "LSILogic FC909 FC Adapter";
199		break;
200	case MPI_MANUFACTPAGE_DEVICEID_FC909:
201		desc = "LSILogic FC909A FC Adapter";
202		break;
203	case MPI_MANUFACTPAGE_DEVICEID_FC919:
204		desc = "LSILogic FC919 FC Adapter";
205		break;
206	case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
207		desc = "LSILogic FC919 LAN Adapter";
208		break;
209	case MPI_MANUFACTPAGE_DEVICEID_FC929:
210		desc = "Dual LSILogic FC929 FC Adapter";
211		break;
212	case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
213		desc = "Dual LSILogic FC929 LAN Adapter";
214		break;
215	case MPI_MANUFACTPAGE_DEVICEID_FC919X:
216		desc = "LSILogic FC919 FC PCI-X Adapter";
217		break;
218	case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
219		desc = "LSILogic FC919 LAN PCI-X Adapter";
220		break;
221	case MPI_MANUFACTPAGE_DEVICEID_FC929X:
222		desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
223		break;
224	case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
225		desc = "Dual LSILogic FC929X LAN PCI-X Adapter";
226		break;
227	case MPI_MANUFACTPAGE_DEVICEID_FC949E:
228		desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
229		break;
230	case MPI_MANUFACTPAGE_DEVICEID_FC949X:
231		desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
232		break;
233	case MPI_MANUFACTPAGE_DEVID_53C1030:
234	case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
235		desc = "LSILogic 1030 Ultra4 Adapter";
236		break;
237	case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB:
238		/*
239		 * Allow mfi(4) to claim this device in case it's in MegaRAID
240		 * mode.
241		 */
242		rval = BUS_PROBE_LOW_PRIORITY;
243		/* FALLTHROUGH */
244	case MPI_MANUFACTPAGE_DEVID_SAS1064:
245	case MPI_MANUFACTPAGE_DEVID_SAS1064A:
246	case MPI_MANUFACTPAGE_DEVID_SAS1064E:
247	case MPI_MANUFACTPAGE_DEVID_SAS1066:
248	case MPI_MANUFACTPAGE_DEVID_SAS1066E:
249	case MPI_MANUFACTPAGE_DEVID_SAS1068:
250	case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
251	case MPI_MANUFACTPAGE_DEVID_SAS1068E:
252	case MPI_MANUFACTPAGE_DEVID_SAS1078:
253	case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
254		desc = "LSILogic SAS/SATA Adapter";
255		break;
256	default:
257		return (ENXIO);
258	}
259
260	device_set_desc(dev, desc);
261	return (rval);
262}
263
264static void
265mpt_set_options(struct mpt_softc *mpt)
266{
267	int tval;
268
269	tval = 0;
270	if (resource_int_value(device_get_name(mpt->dev),
271	    device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
272		mpt->disabled = 1;
273	}
274	tval = 0;
275	if (resource_int_value(device_get_name(mpt->dev),
276	    device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
277		mpt->verbose = tval;
278	}
279	tval = -1;
280	if (resource_int_value(device_get_name(mpt->dev),
281	    device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 &&
282	    tval <= 3) {
283		mpt->cfg_role = tval;
284		mpt->do_cfg_role = 1;
285	}
286	tval = 0;
287	mpt->msi_enable = 0;
288	if (mpt->is_sas)
289		mpt->msi_enable = 1;
290	if (resource_int_value(device_get_name(mpt->dev),
291	    device_get_unit(mpt->dev), "msi_enable", &tval) == 0) {
292		mpt->msi_enable = tval;
293	}
294}
295
296static void
297mpt_link_peer(struct mpt_softc *mpt)
298{
299	struct mpt_softc *mpt2;
300
301	if (mpt->unit == 0) {
302		return;
303	}
304	/*
305	 * XXX: depends on probe order
306	 */
307	mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
308
309	if (mpt2 == NULL) {
310		return;
311	}
312	if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
313		return;
314	}
315	if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
316		return;
317	}
318	mpt->mpt2 = mpt2;
319	mpt2->mpt2 = mpt;
320	if (mpt->verbose >= MPT_PRT_DEBUG) {
321		mpt_prt(mpt, "linking with peer (mpt%d)\n",
322		    device_get_unit(mpt2->dev));
323	}
324}
325
326static void
327mpt_unlink_peer(struct mpt_softc *mpt)
328{
329
330	if (mpt->mpt2) {
331		mpt->mpt2->mpt2 = NULL;
332	}
333}
334
335static int
336mpt_pci_attach(device_t dev)
337{
338	struct mpt_softc *mpt;
339	int		  iqd;
340	uint32_t	  data, cmd;
341	int		  mpt_io_bar, mpt_mem_bar;
342
343	mpt  = (struct mpt_softc*)device_get_softc(dev);
344
345	switch (pci_get_device(dev)) {
346	case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
347	case MPI_MANUFACTPAGE_DEVICEID_FC909:
348	case MPI_MANUFACTPAGE_DEVICEID_FC919:
349	case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
350	case MPI_MANUFACTPAGE_DEVICEID_FC929:
351	case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
352	case MPI_MANUFACTPAGE_DEVICEID_FC929X:
353	case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
354	case MPI_MANUFACTPAGE_DEVICEID_FC919X:
355	case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
356	case MPI_MANUFACTPAGE_DEVICEID_FC949E:
357	case MPI_MANUFACTPAGE_DEVICEID_FC949X:
358		mpt->is_fc = 1;
359		break;
360	case MPI_MANUFACTPAGE_DEVID_SAS1078:
361	case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
362		mpt->is_1078 = 1;
363		/* FALLTHROUGH */
364	case MPI_MANUFACTPAGE_DEVID_SAS1064:
365	case MPI_MANUFACTPAGE_DEVID_SAS1064A:
366	case MPI_MANUFACTPAGE_DEVID_SAS1064E:
367	case MPI_MANUFACTPAGE_DEVID_SAS1066:
368	case MPI_MANUFACTPAGE_DEVID_SAS1066E:
369	case MPI_MANUFACTPAGE_DEVID_SAS1068:
370	case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
371	case MPI_MANUFACTPAGE_DEVID_SAS1068E:
372	case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB:
373		mpt->is_sas = 1;
374		break;
375	default:
376		mpt->is_spi = 1;
377		break;
378	}
379	mpt->dev = dev;
380	mpt->unit = device_get_unit(dev);
381	mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
382	mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
383	mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
384	mpt->verbose = MPT_PRT_NONE;
385	mpt->role = MPT_ROLE_NONE;
386	mpt->mpt_ini_id = MPT_INI_ID_NONE;
387#ifdef __sparc64__
388	if (mpt->is_spi)
389		mpt->mpt_ini_id = OF_getscsinitid(dev);
390#endif
391	mpt_set_options(mpt);
392	if (mpt->verbose == MPT_PRT_NONE) {
393		mpt->verbose = MPT_PRT_WARN;
394		/* Print INFO level (if any) if bootverbose is set */
395		mpt->verbose += (bootverbose != 0)? 1 : 0;
396	}
397	/* Make sure memory access decoders are enabled */
398	cmd = pci_read_config(dev, PCIR_COMMAND, 2);
399	if ((cmd & PCIM_CMD_MEMEN) == 0) {
400		device_printf(dev, "Memory accesses disabled");
401		return (ENXIO);
402	}
403
404	/*
405	 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
406	 */
407	cmd |=
408	    PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
409	    PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
410	pci_write_config(dev, PCIR_COMMAND, cmd, 2);
411
412	/*
413	 * Make sure we've disabled the ROM.
414	 */
415	data = pci_read_config(dev, PCIR_BIOS, 4);
416	data &= ~PCIM_BIOS_ENABLE;
417	pci_write_config(dev, PCIR_BIOS, data, 4);
418
419	/*
420	 * Is this part a dual?
421	 * If so, link with our partner (around yet)
422	 */
423	switch (pci_get_device(dev)) {
424	case MPI_MANUFACTPAGE_DEVICEID_FC929:
425	case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
426	case MPI_MANUFACTPAGE_DEVICEID_FC949E:
427	case MPI_MANUFACTPAGE_DEVICEID_FC949X:
428	case MPI_MANUFACTPAGE_DEVID_53C1030:
429	case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
430		mpt_link_peer(mpt);
431		break;
432	default:
433		break;
434	}
435
436	/*
437	 * Figure out which are the I/O and MEM Bars
438	 */
439	data = pci_read_config(dev, PCIR_BAR(0), 4);
440	if (PCI_BAR_IO(data)) {
441		/* BAR0 is IO, BAR1 is memory */
442		mpt_io_bar = 0;
443		mpt_mem_bar = 1;
444	} else {
445		/* BAR0 is memory, BAR1 is IO */
446		mpt_mem_bar = 0;
447		mpt_io_bar = 1;
448	}
449
450	/*
451	 * Set up register access.  PIO mode is required for
452	 * certain reset operations (but must be disabled for
453	 * some cards otherwise).
454	 */
455	mpt_io_bar = PCIR_BAR(mpt_io_bar);
456	mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
457	    &mpt_io_bar, RF_ACTIVE);
458	if (mpt->pci_pio_reg == NULL) {
459		if (bootverbose) {
460			device_printf(dev,
461			    "unable to map registers in PIO mode\n");
462		}
463	} else {
464		mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
465		mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
466	}
467
468	mpt_mem_bar = PCIR_BAR(mpt_mem_bar);
469	mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
470	    &mpt_mem_bar, RF_ACTIVE);
471	if (mpt->pci_reg == NULL) {
472		if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) {
473			device_printf(dev,
474			    "Unable to memory map registers.\n");
475		}
476		if (mpt->is_sas || mpt->pci_pio_reg == NULL) {
477			device_printf(dev, "Giving Up.\n");
478			goto bad;
479		}
480		if (bootverbose) {
481			device_printf(dev, "Falling back to PIO mode.\n");
482		}
483		mpt->pci_st = mpt->pci_pio_st;
484		mpt->pci_sh = mpt->pci_pio_sh;
485	} else {
486		mpt->pci_st = rman_get_bustag(mpt->pci_reg);
487		mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
488	}
489
490	/* Get a handle to the interrupt */
491	iqd = 0;
492	if (mpt->msi_enable) {
493		/*
494		 * First try to alloc an MSI-X message.  If that
495		 * fails, then try to alloc an MSI message instead.
496		 */
497		if (pci_msix_count(dev) == 1) {
498			mpt->pci_msi_count = 1;
499			if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) {
500				iqd = 1;
501			} else {
502				mpt->pci_msi_count = 0;
503			}
504		}
505		if (iqd == 0 && pci_msi_count(dev) == 1) {
506			mpt->pci_msi_count = 1;
507			if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) {
508				iqd = 1;
509			} else {
510				mpt->pci_msi_count = 0;
511			}
512		}
513	}
514	mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
515	    RF_ACTIVE | (mpt->pci_msi_count ? 0 : RF_SHAREABLE));
516	if (mpt->pci_irq == NULL) {
517		device_printf(dev, "could not allocate interrupt\n");
518		goto bad;
519	}
520
521	MPT_LOCK_SETUP(mpt);
522
523	/* Disable interrupts at the part */
524	mpt_disable_ints(mpt);
525
526	/* Register the interrupt handler */
527	if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr,
528	    mpt, &mpt->ih)) {
529		device_printf(dev, "could not setup interrupt\n");
530		goto bad;
531	}
532
533	/* Allocate dma memory */
534	if (mpt_dma_mem_alloc(mpt)) {
535		mpt_prt(mpt, "Could not allocate DMA memory\n");
536		goto bad;
537	}
538
539#if 0
540	/*
541	 * Save the PCI config register values
542 	 *
543	 * Hard resets are known to screw up the BAR for diagnostic
544	 * memory accesses (Mem1).
545	 *
546	 * Using Mem1 is known to make the chip stop responding to
547	 * configuration space transfers, so we need to save it now
548	 */
549
550	mpt_read_config_regs(mpt);
551#endif
552
553	/*
554	 * Disable PIO until we need it
555	 */
556	if (mpt->is_sas) {
557		pci_disable_io(dev, SYS_RES_IOPORT);
558	}
559
560	/* Initialize the hardware */
561	if (mpt->disabled == 0) {
562		if (mpt_attach(mpt) != 0) {
563			goto bad;
564		}
565	} else {
566		mpt_prt(mpt, "device disabled at user request\n");
567		goto bad;
568	}
569
570	mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
571	    dev, SHUTDOWN_PRI_DEFAULT);
572
573	if (mpt->eh == NULL) {
574		mpt_prt(mpt, "shutdown event registration failed\n");
575		(void) mpt_detach(mpt);
576		goto bad;
577	}
578	return (0);
579
580bad:
581	mpt_dma_mem_free(mpt);
582	mpt_free_bus_resources(mpt);
583	mpt_unlink_peer(mpt);
584
585	MPT_LOCK_DESTROY(mpt);
586
587	/*
588	 * but return zero to preserve unit numbering
589	 */
590	return (0);
591}
592
593/*
594 * Free bus resources
595 */
596static void
597mpt_free_bus_resources(struct mpt_softc *mpt)
598{
599
600	if (mpt->ih) {
601		bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
602		mpt->ih = NULL;
603	}
604
605	if (mpt->pci_irq) {
606		bus_release_resource(mpt->dev, SYS_RES_IRQ,
607		    rman_get_rid(mpt->pci_irq), mpt->pci_irq);
608		mpt->pci_irq = NULL;
609	}
610
611	if (mpt->pci_msi_count) {
612		pci_release_msi(mpt->dev);
613		mpt->pci_msi_count = 0;
614	}
615
616	if (mpt->pci_pio_reg) {
617		bus_release_resource(mpt->dev, SYS_RES_IOPORT,
618		    rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg);
619		mpt->pci_pio_reg = NULL;
620	}
621	if (mpt->pci_reg) {
622		bus_release_resource(mpt->dev, SYS_RES_MEMORY,
623		    rman_get_rid(mpt->pci_reg), mpt->pci_reg);
624		mpt->pci_reg = NULL;
625	}
626	MPT_LOCK_DESTROY(mpt);
627}
628
629/*
630 * Disconnect ourselves from the system.
631 */
632static int
633mpt_pci_detach(device_t dev)
634{
635	struct mpt_softc *mpt;
636
637	mpt  = (struct mpt_softc*)device_get_softc(dev);
638
639	if (mpt) {
640		mpt_disable_ints(mpt);
641		mpt_detach(mpt);
642		mpt_reset(mpt, /*reinit*/FALSE);
643		mpt_dma_mem_free(mpt);
644		mpt_free_bus_resources(mpt);
645		mpt_raid_free_mem(mpt);
646		if (mpt->eh != NULL) {
647                        EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh);
648		}
649	}
650	return(0);
651}
652
653/*
654 * Disable the hardware
655 */
656static int
657mpt_pci_shutdown(device_t dev)
658{
659	struct mpt_softc *mpt;
660
661	mpt = (struct mpt_softc *)device_get_softc(dev);
662	if (mpt) {
663		int r;
664		r = mpt_shutdown(mpt);
665		return (r);
666	}
667	return(0);
668}
669
670static int
671mpt_dma_mem_alloc(struct mpt_softc *mpt)
672{
673	size_t len;
674	struct mpt_map_info mi;
675
676	/* Check if we alreay have allocated the reply memory */
677	if (mpt->reply_phys != 0) {
678		return 0;
679	}
680
681	len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
682#ifdef	RELENG_4
683	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
684	if (mpt->request_pool == NULL) {
685		mpt_prt(mpt, "cannot allocate request pool\n");
686		return (1);
687	}
688	memset(mpt->request_pool, 0, len);
689#else
690	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
691	if (mpt->request_pool == NULL) {
692		mpt_prt(mpt, "cannot allocate request pool\n");
693		return (1);
694	}
695#endif
696
697	/*
698	 * Create a parent dma tag for this device.
699	 *
700	 * Align at byte boundaries,
701	 * Limit to 32-bit addressing for request/reply queues.
702	 */
703	if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev),
704	    /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
705	    /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
706	    /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
707	    /*nsegments*/BUS_SPACE_UNRESTRICTED,
708	    /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
709	    &mpt->parent_dmat) != 0) {
710		mpt_prt(mpt, "cannot create parent dma tag\n");
711		return (1);
712	}
713
714	/* Create a child tag for reply buffers */
715	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
716	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
717	    NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
718	    &mpt->reply_dmat) != 0) {
719		mpt_prt(mpt, "cannot create a dma tag for replies\n");
720		return (1);
721	}
722
723	/* Allocate some DMA accessible memory for replies */
724	if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
725	    BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
726		mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
727		    (u_long) (2 * PAGE_SIZE));
728		return (1);
729	}
730
731	mi.mpt = mpt;
732	mi.error = 0;
733
734	/* Load and lock it into "bus space" */
735	bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
736	    2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
737
738	if (mi.error) {
739		mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
740		    mi.error);
741		return (1);
742	}
743	mpt->reply_phys = mi.phys;
744
745	return (0);
746}
747
748/* Deallocate memory that was allocated by mpt_dma_mem_alloc
749 */
750static void
751mpt_dma_mem_free(struct mpt_softc *mpt)
752{
753
754        /* Make sure we aren't double destroying */
755        if (mpt->reply_dmat == 0) {
756		mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
757		return;
758        }
759
760	bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
761	bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
762	bus_dma_tag_destroy(mpt->reply_dmat);
763	bus_dma_tag_destroy(mpt->parent_dmat);
764	mpt->reply_dmat = NULL;
765	free(mpt->request_pool, M_DEVBUF);
766	mpt->request_pool = NULL;
767}
768
769#if 0
770/* Reads modifiable (via PCI transactions) config registers */
771static void
772mpt_read_config_regs(struct mpt_softc *mpt)
773{
774
775	mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
776	mpt->pci_cfg.LatencyTimer_LineSize =
777	    pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
778	mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
779	mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
780	mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
781	mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
782	mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
783	mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
784	mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
785	mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
786}
787
788/* Sets modifiable config registers */
789static void
790mpt_set_config_regs(struct mpt_softc *mpt)
791{
792	uint32_t val;
793
794#define MPT_CHECK(reg, offset, size)					\
795	val = pci_read_config(mpt->dev, offset, size);			\
796	if (mpt->pci_cfg.reg != val) {					\
797		mpt_prt(mpt,						\
798		    "Restoring " #reg " to 0x%X from 0x%X\n",		\
799		    mpt->pci_cfg.reg, val);				\
800	}
801
802	if (mpt->verbose >= MPT_PRT_DEBUG) {
803		MPT_CHECK(Command, PCIR_COMMAND, 2);
804		MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
805		MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
806		MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
807		MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
808		MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
809		MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
810		MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
811		MPT_CHECK(IntLine, PCIR_INTLINE, 1);
812		MPT_CHECK(PMCSR, 0x44, 4);
813	}
814#undef MPT_CHECK
815
816	pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
817	pci_write_config(mpt->dev, PCIR_CACHELNSZ,
818	    mpt->pci_cfg.LatencyTimer_LineSize, 2);
819	pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
820	pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
821	pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
822	pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
823	pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
824	pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
825	pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
826	pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
827}
828#endif
829
830static void
831mpt_pci_intr(void *arg)
832{
833	struct mpt_softc *mpt;
834
835	mpt = (struct mpt_softc *)arg;
836	MPT_LOCK(mpt);
837	mpt_intr(mpt);
838	MPT_UNLOCK(mpt);
839}
840