mpt_pci.c revision 233886
1/*-
2 * PCI specific probe and attach routines for LSI Fusion Adapters
3 * FreeBSD Version.
4 *
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8 * Feral Software
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice immediately at the beginning of the file, without modification,
16 *    this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32/*-
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
38 * met:
39 * 1. Redistributions of source code must retain the above copyright
40 *    notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 *    substantially similar to the "NO WARRANTY" disclaimer below
43 *    ("Disclaimer") and any redistribution must be conditioned upon including
44 *    a substantially similar Disclaimer requirement for further binary
45 *    redistribution.
46 * 3. Neither the names of the above listed copyright holders nor the names
47 *    of any contributors may be used to endorse or promote products derived
48 *    from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
64 *
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
67 */
68/*
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
73 *
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
76 * met:
77 * 1. Redistributions of source code must retain the above copyright
78 *    notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 *    substantially similar to the "NO WARRANTY" disclaimer below
81 *    ("Disclaimer") and any redistribution must be conditioned upon including
82 *    a substantially similar Disclaimer requirement for further binary
83 *    redistribution.
84 * 3. Neither the names of the above listed copyright holders nor the names
85 *    of any contributors may be used to endorse or promote products derived
86 *    from this software without specific prior written permission.
87 *
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
99 */
100
101#include <sys/cdefs.h>
102__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 233886 2012-04-04 20:42:45Z marius $");
103
104#include <dev/mpt/mpt.h>
105#include <dev/mpt/mpt_cam.h>
106#include <dev/mpt/mpt_raid.h>
107
108#if __FreeBSD_version < 700000
109#define	pci_msix_count(x)	0
110#define	pci_msi_count(x)	0
111#define	pci_alloc_msi(x, y)	1
112#define	pci_alloc_msix(x, y)	1
113#define	pci_release_msi(x)	do { ; } while (0)
114#endif
115
116/*
117 * XXX it seems no other MPT driver knows about the following chips.
118 */
119
120#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC909_FB
121#define	MPI_MANUFACTPAGE_DEVICEID_FC909_FB	0x0620
122#endif
123
124#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB
125#define	MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB	0x0625
126#endif
127
128#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB
129#define	MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB	0x0623
130#endif
131
132#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB
133#define	MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB	0x0627
134#endif
135
136#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB
137#define	MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB	0x0629
138#endif
139
140#ifndef MPI_MANUFACTPAGE_DEVID_SAS1068A_FB
141#define MPI_MANUFACTPAGE_DEVID_SAS1068A_FB	0x0055
142#endif
143
144#ifndef	MPI_MANUFACTPAGE_DEVID_SAS1068E_FB
145#define	MPI_MANUFACTPAGE_DEVID_SAS1068E_FB	0x0059
146#endif
147
148#ifndef	MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB
149#define	MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB	0x007C
150#endif
151
152#ifndef	PCIM_CMD_SERRESPEN
153#define	PCIM_CMD_SERRESPEN	0x0100
154#endif
155
156static int mpt_pci_probe(device_t);
157static int mpt_pci_attach(device_t);
158static void mpt_free_bus_resources(struct mpt_softc *mpt);
159static int mpt_pci_detach(device_t);
160static int mpt_pci_shutdown(device_t);
161static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
162static void mpt_dma_mem_free(struct mpt_softc *mpt);
163#if 0
164static void mpt_read_config_regs(struct mpt_softc *mpt);
165static void mpt_set_config_regs(struct mpt_softc *mpt);
166#endif
167static void mpt_pci_intr(void *);
168
169static device_method_t mpt_methods[] = {
170	/* Device interface */
171	DEVMETHOD(device_probe,		mpt_pci_probe),
172	DEVMETHOD(device_attach,	mpt_pci_attach),
173	DEVMETHOD(device_detach,	mpt_pci_detach),
174	DEVMETHOD(device_shutdown,	mpt_pci_shutdown),
175	DEVMETHOD_END
176};
177
178static driver_t mpt_driver = {
179	"mpt", mpt_methods, sizeof(struct mpt_softc)
180};
181static devclass_t mpt_devclass;
182DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, NULL, NULL);
183MODULE_DEPEND(mpt, pci, 1, 1, 1);
184MODULE_VERSION(mpt, 1);
185
186static int
187mpt_pci_probe(device_t dev)
188{
189	const char *desc;
190	int rval;
191
192	if (pci_get_vendor(dev) != MPI_MANUFACTPAGE_VENDORID_LSILOGIC)
193		return (ENXIO);
194
195	rval = BUS_PROBE_DEFAULT;
196	switch (pci_get_device(dev)) {
197	case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
198		desc = "LSILogic FC909 FC Adapter";
199		break;
200	case MPI_MANUFACTPAGE_DEVICEID_FC909:
201		desc = "LSILogic FC909A FC Adapter";
202		break;
203	case MPI_MANUFACTPAGE_DEVICEID_FC919:
204		desc = "LSILogic FC919 FC Adapter";
205		break;
206	case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
207		desc = "LSILogic FC919 LAN Adapter";
208		break;
209	case MPI_MANUFACTPAGE_DEVICEID_FC929:
210		desc = "Dual LSILogic FC929 FC Adapter";
211		break;
212	case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
213		desc = "Dual LSILogic FC929 LAN Adapter";
214		break;
215	case MPI_MANUFACTPAGE_DEVICEID_FC919X:
216		desc = "LSILogic FC919 FC PCI-X Adapter";
217		break;
218	case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
219		desc = "LSILogic FC919 LAN PCI-X Adapter";
220		break;
221	case MPI_MANUFACTPAGE_DEVICEID_FC929X:
222		desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
223		break;
224	case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
225		desc = "Dual LSILogic FC929X LAN PCI-X Adapter";
226		break;
227	case MPI_MANUFACTPAGE_DEVICEID_FC949E:
228		desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
229		break;
230	case MPI_MANUFACTPAGE_DEVICEID_FC949X:
231		desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
232		break;
233	case MPI_MANUFACTPAGE_DEVID_53C1030:
234	case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
235		desc = "LSILogic 1030 Ultra4 Adapter";
236		break;
237	case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB:
238		/*
239		 * Allow mfi(4) to claim this device in case it's in MegaRAID
240		 * mode.
241		 */
242		rval = BUS_PROBE_LOW_PRIORITY;
243		/* FALLTHROUGH */
244	case MPI_MANUFACTPAGE_DEVID_SAS1064:
245	case MPI_MANUFACTPAGE_DEVID_SAS1064A:
246	case MPI_MANUFACTPAGE_DEVID_SAS1064E:
247	case MPI_MANUFACTPAGE_DEVID_SAS1066:
248	case MPI_MANUFACTPAGE_DEVID_SAS1066E:
249	case MPI_MANUFACTPAGE_DEVID_SAS1068:
250	case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
251	case MPI_MANUFACTPAGE_DEVID_SAS1068E:
252	case MPI_MANUFACTPAGE_DEVID_SAS1078:
253	case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
254		desc = "LSILogic SAS/SATA Adapter";
255		break;
256	default:
257		return (ENXIO);
258	}
259
260	device_set_desc(dev, desc);
261	return (rval);
262}
263
264#if	__FreeBSD_version < 500000
265static void
266mpt_set_options(struct mpt_softc *mpt)
267{
268	int bitmap;
269
270	bitmap = 0;
271	if (getenv_int("mpt_disable", &bitmap)) {
272		if (bitmap & (1 << mpt->unit)) {
273			mpt->disabled = 1;
274		}
275	}
276	bitmap = 0;
277	if (getenv_int("mpt_debug", &bitmap)) {
278		if (bitmap & (1 << mpt->unit)) {
279			mpt->verbose = MPT_PRT_DEBUG;
280		}
281	}
282	bitmap = 0;
283	if (getenv_int("mpt_debug1", &bitmap)) {
284		if (bitmap & (1 << mpt->unit)) {
285			mpt->verbose = MPT_PRT_DEBUG1;
286		}
287	}
288	bitmap = 0;
289	if (getenv_int("mpt_debug2", &bitmap)) {
290		if (bitmap & (1 << mpt->unit)) {
291			mpt->verbose = MPT_PRT_DEBUG2;
292		}
293	}
294	bitmap = 0;
295	if (getenv_int("mpt_debug3", &bitmap)) {
296		if (bitmap & (1 << mpt->unit)) {
297			mpt->verbose = MPT_PRT_DEBUG3;
298		}
299	}
300
301	mpt->cfg_role = MPT_ROLE_DEFAULT;
302	bitmap = 0;
303	if (getenv_int("mpt_nil_role", &bitmap)) {
304		if (bitmap & (1 << mpt->unit)) {
305			mpt->cfg_role = 0;
306		}
307		mpt->do_cfg_role = 1;
308	}
309	bitmap = 0;
310	if (getenv_int("mpt_tgt_role", &bitmap)) {
311		if (bitmap & (1 << mpt->unit)) {
312			mpt->cfg_role |= MPT_ROLE_TARGET;
313		}
314		mpt->do_cfg_role = 1;
315	}
316	bitmap = 0;
317	if (getenv_int("mpt_ini_role", &bitmap)) {
318		if (bitmap & (1 << mpt->unit)) {
319			mpt->cfg_role |= MPT_ROLE_INITIATOR;
320		}
321		mpt->do_cfg_role = 1;
322	}
323	mpt->msi_enable = 0;
324}
325#else
326static void
327mpt_set_options(struct mpt_softc *mpt)
328{
329	int tval;
330
331	tval = 0;
332	if (resource_int_value(device_get_name(mpt->dev),
333	    device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
334		mpt->disabled = 1;
335	}
336	tval = 0;
337	if (resource_int_value(device_get_name(mpt->dev),
338	    device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
339		mpt->verbose = tval;
340	}
341	tval = -1;
342	if (resource_int_value(device_get_name(mpt->dev),
343	    device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 &&
344	    tval <= 3) {
345		mpt->cfg_role = tval;
346		mpt->do_cfg_role = 1;
347	}
348	tval = 0;
349	mpt->msi_enable = 0;
350	if (mpt->is_sas)
351		mpt->msi_enable = 1;
352	if (resource_int_value(device_get_name(mpt->dev),
353	    device_get_unit(mpt->dev), "msi_enable", &tval) == 0) {
354		mpt->msi_enable = tval;
355	}
356}
357#endif
358
359static void
360mpt_link_peer(struct mpt_softc *mpt)
361{
362	struct mpt_softc *mpt2;
363
364	if (mpt->unit == 0) {
365		return;
366	}
367	/*
368	 * XXX: depends on probe order
369	 */
370	mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
371
372	if (mpt2 == NULL) {
373		return;
374	}
375	if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
376		return;
377	}
378	if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
379		return;
380	}
381	mpt->mpt2 = mpt2;
382	mpt2->mpt2 = mpt;
383	if (mpt->verbose >= MPT_PRT_DEBUG) {
384		mpt_prt(mpt, "linking with peer (mpt%d)\n",
385		    device_get_unit(mpt2->dev));
386	}
387}
388
389static void
390mpt_unlink_peer(struct mpt_softc *mpt)
391{
392
393	if (mpt->mpt2) {
394		mpt->mpt2->mpt2 = NULL;
395	}
396}
397
398static int
399mpt_pci_attach(device_t dev)
400{
401	struct mpt_softc *mpt;
402	int		  iqd;
403	uint32_t	  data, cmd;
404	int		  mpt_io_bar, mpt_mem_bar;
405
406	mpt  = (struct mpt_softc*)device_get_softc(dev);
407
408	switch (pci_get_device(dev)) {
409	case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
410	case MPI_MANUFACTPAGE_DEVICEID_FC909:
411	case MPI_MANUFACTPAGE_DEVICEID_FC919:
412	case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
413	case MPI_MANUFACTPAGE_DEVICEID_FC929:
414	case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
415	case MPI_MANUFACTPAGE_DEVICEID_FC929X:
416	case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
417	case MPI_MANUFACTPAGE_DEVICEID_FC919X:
418	case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
419	case MPI_MANUFACTPAGE_DEVICEID_FC949E:
420	case MPI_MANUFACTPAGE_DEVICEID_FC949X:
421		mpt->is_fc = 1;
422		break;
423	case MPI_MANUFACTPAGE_DEVID_SAS1078:
424	case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
425		mpt->is_1078 = 1;
426		/* FALLTHROUGH */
427	case MPI_MANUFACTPAGE_DEVID_SAS1064:
428	case MPI_MANUFACTPAGE_DEVID_SAS1064A:
429	case MPI_MANUFACTPAGE_DEVID_SAS1064E:
430	case MPI_MANUFACTPAGE_DEVID_SAS1066:
431	case MPI_MANUFACTPAGE_DEVID_SAS1066E:
432	case MPI_MANUFACTPAGE_DEVID_SAS1068:
433	case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
434	case MPI_MANUFACTPAGE_DEVID_SAS1068E:
435	case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB:
436		mpt->is_sas = 1;
437		break;
438	default:
439		mpt->is_spi = 1;
440		break;
441	}
442	mpt->dev = dev;
443	mpt->unit = device_get_unit(dev);
444	mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
445	mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
446	mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
447	mpt->verbose = MPT_PRT_NONE;
448	mpt->role = MPT_ROLE_NONE;
449	mpt->mpt_ini_id = MPT_INI_ID_NONE;
450#ifdef __sparc64__
451	if (mpt->is_spi)
452		mpt->mpt_ini_id = OF_getscsinitid(dev);
453#endif
454	mpt_set_options(mpt);
455	if (mpt->verbose == MPT_PRT_NONE) {
456		mpt->verbose = MPT_PRT_WARN;
457		/* Print INFO level (if any) if bootverbose is set */
458		mpt->verbose += (bootverbose != 0)? 1 : 0;
459	}
460	/* Make sure memory access decoders are enabled */
461	cmd = pci_read_config(dev, PCIR_COMMAND, 2);
462	if ((cmd & PCIM_CMD_MEMEN) == 0) {
463		device_printf(dev, "Memory accesses disabled");
464		return (ENXIO);
465	}
466
467	/*
468	 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
469	 */
470	cmd |=
471	    PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
472	    PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
473	pci_write_config(dev, PCIR_COMMAND, cmd, 2);
474
475	/*
476	 * Make sure we've disabled the ROM.
477	 */
478	data = pci_read_config(dev, PCIR_BIOS, 4);
479	data &= ~PCIM_BIOS_ENABLE;
480	pci_write_config(dev, PCIR_BIOS, data, 4);
481
482	/*
483	 * Is this part a dual?
484	 * If so, link with our partner (around yet)
485	 */
486	switch (pci_get_device(dev)) {
487	case MPI_MANUFACTPAGE_DEVICEID_FC929:
488	case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
489	case MPI_MANUFACTPAGE_DEVICEID_FC949E:
490	case MPI_MANUFACTPAGE_DEVICEID_FC949X:
491	case MPI_MANUFACTPAGE_DEVID_53C1030:
492	case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
493		mpt_link_peer(mpt);
494		break;
495	default:
496		break;
497	}
498
499	/*
500	 * Figure out which are the I/O and MEM Bars
501	 */
502	data = pci_read_config(dev, PCIR_BAR(0), 4);
503	if (PCI_BAR_IO(data)) {
504		/* BAR0 is IO, BAR1 is memory */
505		mpt_io_bar = 0;
506		mpt_mem_bar = 1;
507	} else {
508		/* BAR0 is memory, BAR1 is IO */
509		mpt_mem_bar = 0;
510		mpt_io_bar = 1;
511	}
512
513	/*
514	 * Set up register access.  PIO mode is required for
515	 * certain reset operations (but must be disabled for
516	 * some cards otherwise).
517	 */
518	mpt_io_bar = PCIR_BAR(mpt_io_bar);
519	mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
520	    &mpt_io_bar, RF_ACTIVE);
521	if (mpt->pci_pio_reg == NULL) {
522		if (bootverbose) {
523			device_printf(dev,
524			    "unable to map registers in PIO mode\n");
525		}
526	} else {
527		mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
528		mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
529	}
530
531	mpt_mem_bar = PCIR_BAR(mpt_mem_bar);
532	mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
533	    &mpt_mem_bar, RF_ACTIVE);
534	if (mpt->pci_reg == NULL) {
535		if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) {
536			device_printf(dev,
537			    "Unable to memory map registers.\n");
538		}
539		if (mpt->is_sas || mpt->pci_pio_reg == NULL) {
540			device_printf(dev, "Giving Up.\n");
541			goto bad;
542		}
543		if (bootverbose) {
544			device_printf(dev, "Falling back to PIO mode.\n");
545		}
546		mpt->pci_st = mpt->pci_pio_st;
547		mpt->pci_sh = mpt->pci_pio_sh;
548	} else {
549		mpt->pci_st = rman_get_bustag(mpt->pci_reg);
550		mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
551	}
552
553	/* Get a handle to the interrupt */
554	iqd = 0;
555	if (mpt->msi_enable) {
556		/*
557		 * First try to alloc an MSI-X message.  If that
558		 * fails, then try to alloc an MSI message instead.
559		 */
560		if (pci_msix_count(dev) == 1) {
561			mpt->pci_msi_count = 1;
562			if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) {
563				iqd = 1;
564			} else {
565				mpt->pci_msi_count = 0;
566			}
567		}
568		if (iqd == 0 && pci_msi_count(dev) == 1) {
569			mpt->pci_msi_count = 1;
570			if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) {
571				iqd = 1;
572			} else {
573				mpt->pci_msi_count = 0;
574			}
575		}
576	}
577	mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
578	    RF_ACTIVE | (mpt->pci_msi_count ? 0 : RF_SHAREABLE));
579	if (mpt->pci_irq == NULL) {
580		device_printf(dev, "could not allocate interrupt\n");
581		goto bad;
582	}
583
584	MPT_LOCK_SETUP(mpt);
585
586	/* Disable interrupts at the part */
587	mpt_disable_ints(mpt);
588
589	/* Register the interrupt handler */
590	if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr,
591	    mpt, &mpt->ih)) {
592		device_printf(dev, "could not setup interrupt\n");
593		goto bad;
594	}
595
596	/* Allocate dma memory */
597	if (mpt_dma_mem_alloc(mpt)) {
598		mpt_prt(mpt, "Could not allocate DMA memory\n");
599		goto bad;
600	}
601
602#if 0
603	/*
604	 * Save the PCI config register values
605 	 *
606	 * Hard resets are known to screw up the BAR for diagnostic
607	 * memory accesses (Mem1).
608	 *
609	 * Using Mem1 is known to make the chip stop responding to
610	 * configuration space transfers, so we need to save it now
611	 */
612
613	mpt_read_config_regs(mpt);
614#endif
615
616	/*
617	 * Disable PIO until we need it
618	 */
619	if (mpt->is_sas) {
620		pci_disable_io(dev, SYS_RES_IOPORT);
621	}
622
623	/* Initialize the hardware */
624	if (mpt->disabled == 0) {
625		if (mpt_attach(mpt) != 0) {
626			goto bad;
627		}
628	} else {
629		mpt_prt(mpt, "device disabled at user request\n");
630		goto bad;
631	}
632
633	mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
634	    dev, SHUTDOWN_PRI_DEFAULT);
635
636	if (mpt->eh == NULL) {
637		mpt_prt(mpt, "shutdown event registration failed\n");
638		(void) mpt_detach(mpt);
639		goto bad;
640	}
641	return (0);
642
643bad:
644	mpt_dma_mem_free(mpt);
645	mpt_free_bus_resources(mpt);
646	mpt_unlink_peer(mpt);
647
648	MPT_LOCK_DESTROY(mpt);
649
650	/*
651	 * but return zero to preserve unit numbering
652	 */
653	return (0);
654}
655
656/*
657 * Free bus resources
658 */
659static void
660mpt_free_bus_resources(struct mpt_softc *mpt)
661{
662
663	if (mpt->ih) {
664		bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
665		mpt->ih = NULL;
666	}
667
668	if (mpt->pci_irq) {
669		bus_release_resource(mpt->dev, SYS_RES_IRQ,
670		    rman_get_rid(mpt->pci_irq), mpt->pci_irq);
671		mpt->pci_irq = NULL;
672	}
673
674	if (mpt->pci_msi_count) {
675		pci_release_msi(mpt->dev);
676		mpt->pci_msi_count = 0;
677	}
678
679	if (mpt->pci_pio_reg) {
680		bus_release_resource(mpt->dev, SYS_RES_IOPORT,
681		    rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg);
682		mpt->pci_pio_reg = NULL;
683	}
684	if (mpt->pci_reg) {
685		bus_release_resource(mpt->dev, SYS_RES_MEMORY,
686		    rman_get_rid(mpt->pci_reg), mpt->pci_reg);
687		mpt->pci_reg = NULL;
688	}
689	MPT_LOCK_DESTROY(mpt);
690}
691
692/*
693 * Disconnect ourselves from the system.
694 */
695static int
696mpt_pci_detach(device_t dev)
697{
698	struct mpt_softc *mpt;
699
700	mpt  = (struct mpt_softc*)device_get_softc(dev);
701
702	if (mpt) {
703		mpt_disable_ints(mpt);
704		mpt_detach(mpt);
705		mpt_reset(mpt, /*reinit*/FALSE);
706		mpt_dma_mem_free(mpt);
707		mpt_free_bus_resources(mpt);
708		mpt_raid_free_mem(mpt);
709		if (mpt->eh != NULL) {
710                        EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh);
711		}
712	}
713	return(0);
714}
715
716/*
717 * Disable the hardware
718 */
719static int
720mpt_pci_shutdown(device_t dev)
721{
722	struct mpt_softc *mpt;
723
724	mpt = (struct mpt_softc *)device_get_softc(dev);
725	if (mpt) {
726		int r;
727		r = mpt_shutdown(mpt);
728		return (r);
729	}
730	return(0);
731}
732
733static int
734mpt_dma_mem_alloc(struct mpt_softc *mpt)
735{
736	size_t len;
737	struct mpt_map_info mi;
738
739	/* Check if we alreay have allocated the reply memory */
740	if (mpt->reply_phys != 0) {
741		return 0;
742	}
743
744	len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
745#ifdef	RELENG_4
746	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
747	if (mpt->request_pool == NULL) {
748		mpt_prt(mpt, "cannot allocate request pool\n");
749		return (1);
750	}
751	memset(mpt->request_pool, 0, len);
752#else
753	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
754	if (mpt->request_pool == NULL) {
755		mpt_prt(mpt, "cannot allocate request pool\n");
756		return (1);
757	}
758#endif
759
760	/*
761	 * Create a parent dma tag for this device.
762	 *
763	 * Align at byte boundaries,
764	 * Limit to 32-bit addressing for request/reply queues.
765	 */
766	if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev),
767	    /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
768	    /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
769	    /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
770	    /*nsegments*/BUS_SPACE_UNRESTRICTED,
771	    /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
772	    &mpt->parent_dmat) != 0) {
773		mpt_prt(mpt, "cannot create parent dma tag\n");
774		return (1);
775	}
776
777	/* Create a child tag for reply buffers */
778	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
779	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
780	    NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
781	    &mpt->reply_dmat) != 0) {
782		mpt_prt(mpt, "cannot create a dma tag for replies\n");
783		return (1);
784	}
785
786	/* Allocate some DMA accessible memory for replies */
787	if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
788	    BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
789		mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
790		    (u_long) (2 * PAGE_SIZE));
791		return (1);
792	}
793
794	mi.mpt = mpt;
795	mi.error = 0;
796
797	/* Load and lock it into "bus space" */
798	bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
799	    2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
800
801	if (mi.error) {
802		mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
803		    mi.error);
804		return (1);
805	}
806	mpt->reply_phys = mi.phys;
807
808	return (0);
809}
810
811/* Deallocate memory that was allocated by mpt_dma_mem_alloc
812 */
813static void
814mpt_dma_mem_free(struct mpt_softc *mpt)
815{
816
817        /* Make sure we aren't double destroying */
818        if (mpt->reply_dmat == 0) {
819		mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
820		return;
821        }
822
823	bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
824	bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
825	bus_dma_tag_destroy(mpt->reply_dmat);
826	bus_dma_tag_destroy(mpt->parent_dmat);
827	mpt->reply_dmat = NULL;
828	free(mpt->request_pool, M_DEVBUF);
829	mpt->request_pool = NULL;
830}
831
832#if 0
833/* Reads modifiable (via PCI transactions) config registers */
834static void
835mpt_read_config_regs(struct mpt_softc *mpt)
836{
837
838	mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
839	mpt->pci_cfg.LatencyTimer_LineSize =
840	    pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
841	mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
842	mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
843	mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
844	mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
845	mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
846	mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
847	mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
848	mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
849}
850
851/* Sets modifiable config registers */
852static void
853mpt_set_config_regs(struct mpt_softc *mpt)
854{
855	uint32_t val;
856
857#define MPT_CHECK(reg, offset, size)					\
858	val = pci_read_config(mpt->dev, offset, size);			\
859	if (mpt->pci_cfg.reg != val) {					\
860		mpt_prt(mpt,						\
861		    "Restoring " #reg " to 0x%X from 0x%X\n",		\
862		    mpt->pci_cfg.reg, val);				\
863	}
864
865	if (mpt->verbose >= MPT_PRT_DEBUG) {
866		MPT_CHECK(Command, PCIR_COMMAND, 2);
867		MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
868		MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
869		MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
870		MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
871		MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
872		MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
873		MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
874		MPT_CHECK(IntLine, PCIR_INTLINE, 1);
875		MPT_CHECK(PMCSR, 0x44, 4);
876	}
877#undef MPT_CHECK
878
879	pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
880	pci_write_config(mpt->dev, PCIR_CACHELNSZ,
881	    mpt->pci_cfg.LatencyTimer_LineSize, 2);
882	pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
883	pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
884	pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
885	pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
886	pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
887	pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
888	pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
889	pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
890}
891#endif
892
893static void
894mpt_pci_intr(void *arg)
895{
896	struct mpt_softc *mpt;
897
898	mpt = (struct mpt_softc *)arg;
899	MPT_LOCK(mpt);
900	mpt_intr(mpt);
901	MPT_UNLOCK(mpt);
902}
903