mpt_pci.c revision 233827
1/*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * Partially derived from Matt Jacob's ISP driver. 7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 8 * Feral Software 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32/*- 33 * Copyright (c) 2002, 2006 by Matthew Jacob 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions are 38 * met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 42 * substantially similar to the "NO WARRANTY" disclaimer below 43 * ("Disclaimer") and any redistribution must be conditioned upon including 44 * a substantially similar Disclaimer requirement for further binary 45 * redistribution. 46 * 3. Neither the names of the above listed copyright holders nor the names 47 * of any contributors may be used to endorse or promote products derived 48 * from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 * 62 * Support from Chris Ellsworth in order to make SAS adapters work 63 * is gratefully acknowledged. 64 * 65 * Support from LSI-Logic has also gone a great deal toward making this a 66 * workable subsystem and is gratefully acknowledged. 67 */ 68/* 69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 70 * Copyright (c) 2005, WHEEL Sp. z o.o. 71 * Copyright (c) 2004, 2005 Justin T. Gibbs 72 * All rights reserved. 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions are 76 * met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 80 * substantially similar to the "NO WARRANTY" disclaimer below 81 * ("Disclaimer") and any redistribution must be conditioned upon including 82 * a substantially similar Disclaimer requirement for further binary 83 * redistribution. 84 * 3. Neither the names of the above listed copyright holders nor the names 85 * of any contributors may be used to endorse or promote products derived 86 * from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 99 */ 100 101#include <sys/cdefs.h> 102__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 233827 2012-04-03 08:28:43Z marius $"); 103 104#include <dev/mpt/mpt.h> 105#include <dev/mpt/mpt_cam.h> 106#include <dev/mpt/mpt_raid.h> 107 108#if __FreeBSD_version < 700000 109#define pci_msix_count(x) 0 110#define pci_msi_count(x) 0 111#define pci_alloc_msi(x, y) 1 112#define pci_alloc_msix(x, y) 1 113#define pci_release_msi(x) do { ; } while (0) 114#endif 115 116/* 117 * XXX it seems no other MPT driver knows about the following chips. 118 */ 119 120#ifndef MPI_MANUFACTPAGE_DEVICEID_FC909_FB 121#define MPI_MANUFACTPAGE_DEVICEID_FC909_FB 0x0620 122#endif 123 124#ifndef MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB 125#define MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB 0x0625 126#endif 127 128#ifndef MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB 129#define MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB 0x0623 130#endif 131 132#ifndef MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB 133#define MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB 0x0627 134#endif 135 136#ifndef MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB 137#define MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB 0x0629 138#endif 139 140#ifndef MPI_MANUFACTPAGE_DEVID_SAS1068A_FB 141#define MPI_MANUFACTPAGE_DEVID_SAS1068A_FB 0x0055 142#endif 143 144#ifndef MPI_MANUFACTPAGE_DEVID_SAS1068E_FB 145#define MPI_MANUFACTPAGE_DEVID_SAS1068E_FB 0x0059 146#endif 147 148#ifndef MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB 149#define MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB 0x007C 150#endif 151 152#ifndef PCIM_CMD_SERRESPEN 153#define PCIM_CMD_SERRESPEN 0x0100 154#endif 155 156static int mpt_pci_probe(device_t); 157static int mpt_pci_attach(device_t); 158static void mpt_free_bus_resources(struct mpt_softc *mpt); 159static int mpt_pci_detach(device_t); 160static int mpt_pci_shutdown(device_t); 161static int mpt_dma_mem_alloc(struct mpt_softc *mpt); 162static void mpt_dma_mem_free(struct mpt_softc *mpt); 163#if 0 164static void mpt_read_config_regs(struct mpt_softc *mpt); 165static void mpt_set_config_regs(struct mpt_softc *mpt); 166#endif 167static void mpt_pci_intr(void *); 168 169static device_method_t mpt_methods[] = { 170 /* Device interface */ 171 DEVMETHOD(device_probe, mpt_pci_probe), 172 DEVMETHOD(device_attach, mpt_pci_attach), 173 DEVMETHOD(device_detach, mpt_pci_detach), 174 DEVMETHOD(device_shutdown, mpt_pci_shutdown), 175 DEVMETHOD_END 176}; 177 178static driver_t mpt_driver = { 179 "mpt", mpt_methods, sizeof(struct mpt_softc) 180}; 181static devclass_t mpt_devclass; 182DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, NULL, NULL); 183MODULE_DEPEND(mpt, pci, 1, 1, 1); 184MODULE_VERSION(mpt, 1); 185 186static int 187mpt_pci_probe(device_t dev) 188{ 189 const char *desc; 190 191 if (pci_get_vendor(dev) != MPI_MANUFACTPAGE_VENDORID_LSILOGIC) 192 return (ENXIO); 193 194 switch (pci_get_device(dev)) { 195 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB: 196 desc = "LSILogic FC909 FC Adapter"; 197 break; 198 case MPI_MANUFACTPAGE_DEVICEID_FC909: 199 desc = "LSILogic FC909A FC Adapter"; 200 break; 201 case MPI_MANUFACTPAGE_DEVICEID_FC919: 202 desc = "LSILogic FC919 FC Adapter"; 203 break; 204 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB: 205 desc = "LSILogic FC919 LAN Adapter"; 206 break; 207 case MPI_MANUFACTPAGE_DEVICEID_FC929: 208 desc = "Dual LSILogic FC929 FC Adapter"; 209 break; 210 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 211 desc = "Dual LSILogic FC929 LAN Adapter"; 212 break; 213 case MPI_MANUFACTPAGE_DEVICEID_FC919X: 214 desc = "LSILogic FC919 FC PCI-X Adapter"; 215 break; 216 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB: 217 desc = "LSILogic FC919 LAN PCI-X Adapter"; 218 break; 219 case MPI_MANUFACTPAGE_DEVICEID_FC929X: 220 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter"; 221 break; 222 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB: 223 desc = "Dual LSILogic FC929X LAN PCI-X Adapter"; 224 break; 225 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 226 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter"; 227 break; 228 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 229 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter"; 230 break; 231 case MPI_MANUFACTPAGE_DEVID_53C1030: 232 case MPI_MANUFACTPAGE_DEVID_53C1030ZC: 233 desc = "LSILogic 1030 Ultra4 Adapter"; 234 break; 235 case MPI_MANUFACTPAGE_DEVID_SAS1064: 236 case MPI_MANUFACTPAGE_DEVID_SAS1064A: 237 case MPI_MANUFACTPAGE_DEVID_SAS1064E: 238 case MPI_MANUFACTPAGE_DEVID_SAS1066: 239 case MPI_MANUFACTPAGE_DEVID_SAS1066E: 240 case MPI_MANUFACTPAGE_DEVID_SAS1068: 241 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB: 242 case MPI_MANUFACTPAGE_DEVID_SAS1068E: 243 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB: 244 case MPI_MANUFACTPAGE_DEVID_SAS1078: 245 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB: 246 desc = "LSILogic SAS/SATA Adapter"; 247 break; 248 default: 249 return (ENXIO); 250 } 251 252 device_set_desc(dev, desc); 253 return (0); 254} 255 256#if __FreeBSD_version < 500000 257static void 258mpt_set_options(struct mpt_softc *mpt) 259{ 260 int bitmap; 261 262 bitmap = 0; 263 if (getenv_int("mpt_disable", &bitmap)) { 264 if (bitmap & (1 << mpt->unit)) { 265 mpt->disabled = 1; 266 } 267 } 268 bitmap = 0; 269 if (getenv_int("mpt_debug", &bitmap)) { 270 if (bitmap & (1 << mpt->unit)) { 271 mpt->verbose = MPT_PRT_DEBUG; 272 } 273 } 274 bitmap = 0; 275 if (getenv_int("mpt_debug1", &bitmap)) { 276 if (bitmap & (1 << mpt->unit)) { 277 mpt->verbose = MPT_PRT_DEBUG1; 278 } 279 } 280 bitmap = 0; 281 if (getenv_int("mpt_debug2", &bitmap)) { 282 if (bitmap & (1 << mpt->unit)) { 283 mpt->verbose = MPT_PRT_DEBUG2; 284 } 285 } 286 bitmap = 0; 287 if (getenv_int("mpt_debug3", &bitmap)) { 288 if (bitmap & (1 << mpt->unit)) { 289 mpt->verbose = MPT_PRT_DEBUG3; 290 } 291 } 292 293 mpt->cfg_role = MPT_ROLE_DEFAULT; 294 bitmap = 0; 295 if (getenv_int("mpt_nil_role", &bitmap)) { 296 if (bitmap & (1 << mpt->unit)) { 297 mpt->cfg_role = 0; 298 } 299 mpt->do_cfg_role = 1; 300 } 301 bitmap = 0; 302 if (getenv_int("mpt_tgt_role", &bitmap)) { 303 if (bitmap & (1 << mpt->unit)) { 304 mpt->cfg_role |= MPT_ROLE_TARGET; 305 } 306 mpt->do_cfg_role = 1; 307 } 308 bitmap = 0; 309 if (getenv_int("mpt_ini_role", &bitmap)) { 310 if (bitmap & (1 << mpt->unit)) { 311 mpt->cfg_role |= MPT_ROLE_INITIATOR; 312 } 313 mpt->do_cfg_role = 1; 314 } 315 mpt->msi_enable = 0; 316} 317#else 318static void 319mpt_set_options(struct mpt_softc *mpt) 320{ 321 int tval; 322 323 tval = 0; 324 if (resource_int_value(device_get_name(mpt->dev), 325 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) { 326 mpt->disabled = 1; 327 } 328 tval = 0; 329 if (resource_int_value(device_get_name(mpt->dev), 330 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 331 mpt->verbose = tval; 332 } 333 tval = -1; 334 if (resource_int_value(device_get_name(mpt->dev), 335 device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 && 336 tval <= 3) { 337 mpt->cfg_role = tval; 338 mpt->do_cfg_role = 1; 339 } 340 tval = 0; 341 mpt->msi_enable = 0; 342 if (mpt->is_sas) 343 mpt->msi_enable = 1; 344 if (resource_int_value(device_get_name(mpt->dev), 345 device_get_unit(mpt->dev), "msi_enable", &tval) == 0) { 346 mpt->msi_enable = tval; 347 } 348} 349#endif 350 351static void 352mpt_link_peer(struct mpt_softc *mpt) 353{ 354 struct mpt_softc *mpt2; 355 356 if (mpt->unit == 0) { 357 return; 358 } 359 /* 360 * XXX: depends on probe order 361 */ 362 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1); 363 364 if (mpt2 == NULL) { 365 return; 366 } 367 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 368 return; 369 } 370 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 371 return; 372 } 373 mpt->mpt2 = mpt2; 374 mpt2->mpt2 = mpt; 375 if (mpt->verbose >= MPT_PRT_DEBUG) { 376 mpt_prt(mpt, "linking with peer (mpt%d)\n", 377 device_get_unit(mpt2->dev)); 378 } 379} 380 381static void 382mpt_unlink_peer(struct mpt_softc *mpt) 383{ 384 385 if (mpt->mpt2) { 386 mpt->mpt2->mpt2 = NULL; 387 } 388} 389 390static int 391mpt_pci_attach(device_t dev) 392{ 393 struct mpt_softc *mpt; 394 int iqd; 395 uint32_t data, cmd; 396 int mpt_io_bar, mpt_mem_bar; 397 398 mpt = (struct mpt_softc*)device_get_softc(dev); 399 400 switch (pci_get_device(dev)) { 401 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB: 402 case MPI_MANUFACTPAGE_DEVICEID_FC909: 403 case MPI_MANUFACTPAGE_DEVICEID_FC919: 404 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB: 405 case MPI_MANUFACTPAGE_DEVICEID_FC929: 406 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 407 case MPI_MANUFACTPAGE_DEVICEID_FC929X: 408 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB: 409 case MPI_MANUFACTPAGE_DEVICEID_FC919X: 410 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB: 411 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 412 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 413 mpt->is_fc = 1; 414 break; 415 case MPI_MANUFACTPAGE_DEVID_SAS1078: 416 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB: 417 mpt->is_1078 = 1; 418 /* FALLTHROUGH */ 419 case MPI_MANUFACTPAGE_DEVID_SAS1064: 420 case MPI_MANUFACTPAGE_DEVID_SAS1064A: 421 case MPI_MANUFACTPAGE_DEVID_SAS1064E: 422 case MPI_MANUFACTPAGE_DEVID_SAS1066: 423 case MPI_MANUFACTPAGE_DEVID_SAS1066E: 424 case MPI_MANUFACTPAGE_DEVID_SAS1068: 425 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB: 426 case MPI_MANUFACTPAGE_DEVID_SAS1068E: 427 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB: 428 mpt->is_sas = 1; 429 break; 430 default: 431 mpt->is_spi = 1; 432 break; 433 } 434 mpt->dev = dev; 435 mpt->unit = device_get_unit(dev); 436 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT; 437 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT; 438 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT; 439 mpt->verbose = MPT_PRT_NONE; 440 mpt->role = MPT_ROLE_NONE; 441 mpt->mpt_ini_id = MPT_INI_ID_NONE; 442#ifdef __sparc64__ 443 if (mpt->is_spi) 444 mpt->mpt_ini_id = OF_getscsinitid(dev); 445#endif 446 mpt_set_options(mpt); 447 if (mpt->verbose == MPT_PRT_NONE) { 448 mpt->verbose = MPT_PRT_WARN; 449 /* Print INFO level (if any) if bootverbose is set */ 450 mpt->verbose += (bootverbose != 0)? 1 : 0; 451 } 452 /* Make sure memory access decoders are enabled */ 453 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 454 if ((cmd & PCIM_CMD_MEMEN) == 0) { 455 device_printf(dev, "Memory accesses disabled"); 456 return (ENXIO); 457 } 458 459 /* 460 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 461 */ 462 cmd |= 463 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 464 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 465 pci_write_config(dev, PCIR_COMMAND, cmd, 2); 466 467 /* 468 * Make sure we've disabled the ROM. 469 */ 470 data = pci_read_config(dev, PCIR_BIOS, 4); 471 data &= ~PCIM_BIOS_ENABLE; 472 pci_write_config(dev, PCIR_BIOS, data, 4); 473 474 /* 475 * Is this part a dual? 476 * If so, link with our partner (around yet) 477 */ 478 switch (pci_get_device(dev)) { 479 case MPI_MANUFACTPAGE_DEVICEID_FC929: 480 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 481 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 482 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 483 case MPI_MANUFACTPAGE_DEVID_53C1030: 484 case MPI_MANUFACTPAGE_DEVID_53C1030ZC: 485 mpt_link_peer(mpt); 486 break; 487 default: 488 break; 489 } 490 491 /* 492 * Figure out which are the I/O and MEM Bars 493 */ 494 data = pci_read_config(dev, PCIR_BAR(0), 4); 495 if (PCI_BAR_IO(data)) { 496 /* BAR0 is IO, BAR1 is memory */ 497 mpt_io_bar = 0; 498 mpt_mem_bar = 1; 499 } else { 500 /* BAR0 is memory, BAR1 is IO */ 501 mpt_mem_bar = 0; 502 mpt_io_bar = 1; 503 } 504 505 /* 506 * Set up register access. PIO mode is required for 507 * certain reset operations (but must be disabled for 508 * some cards otherwise). 509 */ 510 mpt_io_bar = PCIR_BAR(mpt_io_bar); 511 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, 512 &mpt_io_bar, RF_ACTIVE); 513 if (mpt->pci_pio_reg == NULL) { 514 if (bootverbose) { 515 device_printf(dev, 516 "unable to map registers in PIO mode\n"); 517 } 518 } else { 519 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg); 520 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg); 521 } 522 523 mpt_mem_bar = PCIR_BAR(mpt_mem_bar); 524 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 525 &mpt_mem_bar, RF_ACTIVE); 526 if (mpt->pci_reg == NULL) { 527 if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) { 528 device_printf(dev, 529 "Unable to memory map registers.\n"); 530 } 531 if (mpt->is_sas || mpt->pci_pio_reg == NULL) { 532 device_printf(dev, "Giving Up.\n"); 533 goto bad; 534 } 535 if (bootverbose) { 536 device_printf(dev, "Falling back to PIO mode.\n"); 537 } 538 mpt->pci_st = mpt->pci_pio_st; 539 mpt->pci_sh = mpt->pci_pio_sh; 540 } else { 541 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 542 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 543 } 544 545 /* Get a handle to the interrupt */ 546 iqd = 0; 547 if (mpt->msi_enable) { 548 /* 549 * First try to alloc an MSI-X message. If that 550 * fails, then try to alloc an MSI message instead. 551 */ 552 if (pci_msix_count(dev) == 1) { 553 mpt->pci_msi_count = 1; 554 if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) { 555 iqd = 1; 556 } else { 557 mpt->pci_msi_count = 0; 558 } 559 } 560 if (iqd == 0 && pci_msi_count(dev) == 1) { 561 mpt->pci_msi_count = 1; 562 if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) { 563 iqd = 1; 564 } else { 565 mpt->pci_msi_count = 0; 566 } 567 } 568 } 569 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 570 RF_ACTIVE | (mpt->pci_msi_count ? 0 : RF_SHAREABLE)); 571 if (mpt->pci_irq == NULL) { 572 device_printf(dev, "could not allocate interrupt\n"); 573 goto bad; 574 } 575 576 MPT_LOCK_SETUP(mpt); 577 578 /* Disable interrupts at the part */ 579 mpt_disable_ints(mpt); 580 581 /* Register the interrupt handler */ 582 if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr, 583 mpt, &mpt->ih)) { 584 device_printf(dev, "could not setup interrupt\n"); 585 goto bad; 586 } 587 588 /* Allocate dma memory */ 589 if (mpt_dma_mem_alloc(mpt)) { 590 mpt_prt(mpt, "Could not allocate DMA memory\n"); 591 goto bad; 592 } 593 594#if 0 595 /* 596 * Save the PCI config register values 597 * 598 * Hard resets are known to screw up the BAR for diagnostic 599 * memory accesses (Mem1). 600 * 601 * Using Mem1 is known to make the chip stop responding to 602 * configuration space transfers, so we need to save it now 603 */ 604 605 mpt_read_config_regs(mpt); 606#endif 607 608 /* 609 * Disable PIO until we need it 610 */ 611 if (mpt->is_sas) { 612 pci_disable_io(dev, SYS_RES_IOPORT); 613 } 614 615 /* Initialize the hardware */ 616 if (mpt->disabled == 0) { 617 if (mpt_attach(mpt) != 0) { 618 goto bad; 619 } 620 } else { 621 mpt_prt(mpt, "device disabled at user request\n"); 622 goto bad; 623 } 624 625 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown, 626 dev, SHUTDOWN_PRI_DEFAULT); 627 628 if (mpt->eh == NULL) { 629 mpt_prt(mpt, "shutdown event registration failed\n"); 630 (void) mpt_detach(mpt); 631 goto bad; 632 } 633 return (0); 634 635bad: 636 mpt_dma_mem_free(mpt); 637 mpt_free_bus_resources(mpt); 638 mpt_unlink_peer(mpt); 639 640 MPT_LOCK_DESTROY(mpt); 641 642 /* 643 * but return zero to preserve unit numbering 644 */ 645 return (0); 646} 647 648/* 649 * Free bus resources 650 */ 651static void 652mpt_free_bus_resources(struct mpt_softc *mpt) 653{ 654 655 if (mpt->ih) { 656 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 657 mpt->ih = NULL; 658 } 659 660 if (mpt->pci_irq) { 661 bus_release_resource(mpt->dev, SYS_RES_IRQ, 662 rman_get_rid(mpt->pci_irq), mpt->pci_irq); 663 mpt->pci_irq = NULL; 664 } 665 666 if (mpt->pci_msi_count) { 667 pci_release_msi(mpt->dev); 668 mpt->pci_msi_count = 0; 669 } 670 671 if (mpt->pci_pio_reg) { 672 bus_release_resource(mpt->dev, SYS_RES_IOPORT, 673 rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg); 674 mpt->pci_pio_reg = NULL; 675 } 676 if (mpt->pci_reg) { 677 bus_release_resource(mpt->dev, SYS_RES_MEMORY, 678 rman_get_rid(mpt->pci_reg), mpt->pci_reg); 679 mpt->pci_reg = NULL; 680 } 681 MPT_LOCK_DESTROY(mpt); 682} 683 684/* 685 * Disconnect ourselves from the system. 686 */ 687static int 688mpt_pci_detach(device_t dev) 689{ 690 struct mpt_softc *mpt; 691 692 mpt = (struct mpt_softc*)device_get_softc(dev); 693 694 if (mpt) { 695 mpt_disable_ints(mpt); 696 mpt_detach(mpt); 697 mpt_reset(mpt, /*reinit*/FALSE); 698 mpt_dma_mem_free(mpt); 699 mpt_free_bus_resources(mpt); 700 mpt_raid_free_mem(mpt); 701 if (mpt->eh != NULL) { 702 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh); 703 } 704 } 705 return(0); 706} 707 708/* 709 * Disable the hardware 710 */ 711static int 712mpt_pci_shutdown(device_t dev) 713{ 714 struct mpt_softc *mpt; 715 716 mpt = (struct mpt_softc *)device_get_softc(dev); 717 if (mpt) { 718 int r; 719 r = mpt_shutdown(mpt); 720 return (r); 721 } 722 return(0); 723} 724 725static int 726mpt_dma_mem_alloc(struct mpt_softc *mpt) 727{ 728 size_t len; 729 struct mpt_map_info mi; 730 731 /* Check if we alreay have allocated the reply memory */ 732 if (mpt->reply_phys != 0) { 733 return 0; 734 } 735 736 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt); 737#ifdef RELENG_4 738 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK); 739 if (mpt->request_pool == NULL) { 740 mpt_prt(mpt, "cannot allocate request pool\n"); 741 return (1); 742 } 743 memset(mpt->request_pool, 0, len); 744#else 745 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO); 746 if (mpt->request_pool == NULL) { 747 mpt_prt(mpt, "cannot allocate request pool\n"); 748 return (1); 749 } 750#endif 751 752 /* 753 * Create a parent dma tag for this device. 754 * 755 * Align at byte boundaries, 756 * Limit to 32-bit addressing for request/reply queues. 757 */ 758 if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev), 759 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR, 760 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 761 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 762 /*nsegments*/BUS_SPACE_UNRESTRICTED, 763 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0, 764 &mpt->parent_dmat) != 0) { 765 mpt_prt(mpt, "cannot create parent dma tag\n"); 766 return (1); 767 } 768 769 /* Create a child tag for reply buffers */ 770 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 771 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 772 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 773 &mpt->reply_dmat) != 0) { 774 mpt_prt(mpt, "cannot create a dma tag for replies\n"); 775 return (1); 776 } 777 778 /* Allocate some DMA accessible memory for replies */ 779 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 780 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 781 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n", 782 (u_long) (2 * PAGE_SIZE)); 783 return (1); 784 } 785 786 mi.mpt = mpt; 787 mi.error = 0; 788 789 /* Load and lock it into "bus space" */ 790 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 791 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0); 792 793 if (mi.error) { 794 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n", 795 mi.error); 796 return (1); 797 } 798 mpt->reply_phys = mi.phys; 799 800 return (0); 801} 802 803/* Deallocate memory that was allocated by mpt_dma_mem_alloc 804 */ 805static void 806mpt_dma_mem_free(struct mpt_softc *mpt) 807{ 808 809 /* Make sure we aren't double destroying */ 810 if (mpt->reply_dmat == 0) { 811 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n"); 812 return; 813 } 814 815 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 816 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 817 bus_dma_tag_destroy(mpt->reply_dmat); 818 bus_dma_tag_destroy(mpt->parent_dmat); 819 mpt->reply_dmat = NULL; 820 free(mpt->request_pool, M_DEVBUF); 821 mpt->request_pool = NULL; 822} 823 824#if 0 825/* Reads modifiable (via PCI transactions) config registers */ 826static void 827mpt_read_config_regs(struct mpt_softc *mpt) 828{ 829 830 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 831 mpt->pci_cfg.LatencyTimer_LineSize = 832 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 833 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 834 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 835 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 836 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 837 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 838 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 839 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 840 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 841} 842 843/* Sets modifiable config registers */ 844static void 845mpt_set_config_regs(struct mpt_softc *mpt) 846{ 847 uint32_t val; 848 849#define MPT_CHECK(reg, offset, size) \ 850 val = pci_read_config(mpt->dev, offset, size); \ 851 if (mpt->pci_cfg.reg != val) { \ 852 mpt_prt(mpt, \ 853 "Restoring " #reg " to 0x%X from 0x%X\n", \ 854 mpt->pci_cfg.reg, val); \ 855 } 856 857 if (mpt->verbose >= MPT_PRT_DEBUG) { 858 MPT_CHECK(Command, PCIR_COMMAND, 2); 859 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 860 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 861 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 862 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 863 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 864 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 865 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 866 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 867 MPT_CHECK(PMCSR, 0x44, 4); 868 } 869#undef MPT_CHECK 870 871 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 872 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 873 mpt->pci_cfg.LatencyTimer_LineSize, 2); 874 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 875 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 876 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 877 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 878 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 879 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 880 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 881 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 882} 883#endif 884 885static void 886mpt_pci_intr(void *arg) 887{ 888 struct mpt_softc *mpt; 889 890 mpt = (struct mpt_softc *)arg; 891 MPT_LOCK(mpt); 892 mpt_intr(mpt); 893 MPT_UNLOCK(mpt); 894} 895