mpt_pci.c revision 233403
1/*-
2 * PCI specific probe and attach routines for LSI Fusion Adapters
3 * FreeBSD Version.
4 *
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8 * Feral Software
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice immediately at the beginning of the file, without modification,
16 *    this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32/*-
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
38 * met:
39 * 1. Redistributions of source code must retain the above copyright
40 *    notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 *    substantially similar to the "NO WARRANTY" disclaimer below
43 *    ("Disclaimer") and any redistribution must be conditioned upon including
44 *    a substantially similar Disclaimer requirement for further binary
45 *    redistribution.
46 * 3. Neither the names of the above listed copyright holders nor the names
47 *    of any contributors may be used to endorse or promote products derived
48 *    from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
64 *
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
67 */
68/*
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
73 *
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
76 * met:
77 * 1. Redistributions of source code must retain the above copyright
78 *    notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 *    substantially similar to the "NO WARRANTY" disclaimer below
81 *    ("Disclaimer") and any redistribution must be conditioned upon including
82 *    a substantially similar Disclaimer requirement for further binary
83 *    redistribution.
84 * 3. Neither the names of the above listed copyright holders nor the names
85 *    of any contributors may be used to endorse or promote products derived
86 *    from this software without specific prior written permission.
87 *
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
99 */
100
101#include <sys/cdefs.h>
102__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 233403 2012-03-24 00:30:17Z marius $");
103
104#include <dev/mpt/mpt.h>
105#include <dev/mpt/mpt_cam.h>
106#include <dev/mpt/mpt_raid.h>
107
108#include <dev/mpt/mpilib/mpi_cnfg.h>
109
110#if __FreeBSD_version < 700000
111#define	pci_msix_count(x)	0
112#define	pci_msi_count(x)	0
113#define	pci_alloc_msi(x, y)	1
114#define	pci_alloc_msix(x, y)	1
115#define	pci_release_msi(x)	do { ; } while (0)
116#endif
117
118/*
119 * XXX it seems no other MPT driver knows about the following chips.
120 */
121
122#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC909_FB
123#define	MPI_MANUFACTPAGE_DEVICEID_FC909_FB	0x0620
124#endif
125
126#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB
127#define	MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB	0x0625
128#endif
129
130#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB
131#define	MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB	0x0623
132#endif
133
134#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB
135#define	MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB	0x0627
136#endif
137
138#ifndef	MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB
139#define	MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB	0x0629
140#endif
141
142#ifndef MPI_MANUFACTPAGE_DEVID_SAS1068A_FB
143#define MPI_MANUFACTPAGE_DEVID_SAS1068A_FB	0x0055
144#endif
145
146#ifndef	MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB
147#define	MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB	0x007C
148#endif
149
150#ifndef	PCIM_CMD_SERRESPEN
151#define	PCIM_CMD_SERRESPEN	0x0100
152#endif
153
154static int mpt_pci_probe(device_t);
155static int mpt_pci_attach(device_t);
156static void mpt_free_bus_resources(struct mpt_softc *mpt);
157static int mpt_pci_detach(device_t);
158static int mpt_pci_shutdown(device_t);
159static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
160static void mpt_dma_mem_free(struct mpt_softc *mpt);
161#if 0
162static void mpt_read_config_regs(struct mpt_softc *mpt);
163static void mpt_set_config_regs(struct mpt_softc *mpt);
164#endif
165static void mpt_pci_intr(void *);
166
167static device_method_t mpt_methods[] = {
168	/* Device interface */
169	DEVMETHOD(device_probe,		mpt_pci_probe),
170	DEVMETHOD(device_attach,	mpt_pci_attach),
171	DEVMETHOD(device_detach,	mpt_pci_detach),
172	DEVMETHOD(device_shutdown,	mpt_pci_shutdown),
173	DEVMETHOD_END
174};
175
176static driver_t mpt_driver = {
177	"mpt", mpt_methods, sizeof(struct mpt_softc)
178};
179static devclass_t mpt_devclass;
180DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, NULL, NULL);
181MODULE_DEPEND(mpt, pci, 1, 1, 1);
182MODULE_VERSION(mpt, 1);
183
184static int
185mpt_pci_probe(device_t dev)
186{
187	const char *desc;
188
189	if (pci_get_vendor(dev) != MPI_MANUFACTPAGE_VENDORID_LSILOGIC)
190		return (ENXIO);
191
192	switch (pci_get_device(dev)) {
193	case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
194		desc = "LSILogic FC909 FC Adapter";
195		break;
196	case MPI_MANUFACTPAGE_DEVICEID_FC909:
197		desc = "LSILogic FC909A FC Adapter";
198		break;
199	case MPI_MANUFACTPAGE_DEVICEID_FC919:
200		desc = "LSILogic FC919 FC Adapter";
201		break;
202	case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
203		desc = "LSILogic FC919 LAN Adapter";
204		break;
205	case MPI_MANUFACTPAGE_DEVICEID_FC929:
206		desc = "Dual LSILogic FC929 FC Adapter";
207		break;
208	case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
209		desc = "Dual LSILogic FC929 LAN Adapter";
210		break;
211	case MPI_MANUFACTPAGE_DEVICEID_FC919X:
212		desc = "LSILogic FC919 FC PCI-X Adapter";
213		break;
214	case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
215		desc = "LSILogic FC919 LAN PCI-X Adapter";
216		break;
217	case MPI_MANUFACTPAGE_DEVICEID_FC929X:
218		desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
219		break;
220	case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
221		desc = "Dual LSILogic FC929X LAN PCI-X Adapter";
222		break;
223	case MPI_MANUFACTPAGE_DEVICEID_FC949E:
224		desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
225		break;
226	case MPI_MANUFACTPAGE_DEVICEID_FC949X:
227		desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
228		break;
229	case MPI_MANUFACTPAGE_DEVID_53C1030:
230	case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
231		desc = "LSILogic 1030 Ultra4 Adapter";
232		break;
233	case MPI_MANUFACTPAGE_DEVID_SAS1064:
234	case MPI_MANUFACTPAGE_DEVID_SAS1064A:
235	case MPI_MANUFACTPAGE_DEVID_SAS1064E:
236	case MPI_MANUFACTPAGE_DEVID_SAS1066:
237	case MPI_MANUFACTPAGE_DEVID_SAS1066E:
238	case MPI_MANUFACTPAGE_DEVID_SAS1068:
239	case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
240	case MPI_MANUFACTPAGE_DEVID_SAS1068E:
241	case MPI_MANUFACTPAGE_DEVID_SAS1078:
242	case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
243		desc = "LSILogic SAS/SATA Adapter";
244		break;
245	default:
246		return (ENXIO);
247	}
248
249	device_set_desc(dev, desc);
250	return (0);
251}
252
253#if	__FreeBSD_version < 500000
254static void
255mpt_set_options(struct mpt_softc *mpt)
256{
257	int bitmap;
258
259	bitmap = 0;
260	if (getenv_int("mpt_disable", &bitmap)) {
261		if (bitmap & (1 << mpt->unit)) {
262			mpt->disabled = 1;
263		}
264	}
265	bitmap = 0;
266	if (getenv_int("mpt_debug", &bitmap)) {
267		if (bitmap & (1 << mpt->unit)) {
268			mpt->verbose = MPT_PRT_DEBUG;
269		}
270	}
271	bitmap = 0;
272	if (getenv_int("mpt_debug1", &bitmap)) {
273		if (bitmap & (1 << mpt->unit)) {
274			mpt->verbose = MPT_PRT_DEBUG1;
275		}
276	}
277	bitmap = 0;
278	if (getenv_int("mpt_debug2", &bitmap)) {
279		if (bitmap & (1 << mpt->unit)) {
280			mpt->verbose = MPT_PRT_DEBUG2;
281		}
282	}
283	bitmap = 0;
284	if (getenv_int("mpt_debug3", &bitmap)) {
285		if (bitmap & (1 << mpt->unit)) {
286			mpt->verbose = MPT_PRT_DEBUG3;
287		}
288	}
289
290	mpt->cfg_role = MPT_ROLE_DEFAULT;
291	bitmap = 0;
292	if (getenv_int("mpt_nil_role", &bitmap)) {
293		if (bitmap & (1 << mpt->unit)) {
294			mpt->cfg_role = 0;
295		}
296		mpt->do_cfg_role = 1;
297	}
298	bitmap = 0;
299	if (getenv_int("mpt_tgt_role", &bitmap)) {
300		if (bitmap & (1 << mpt->unit)) {
301			mpt->cfg_role |= MPT_ROLE_TARGET;
302		}
303		mpt->do_cfg_role = 1;
304	}
305	bitmap = 0;
306	if (getenv_int("mpt_ini_role", &bitmap)) {
307		if (bitmap & (1 << mpt->unit)) {
308			mpt->cfg_role |= MPT_ROLE_INITIATOR;
309		}
310		mpt->do_cfg_role = 1;
311	}
312	mpt->msi_enable = 0;
313}
314#else
315static void
316mpt_set_options(struct mpt_softc *mpt)
317{
318	int tval;
319
320	tval = 0;
321	if (resource_int_value(device_get_name(mpt->dev),
322	    device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
323		mpt->disabled = 1;
324	}
325	tval = 0;
326	if (resource_int_value(device_get_name(mpt->dev),
327	    device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
328		mpt->verbose = tval;
329	}
330	tval = -1;
331	if (resource_int_value(device_get_name(mpt->dev),
332	    device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 &&
333	    tval <= 3) {
334		mpt->cfg_role = tval;
335		mpt->do_cfg_role = 1;
336	}
337	tval = 0;
338	mpt->msi_enable = 0;
339	if (mpt->is_sas)
340		mpt->msi_enable = 1;
341	if (resource_int_value(device_get_name(mpt->dev),
342	    device_get_unit(mpt->dev), "msi_enable", &tval) == 0) {
343		mpt->msi_enable = tval;
344	}
345}
346#endif
347
348static void
349mpt_link_peer(struct mpt_softc *mpt)
350{
351	struct mpt_softc *mpt2;
352
353	if (mpt->unit == 0) {
354		return;
355	}
356	/*
357	 * XXX: depends on probe order
358	 */
359	mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
360
361	if (mpt2 == NULL) {
362		return;
363	}
364	if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
365		return;
366	}
367	if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
368		return;
369	}
370	mpt->mpt2 = mpt2;
371	mpt2->mpt2 = mpt;
372	if (mpt->verbose >= MPT_PRT_DEBUG) {
373		mpt_prt(mpt, "linking with peer (mpt%d)\n",
374		    device_get_unit(mpt2->dev));
375	}
376}
377
378static void
379mpt_unlink_peer(struct mpt_softc *mpt)
380{
381
382	if (mpt->mpt2) {
383		mpt->mpt2->mpt2 = NULL;
384	}
385}
386
387static int
388mpt_pci_attach(device_t dev)
389{
390	struct mpt_softc *mpt;
391	int		  iqd;
392	uint32_t	  data, cmd;
393	int		  mpt_io_bar, mpt_mem_bar;
394
395	mpt  = (struct mpt_softc*)device_get_softc(dev);
396
397	switch (pci_get_device(dev)) {
398	case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
399	case MPI_MANUFACTPAGE_DEVICEID_FC909:
400	case MPI_MANUFACTPAGE_DEVICEID_FC919:
401	case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
402	case MPI_MANUFACTPAGE_DEVICEID_FC929:
403	case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
404	case MPI_MANUFACTPAGE_DEVICEID_FC929X:
405	case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
406	case MPI_MANUFACTPAGE_DEVICEID_FC919X:
407	case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
408	case MPI_MANUFACTPAGE_DEVICEID_FC949E:
409	case MPI_MANUFACTPAGE_DEVICEID_FC949X:
410		mpt->is_fc = 1;
411		break;
412	case MPI_MANUFACTPAGE_DEVID_SAS1078:
413	case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
414		mpt->is_1078 = 1;
415		/* FALLTHROUGH */
416	case MPI_MANUFACTPAGE_DEVID_SAS1064:
417	case MPI_MANUFACTPAGE_DEVID_SAS1064A:
418	case MPI_MANUFACTPAGE_DEVID_SAS1064E:
419	case MPI_MANUFACTPAGE_DEVID_SAS1066:
420	case MPI_MANUFACTPAGE_DEVID_SAS1066E:
421	case MPI_MANUFACTPAGE_DEVID_SAS1068:
422	case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
423	case MPI_MANUFACTPAGE_DEVID_SAS1068E:
424		mpt->is_sas = 1;
425		break;
426	default:
427		mpt->is_spi = 1;
428		break;
429	}
430	mpt->dev = dev;
431	mpt->unit = device_get_unit(dev);
432	mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
433	mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
434	mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
435	mpt->verbose = MPT_PRT_NONE;
436	mpt->role = MPT_ROLE_NONE;
437	mpt->mpt_ini_id = MPT_INI_ID_NONE;
438#ifdef __sparc64__
439	if (mpt->is_spi)
440		mpt->mpt_ini_id = OF_getscsinitid(dev);
441#endif
442	mpt_set_options(mpt);
443	if (mpt->verbose == MPT_PRT_NONE) {
444		mpt->verbose = MPT_PRT_WARN;
445		/* Print INFO level (if any) if bootverbose is set */
446		mpt->verbose += (bootverbose != 0)? 1 : 0;
447	}
448	/* Make sure memory access decoders are enabled */
449	cmd = pci_read_config(dev, PCIR_COMMAND, 2);
450	if ((cmd & PCIM_CMD_MEMEN) == 0) {
451		device_printf(dev, "Memory accesses disabled");
452		return (ENXIO);
453	}
454
455	/*
456	 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
457	 */
458	cmd |=
459	    PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
460	    PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
461	pci_write_config(dev, PCIR_COMMAND, cmd, 2);
462
463	/*
464	 * Make sure we've disabled the ROM.
465	 */
466	data = pci_read_config(dev, PCIR_BIOS, 4);
467	data &= ~PCIM_BIOS_ENABLE;
468	pci_write_config(dev, PCIR_BIOS, data, 4);
469
470	/*
471	 * Is this part a dual?
472	 * If so, link with our partner (around yet)
473	 */
474	switch (pci_get_device(dev)) {
475	case MPI_MANUFACTPAGE_DEVICEID_FC929:
476	case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
477	case MPI_MANUFACTPAGE_DEVICEID_FC949E:
478	case MPI_MANUFACTPAGE_DEVICEID_FC949X:
479	case MPI_MANUFACTPAGE_DEVID_53C1030:
480	case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
481		mpt_link_peer(mpt);
482		break;
483	default:
484		break;
485	}
486
487	/*
488	 * Figure out which are the I/O and MEM Bars
489	 */
490	data = pci_read_config(dev, PCIR_BAR(0), 4);
491	if (PCI_BAR_IO(data)) {
492		/* BAR0 is IO, BAR1 is memory */
493		mpt_io_bar = 0;
494		mpt_mem_bar = 1;
495	} else {
496		/* BAR0 is memory, BAR1 is IO */
497		mpt_mem_bar = 0;
498		mpt_io_bar = 1;
499	}
500
501	/*
502	 * Set up register access.  PIO mode is required for
503	 * certain reset operations (but must be disabled for
504	 * some cards otherwise).
505	 */
506	mpt_io_bar = PCIR_BAR(mpt_io_bar);
507	mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
508	    &mpt_io_bar, RF_ACTIVE);
509	if (mpt->pci_pio_reg == NULL) {
510		if (bootverbose) {
511			device_printf(dev,
512			    "unable to map registers in PIO mode\n");
513		}
514	} else {
515		mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
516		mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
517	}
518
519	mpt_mem_bar = PCIR_BAR(mpt_mem_bar);
520	mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
521	    &mpt_mem_bar, RF_ACTIVE);
522	if (mpt->pci_reg == NULL) {
523		if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) {
524			device_printf(dev,
525			    "Unable to memory map registers.\n");
526		}
527		if (mpt->is_sas || mpt->pci_pio_reg == NULL) {
528			device_printf(dev, "Giving Up.\n");
529			goto bad;
530		}
531		if (bootverbose) {
532			device_printf(dev, "Falling back to PIO mode.\n");
533		}
534		mpt->pci_st = mpt->pci_pio_st;
535		mpt->pci_sh = mpt->pci_pio_sh;
536	} else {
537		mpt->pci_st = rman_get_bustag(mpt->pci_reg);
538		mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
539	}
540
541	/* Get a handle to the interrupt */
542	iqd = 0;
543	if (mpt->msi_enable) {
544		/*
545		 * First try to alloc an MSI-X message.  If that
546		 * fails, then try to alloc an MSI message instead.
547		 */
548		if (pci_msix_count(dev) == 1) {
549			mpt->pci_msi_count = 1;
550			if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) {
551				iqd = 1;
552			} else {
553				mpt->pci_msi_count = 0;
554			}
555		}
556		if (iqd == 0 && pci_msi_count(dev) == 1) {
557			mpt->pci_msi_count = 1;
558			if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) {
559				iqd = 1;
560			} else {
561				mpt->pci_msi_count = 0;
562			}
563		}
564	}
565	mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
566	    RF_ACTIVE | (mpt->pci_msi_count ? 0 : RF_SHAREABLE));
567	if (mpt->pci_irq == NULL) {
568		device_printf(dev, "could not allocate interrupt\n");
569		goto bad;
570	}
571
572	MPT_LOCK_SETUP(mpt);
573
574	/* Disable interrupts at the part */
575	mpt_disable_ints(mpt);
576
577	/* Register the interrupt handler */
578	if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr,
579	    mpt, &mpt->ih)) {
580		device_printf(dev, "could not setup interrupt\n");
581		goto bad;
582	}
583
584	/* Allocate dma memory */
585	if (mpt_dma_mem_alloc(mpt)) {
586		mpt_prt(mpt, "Could not allocate DMA memory\n");
587		goto bad;
588	}
589
590#if 0
591	/*
592	 * Save the PCI config register values
593 	 *
594	 * Hard resets are known to screw up the BAR for diagnostic
595	 * memory accesses (Mem1).
596	 *
597	 * Using Mem1 is known to make the chip stop responding to
598	 * configuration space transfers, so we need to save it now
599	 */
600
601	mpt_read_config_regs(mpt);
602#endif
603
604	/*
605	 * Disable PIO until we need it
606	 */
607	if (mpt->is_sas) {
608		pci_disable_io(dev, SYS_RES_IOPORT);
609	}
610
611	/* Initialize the hardware */
612	if (mpt->disabled == 0) {
613		if (mpt_attach(mpt) != 0) {
614			goto bad;
615		}
616	} else {
617		mpt_prt(mpt, "device disabled at user request\n");
618		goto bad;
619	}
620
621	mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
622	    dev, SHUTDOWN_PRI_DEFAULT);
623
624	if (mpt->eh == NULL) {
625		mpt_prt(mpt, "shutdown event registration failed\n");
626		(void) mpt_detach(mpt);
627		goto bad;
628	}
629	return (0);
630
631bad:
632	mpt_dma_mem_free(mpt);
633	mpt_free_bus_resources(mpt);
634	mpt_unlink_peer(mpt);
635
636	MPT_LOCK_DESTROY(mpt);
637
638	/*
639	 * but return zero to preserve unit numbering
640	 */
641	return (0);
642}
643
644/*
645 * Free bus resources
646 */
647static void
648mpt_free_bus_resources(struct mpt_softc *mpt)
649{
650
651	if (mpt->ih) {
652		bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
653		mpt->ih = NULL;
654	}
655
656	if (mpt->pci_irq) {
657		bus_release_resource(mpt->dev, SYS_RES_IRQ,
658		    rman_get_rid(mpt->pci_irq), mpt->pci_irq);
659		mpt->pci_irq = NULL;
660	}
661
662	if (mpt->pci_msi_count) {
663		pci_release_msi(mpt->dev);
664		mpt->pci_msi_count = 0;
665	}
666
667	if (mpt->pci_pio_reg) {
668		bus_release_resource(mpt->dev, SYS_RES_IOPORT,
669		    rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg);
670		mpt->pci_pio_reg = NULL;
671	}
672	if (mpt->pci_reg) {
673		bus_release_resource(mpt->dev, SYS_RES_MEMORY,
674		    rman_get_rid(mpt->pci_reg), mpt->pci_reg);
675		mpt->pci_reg = NULL;
676	}
677	MPT_LOCK_DESTROY(mpt);
678}
679
680/*
681 * Disconnect ourselves from the system.
682 */
683static int
684mpt_pci_detach(device_t dev)
685{
686	struct mpt_softc *mpt;
687
688	mpt  = (struct mpt_softc*)device_get_softc(dev);
689
690	if (mpt) {
691		mpt_disable_ints(mpt);
692		mpt_detach(mpt);
693		mpt_reset(mpt, /*reinit*/FALSE);
694		mpt_dma_mem_free(mpt);
695		mpt_free_bus_resources(mpt);
696		mpt_raid_free_mem(mpt);
697		if (mpt->eh != NULL) {
698                        EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh);
699		}
700	}
701	return(0);
702}
703
704/*
705 * Disable the hardware
706 */
707static int
708mpt_pci_shutdown(device_t dev)
709{
710	struct mpt_softc *mpt;
711
712	mpt = (struct mpt_softc *)device_get_softc(dev);
713	if (mpt) {
714		int r;
715		r = mpt_shutdown(mpt);
716		return (r);
717	}
718	return(0);
719}
720
721static int
722mpt_dma_mem_alloc(struct mpt_softc *mpt)
723{
724	size_t len;
725	struct mpt_map_info mi;
726
727	/* Check if we alreay have allocated the reply memory */
728	if (mpt->reply_phys != 0) {
729		return 0;
730	}
731
732	len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
733#ifdef	RELENG_4
734	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
735	if (mpt->request_pool == NULL) {
736		mpt_prt(mpt, "cannot allocate request pool\n");
737		return (1);
738	}
739	memset(mpt->request_pool, 0, len);
740#else
741	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
742	if (mpt->request_pool == NULL) {
743		mpt_prt(mpt, "cannot allocate request pool\n");
744		return (1);
745	}
746#endif
747
748	/*
749	 * Create a parent dma tag for this device.
750	 *
751	 * Align at byte boundaries,
752	 * Limit to 32-bit addressing for request/reply queues.
753	 */
754	if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev),
755	    /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
756	    /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
757	    /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
758	    /*nsegments*/BUS_SPACE_UNRESTRICTED,
759	    /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
760	    &mpt->parent_dmat) != 0) {
761		mpt_prt(mpt, "cannot create parent dma tag\n");
762		return (1);
763	}
764
765	/* Create a child tag for reply buffers */
766	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
767	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
768	    NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
769	    &mpt->reply_dmat) != 0) {
770		mpt_prt(mpt, "cannot create a dma tag for replies\n");
771		return (1);
772	}
773
774	/* Allocate some DMA accessible memory for replies */
775	if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
776	    BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
777		mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
778		    (u_long) (2 * PAGE_SIZE));
779		return (1);
780	}
781
782	mi.mpt = mpt;
783	mi.error = 0;
784
785	/* Load and lock it into "bus space" */
786	bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
787	    2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
788
789	if (mi.error) {
790		mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
791		    mi.error);
792		return (1);
793	}
794	mpt->reply_phys = mi.phys;
795
796	return (0);
797}
798
799/* Deallocate memory that was allocated by mpt_dma_mem_alloc
800 */
801static void
802mpt_dma_mem_free(struct mpt_softc *mpt)
803{
804
805        /* Make sure we aren't double destroying */
806        if (mpt->reply_dmat == 0) {
807		mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
808		return;
809        }
810
811	bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
812	bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
813	bus_dma_tag_destroy(mpt->reply_dmat);
814	bus_dma_tag_destroy(mpt->parent_dmat);
815	mpt->reply_dmat = NULL;
816	free(mpt->request_pool, M_DEVBUF);
817	mpt->request_pool = NULL;
818}
819
820#if 0
821/* Reads modifiable (via PCI transactions) config registers */
822static void
823mpt_read_config_regs(struct mpt_softc *mpt)
824{
825
826	mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
827	mpt->pci_cfg.LatencyTimer_LineSize =
828	    pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
829	mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
830	mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
831	mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
832	mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
833	mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
834	mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
835	mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
836	mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
837}
838
839/* Sets modifiable config registers */
840static void
841mpt_set_config_regs(struct mpt_softc *mpt)
842{
843	uint32_t val;
844
845#define MPT_CHECK(reg, offset, size)					\
846	val = pci_read_config(mpt->dev, offset, size);			\
847	if (mpt->pci_cfg.reg != val) {					\
848		mpt_prt(mpt,						\
849		    "Restoring " #reg " to 0x%X from 0x%X\n",		\
850		    mpt->pci_cfg.reg, val);				\
851	}
852
853	if (mpt->verbose >= MPT_PRT_DEBUG) {
854		MPT_CHECK(Command, PCIR_COMMAND, 2);
855		MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
856		MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
857		MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
858		MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
859		MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
860		MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
861		MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
862		MPT_CHECK(IntLine, PCIR_INTLINE, 1);
863		MPT_CHECK(PMCSR, 0x44, 4);
864	}
865#undef MPT_CHECK
866
867	pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
868	pci_write_config(mpt->dev, PCIR_CACHELNSZ,
869	    mpt->pci_cfg.LatencyTimer_LineSize, 2);
870	pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
871	pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
872	pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
873	pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
874	pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
875	pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
876	pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
877	pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
878}
879#endif
880
881static void
882mpt_pci_intr(void *arg)
883{
884	struct mpt_softc *mpt;
885
886	mpt = (struct mpt_softc *)arg;
887	MPT_LOCK(mpt);
888	mpt_intr(mpt);
889	MPT_UNLOCK(mpt);
890}
891