mpt_pci.c revision 231518
1/*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * Partially derived from Matt Jacob's ISP driver. 7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 8 * Feral Software 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32/*- 33 * Copyright (c) 2002, 2006 by Matthew Jacob 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions are 38 * met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 42 * substantially similar to the "NO WARRANTY" disclaimer below 43 * ("Disclaimer") and any redistribution must be conditioned upon including 44 * a substantially similar Disclaimer requirement for further binary 45 * redistribution. 46 * 3. Neither the names of the above listed copyright holders nor the names 47 * of any contributors may be used to endorse or promote products derived 48 * from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 * 62 * Support from Chris Ellsworth in order to make SAS adapters work 63 * is gratefully acknowledged. 64 * 65 * Support from LSI-Logic has also gone a great deal toward making this a 66 * workable subsystem and is gratefully acknowledged. 67 */ 68/* 69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 70 * Copyright (c) 2005, WHEEL Sp. z o.o. 71 * Copyright (c) 2004, 2005 Justin T. Gibbs 72 * All rights reserved. 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions are 76 * met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 80 * substantially similar to the "NO WARRANTY" disclaimer below 81 * ("Disclaimer") and any redistribution must be conditioned upon including 82 * a substantially similar Disclaimer requirement for further binary 83 * redistribution. 84 * 3. Neither the names of the above listed copyright holders nor the names 85 * of any contributors may be used to endorse or promote products derived 86 * from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 99 */ 100 101#include <sys/cdefs.h> 102__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 231518 2012-02-11 12:03:44Z marius $"); 103 104#include <dev/mpt/mpt.h> 105#include <dev/mpt/mpt_cam.h> 106#include <dev/mpt/mpt_raid.h> 107 108#if __FreeBSD_version < 700000 109#define pci_msix_count(x) 0 110#define pci_msi_count(x) 0 111#define pci_alloc_msi(x, y) 1 112#define pci_alloc_msix(x, y) 1 113#define pci_release_msi(x) do { ; } while (0) 114#endif 115 116#ifndef PCI_VENDOR_LSI 117#define PCI_VENDOR_LSI 0x1000 118#endif 119 120#ifndef PCI_PRODUCT_LSI_FC909 121#define PCI_PRODUCT_LSI_FC909 0x0620 122#endif 123 124#ifndef PCI_PRODUCT_LSI_FC909A 125#define PCI_PRODUCT_LSI_FC909A 0x0621 126#endif 127 128#ifndef PCI_PRODUCT_LSI_FC919 129#define PCI_PRODUCT_LSI_FC919 0x0624 130#endif 131 132#ifndef PCI_PRODUCT_LSI_FC929 133#define PCI_PRODUCT_LSI_FC929 0x0622 134#endif 135 136#ifndef PCI_PRODUCT_LSI_FC929X 137#define PCI_PRODUCT_LSI_FC929X 0x0626 138#endif 139 140#ifndef PCI_PRODUCT_LSI_FC919X 141#define PCI_PRODUCT_LSI_FC919X 0x0628 142#endif 143 144#ifndef PCI_PRODUCT_LSI_FC7X04X 145#define PCI_PRODUCT_LSI_FC7X04X 0x0640 146#endif 147 148#ifndef PCI_PRODUCT_LSI_FC646 149#define PCI_PRODUCT_LSI_FC646 0x0646 150#endif 151 152#ifndef PCI_PRODUCT_LSI_1030 153#define PCI_PRODUCT_LSI_1030 0x0030 154#endif 155 156#ifndef PCI_PRODUCT_LSI_SAS1064 157#define PCI_PRODUCT_LSI_SAS1064 0x0050 158#endif 159 160#ifndef PCI_PRODUCT_LSI_SAS1064A 161#define PCI_PRODUCT_LSI_SAS1064A 0x005C 162#endif 163 164#ifndef PCI_PRODUCT_LSI_SAS1064E 165#define PCI_PRODUCT_LSI_SAS1064E 0x0056 166#endif 167 168#ifndef PCI_PRODUCT_LSI_SAS1066 169#define PCI_PRODUCT_LSI_SAS1066 0x005E 170#endif 171 172#ifndef PCI_PRODUCT_LSI_SAS1066E 173#define PCI_PRODUCT_LSI_SAS1066E 0x005A 174#endif 175 176#ifndef PCI_PRODUCT_LSI_SAS1068 177#define PCI_PRODUCT_LSI_SAS1068 0x0054 178#endif 179 180#ifndef PCI_PRODUCT_LSI_SAS1068E 181#define PCI_PRODUCT_LSI_SAS1068E 0x0058 182#endif 183 184#ifndef PCI_PRODUCT_LSI_SAS1078 185#define PCI_PRODUCT_LSI_SAS1078 0x0062 186#endif 187 188#ifndef PCI_PRODUCT_LSI_SAS1078DE 189#define PCI_PRODUCT_LSI_SAS1078DE 0x007C 190#endif 191 192#ifndef PCIM_CMD_SERRESPEN 193#define PCIM_CMD_SERRESPEN 0x0100 194#endif 195 196static int mpt_pci_probe(device_t); 197static int mpt_pci_attach(device_t); 198static void mpt_free_bus_resources(struct mpt_softc *mpt); 199static int mpt_pci_detach(device_t); 200static int mpt_pci_shutdown(device_t); 201static int mpt_dma_mem_alloc(struct mpt_softc *mpt); 202static void mpt_dma_mem_free(struct mpt_softc *mpt); 203static void mpt_read_config_regs(struct mpt_softc *mpt); 204#if 0 205static void mpt_set_config_regs(struct mpt_softc *mpt); 206#endif 207static void mpt_pci_intr(void *); 208 209static device_method_t mpt_methods[] = { 210 /* Device interface */ 211 DEVMETHOD(device_probe, mpt_pci_probe), 212 DEVMETHOD(device_attach, mpt_pci_attach), 213 DEVMETHOD(device_detach, mpt_pci_detach), 214 DEVMETHOD(device_shutdown, mpt_pci_shutdown), 215 { 0, 0 } 216}; 217 218static driver_t mpt_driver = { 219 "mpt", mpt_methods, sizeof(struct mpt_softc) 220}; 221static devclass_t mpt_devclass; 222DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0); 223MODULE_DEPEND(mpt, pci, 1, 1, 1); 224MODULE_VERSION(mpt, 1); 225 226static int 227mpt_pci_probe(device_t dev) 228{ 229 char *desc; 230 231 if (pci_get_vendor(dev) != PCI_VENDOR_LSI) { 232 return (ENXIO); 233 } 234 235 switch ((pci_get_device(dev) & ~1)) { 236 case PCI_PRODUCT_LSI_FC909: 237 desc = "LSILogic FC909 FC Adapter"; 238 break; 239 case PCI_PRODUCT_LSI_FC909A: 240 desc = "LSILogic FC909A FC Adapter"; 241 break; 242 case PCI_PRODUCT_LSI_FC919: 243 desc = "LSILogic FC919 FC Adapter"; 244 break; 245 case PCI_PRODUCT_LSI_FC929: 246 desc = "Dual LSILogic FC929 FC Adapter"; 247 break; 248 case PCI_PRODUCT_LSI_FC919X: 249 desc = "LSILogic FC919 FC PCI-X Adapter"; 250 break; 251 case PCI_PRODUCT_LSI_FC929X: 252 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter"; 253 break; 254 case PCI_PRODUCT_LSI_FC646: 255 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter"; 256 break; 257 case PCI_PRODUCT_LSI_FC7X04X: 258 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter"; 259 break; 260 case PCI_PRODUCT_LSI_1030: 261 desc = "LSILogic 1030 Ultra4 Adapter"; 262 break; 263 case PCI_PRODUCT_LSI_SAS1064: 264 case PCI_PRODUCT_LSI_SAS1064A: 265 case PCI_PRODUCT_LSI_SAS1064E: 266 case PCI_PRODUCT_LSI_SAS1066: 267 case PCI_PRODUCT_LSI_SAS1066E: 268 case PCI_PRODUCT_LSI_SAS1068: 269 case PCI_PRODUCT_LSI_SAS1068E: 270 case PCI_PRODUCT_LSI_SAS1078: 271 case PCI_PRODUCT_LSI_SAS1078DE: 272 desc = "LSILogic SAS/SATA Adapter"; 273 break; 274 default: 275 return (ENXIO); 276 } 277 278 device_set_desc(dev, desc); 279 return (0); 280} 281 282#if __FreeBSD_version < 500000 283static void 284mpt_set_options(struct mpt_softc *mpt) 285{ 286 int bitmap; 287 288 bitmap = 0; 289 if (getenv_int("mpt_disable", &bitmap)) { 290 if (bitmap & (1 << mpt->unit)) { 291 mpt->disabled = 1; 292 } 293 } 294 bitmap = 0; 295 if (getenv_int("mpt_debug", &bitmap)) { 296 if (bitmap & (1 << mpt->unit)) { 297 mpt->verbose = MPT_PRT_DEBUG; 298 } 299 } 300 bitmap = 0; 301 if (getenv_int("mpt_debug1", &bitmap)) { 302 if (bitmap & (1 << mpt->unit)) { 303 mpt->verbose = MPT_PRT_DEBUG1; 304 } 305 } 306 bitmap = 0; 307 if (getenv_int("mpt_debug2", &bitmap)) { 308 if (bitmap & (1 << mpt->unit)) { 309 mpt->verbose = MPT_PRT_DEBUG2; 310 } 311 } 312 bitmap = 0; 313 if (getenv_int("mpt_debug3", &bitmap)) { 314 if (bitmap & (1 << mpt->unit)) { 315 mpt->verbose = MPT_PRT_DEBUG3; 316 } 317 } 318 319 mpt->cfg_role = MPT_ROLE_DEFAULT; 320 bitmap = 0; 321 if (getenv_int("mpt_nil_role", &bitmap)) { 322 if (bitmap & (1 << mpt->unit)) { 323 mpt->cfg_role = 0; 324 } 325 mpt->do_cfg_role = 1; 326 } 327 bitmap = 0; 328 if (getenv_int("mpt_tgt_role", &bitmap)) { 329 if (bitmap & (1 << mpt->unit)) { 330 mpt->cfg_role |= MPT_ROLE_TARGET; 331 } 332 mpt->do_cfg_role = 1; 333 } 334 bitmap = 0; 335 if (getenv_int("mpt_ini_role", &bitmap)) { 336 if (bitmap & (1 << mpt->unit)) { 337 mpt->cfg_role |= MPT_ROLE_INITIATOR; 338 } 339 mpt->do_cfg_role = 1; 340 } 341 mpt->msi_enable = 0; 342} 343#else 344static void 345mpt_set_options(struct mpt_softc *mpt) 346{ 347 int tval; 348 349 tval = 0; 350 if (resource_int_value(device_get_name(mpt->dev), 351 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) { 352 mpt->disabled = 1; 353 } 354 tval = 0; 355 if (resource_int_value(device_get_name(mpt->dev), 356 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 357 mpt->verbose = tval; 358 } 359 tval = -1; 360 if (resource_int_value(device_get_name(mpt->dev), 361 device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 && 362 tval <= 3) { 363 mpt->cfg_role = tval; 364 mpt->do_cfg_role = 1; 365 } 366 tval = 0; 367 mpt->msi_enable = 0; 368 if (mpt->is_sas) 369 mpt->msi_enable = 1; 370 if (resource_int_value(device_get_name(mpt->dev), 371 device_get_unit(mpt->dev), "msi_enable", &tval) == 0) { 372 mpt->msi_enable = tval; 373 } 374} 375#endif 376 377static void 378mpt_link_peer(struct mpt_softc *mpt) 379{ 380 struct mpt_softc *mpt2; 381 382 if (mpt->unit == 0) { 383 return; 384 } 385 /* 386 * XXX: depends on probe order 387 */ 388 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1); 389 390 if (mpt2 == NULL) { 391 return; 392 } 393 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 394 return; 395 } 396 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 397 return; 398 } 399 mpt->mpt2 = mpt2; 400 mpt2->mpt2 = mpt; 401 if (mpt->verbose >= MPT_PRT_DEBUG) { 402 mpt_prt(mpt, "linking with peer (mpt%d)\n", 403 device_get_unit(mpt2->dev)); 404 } 405} 406 407static void 408mpt_unlink_peer(struct mpt_softc *mpt) 409{ 410 411 if (mpt->mpt2) { 412 mpt->mpt2->mpt2 = NULL; 413 } 414} 415 416static int 417mpt_pci_attach(device_t dev) 418{ 419 struct mpt_softc *mpt; 420 int iqd; 421 uint32_t data, cmd; 422 int mpt_io_bar, mpt_mem_bar; 423 424 /* Allocate the softc structure */ 425 mpt = (struct mpt_softc*)device_get_softc(dev); 426 if (mpt == NULL) { 427 device_printf(dev, "cannot allocate softc\n"); 428 return (ENOMEM); 429 } 430 memset(mpt, 0, sizeof(struct mpt_softc)); 431 switch ((pci_get_device(dev) & ~1)) { 432 case PCI_PRODUCT_LSI_FC909: 433 case PCI_PRODUCT_LSI_FC909A: 434 case PCI_PRODUCT_LSI_FC919: 435 case PCI_PRODUCT_LSI_FC929: 436 case PCI_PRODUCT_LSI_FC919X: 437 case PCI_PRODUCT_LSI_FC646: 438 case PCI_PRODUCT_LSI_FC7X04X: 439 mpt->is_fc = 1; 440 break; 441 case PCI_PRODUCT_LSI_SAS1078: 442 case PCI_PRODUCT_LSI_SAS1078DE: 443 mpt->is_1078 = 1; 444 /* FALLTHROUGH */ 445 case PCI_PRODUCT_LSI_SAS1064: 446 case PCI_PRODUCT_LSI_SAS1064A: 447 case PCI_PRODUCT_LSI_SAS1064E: 448 case PCI_PRODUCT_LSI_SAS1066: 449 case PCI_PRODUCT_LSI_SAS1066E: 450 case PCI_PRODUCT_LSI_SAS1068: 451 case PCI_PRODUCT_LSI_SAS1068E: 452 mpt->is_sas = 1; 453 break; 454 default: 455 mpt->is_spi = 1; 456 break; 457 } 458 mpt->dev = dev; 459 mpt->unit = device_get_unit(dev); 460 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT; 461 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT; 462 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT; 463 mpt->verbose = MPT_PRT_NONE; 464 mpt->role = MPT_ROLE_NONE; 465 mpt->mpt_ini_id = MPT_INI_ID_NONE; 466#ifdef __sparc64__ 467 if (mpt->is_spi) 468 mpt->mpt_ini_id = OF_getscsinitid(dev); 469#endif 470 mpt_set_options(mpt); 471 if (mpt->verbose == MPT_PRT_NONE) { 472 mpt->verbose = MPT_PRT_WARN; 473 /* Print INFO level (if any) if bootverbose is set */ 474 mpt->verbose += (bootverbose != 0)? 1 : 0; 475 } 476 /* Make sure memory access decoders are enabled */ 477 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 478 if ((cmd & PCIM_CMD_MEMEN) == 0) { 479 device_printf(dev, "Memory accesses disabled"); 480 return (ENXIO); 481 } 482 483 /* 484 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 485 */ 486 cmd |= 487 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 488 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 489 pci_write_config(dev, PCIR_COMMAND, cmd, 2); 490 491 /* 492 * Make sure we've disabled the ROM. 493 */ 494 data = pci_read_config(dev, PCIR_BIOS, 4); 495 data &= ~PCIM_BIOS_ENABLE; 496 pci_write_config(dev, PCIR_BIOS, data, 4); 497 498 /* 499 * Is this part a dual? 500 * If so, link with our partner (around yet) 501 */ 502 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 || 503 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC646 || 504 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X || 505 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) { 506 mpt_link_peer(mpt); 507 } 508 509 /* 510 * Figure out which are the I/O and MEM Bars 511 */ 512 data = pci_read_config(dev, PCIR_BAR(0), 4); 513 if (PCI_BAR_IO(data)) { 514 /* BAR0 is IO, BAR1 is memory */ 515 mpt_io_bar = 0; 516 mpt_mem_bar = 1; 517 } else { 518 /* BAR0 is memory, BAR1 is IO */ 519 mpt_mem_bar = 0; 520 mpt_io_bar = 1; 521 } 522 523 /* 524 * Set up register access. PIO mode is required for 525 * certain reset operations (but must be disabled for 526 * some cards otherwise). 527 */ 528 mpt_io_bar = PCIR_BAR(mpt_io_bar); 529 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, 530 &mpt_io_bar, RF_ACTIVE); 531 if (mpt->pci_pio_reg == NULL) { 532 if (bootverbose) { 533 device_printf(dev, 534 "unable to map registers in PIO mode\n"); 535 } 536 } else { 537 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg); 538 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg); 539 } 540 541 /* Allocate kernel virtual memory for the 9x9's Mem0 region */ 542 mpt_mem_bar = PCIR_BAR(mpt_mem_bar); 543 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 544 &mpt_mem_bar, RF_ACTIVE); 545 if (mpt->pci_reg == NULL) { 546 if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) { 547 device_printf(dev, 548 "Unable to memory map registers.\n"); 549 } 550 if (mpt->is_sas || mpt->pci_pio_reg == NULL) { 551 device_printf(dev, "Giving Up.\n"); 552 goto bad; 553 } 554 if (bootverbose) { 555 device_printf(dev, "Falling back to PIO mode.\n"); 556 } 557 mpt->pci_st = mpt->pci_pio_st; 558 mpt->pci_sh = mpt->pci_pio_sh; 559 } else { 560 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 561 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 562 } 563 564 /* Get a handle to the interrupt */ 565 iqd = 0; 566 if (mpt->msi_enable) { 567 /* 568 * First try to alloc an MSI-X message. If that 569 * fails, then try to alloc an MSI message instead. 570 */ 571 if (pci_msix_count(dev) == 1) { 572 mpt->pci_msi_count = 1; 573 if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) { 574 iqd = 1; 575 } else { 576 mpt->pci_msi_count = 0; 577 } 578 } 579 if (iqd == 0 && pci_msi_count(dev) == 1) { 580 mpt->pci_msi_count = 1; 581 if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) { 582 iqd = 1; 583 } else { 584 mpt->pci_msi_count = 0; 585 } 586 } 587 } 588 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 589 RF_ACTIVE | (mpt->pci_msi_count ? 0 : RF_SHAREABLE)); 590 if (mpt->pci_irq == NULL) { 591 device_printf(dev, "could not allocate interrupt\n"); 592 goto bad; 593 } 594 595 MPT_LOCK_SETUP(mpt); 596 597 /* Disable interrupts at the part */ 598 mpt_disable_ints(mpt); 599 600 /* Register the interrupt handler */ 601 if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr, 602 mpt, &mpt->ih)) { 603 device_printf(dev, "could not setup interrupt\n"); 604 goto bad; 605 } 606 607 /* Allocate dma memory */ 608 if (mpt_dma_mem_alloc(mpt)) { 609 mpt_prt(mpt, "Could not allocate DMA memory\n"); 610 goto bad; 611 } 612 613 /* 614 * Save the PCI config register values 615 * 616 * Hard resets are known to screw up the BAR for diagnostic 617 * memory accesses (Mem1). 618 * 619 * Using Mem1 is known to make the chip stop responding to 620 * configuration space transfers, so we need to save it now 621 */ 622 623 mpt_read_config_regs(mpt); 624 625 /* 626 * Disable PIO until we need it 627 */ 628 if (mpt->is_sas) { 629 pci_disable_io(dev, SYS_RES_IOPORT); 630 } 631 632 /* Initialize the hardware */ 633 if (mpt->disabled == 0) { 634 if (mpt_attach(mpt) != 0) { 635 goto bad; 636 } 637 } else { 638 mpt_prt(mpt, "device disabled at user request\n"); 639 goto bad; 640 } 641 642 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown, 643 dev, SHUTDOWN_PRI_DEFAULT); 644 645 if (mpt->eh == NULL) { 646 mpt_prt(mpt, "shutdown event registration failed\n"); 647 (void) mpt_detach(mpt); 648 goto bad; 649 } 650 return (0); 651 652bad: 653 mpt_dma_mem_free(mpt); 654 mpt_free_bus_resources(mpt); 655 mpt_unlink_peer(mpt); 656 657 MPT_LOCK_DESTROY(mpt); 658 659 /* 660 * but return zero to preserve unit numbering 661 */ 662 return (0); 663} 664 665/* 666 * Free bus resources 667 */ 668static void 669mpt_free_bus_resources(struct mpt_softc *mpt) 670{ 671 672 if (mpt->ih) { 673 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 674 mpt->ih = NULL; 675 } 676 677 if (mpt->pci_irq) { 678 bus_release_resource(mpt->dev, SYS_RES_IRQ, 679 rman_get_rid(mpt->pci_irq), mpt->pci_irq); 680 mpt->pci_irq = NULL; 681 } 682 683 if (mpt->pci_msi_count) { 684 pci_release_msi(mpt->dev); 685 mpt->pci_msi_count = 0; 686 } 687 688 if (mpt->pci_pio_reg) { 689 bus_release_resource(mpt->dev, SYS_RES_IOPORT, 690 rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg); 691 mpt->pci_pio_reg = NULL; 692 } 693 if (mpt->pci_reg) { 694 bus_release_resource(mpt->dev, SYS_RES_MEMORY, 695 rman_get_rid(mpt->pci_reg), mpt->pci_reg); 696 mpt->pci_reg = NULL; 697 } 698 MPT_LOCK_DESTROY(mpt); 699} 700 701/* 702 * Disconnect ourselves from the system. 703 */ 704static int 705mpt_pci_detach(device_t dev) 706{ 707 struct mpt_softc *mpt; 708 709 mpt = (struct mpt_softc*)device_get_softc(dev); 710 711 if (mpt) { 712 mpt_disable_ints(mpt); 713 mpt_detach(mpt); 714 mpt_reset(mpt, /*reinit*/FALSE); 715 mpt_dma_mem_free(mpt); 716 mpt_free_bus_resources(mpt); 717 mpt_raid_free_mem(mpt); 718 if (mpt->eh != NULL) { 719 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh); 720 } 721 } 722 return(0); 723} 724 725/* 726 * Disable the hardware 727 */ 728static int 729mpt_pci_shutdown(device_t dev) 730{ 731 struct mpt_softc *mpt; 732 733 mpt = (struct mpt_softc *)device_get_softc(dev); 734 if (mpt) { 735 int r; 736 r = mpt_shutdown(mpt); 737 return (r); 738 } 739 return(0); 740} 741 742static int 743mpt_dma_mem_alloc(struct mpt_softc *mpt) 744{ 745 size_t len; 746 struct mpt_map_info mi; 747 748 /* Check if we alreay have allocated the reply memory */ 749 if (mpt->reply_phys != 0) { 750 return 0; 751 } 752 753 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt); 754#ifdef RELENG_4 755 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK); 756 if (mpt->request_pool == NULL) { 757 mpt_prt(mpt, "cannot allocate request pool\n"); 758 return (1); 759 } 760 memset(mpt->request_pool, 0, len); 761#else 762 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO); 763 if (mpt->request_pool == NULL) { 764 mpt_prt(mpt, "cannot allocate request pool\n"); 765 return (1); 766 } 767#endif 768 769 /* 770 * Create a parent dma tag for this device. 771 * 772 * Align at byte boundaries, 773 * Limit to 32-bit addressing for request/reply queues. 774 */ 775 if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev), 776 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR, 777 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 778 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 779 /*nsegments*/BUS_SPACE_UNRESTRICTED, 780 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0, 781 &mpt->parent_dmat) != 0) { 782 mpt_prt(mpt, "cannot create parent dma tag\n"); 783 return (1); 784 } 785 786 /* Create a child tag for reply buffers */ 787 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 788 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 789 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 790 &mpt->reply_dmat) != 0) { 791 mpt_prt(mpt, "cannot create a dma tag for replies\n"); 792 return (1); 793 } 794 795 /* Allocate some DMA accessible memory for replies */ 796 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 797 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 798 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n", 799 (u_long) (2 * PAGE_SIZE)); 800 return (1); 801 } 802 803 mi.mpt = mpt; 804 mi.error = 0; 805 806 /* Load and lock it into "bus space" */ 807 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 808 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0); 809 810 if (mi.error) { 811 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n", 812 mi.error); 813 return (1); 814 } 815 mpt->reply_phys = mi.phys; 816 817 return (0); 818} 819 820/* Deallocate memory that was allocated by mpt_dma_mem_alloc 821 */ 822static void 823mpt_dma_mem_free(struct mpt_softc *mpt) 824{ 825 826 /* Make sure we aren't double destroying */ 827 if (mpt->reply_dmat == 0) { 828 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n"); 829 return; 830 } 831 832 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 833 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 834 bus_dma_tag_destroy(mpt->reply_dmat); 835 bus_dma_tag_destroy(mpt->parent_dmat); 836 mpt->reply_dmat = NULL; 837 free(mpt->request_pool, M_DEVBUF); 838 mpt->request_pool = NULL; 839} 840 841/* Reads modifiable (via PCI transactions) config registers */ 842static void 843mpt_read_config_regs(struct mpt_softc *mpt) 844{ 845 846 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 847 mpt->pci_cfg.LatencyTimer_LineSize = 848 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 849 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 850 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 851 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 852 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 853 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 854 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 855 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 856 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 857} 858 859#if 0 860/* Sets modifiable config registers */ 861static void 862mpt_set_config_regs(struct mpt_softc *mpt) 863{ 864 uint32_t val; 865 866#define MPT_CHECK(reg, offset, size) \ 867 val = pci_read_config(mpt->dev, offset, size); \ 868 if (mpt->pci_cfg.reg != val) { \ 869 mpt_prt(mpt, \ 870 "Restoring " #reg " to 0x%X from 0x%X\n", \ 871 mpt->pci_cfg.reg, val); \ 872 } 873 874 if (mpt->verbose >= MPT_PRT_DEBUG) { 875 MPT_CHECK(Command, PCIR_COMMAND, 2); 876 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 877 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 878 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 879 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 880 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 881 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 882 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 883 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 884 MPT_CHECK(PMCSR, 0x44, 4); 885 } 886#undef MPT_CHECK 887 888 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 889 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 890 mpt->pci_cfg.LatencyTimer_LineSize, 2); 891 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 892 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 893 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 894 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 895 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 896 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 897 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 898 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 899} 900#endif 901 902static void 903mpt_pci_intr(void *arg) 904{ 905 struct mpt_softc *mpt; 906 907 mpt = (struct mpt_softc *)arg; 908 MPT_LOCK(mpt); 909 mpt_intr(mpt); 910 MPT_UNLOCK(mpt); 911} 912