mpt_pci.c revision 223985
1/*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * Partially derived from Matt Jacob's ISP driver. 7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 8 * Feral Software 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32/*- 33 * Copyright (c) 2002, 2006 by Matthew Jacob 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions are 38 * met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 42 * substantially similar to the "NO WARRANTY" disclaimer below 43 * ("Disclaimer") and any redistribution must be conditioned upon including 44 * a substantially similar Disclaimer requirement for further binary 45 * redistribution. 46 * 3. Neither the names of the above listed copyright holders nor the names 47 * of any contributors may be used to endorse or promote products derived 48 * from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 * 62 * Support from Chris Ellsworth in order to make SAS adapters work 63 * is gratefully acknowledged. 64 * 65 * Support from LSI-Logic has also gone a great deal toward making this a 66 * workable subsystem and is gratefully acknowledged. 67 */ 68/* 69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 70 * Copyright (c) 2005, WHEEL Sp. z o.o. 71 * Copyright (c) 2004, 2005 Justin T. Gibbs 72 * All rights reserved. 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions are 76 * met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 80 * substantially similar to the "NO WARRANTY" disclaimer below 81 * ("Disclaimer") and any redistribution must be conditioned upon including 82 * a substantially similar Disclaimer requirement for further binary 83 * redistribution. 84 * 3. Neither the names of the above listed copyright holders nor the names 85 * of any contributors may be used to endorse or promote products derived 86 * from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 99 */ 100 101#include <sys/cdefs.h> 102__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 223985 2011-07-13 18:48:51Z marius $"); 103 104#include <dev/mpt/mpt.h> 105#include <dev/mpt/mpt_cam.h> 106#include <dev/mpt/mpt_raid.h> 107 108#if __FreeBSD_version < 700000 109#define pci_msix_count(x) 0 110#define pci_msi_count(x) 0 111#define pci_alloc_msi(x, y) 1 112#define pci_alloc_msix(x, y) 1 113#define pci_release_msi(x) do { ; } while (0) 114#endif 115 116#ifndef PCI_VENDOR_LSI 117#define PCI_VENDOR_LSI 0x1000 118#endif 119 120#ifndef PCI_PRODUCT_LSI_FC909 121#define PCI_PRODUCT_LSI_FC909 0x0620 122#endif 123 124#ifndef PCI_PRODUCT_LSI_FC909A 125#define PCI_PRODUCT_LSI_FC909A 0x0621 126#endif 127 128#ifndef PCI_PRODUCT_LSI_FC919 129#define PCI_PRODUCT_LSI_FC919 0x0624 130#endif 131 132#ifndef PCI_PRODUCT_LSI_FC929 133#define PCI_PRODUCT_LSI_FC929 0x0622 134#endif 135 136#ifndef PCI_PRODUCT_LSI_FC929X 137#define PCI_PRODUCT_LSI_FC929X 0x0626 138#endif 139 140#ifndef PCI_PRODUCT_LSI_FC919X 141#define PCI_PRODUCT_LSI_FC919X 0x0628 142#endif 143 144#ifndef PCI_PRODUCT_LSI_FC7X04X 145#define PCI_PRODUCT_LSI_FC7X04X 0x0640 146#endif 147 148#ifndef PCI_PRODUCT_LSI_FC646 149#define PCI_PRODUCT_LSI_FC646 0x0646 150#endif 151 152#ifndef PCI_PRODUCT_LSI_1030 153#define PCI_PRODUCT_LSI_1030 0x0030 154#endif 155 156#ifndef PCI_PRODUCT_LSI_SAS1064 157#define PCI_PRODUCT_LSI_SAS1064 0x0050 158#endif 159 160#ifndef PCI_PRODUCT_LSI_SAS1064A 161#define PCI_PRODUCT_LSI_SAS1064A 0x005C 162#endif 163 164#ifndef PCI_PRODUCT_LSI_SAS1064E 165#define PCI_PRODUCT_LSI_SAS1064E 0x0056 166#endif 167 168#ifndef PCI_PRODUCT_LSI_SAS1066 169#define PCI_PRODUCT_LSI_SAS1066 0x005E 170#endif 171 172#ifndef PCI_PRODUCT_LSI_SAS1066E 173#define PCI_PRODUCT_LSI_SAS1066E 0x005A 174#endif 175 176#ifndef PCI_PRODUCT_LSI_SAS1068 177#define PCI_PRODUCT_LSI_SAS1068 0x0054 178#endif 179 180#ifndef PCI_PRODUCT_LSI_SAS1068E 181#define PCI_PRODUCT_LSI_SAS1068E 0x0058 182#endif 183 184#ifndef PCI_PRODUCT_LSI_SAS1078 185#define PCI_PRODUCT_LSI_SAS1078 0x0062 186#endif 187 188#ifndef PCI_PRODUCT_LSI_SAS1078DE 189#define PCI_PRODUCT_LSI_SAS1078DE 0x007C 190#endif 191 192#ifndef PCIM_CMD_SERRESPEN 193#define PCIM_CMD_SERRESPEN 0x0100 194#endif 195 196static int mpt_pci_probe(device_t); 197static int mpt_pci_attach(device_t); 198static void mpt_free_bus_resources(struct mpt_softc *mpt); 199static int mpt_pci_detach(device_t); 200static int mpt_pci_shutdown(device_t); 201static int mpt_dma_mem_alloc(struct mpt_softc *mpt); 202static void mpt_dma_mem_free(struct mpt_softc *mpt); 203static void mpt_read_config_regs(struct mpt_softc *mpt); 204static void mpt_pci_intr(void *); 205 206static device_method_t mpt_methods[] = { 207 /* Device interface */ 208 DEVMETHOD(device_probe, mpt_pci_probe), 209 DEVMETHOD(device_attach, mpt_pci_attach), 210 DEVMETHOD(device_detach, mpt_pci_detach), 211 DEVMETHOD(device_shutdown, mpt_pci_shutdown), 212 { 0, 0 } 213}; 214 215static driver_t mpt_driver = { 216 "mpt", mpt_methods, sizeof(struct mpt_softc) 217}; 218static devclass_t mpt_devclass; 219DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0); 220MODULE_DEPEND(mpt, pci, 1, 1, 1); 221MODULE_VERSION(mpt, 1); 222 223static int 224mpt_pci_probe(device_t dev) 225{ 226 char *desc; 227 228 if (pci_get_vendor(dev) != PCI_VENDOR_LSI) { 229 return (ENXIO); 230 } 231 232 switch ((pci_get_device(dev) & ~1)) { 233 case PCI_PRODUCT_LSI_FC909: 234 desc = "LSILogic FC909 FC Adapter"; 235 break; 236 case PCI_PRODUCT_LSI_FC909A: 237 desc = "LSILogic FC909A FC Adapter"; 238 break; 239 case PCI_PRODUCT_LSI_FC919: 240 desc = "LSILogic FC919 FC Adapter"; 241 break; 242 case PCI_PRODUCT_LSI_FC929: 243 desc = "Dual LSILogic FC929 FC Adapter"; 244 break; 245 case PCI_PRODUCT_LSI_FC919X: 246 desc = "LSILogic FC919 FC PCI-X Adapter"; 247 break; 248 case PCI_PRODUCT_LSI_FC929X: 249 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter"; 250 break; 251 case PCI_PRODUCT_LSI_FC646: 252 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter"; 253 break; 254 case PCI_PRODUCT_LSI_FC7X04X: 255 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter"; 256 break; 257 case PCI_PRODUCT_LSI_1030: 258 desc = "LSILogic 1030 Ultra4 Adapter"; 259 break; 260 case PCI_PRODUCT_LSI_SAS1064: 261 case PCI_PRODUCT_LSI_SAS1064A: 262 case PCI_PRODUCT_LSI_SAS1064E: 263 case PCI_PRODUCT_LSI_SAS1066: 264 case PCI_PRODUCT_LSI_SAS1066E: 265 case PCI_PRODUCT_LSI_SAS1068: 266 case PCI_PRODUCT_LSI_SAS1068E: 267 case PCI_PRODUCT_LSI_SAS1078: 268 case PCI_PRODUCT_LSI_SAS1078DE: 269 desc = "LSILogic SAS/SATA Adapter"; 270 break; 271 default: 272 return (ENXIO); 273 } 274 275 device_set_desc(dev, desc); 276 return (0); 277} 278 279#if __FreeBSD_version < 500000 280static void 281mpt_set_options(struct mpt_softc *mpt) 282{ 283 int bitmap; 284 285 bitmap = 0; 286 if (getenv_int("mpt_disable", &bitmap)) { 287 if (bitmap & (1 << mpt->unit)) { 288 mpt->disabled = 1; 289 } 290 } 291 bitmap = 0; 292 if (getenv_int("mpt_debug", &bitmap)) { 293 if (bitmap & (1 << mpt->unit)) { 294 mpt->verbose = MPT_PRT_DEBUG; 295 } 296 } 297 bitmap = 0; 298 if (getenv_int("mpt_debug1", &bitmap)) { 299 if (bitmap & (1 << mpt->unit)) { 300 mpt->verbose = MPT_PRT_DEBUG1; 301 } 302 } 303 bitmap = 0; 304 if (getenv_int("mpt_debug2", &bitmap)) { 305 if (bitmap & (1 << mpt->unit)) { 306 mpt->verbose = MPT_PRT_DEBUG2; 307 } 308 } 309 bitmap = 0; 310 if (getenv_int("mpt_debug3", &bitmap)) { 311 if (bitmap & (1 << mpt->unit)) { 312 mpt->verbose = MPT_PRT_DEBUG3; 313 } 314 } 315 316 mpt->cfg_role = MPT_ROLE_DEFAULT; 317 bitmap = 0; 318 if (getenv_int("mpt_nil_role", &bitmap)) { 319 if (bitmap & (1 << mpt->unit)) { 320 mpt->cfg_role = 0; 321 } 322 mpt->do_cfg_role = 1; 323 } 324 bitmap = 0; 325 if (getenv_int("mpt_tgt_role", &bitmap)) { 326 if (bitmap & (1 << mpt->unit)) { 327 mpt->cfg_role |= MPT_ROLE_TARGET; 328 } 329 mpt->do_cfg_role = 1; 330 } 331 bitmap = 0; 332 if (getenv_int("mpt_ini_role", &bitmap)) { 333 if (bitmap & (1 << mpt->unit)) { 334 mpt->cfg_role |= MPT_ROLE_INITIATOR; 335 } 336 mpt->do_cfg_role = 1; 337 } 338 mpt->msi_enable = 0; 339} 340#else 341static void 342mpt_set_options(struct mpt_softc *mpt) 343{ 344 int tval; 345 346 tval = 0; 347 if (resource_int_value(device_get_name(mpt->dev), 348 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) { 349 mpt->disabled = 1; 350 } 351 tval = 0; 352 if (resource_int_value(device_get_name(mpt->dev), 353 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 354 mpt->verbose = tval; 355 } 356 tval = -1; 357 if (resource_int_value(device_get_name(mpt->dev), 358 device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 && 359 tval <= 3) { 360 mpt->cfg_role = tval; 361 mpt->do_cfg_role = 1; 362 } 363 tval = 0; 364 mpt->msi_enable = 0; 365 if (mpt->is_sas) 366 mpt->msi_enable = 1; 367 if (resource_int_value(device_get_name(mpt->dev), 368 device_get_unit(mpt->dev), "msi_enable", &tval) == 0) { 369 mpt->msi_enable = tval; 370 } 371} 372#endif 373 374static void 375mpt_link_peer(struct mpt_softc *mpt) 376{ 377 struct mpt_softc *mpt2; 378 379 if (mpt->unit == 0) { 380 return; 381 } 382 /* 383 * XXX: depends on probe order 384 */ 385 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1); 386 387 if (mpt2 == NULL) { 388 return; 389 } 390 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 391 return; 392 } 393 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 394 return; 395 } 396 mpt->mpt2 = mpt2; 397 mpt2->mpt2 = mpt; 398 if (mpt->verbose >= MPT_PRT_DEBUG) { 399 mpt_prt(mpt, "linking with peer (mpt%d)\n", 400 device_get_unit(mpt2->dev)); 401 } 402} 403 404static void 405mpt_unlink_peer(struct mpt_softc *mpt) 406{ 407 if (mpt->mpt2) { 408 mpt->mpt2->mpt2 = NULL; 409 } 410} 411 412static int 413mpt_pci_attach(device_t dev) 414{ 415 struct mpt_softc *mpt; 416 int iqd; 417 uint32_t data, cmd; 418 int mpt_io_bar, mpt_mem_bar; 419 420 /* Allocate the softc structure */ 421 mpt = (struct mpt_softc*)device_get_softc(dev); 422 if (mpt == NULL) { 423 device_printf(dev, "cannot allocate softc\n"); 424 return (ENOMEM); 425 } 426 memset(mpt, 0, sizeof(struct mpt_softc)); 427 switch ((pci_get_device(dev) & ~1)) { 428 case PCI_PRODUCT_LSI_FC909: 429 case PCI_PRODUCT_LSI_FC909A: 430 case PCI_PRODUCT_LSI_FC919: 431 case PCI_PRODUCT_LSI_FC929: 432 case PCI_PRODUCT_LSI_FC919X: 433 case PCI_PRODUCT_LSI_FC646: 434 case PCI_PRODUCT_LSI_FC7X04X: 435 mpt->is_fc = 1; 436 break; 437 case PCI_PRODUCT_LSI_SAS1064: 438 case PCI_PRODUCT_LSI_SAS1064A: 439 case PCI_PRODUCT_LSI_SAS1064E: 440 case PCI_PRODUCT_LSI_SAS1066: 441 case PCI_PRODUCT_LSI_SAS1066E: 442 case PCI_PRODUCT_LSI_SAS1068: 443 case PCI_PRODUCT_LSI_SAS1068E: 444 case PCI_PRODUCT_LSI_SAS1078: 445 case PCI_PRODUCT_LSI_SAS1078DE: 446 mpt->is_sas = 1; 447 break; 448 default: 449 mpt->is_spi = 1; 450 break; 451 } 452 mpt->dev = dev; 453 mpt->unit = device_get_unit(dev); 454 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT; 455 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT; 456 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT; 457 mpt->verbose = MPT_PRT_NONE; 458 mpt->role = MPT_ROLE_NONE; 459 mpt->mpt_ini_id = MPT_INI_ID_NONE; 460#ifdef __sparc64__ 461 if (mpt->is_spi) 462 mpt->mpt_ini_id = OF_getscsinitid(dev); 463#endif 464 mpt_set_options(mpt); 465 if (mpt->verbose == MPT_PRT_NONE) { 466 mpt->verbose = MPT_PRT_WARN; 467 /* Print INFO level (if any) if bootverbose is set */ 468 mpt->verbose += (bootverbose != 0)? 1 : 0; 469 } 470 /* Make sure memory access decoders are enabled */ 471 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 472 if ((cmd & PCIM_CMD_MEMEN) == 0) { 473 device_printf(dev, "Memory accesses disabled"); 474 return (ENXIO); 475 } 476 477 /* 478 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 479 */ 480 cmd |= 481 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 482 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 483 pci_write_config(dev, PCIR_COMMAND, cmd, 2); 484 485 /* 486 * Make sure we've disabled the ROM. 487 */ 488 data = pci_read_config(dev, PCIR_BIOS, 4); 489 data &= ~PCIM_BIOS_ENABLE; 490 pci_write_config(dev, PCIR_BIOS, data, 4); 491 492 /* 493 * Is this part a dual? 494 * If so, link with our partner (around yet) 495 */ 496 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 || 497 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC646 || 498 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X || 499 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) { 500 mpt_link_peer(mpt); 501 } 502 503 /* 504 * Figure out which are the I/O and MEM Bars 505 */ 506 data = pci_read_config(dev, PCIR_BAR(0), 4); 507 if (PCI_BAR_IO(data)) { 508 /* BAR0 is IO, BAR1 is memory */ 509 mpt_io_bar = 0; 510 mpt_mem_bar = 1; 511 } else { 512 /* BAR0 is memory, BAR1 is IO */ 513 mpt_mem_bar = 0; 514 mpt_io_bar = 1; 515 } 516 517 /* 518 * Set up register access. PIO mode is required for 519 * certain reset operations (but must be disabled for 520 * some cards otherwise). 521 */ 522 mpt_io_bar = PCIR_BAR(mpt_io_bar); 523 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, 524 &mpt_io_bar, RF_ACTIVE); 525 if (mpt->pci_pio_reg == NULL) { 526 device_printf(dev, "unable to map registers in PIO mode\n"); 527 goto bad; 528 } 529 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg); 530 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg); 531 532 /* Allocate kernel virtual memory for the 9x9's Mem0 region */ 533 mpt_mem_bar = PCIR_BAR(mpt_mem_bar); 534 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 535 &mpt_mem_bar, RF_ACTIVE); 536 if (mpt->pci_reg == NULL) { 537 device_printf(dev, "Unable to memory map registers.\n"); 538 if (mpt->is_sas) { 539 device_printf(dev, "Giving Up.\n"); 540 goto bad; 541 } 542 device_printf(dev, "Falling back to PIO mode.\n"); 543 mpt->pci_st = mpt->pci_pio_st; 544 mpt->pci_sh = mpt->pci_pio_sh; 545 } else { 546 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 547 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 548 } 549 550 /* Get a handle to the interrupt */ 551 iqd = 0; 552 if (mpt->msi_enable) { 553 /* 554 * First try to alloc an MSI-X message. If that 555 * fails, then try to alloc an MSI message instead. 556 */ 557 if (pci_msix_count(dev) == 1) { 558 mpt->pci_msi_count = 1; 559 if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) { 560 iqd = 1; 561 } else { 562 mpt->pci_msi_count = 0; 563 } 564 } 565 if (iqd == 0 && pci_msi_count(dev) == 1) { 566 mpt->pci_msi_count = 1; 567 if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) { 568 iqd = 1; 569 } else { 570 mpt->pci_msi_count = 0; 571 } 572 } 573 } 574 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 575 RF_ACTIVE | (mpt->pci_msi_count ? 0 : RF_SHAREABLE)); 576 if (mpt->pci_irq == NULL) { 577 device_printf(dev, "could not allocate interrupt\n"); 578 goto bad; 579 } 580 581 MPT_LOCK_SETUP(mpt); 582 583 /* Disable interrupts at the part */ 584 mpt_disable_ints(mpt); 585 586 /* Register the interrupt handler */ 587 if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr, 588 mpt, &mpt->ih)) { 589 device_printf(dev, "could not setup interrupt\n"); 590 goto bad; 591 } 592 593 /* Allocate dma memory */ 594 if (mpt_dma_mem_alloc(mpt)) { 595 mpt_prt(mpt, "Could not allocate DMA memory\n"); 596 goto bad; 597 } 598 599 /* 600 * Save the PCI config register values 601 * 602 * Hard resets are known to screw up the BAR for diagnostic 603 * memory accesses (Mem1). 604 * 605 * Using Mem1 is known to make the chip stop responding to 606 * configuration space transfers, so we need to save it now 607 */ 608 609 mpt_read_config_regs(mpt); 610 611 /* 612 * Disable PIO until we need it 613 */ 614 if (mpt->is_sas) { 615 pci_disable_io(dev, SYS_RES_IOPORT); 616 } 617 618 /* Initialize the hardware */ 619 if (mpt->disabled == 0) { 620 if (mpt_attach(mpt) != 0) { 621 goto bad; 622 } 623 } else { 624 mpt_prt(mpt, "device disabled at user request\n"); 625 goto bad; 626 } 627 628 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown, 629 dev, SHUTDOWN_PRI_DEFAULT); 630 631 if (mpt->eh == NULL) { 632 mpt_prt(mpt, "shutdown event registration failed\n"); 633 (void) mpt_detach(mpt); 634 goto bad; 635 } 636 return (0); 637 638bad: 639 mpt_dma_mem_free(mpt); 640 mpt_free_bus_resources(mpt); 641 mpt_unlink_peer(mpt); 642 643 MPT_LOCK_DESTROY(mpt); 644 645 /* 646 * but return zero to preserve unit numbering 647 */ 648 return (0); 649} 650 651/* 652 * Free bus resources 653 */ 654static void 655mpt_free_bus_resources(struct mpt_softc *mpt) 656{ 657 if (mpt->ih) { 658 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 659 mpt->ih = NULL; 660 } 661 662 if (mpt->pci_irq) { 663 bus_release_resource(mpt->dev, SYS_RES_IRQ, 664 rman_get_rid(mpt->pci_irq), mpt->pci_irq); 665 mpt->pci_irq = NULL; 666 } 667 668 if (mpt->pci_msi_count) { 669 pci_release_msi(mpt->dev); 670 mpt->pci_msi_count = 0; 671 } 672 673 if (mpt->pci_pio_reg) { 674 bus_release_resource(mpt->dev, SYS_RES_IOPORT, 675 rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg); 676 mpt->pci_pio_reg = NULL; 677 } 678 if (mpt->pci_reg) { 679 bus_release_resource(mpt->dev, SYS_RES_MEMORY, 680 rman_get_rid(mpt->pci_reg), mpt->pci_reg); 681 mpt->pci_reg = NULL; 682 } 683 MPT_LOCK_DESTROY(mpt); 684} 685 686/* 687 * Disconnect ourselves from the system. 688 */ 689static int 690mpt_pci_detach(device_t dev) 691{ 692 struct mpt_softc *mpt; 693 694 mpt = (struct mpt_softc*)device_get_softc(dev); 695 696 if (mpt) { 697 mpt_disable_ints(mpt); 698 mpt_detach(mpt); 699 mpt_reset(mpt, /*reinit*/FALSE); 700 mpt_dma_mem_free(mpt); 701 mpt_free_bus_resources(mpt); 702 mpt_raid_free_mem(mpt); 703 if (mpt->eh != NULL) { 704 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh); 705 } 706 } 707 return(0); 708} 709 710/* 711 * Disable the hardware 712 */ 713static int 714mpt_pci_shutdown(device_t dev) 715{ 716 struct mpt_softc *mpt; 717 718 mpt = (struct mpt_softc *)device_get_softc(dev); 719 if (mpt) { 720 int r; 721 r = mpt_shutdown(mpt); 722 return (r); 723 } 724 return(0); 725} 726 727static int 728mpt_dma_mem_alloc(struct mpt_softc *mpt) 729{ 730 size_t len; 731 struct mpt_map_info mi; 732 733 /* Check if we alreay have allocated the reply memory */ 734 if (mpt->reply_phys != 0) { 735 return 0; 736 } 737 738 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt); 739#ifdef RELENG_4 740 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK); 741 if (mpt->request_pool == NULL) { 742 mpt_prt(mpt, "cannot allocate request pool\n"); 743 return (1); 744 } 745 memset(mpt->request_pool, 0, len); 746#else 747 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO); 748 if (mpt->request_pool == NULL) { 749 mpt_prt(mpt, "cannot allocate request pool\n"); 750 return (1); 751 } 752#endif 753 754 /* 755 * Create a parent dma tag for this device. 756 * 757 * Align at byte boundaries, 758 * Limit to 32-bit addressing for request/reply queues. 759 */ 760 if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev), 761 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR, 762 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 763 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 764 /*nsegments*/BUS_SPACE_UNRESTRICTED, 765 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0, 766 &mpt->parent_dmat) != 0) { 767 mpt_prt(mpt, "cannot create parent dma tag\n"); 768 return (1); 769 } 770 771 /* Create a child tag for reply buffers */ 772 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 773 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 774 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 775 &mpt->reply_dmat) != 0) { 776 mpt_prt(mpt, "cannot create a dma tag for replies\n"); 777 return (1); 778 } 779 780 /* Allocate some DMA accessible memory for replies */ 781 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 782 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 783 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n", 784 (u_long) (2 * PAGE_SIZE)); 785 return (1); 786 } 787 788 mi.mpt = mpt; 789 mi.error = 0; 790 791 /* Load and lock it into "bus space" */ 792 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 793 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0); 794 795 if (mi.error) { 796 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n", 797 mi.error); 798 return (1); 799 } 800 mpt->reply_phys = mi.phys; 801 802 return (0); 803} 804 805/* Deallocate memory that was allocated by mpt_dma_mem_alloc 806 */ 807static void 808mpt_dma_mem_free(struct mpt_softc *mpt) 809{ 810 811 /* Make sure we aren't double destroying */ 812 if (mpt->reply_dmat == 0) { 813 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n"); 814 return; 815 } 816 817 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 818 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 819 bus_dma_tag_destroy(mpt->reply_dmat); 820 bus_dma_tag_destroy(mpt->parent_dmat); 821 mpt->reply_dmat = NULL; 822 free(mpt->request_pool, M_DEVBUF); 823 mpt->request_pool = NULL; 824} 825 826/* Reads modifiable (via PCI transactions) config registers */ 827static void 828mpt_read_config_regs(struct mpt_softc *mpt) 829{ 830 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 831 mpt->pci_cfg.LatencyTimer_LineSize = 832 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 833 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 834 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 835 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 836 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 837 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 838 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 839 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 840 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 841} 842 843/* Sets modifiable config registers */ 844void 845mpt_set_config_regs(struct mpt_softc *mpt) 846{ 847 uint32_t val; 848 849#define MPT_CHECK(reg, offset, size) \ 850 val = pci_read_config(mpt->dev, offset, size); \ 851 if (mpt->pci_cfg.reg != val) { \ 852 mpt_prt(mpt, \ 853 "Restoring " #reg " to 0x%X from 0x%X\n", \ 854 mpt->pci_cfg.reg, val); \ 855 } 856 857 if (mpt->verbose >= MPT_PRT_DEBUG) { 858 MPT_CHECK(Command, PCIR_COMMAND, 2); 859 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 860 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 861 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 862 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 863 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 864 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 865 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 866 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 867 MPT_CHECK(PMCSR, 0x44, 4); 868 } 869#undef MPT_CHECK 870 871 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 872 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 873 mpt->pci_cfg.LatencyTimer_LineSize, 2); 874 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 875 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 876 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 877 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 878 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 879 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 880 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 881 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 882} 883 884static void 885mpt_pci_intr(void *arg) 886{ 887 struct mpt_softc *mpt; 888 889 mpt = (struct mpt_softc *)arg; 890 MPT_LOCK(mpt); 891 mpt_intr(mpt); 892 MPT_UNLOCK(mpt); 893} 894