mpt_pci.c revision 216764
1/*-
2 * PCI specific probe and attach routines for LSI Fusion Adapters
3 * FreeBSD Version.
4 *
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8 * Feral Software
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice immediately at the beginning of the file, without modification,
16 *    this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32/*-
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
38 * met:
39 * 1. Redistributions of source code must retain the above copyright
40 *    notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 *    substantially similar to the "NO WARRANTY" disclaimer below
43 *    ("Disclaimer") and any redistribution must be conditioned upon including
44 *    a substantially similar Disclaimer requirement for further binary
45 *    redistribution.
46 * 3. Neither the names of the above listed copyright holders nor the names
47 *    of any contributors may be used to endorse or promote products derived
48 *    from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
64 *
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
67 */
68/*
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
73 *
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
76 * met:
77 * 1. Redistributions of source code must retain the above copyright
78 *    notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 *    substantially similar to the "NO WARRANTY" disclaimer below
81 *    ("Disclaimer") and any redistribution must be conditioned upon including
82 *    a substantially similar Disclaimer requirement for further binary
83 *    redistribution.
84 * 3. Neither the names of the above listed copyright holders nor the names
85 *    of any contributors may be used to endorse or promote products derived
86 *    from this software without specific prior written permission.
87 *
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
99 */
100
101#include <sys/cdefs.h>
102__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 216764 2010-12-28 16:57:29Z jhb $");
103
104#include <dev/mpt/mpt.h>
105#include <dev/mpt/mpt_cam.h>
106#include <dev/mpt/mpt_raid.h>
107
108#if __FreeBSD_version < 700000
109#define	pci_msix_count(x)	0
110#define	pci_msi_count(x)	0
111#define	pci_alloc_msi(x, y)	1
112#define	pci_alloc_msix(x, y)	1
113#define	pci_release_msi(x)	do { ; } while (0)
114#endif
115
116#ifndef	PCI_VENDOR_LSI
117#define	PCI_VENDOR_LSI			0x1000
118#endif
119
120#ifndef	PCI_PRODUCT_LSI_FC909
121#define	PCI_PRODUCT_LSI_FC909		0x0620
122#endif
123
124#ifndef	PCI_PRODUCT_LSI_FC909A
125#define	PCI_PRODUCT_LSI_FC909A		0x0621
126#endif
127
128#ifndef	PCI_PRODUCT_LSI_FC919
129#define	PCI_PRODUCT_LSI_FC919		0x0624
130#endif
131
132#ifndef	PCI_PRODUCT_LSI_FC929
133#define	PCI_PRODUCT_LSI_FC929		0x0622
134#endif
135
136#ifndef	PCI_PRODUCT_LSI_FC929X
137#define	PCI_PRODUCT_LSI_FC929X		0x0626
138#endif
139
140#ifndef	PCI_PRODUCT_LSI_FC919X
141#define	PCI_PRODUCT_LSI_FC919X		0x0628
142#endif
143
144#ifndef	PCI_PRODUCT_LSI_FC7X04X
145#define	PCI_PRODUCT_LSI_FC7X04X		0x0640
146#endif
147
148#ifndef	PCI_PRODUCT_LSI_FC646
149#define	PCI_PRODUCT_LSI_FC646		0x0646
150#endif
151
152#ifndef	PCI_PRODUCT_LSI_1030
153#define	PCI_PRODUCT_LSI_1030		0x0030
154#endif
155
156#ifndef	PCI_PRODUCT_LSI_SAS1064
157#define PCI_PRODUCT_LSI_SAS1064		0x0050
158#endif
159
160#ifndef PCI_PRODUCT_LSI_SAS1064A
161#define PCI_PRODUCT_LSI_SAS1064A	0x005C
162#endif
163
164#ifndef PCI_PRODUCT_LSI_SAS1064E
165#define PCI_PRODUCT_LSI_SAS1064E	0x0056
166#endif
167
168#ifndef PCI_PRODUCT_LSI_SAS1066
169#define PCI_PRODUCT_LSI_SAS1066		0x005E
170#endif
171
172#ifndef PCI_PRODUCT_LSI_SAS1066E
173#define PCI_PRODUCT_LSI_SAS1066E	0x005A
174#endif
175
176#ifndef PCI_PRODUCT_LSI_SAS1068
177#define PCI_PRODUCT_LSI_SAS1068		0x0054
178#endif
179
180#ifndef PCI_PRODUCT_LSI_SAS1068E
181#define PCI_PRODUCT_LSI_SAS1068E	0x0058
182#endif
183
184#ifndef PCI_PRODUCT_LSI_SAS1078
185#define PCI_PRODUCT_LSI_SAS1078		0x0062
186#endif
187
188#ifndef	PCI_PRODUCT_LSI_SAS1078DE
189#define	PCI_PRODUCT_LSI_SAS1078DE	0x007C
190#endif
191
192#ifndef	PCIM_CMD_SERRESPEN
193#define	PCIM_CMD_SERRESPEN	0x0100
194#endif
195
196
197
198static int mpt_pci_probe(device_t);
199static int mpt_pci_attach(device_t);
200static void mpt_free_bus_resources(struct mpt_softc *mpt);
201static int mpt_pci_detach(device_t);
202static int mpt_pci_shutdown(device_t);
203static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
204static void mpt_dma_mem_free(struct mpt_softc *mpt);
205static void mpt_read_config_regs(struct mpt_softc *mpt);
206static void mpt_pci_intr(void *);
207
208static device_method_t mpt_methods[] = {
209	/* Device interface */
210	DEVMETHOD(device_probe,		mpt_pci_probe),
211	DEVMETHOD(device_attach,	mpt_pci_attach),
212	DEVMETHOD(device_detach,	mpt_pci_detach),
213	DEVMETHOD(device_shutdown,	mpt_pci_shutdown),
214	{ 0, 0 }
215};
216
217static driver_t mpt_driver = {
218	"mpt", mpt_methods, sizeof(struct mpt_softc)
219};
220static devclass_t mpt_devclass;
221DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
222MODULE_DEPEND(mpt, pci, 1, 1, 1);
223MODULE_VERSION(mpt, 1);
224
225static int
226mpt_pci_probe(device_t dev)
227{
228	char *desc;
229
230	if (pci_get_vendor(dev) != PCI_VENDOR_LSI) {
231		return (ENXIO);
232	}
233
234	switch ((pci_get_device(dev) & ~1)) {
235	case PCI_PRODUCT_LSI_FC909:
236		desc = "LSILogic FC909 FC Adapter";
237		break;
238	case PCI_PRODUCT_LSI_FC909A:
239		desc = "LSILogic FC909A FC Adapter";
240		break;
241	case PCI_PRODUCT_LSI_FC919:
242		desc = "LSILogic FC919 FC Adapter";
243		break;
244	case PCI_PRODUCT_LSI_FC929:
245		desc = "Dual LSILogic FC929 FC Adapter";
246		break;
247	case PCI_PRODUCT_LSI_FC919X:
248		desc = "LSILogic FC919 FC PCI-X Adapter";
249		break;
250	case PCI_PRODUCT_LSI_FC929X:
251		desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
252		break;
253	case PCI_PRODUCT_LSI_FC646:
254		desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
255		break;
256	case PCI_PRODUCT_LSI_FC7X04X:
257		desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
258		break;
259	case PCI_PRODUCT_LSI_1030:
260		desc = "LSILogic 1030 Ultra4 Adapter";
261		break;
262	case PCI_PRODUCT_LSI_SAS1064:
263	case PCI_PRODUCT_LSI_SAS1064A:
264	case PCI_PRODUCT_LSI_SAS1064E:
265	case PCI_PRODUCT_LSI_SAS1066:
266	case PCI_PRODUCT_LSI_SAS1066E:
267	case PCI_PRODUCT_LSI_SAS1068:
268	case PCI_PRODUCT_LSI_SAS1068E:
269	case PCI_PRODUCT_LSI_SAS1078:
270	case PCI_PRODUCT_LSI_SAS1078DE:
271		desc = "LSILogic SAS/SATA Adapter";
272		break;
273	default:
274		return (ENXIO);
275	}
276
277	device_set_desc(dev, desc);
278	return (0);
279}
280
281#if	__FreeBSD_version < 500000
282static void
283mpt_set_options(struct mpt_softc *mpt)
284{
285	int bitmap;
286
287	bitmap = 0;
288	if (getenv_int("mpt_disable", &bitmap)) {
289		if (bitmap & (1 << mpt->unit)) {
290			mpt->disabled = 1;
291		}
292	}
293	bitmap = 0;
294	if (getenv_int("mpt_debug", &bitmap)) {
295		if (bitmap & (1 << mpt->unit)) {
296			mpt->verbose = MPT_PRT_DEBUG;
297		}
298	}
299	bitmap = 0;
300	if (getenv_int("mpt_debug1", &bitmap)) {
301		if (bitmap & (1 << mpt->unit)) {
302			mpt->verbose = MPT_PRT_DEBUG1;
303		}
304	}
305	bitmap = 0;
306	if (getenv_int("mpt_debug2", &bitmap)) {
307		if (bitmap & (1 << mpt->unit)) {
308			mpt->verbose = MPT_PRT_DEBUG2;
309		}
310	}
311	bitmap = 0;
312	if (getenv_int("mpt_debug3", &bitmap)) {
313		if (bitmap & (1 << mpt->unit)) {
314			mpt->verbose = MPT_PRT_DEBUG3;
315		}
316	}
317
318	mpt->cfg_role = MPT_ROLE_DEFAULT;
319	bitmap = 0;
320	if (getenv_int("mpt_nil_role", &bitmap)) {
321		if (bitmap & (1 << mpt->unit)) {
322			mpt->cfg_role = 0;
323		}
324		mpt->do_cfg_role = 1;
325	}
326	bitmap = 0;
327	if (getenv_int("mpt_tgt_role", &bitmap)) {
328		if (bitmap & (1 << mpt->unit)) {
329			mpt->cfg_role |= MPT_ROLE_TARGET;
330		}
331		mpt->do_cfg_role = 1;
332	}
333	bitmap = 0;
334	if (getenv_int("mpt_ini_role", &bitmap)) {
335		if (bitmap & (1 << mpt->unit)) {
336			mpt->cfg_role |= MPT_ROLE_INITIATOR;
337		}
338		mpt->do_cfg_role = 1;
339	}
340	mpt->msi_enable = 0;
341}
342#else
343static void
344mpt_set_options(struct mpt_softc *mpt)
345{
346	int tval;
347
348	tval = 0;
349	if (resource_int_value(device_get_name(mpt->dev),
350	    device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
351		mpt->disabled = 1;
352	}
353	tval = 0;
354	if (resource_int_value(device_get_name(mpt->dev),
355	    device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
356		mpt->verbose = tval;
357	}
358	tval = -1;
359	if (resource_int_value(device_get_name(mpt->dev),
360	    device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 &&
361	    tval <= 3) {
362		mpt->cfg_role = tval;
363		mpt->do_cfg_role = 1;
364	}
365
366	tval = 0;
367	mpt->msi_enable = 0;
368	if (resource_int_value(device_get_name(mpt->dev),
369	    device_get_unit(mpt->dev), "msi_enable", &tval) == 0 && tval == 1) {
370		mpt->msi_enable = 1;
371	}
372}
373#endif
374
375
376static void
377mpt_link_peer(struct mpt_softc *mpt)
378{
379	struct mpt_softc *mpt2;
380
381	if (mpt->unit == 0) {
382		return;
383	}
384	/*
385	 * XXX: depends on probe order
386	 */
387	mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
388
389	if (mpt2 == NULL) {
390		return;
391	}
392	if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
393		return;
394	}
395	if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
396		return;
397	}
398	mpt->mpt2 = mpt2;
399	mpt2->mpt2 = mpt;
400	if (mpt->verbose >= MPT_PRT_DEBUG) {
401		mpt_prt(mpt, "linking with peer (mpt%d)\n",
402		    device_get_unit(mpt2->dev));
403	}
404}
405
406static void
407mpt_unlink_peer(struct mpt_softc *mpt)
408{
409	if (mpt->mpt2) {
410		mpt->mpt2->mpt2 = NULL;
411	}
412}
413
414
415static int
416mpt_pci_attach(device_t dev)
417{
418	struct mpt_softc *mpt;
419	int		  iqd;
420	uint32_t	  data, cmd;
421	int		  mpt_io_bar, mpt_mem_bar;
422
423	/* Allocate the softc structure */
424	mpt  = (struct mpt_softc*)device_get_softc(dev);
425	if (mpt == NULL) {
426		device_printf(dev, "cannot allocate softc\n");
427		return (ENOMEM);
428	}
429	memset(mpt, 0, sizeof(struct mpt_softc));
430	switch ((pci_get_device(dev) & ~1)) {
431	case PCI_PRODUCT_LSI_FC909:
432	case PCI_PRODUCT_LSI_FC909A:
433	case PCI_PRODUCT_LSI_FC919:
434	case PCI_PRODUCT_LSI_FC929:
435	case PCI_PRODUCT_LSI_FC919X:
436	case PCI_PRODUCT_LSI_FC646:
437	case PCI_PRODUCT_LSI_FC7X04X:
438		mpt->is_fc = 1;
439		break;
440	case PCI_PRODUCT_LSI_SAS1064:
441	case PCI_PRODUCT_LSI_SAS1064A:
442	case PCI_PRODUCT_LSI_SAS1064E:
443	case PCI_PRODUCT_LSI_SAS1066:
444	case PCI_PRODUCT_LSI_SAS1066E:
445	case PCI_PRODUCT_LSI_SAS1068:
446	case PCI_PRODUCT_LSI_SAS1068E:
447	case PCI_PRODUCT_LSI_SAS1078:
448	case PCI_PRODUCT_LSI_SAS1078DE:
449		mpt->is_sas = 1;
450		break;
451	default:
452		mpt->is_spi = 1;
453		break;
454	}
455	mpt->dev = dev;
456	mpt->unit = device_get_unit(dev);
457	mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
458	mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
459	mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
460	mpt->verbose = MPT_PRT_NONE;
461	mpt->role = MPT_ROLE_NONE;
462	mpt->mpt_ini_id = MPT_INI_ID_NONE;
463#ifdef __sparc64__
464	if (mpt->is_spi)
465		mpt->mpt_ini_id = OF_getscsinitid(dev);
466#endif
467	mpt_set_options(mpt);
468	if (mpt->verbose == MPT_PRT_NONE) {
469		mpt->verbose = MPT_PRT_WARN;
470		/* Print INFO level (if any) if bootverbose is set */
471		mpt->verbose += (bootverbose != 0)? 1 : 0;
472	}
473	/* Make sure memory access decoders are enabled */
474	cmd = pci_read_config(dev, PCIR_COMMAND, 2);
475	if ((cmd & PCIM_CMD_MEMEN) == 0) {
476		device_printf(dev, "Memory accesses disabled");
477		return (ENXIO);
478	}
479
480	/*
481	 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
482	 */
483	cmd |=
484	    PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
485	    PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
486	pci_write_config(dev, PCIR_COMMAND, cmd, 2);
487
488	/*
489	 * Make sure we've disabled the ROM.
490	 */
491	data = pci_read_config(dev, PCIR_BIOS, 4);
492	data &= ~PCIM_BIOS_ENABLE;
493	pci_write_config(dev, PCIR_BIOS, data, 4);
494
495	/*
496	 * Is this part a dual?
497	 * If so, link with our partner (around yet)
498	 */
499	if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
500	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC646 ||
501	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X ||
502	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
503		mpt_link_peer(mpt);
504	}
505
506	/*
507	 * Figure out which are the I/O and MEM Bars
508	 */
509	data = pci_read_config(dev, PCIR_BAR(0), 4);
510	if (PCI_BAR_IO(data)) {
511		/* BAR0 is IO, BAR1 is memory */
512		mpt_io_bar = 0;
513		mpt_mem_bar = 1;
514	} else {
515		/* BAR0 is memory, BAR1 is IO */
516		mpt_mem_bar = 0;
517		mpt_io_bar = 1;
518	}
519
520	/*
521	 * Set up register access.  PIO mode is required for
522	 * certain reset operations (but must be disabled for
523	 * some cards otherwise).
524	 */
525	mpt->pci_pio_rid = PCIR_BAR(mpt_io_bar);
526	mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
527			    &mpt->pci_pio_rid, RF_ACTIVE);
528	if (mpt->pci_pio_reg == NULL) {
529		device_printf(dev, "unable to map registers in PIO mode\n");
530		goto bad;
531	}
532	mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
533	mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
534
535	/* Allocate kernel virtual memory for the 9x9's Mem0 region */
536	mpt->pci_mem_rid = PCIR_BAR(mpt_mem_bar);
537	mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
538			&mpt->pci_mem_rid, RF_ACTIVE);
539	if (mpt->pci_reg == NULL) {
540		device_printf(dev, "Unable to memory map registers.\n");
541		if (mpt->is_sas) {
542			device_printf(dev, "Giving Up.\n");
543			goto bad;
544		}
545		device_printf(dev, "Falling back to PIO mode.\n");
546		mpt->pci_st = mpt->pci_pio_st;
547		mpt->pci_sh = mpt->pci_pio_sh;
548	} else {
549		mpt->pci_st = rman_get_bustag(mpt->pci_reg);
550		mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
551	}
552
553	/* Get a handle to the interrupt */
554	iqd = 0;
555	if (mpt->msi_enable) {
556		/*
557		 * First try to alloc an MSI-X message.  If that
558		 * fails, then try to alloc an MSI message instead.
559		 */
560		if (pci_msix_count(dev) == 1) {
561			mpt->pci_msi_count = 1;
562			if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) {
563				iqd = 1;
564			} else {
565				mpt->pci_msi_count = 0;
566			}
567		}
568		if (iqd == 0 && pci_msi_count(dev) == 1) {
569			mpt->pci_msi_count = 1;
570			if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) {
571				iqd = 1;
572			} else {
573				mpt->pci_msi_count = 0;
574			}
575		}
576	}
577	mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
578	    RF_ACTIVE | RF_SHAREABLE);
579	if (mpt->pci_irq == NULL) {
580		device_printf(dev, "could not allocate interrupt\n");
581		goto bad;
582	}
583
584	MPT_LOCK_SETUP(mpt);
585
586	/* Disable interrupts at the part */
587	mpt_disable_ints(mpt);
588
589	/* Register the interrupt handler */
590	if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr,
591	    mpt, &mpt->ih)) {
592		device_printf(dev, "could not setup interrupt\n");
593		goto bad;
594	}
595
596	/* Allocate dma memory */
597/* XXX JGibbs -Should really be done based on IOCFacts. */
598	if (mpt_dma_mem_alloc(mpt)) {
599		mpt_prt(mpt, "Could not allocate DMA memory\n");
600		goto bad;
601	}
602
603	/*
604	 * Save the PCI config register values
605 	 *
606	 * Hard resets are known to screw up the BAR for diagnostic
607	 * memory accesses (Mem1).
608	 *
609	 * Using Mem1 is known to make the chip stop responding to
610	 * configuration space transfers, so we need to save it now
611	 */
612
613	mpt_read_config_regs(mpt);
614
615	/*
616	 * Disable PIO until we need it
617	 */
618	if (mpt->is_sas) {
619		pci_disable_io(dev, SYS_RES_IOPORT);
620	}
621
622	/* Initialize the hardware */
623	if (mpt->disabled == 0) {
624		if (mpt_attach(mpt) != 0) {
625			goto bad;
626		}
627	} else {
628		mpt_prt(mpt, "device disabled at user request\n");
629		goto bad;
630	}
631
632	mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
633	    dev, SHUTDOWN_PRI_DEFAULT);
634
635	if (mpt->eh == NULL) {
636		mpt_prt(mpt, "shutdown event registration failed\n");
637		(void) mpt_detach(mpt);
638		goto bad;
639	}
640	return (0);
641
642bad:
643	mpt_dma_mem_free(mpt);
644	mpt_free_bus_resources(mpt);
645	mpt_unlink_peer(mpt);
646
647	MPT_LOCK_DESTROY(mpt);
648
649	/*
650	 * but return zero to preserve unit numbering
651	 */
652	return (0);
653}
654
655/*
656 * Free bus resources
657 */
658static void
659mpt_free_bus_resources(struct mpt_softc *mpt)
660{
661	if (mpt->ih) {
662		bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
663		mpt->ih = 0;
664	}
665
666	if (mpt->pci_irq) {
667		bus_release_resource(mpt->dev, SYS_RES_IRQ,
668		    mpt->pci_msi_count ? 1 : 0, mpt->pci_irq);
669		mpt->pci_irq = 0;
670	}
671
672	if (mpt->pci_msi_count) {
673		pci_release_msi(mpt->dev);
674		mpt->pci_msi_count = 0;
675	}
676
677	if (mpt->pci_pio_reg) {
678		bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid,
679			mpt->pci_pio_reg);
680		mpt->pci_pio_reg = 0;
681	}
682	if (mpt->pci_reg) {
683		bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid,
684			mpt->pci_reg);
685		mpt->pci_reg = 0;
686	}
687	MPT_LOCK_DESTROY(mpt);
688}
689
690
691/*
692 * Disconnect ourselves from the system.
693 */
694static int
695mpt_pci_detach(device_t dev)
696{
697	struct mpt_softc *mpt;
698
699	mpt  = (struct mpt_softc*)device_get_softc(dev);
700
701	if (mpt) {
702		mpt_disable_ints(mpt);
703		mpt_detach(mpt);
704		mpt_reset(mpt, /*reinit*/FALSE);
705		mpt_dma_mem_free(mpt);
706		mpt_free_bus_resources(mpt);
707		mpt_raid_free_mem(mpt);
708		if (mpt->eh != NULL) {
709                        EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh);
710		}
711	}
712	return(0);
713}
714
715
716/*
717 * Disable the hardware
718 */
719static int
720mpt_pci_shutdown(device_t dev)
721{
722	struct mpt_softc *mpt;
723
724	mpt = (struct mpt_softc *)device_get_softc(dev);
725	if (mpt) {
726		int r;
727		r = mpt_shutdown(mpt);
728		return (r);
729	}
730	return(0);
731}
732
733static int
734mpt_dma_mem_alloc(struct mpt_softc *mpt)
735{
736	size_t len;
737	struct mpt_map_info mi;
738
739	/* Check if we alreay have allocated the reply memory */
740	if (mpt->reply_phys != 0) {
741		return 0;
742	}
743
744	len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
745#ifdef	RELENG_4
746	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
747	if (mpt->request_pool == NULL) {
748		mpt_prt(mpt, "cannot allocate request pool\n");
749		return (1);
750	}
751	memset(mpt->request_pool, 0, len);
752#else
753	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
754	if (mpt->request_pool == NULL) {
755		mpt_prt(mpt, "cannot allocate request pool\n");
756		return (1);
757	}
758#endif
759
760	/*
761	 * Create a parent dma tag for this device.
762	 *
763	 * Align at byte boundaries,
764	 * Limit to 32-bit addressing for request/reply queues.
765	 */
766	if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev),
767	    /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
768	    /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
769	    /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
770	    /*nsegments*/BUS_SPACE_UNRESTRICTED,
771	    /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
772	    &mpt->parent_dmat) != 0) {
773		mpt_prt(mpt, "cannot create parent dma tag\n");
774		return (1);
775	}
776
777	/* Create a child tag for reply buffers */
778	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
779	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
780	    NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
781	    &mpt->reply_dmat) != 0) {
782		mpt_prt(mpt, "cannot create a dma tag for replies\n");
783		return (1);
784	}
785
786	/* Allocate some DMA accessable memory for replies */
787	if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
788	    BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
789		mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
790		    (u_long) (2 * PAGE_SIZE));
791		return (1);
792	}
793
794	mi.mpt = mpt;
795	mi.error = 0;
796
797	/* Load and lock it into "bus space" */
798	bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
799	    2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
800
801	if (mi.error) {
802		mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
803		    mi.error);
804		return (1);
805	}
806	mpt->reply_phys = mi.phys;
807
808	return (0);
809}
810
811
812
813/* Deallocate memory that was allocated by mpt_dma_mem_alloc
814 */
815static void
816mpt_dma_mem_free(struct mpt_softc *mpt)
817{
818
819        /* Make sure we aren't double destroying */
820        if (mpt->reply_dmat == 0) {
821		mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
822		return;
823        }
824
825	bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
826	bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
827	bus_dma_tag_destroy(mpt->reply_dmat);
828	bus_dma_tag_destroy(mpt->parent_dmat);
829	mpt->reply_dmat = 0;
830	free(mpt->request_pool, M_DEVBUF);
831	mpt->request_pool = 0;
832
833}
834
835
836
837/* Reads modifiable (via PCI transactions) config registers */
838static void
839mpt_read_config_regs(struct mpt_softc *mpt)
840{
841	mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
842	mpt->pci_cfg.LatencyTimer_LineSize =
843	    pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
844	mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
845	mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
846	mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
847	mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
848	mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
849	mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
850	mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
851	mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
852}
853
854/* Sets modifiable config registers */
855void
856mpt_set_config_regs(struct mpt_softc *mpt)
857{
858	uint32_t val;
859
860#define MPT_CHECK(reg, offset, size)					\
861	val = pci_read_config(mpt->dev, offset, size);			\
862	if (mpt->pci_cfg.reg != val) {					\
863		mpt_prt(mpt,						\
864		    "Restoring " #reg " to 0x%X from 0x%X\n",		\
865		    mpt->pci_cfg.reg, val);				\
866	}
867
868	if (mpt->verbose >= MPT_PRT_DEBUG) {
869		MPT_CHECK(Command, PCIR_COMMAND, 2);
870		MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
871		MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
872		MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
873		MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
874		MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
875		MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
876		MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
877		MPT_CHECK(IntLine, PCIR_INTLINE, 1);
878		MPT_CHECK(PMCSR, 0x44, 4);
879	}
880#undef MPT_CHECK
881
882	pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
883	pci_write_config(mpt->dev, PCIR_CACHELNSZ,
884	    mpt->pci_cfg.LatencyTimer_LineSize, 2);
885	pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
886	pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
887	pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
888	pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
889	pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
890	pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
891	pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
892	pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
893}
894
895static void
896mpt_pci_intr(void *arg)
897{
898	struct mpt_softc *mpt;
899
900	mpt = (struct mpt_softc *)arg;
901	MPT_LOCK(mpt);
902	mpt_intr(mpt);
903	MPT_UNLOCK(mpt);
904}
905