mpt_pci.c revision 166935
1/*-
2 * PCI specific probe and attach routines for LSI Fusion Adapters
3 * FreeBSD Version.
4 *
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8 * Feral Software
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice immediately at the beginning of the file, without modification,
16 *    this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32/*-
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
38 * met:
39 * 1. Redistributions of source code must retain the above copyright
40 *    notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 *    substantially similar to the "NO WARRANTY" disclaimer below
43 *    ("Disclaimer") and any redistribution must be conditioned upon including
44 *    a substantially similar Disclaimer requirement for further binary
45 *    redistribution.
46 * 3. Neither the names of the above listed copyright holders nor the names
47 *    of any contributors may be used to endorse or promote products derived
48 *    from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
64 *
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
67 */
68/*
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
73 *
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
76 * met:
77 * 1. Redistributions of source code must retain the above copyright
78 *    notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 *    substantially similar to the "NO WARRANTY" disclaimer below
81 *    ("Disclaimer") and any redistribution must be conditioned upon including
82 *    a substantially similar Disclaimer requirement for further binary
83 *    redistribution.
84 * 3. Neither the names of the above listed copyright holders nor the names
85 *    of any contributors may be used to endorse or promote products derived
86 *    from this software without specific prior written permission.
87 *
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
99 */
100
101#include <sys/cdefs.h>
102__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 166935 2007-02-23 23:13:46Z mjacob $");
103
104#include <dev/mpt/mpt.h>
105#include <dev/mpt/mpt_cam.h>
106#include <dev/mpt/mpt_raid.h>
107
108#if __FreeBSD_version < 700000
109#define	pci_msix_count(x)	0
110#define	pci_msi_count(x)	0
111#define	pci_alloc_msi(x, y)	1
112#define	pci_alloc_msix(x, y)	1
113#define	pci_release_msi(x)	do { ; } while (0)
114#endif
115
116#ifndef	PCI_VENDOR_LSI
117#define	PCI_VENDOR_LSI			0x1000
118#endif
119
120#ifndef	PCI_PRODUCT_LSI_FC909
121#define	PCI_PRODUCT_LSI_FC909		0x0620
122#endif
123
124#ifndef	PCI_PRODUCT_LSI_FC909A
125#define	PCI_PRODUCT_LSI_FC909A		0x0621
126#endif
127
128#ifndef	PCI_PRODUCT_LSI_FC919
129#define	PCI_PRODUCT_LSI_FC919		0x0624
130#endif
131
132#ifndef	PCI_PRODUCT_LSI_FC929
133#define	PCI_PRODUCT_LSI_FC929		0x0622
134#endif
135
136#ifndef	PCI_PRODUCT_LSI_FC929X
137#define	PCI_PRODUCT_LSI_FC929X		0x0626
138#endif
139
140#ifndef	PCI_PRODUCT_LSI_FC919X
141#define	PCI_PRODUCT_LSI_FC919X		0x0628
142#endif
143
144#ifndef	PCI_PRODUCT_LSI_FC7X04X
145#define	PCI_PRODUCT_LSI_FC7X04X		0x0640
146#endif
147
148#ifndef	PCI_PRODUCT_LSI_FC646
149#define	PCI_PRODUCT_LSI_FC646		0x0646
150#endif
151
152#ifndef	PCI_PRODUCT_LSI_1030
153#define	PCI_PRODUCT_LSI_1030		0x0030
154#endif
155
156#ifndef	PCI_PRODUCT_LSI_SAS1064
157#define PCI_PRODUCT_LSI_SAS1064		0x0050
158#endif
159
160#ifndef PCI_PRODUCT_LSI_SAS1064A
161#define PCI_PRODUCT_LSI_SAS1064A	0x005C
162#endif
163
164#ifndef PCI_PRODUCT_LSI_SAS1064E
165#define PCI_PRODUCT_LSI_SAS1064E	0x0056
166#endif
167
168#ifndef PCI_PRODUCT_LSI_SAS1066
169#define PCI_PRODUCT_LSI_SAS1066		0x005E
170#endif
171
172#ifndef PCI_PRODUCT_LSI_SAS1066E
173#define PCI_PRODUCT_LSI_SAS1066E	0x005A
174#endif
175
176#ifndef PCI_PRODUCT_LSI_SAS1068
177#define PCI_PRODUCT_LSI_SAS1068		0x0054
178#endif
179
180#ifndef PCI_PRODUCT_LSI_SAS1068E
181#define PCI_PRODUCT_LSI_SAS1068E	0x0058
182#endif
183
184#ifndef PCI_PRODUCT_LSI_SAS1078
185#define PCI_PRODUCT_LSI_SAS1078		0x0060
186#endif
187
188#ifndef	PCIM_CMD_SERRESPEN
189#define	PCIM_CMD_SERRESPEN	0x0100
190#endif
191
192
193#define	MPT_IO_BAR	0
194#define	MPT_MEM_BAR	1
195
196static int mpt_pci_probe(device_t);
197static int mpt_pci_attach(device_t);
198static void mpt_free_bus_resources(struct mpt_softc *mpt);
199static int mpt_pci_detach(device_t);
200static int mpt_pci_shutdown(device_t);
201static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
202static void mpt_dma_mem_free(struct mpt_softc *mpt);
203static void mpt_read_config_regs(struct mpt_softc *mpt);
204static void mpt_pci_intr(void *);
205
206static device_method_t mpt_methods[] = {
207	/* Device interface */
208	DEVMETHOD(device_probe,		mpt_pci_probe),
209	DEVMETHOD(device_attach,	mpt_pci_attach),
210	DEVMETHOD(device_detach,	mpt_pci_detach),
211	DEVMETHOD(device_shutdown,	mpt_pci_shutdown),
212	{ 0, 0 }
213};
214
215static driver_t mpt_driver = {
216	"mpt", mpt_methods, sizeof(struct mpt_softc)
217};
218static devclass_t mpt_devclass;
219DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
220MODULE_DEPEND(mpt, pci, 1, 1, 1);
221MODULE_VERSION(mpt, 1);
222
223static int
224mpt_pci_probe(device_t dev)
225{
226	char *desc;
227
228	if (pci_get_vendor(dev) != PCI_VENDOR_LSI) {
229		return (ENXIO);
230	}
231
232	switch ((pci_get_device(dev) & ~1)) {
233	case PCI_PRODUCT_LSI_FC909:
234		desc = "LSILogic FC909 FC Adapter";
235		break;
236	case PCI_PRODUCT_LSI_FC909A:
237		desc = "LSILogic FC909A FC Adapter";
238		break;
239	case PCI_PRODUCT_LSI_FC919:
240		desc = "LSILogic FC919 FC Adapter";
241		break;
242	case PCI_PRODUCT_LSI_FC929:
243		desc = "Dual LSILogic FC929 FC Adapter";
244		break;
245	case PCI_PRODUCT_LSI_FC919X:
246		desc = "LSILogic FC919 FC PCI-X Adapter";
247		break;
248	case PCI_PRODUCT_LSI_FC929X:
249		desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
250		break;
251	case PCI_PRODUCT_LSI_FC646:
252		desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
253		break;
254	case PCI_PRODUCT_LSI_FC7X04X:
255		desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
256		break;
257	case PCI_PRODUCT_LSI_1030:
258		desc = "LSILogic 1030 Ultra4 Adapter";
259		break;
260	case PCI_PRODUCT_LSI_SAS1064:
261	case PCI_PRODUCT_LSI_SAS1064A:
262	case PCI_PRODUCT_LSI_SAS1064E:
263	case PCI_PRODUCT_LSI_SAS1066:
264	case PCI_PRODUCT_LSI_SAS1066E:
265	case PCI_PRODUCT_LSI_SAS1068:
266	case PCI_PRODUCT_LSI_SAS1068E:
267	case PCI_PRODUCT_LSI_SAS1078:
268		desc = "LSILogic SAS/SATA Adapter";
269		break;
270	default:
271		return (ENXIO);
272	}
273
274	device_set_desc(dev, desc);
275	return (0);
276}
277
278#if	__FreeBSD_version < 500000
279static void
280mpt_set_options(struct mpt_softc *mpt)
281{
282	int bitmap;
283
284	bitmap = 0;
285	if (getenv_int("mpt_disable", &bitmap)) {
286		if (bitmap & (1 << mpt->unit)) {
287			mpt->disabled = 1;
288		}
289	}
290	bitmap = 0;
291	if (getenv_int("mpt_debug", &bitmap)) {
292		if (bitmap & (1 << mpt->unit)) {
293			mpt->verbose = MPT_PRT_DEBUG;
294		}
295	}
296	bitmap = 0;
297	if (getenv_int("mpt_debug1", &bitmap)) {
298		if (bitmap & (1 << mpt->unit)) {
299			mpt->verbose = MPT_PRT_DEBUG1;
300		}
301	}
302	bitmap = 0;
303	if (getenv_int("mpt_debug2", &bitmap)) {
304		if (bitmap & (1 << mpt->unit)) {
305			mpt->verbose = MPT_PRT_DEBUG2;
306		}
307	}
308	bitmap = 0;
309	if (getenv_int("mpt_debug3", &bitmap)) {
310		if (bitmap & (1 << mpt->unit)) {
311			mpt->verbose = MPT_PRT_DEBUG3;
312		}
313	}
314
315	mpt->cfg_role = MPT_ROLE_DEFAULT;
316	bitmap = 0;
317	if (getenv_int("mpt_nil_role", &bitmap)) {
318		if (bitmap & (1 << mpt->unit)) {
319			mpt->cfg_role = 0;
320		}
321		mpt->do_cfg_role = 1;
322	}
323	bitmap = 0;
324	if (getenv_int("mpt_tgt_role", &bitmap)) {
325		if (bitmap & (1 << mpt->unit)) {
326			mpt->cfg_role |= MPT_ROLE_TARGET;
327		}
328		mpt->do_cfg_role = 1;
329	}
330	bitmap = 0;
331	if (getenv_int("mpt_ini_role", &bitmap)) {
332		if (bitmap & (1 << mpt->unit)) {
333			mpt->cfg_role |= MPT_ROLE_INITIATOR;
334		}
335		mpt->do_cfg_role = 1;
336	}
337	mpt->msi_enable = 0;
338}
339#else
340static void
341mpt_set_options(struct mpt_softc *mpt)
342{
343	int tval;
344
345	tval = 0;
346	if (resource_int_value(device_get_name(mpt->dev),
347	    device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
348		mpt->disabled = 1;
349	}
350	tval = 0;
351	if (resource_int_value(device_get_name(mpt->dev),
352	    device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
353		mpt->verbose = tval;
354	}
355	tval = -1;
356	if (resource_int_value(device_get_name(mpt->dev),
357	    device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 &&
358	    tval <= 3) {
359		mpt->cfg_role = tval;
360		mpt->do_cfg_role = 1;
361	}
362
363	tval = 0;
364	mpt->msi_enable = 0;
365	if (resource_int_value(device_get_name(mpt->dev),
366	    device_get_unit(mpt->dev), "msi_enable", &tval) == 0 && tval == 1) {
367		mpt->msi_enable = 1;
368	}
369}
370#endif
371
372
373static void
374mpt_link_peer(struct mpt_softc *mpt)
375{
376	struct mpt_softc *mpt2;
377
378	if (mpt->unit == 0) {
379		return;
380	}
381	/*
382	 * XXX: depends on probe order
383	 */
384	mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
385
386	if (mpt2 == NULL) {
387		return;
388	}
389	if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
390		return;
391	}
392	if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
393		return;
394	}
395	mpt->mpt2 = mpt2;
396	mpt2->mpt2 = mpt;
397	if (mpt->verbose >= MPT_PRT_DEBUG) {
398		mpt_prt(mpt, "linking with peer (mpt%d)\n",
399		    device_get_unit(mpt2->dev));
400	}
401}
402
403static void
404mpt_unlink_peer(struct mpt_softc *mpt)
405{
406	if (mpt->mpt2) {
407		mpt->mpt2->mpt2 = NULL;
408	}
409}
410
411
412static int
413mpt_pci_attach(device_t dev)
414{
415	struct mpt_softc *mpt;
416	int		  iqd;
417	uint32_t	  data, cmd;
418
419	/* Allocate the softc structure */
420	mpt  = (struct mpt_softc*)device_get_softc(dev);
421	if (mpt == NULL) {
422		device_printf(dev, "cannot allocate softc\n");
423		return (ENOMEM);
424	}
425	memset(mpt, 0, sizeof(struct mpt_softc));
426	switch ((pci_get_device(dev) & ~1)) {
427	case PCI_PRODUCT_LSI_FC909:
428	case PCI_PRODUCT_LSI_FC909A:
429	case PCI_PRODUCT_LSI_FC919:
430	case PCI_PRODUCT_LSI_FC929:
431	case PCI_PRODUCT_LSI_FC919X:
432	case PCI_PRODUCT_LSI_FC646:
433	case PCI_PRODUCT_LSI_FC7X04X:
434		mpt->is_fc = 1;
435		break;
436	case PCI_PRODUCT_LSI_SAS1064:
437	case PCI_PRODUCT_LSI_SAS1064A:
438	case PCI_PRODUCT_LSI_SAS1064E:
439	case PCI_PRODUCT_LSI_SAS1066:
440	case PCI_PRODUCT_LSI_SAS1066E:
441	case PCI_PRODUCT_LSI_SAS1068:
442	case PCI_PRODUCT_LSI_SAS1068E:
443	case PCI_PRODUCT_LSI_SAS1078:
444		mpt->is_sas = 1;
445		break;
446	default:
447		mpt->is_spi = 1;
448		break;
449	}
450	mpt->dev = dev;
451	mpt->unit = device_get_unit(dev);
452	mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
453	mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
454	mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
455	mpt->verbose = MPT_PRT_NONE;
456	mpt->role = MPT_ROLE_NONE;
457	mpt_set_options(mpt);
458	if (mpt->verbose == MPT_PRT_NONE) {
459		mpt->verbose = MPT_PRT_WARN;
460		/* Print INFO level (if any) if bootverbose is set */
461		mpt->verbose += (bootverbose != 0)? 1 : 0;
462	}
463	/* Make sure memory access decoders are enabled */
464	cmd = pci_read_config(dev, PCIR_COMMAND, 2);
465	if ((cmd & PCIM_CMD_MEMEN) == 0) {
466		device_printf(dev, "Memory accesses disabled");
467		return (ENXIO);
468	}
469
470	/*
471	 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
472	 */
473	cmd |=
474	    PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
475	    PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
476	pci_write_config(dev, PCIR_COMMAND, cmd, 2);
477
478	/*
479	 * Make sure we've disabled the ROM.
480	 */
481	data = pci_read_config(dev, PCIR_BIOS, 4);
482	data &= ~1;
483	pci_write_config(dev, PCIR_BIOS, data, 4);
484
485	/*
486	 * Is this part a dual?
487	 * If so, link with our partner (around yet)
488	 */
489	if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
490	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC646 ||
491	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X ||
492	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
493		mpt_link_peer(mpt);
494	}
495
496	/*
497	 * Set up register access.  PIO mode is required for
498	 * certain reset operations (but must be disabled for
499	 * some cards otherwise).
500	 */
501	mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR);
502	mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT,
503			    &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE);
504	if (mpt->pci_pio_reg == NULL) {
505		device_printf(dev, "unable to map registers in PIO mode\n");
506		goto bad;
507	}
508	mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
509	mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
510
511	/* Allocate kernel virtual memory for the 9x9's Mem0 region */
512	mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR);
513	mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
514			&mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE);
515	if (mpt->pci_reg == NULL) {
516		device_printf(dev, "Unable to memory map registers.\n");
517		if (mpt->is_sas) {
518			device_printf(dev, "Giving Up.\n");
519			goto bad;
520		}
521		device_printf(dev, "Falling back to PIO mode.\n");
522		mpt->pci_st = mpt->pci_pio_st;
523		mpt->pci_sh = mpt->pci_pio_sh;
524	} else {
525		mpt->pci_st = rman_get_bustag(mpt->pci_reg);
526		mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
527	}
528
529	/* Get a handle to the interrupt */
530	iqd = 0;
531	if (mpt->msi_enable) {
532		/*
533		 * First try to alloc an MSI-X message.  If that
534		 * fails, then try to alloc an MSI message instead.
535		 */
536		if (pci_msix_count(dev) == 1) {
537			mpt->pci_msi_count = 1;
538			if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) {
539				iqd = 1;
540			} else {
541				mpt->pci_msi_count = 0;
542			}
543		}
544		if (iqd == 0 && pci_msi_count(dev) == 1) {
545			mpt->pci_msi_count = 1;
546			if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) {
547				iqd = 1;
548			} else {
549				mpt->pci_msi_count = 0;
550			}
551		}
552	}
553	mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
554	    RF_ACTIVE | RF_SHAREABLE);
555	if (mpt->pci_irq == NULL) {
556		device_printf(dev, "could not allocate interrupt\n");
557		goto bad;
558	}
559
560	MPT_LOCK_SETUP(mpt);
561
562	/* Disable interrupts at the part */
563	mpt_disable_ints(mpt);
564
565	/* Register the interrupt handler */
566	if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr,
567	    mpt, &mpt->ih)) {
568		device_printf(dev, "could not setup interrupt\n");
569		goto bad;
570	}
571
572	/* Allocate dma memory */
573/* XXX JGibbs -Should really be done based on IOCFacts. */
574	if (mpt_dma_mem_alloc(mpt)) {
575		mpt_prt(mpt, "Could not allocate DMA memory\n");
576		goto bad;
577	}
578
579	/*
580	 * Save the PCI config register values
581 	 *
582	 * Hard resets are known to screw up the BAR for diagnostic
583	 * memory accesses (Mem1).
584	 *
585	 * Using Mem1 is known to make the chip stop responding to
586	 * configuration space transfers, so we need to save it now
587	 */
588
589	mpt_read_config_regs(mpt);
590
591	/*
592	 * Disable PIO until we need it
593	 */
594	if (mpt->is_sas) {
595		pci_disable_io(dev, SYS_RES_IOPORT);
596	}
597
598	/* Initialize the hardware */
599	if (mpt->disabled == 0) {
600		MPT_LOCK(mpt);
601		if (mpt_attach(mpt) != 0) {
602			MPT_UNLOCK(mpt);
603			goto bad;
604		}
605		MPT_UNLOCK(mpt);
606	} else {
607		mpt_prt(mpt, "device disabled at user request\n");
608		goto bad;
609	}
610
611	mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
612	    dev, SHUTDOWN_PRI_DEFAULT);
613
614	if (mpt->eh == NULL) {
615		mpt_prt(mpt, "shutdown event registration failed\n");
616		MPT_LOCK(mpt);
617		(void) mpt_detach(mpt);
618		MPT_UNLOCK(mpt);
619		goto bad;
620	}
621	KASSERT(MPT_OWNED(mpt) == 0, ("leaving attach with device locked"));
622	return (0);
623
624bad:
625	mpt_dma_mem_free(mpt);
626	mpt_free_bus_resources(mpt);
627	mpt_unlink_peer(mpt);
628
629	MPT_LOCK_DESTROY(mpt);
630
631	/*
632	 * but return zero to preserve unit numbering
633	 */
634	return (0);
635}
636
637/*
638 * Free bus resources
639 */
640static void
641mpt_free_bus_resources(struct mpt_softc *mpt)
642{
643	if (mpt->ih) {
644		bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
645		mpt->ih = 0;
646	}
647
648	if (mpt->pci_irq) {
649		bus_release_resource(mpt->dev, SYS_RES_IRQ,
650		    mpt->pci_msi_count ? 1 : 0, mpt->pci_irq);
651		mpt->pci_irq = 0;
652	}
653
654	if (mpt->pci_msi_count) {
655		pci_release_msi(mpt->dev);
656		mpt->pci_msi_count = 0;
657	}
658
659	if (mpt->pci_pio_reg) {
660		bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid,
661			mpt->pci_pio_reg);
662		mpt->pci_pio_reg = 0;
663	}
664	if (mpt->pci_reg) {
665		bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid,
666			mpt->pci_reg);
667		mpt->pci_reg = 0;
668	}
669	MPT_LOCK_DESTROY(mpt);
670}
671
672
673/*
674 * Disconnect ourselves from the system.
675 */
676static int
677mpt_pci_detach(device_t dev)
678{
679	struct mpt_softc *mpt;
680
681	mpt  = (struct mpt_softc*)device_get_softc(dev);
682
683	if (mpt) {
684		MPT_LOCK(mpt);
685		mpt_disable_ints(mpt);
686		mpt_detach(mpt);
687		mpt_reset(mpt, /*reinit*/FALSE);
688		mpt_dma_mem_free(mpt);
689		mpt_free_bus_resources(mpt);
690		mpt_raid_free_mem(mpt);
691		if (mpt->eh != NULL) {
692                        EVENTHANDLER_DEREGISTER(shutdown_final, mpt->eh);
693		}
694		MPT_UNLOCK(mpt);
695	}
696	return(0);
697}
698
699
700/*
701 * Disable the hardware
702 */
703static int
704mpt_pci_shutdown(device_t dev)
705{
706	struct mpt_softc *mpt;
707
708	mpt = (struct mpt_softc *)device_get_softc(dev);
709	if (mpt) {
710		int r;
711		MPT_LOCK(mpt);
712		r = mpt_shutdown(mpt);
713		MPT_UNLOCK(mpt);
714		return (r);
715	}
716	return(0);
717}
718
719static int
720mpt_dma_mem_alloc(struct mpt_softc *mpt)
721{
722	int i, error, nsegs;
723	uint8_t *vptr;
724	uint32_t pptr, end;
725	size_t len;
726	struct mpt_map_info mi;
727
728	/* Check if we alreay have allocated the reply memory */
729	if (mpt->reply_phys != 0) {
730		return 0;
731	}
732
733	len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
734#ifdef	RELENG_4
735	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
736	if (mpt->request_pool == NULL) {
737		mpt_prt(mpt, "cannot allocate request pool\n");
738		return (1);
739	}
740	memset(mpt->request_pool, 0, len);
741#else
742	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
743	if (mpt->request_pool == NULL) {
744		mpt_prt(mpt, "cannot allocate request pool\n");
745		return (1);
746	}
747#endif
748
749	/*
750	 * Create a parent dma tag for this device.
751	 *
752	 * Align at byte boundaries,
753	 * Limit to 32-bit addressing for request/reply queues.
754	 */
755	if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev),
756	    /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
757	    /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
758	    /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
759	    /*nsegments*/BUS_SPACE_MAXSIZE_32BIT,
760	    /*maxsegsz*/BUS_SPACE_UNRESTRICTED, /*flags*/0,
761	    &mpt->parent_dmat) != 0) {
762		mpt_prt(mpt, "cannot create parent dma tag\n");
763		return (1);
764	}
765
766	/* Create a child tag for reply buffers */
767	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
768	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
769	    NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
770	    &mpt->reply_dmat) != 0) {
771		mpt_prt(mpt, "cannot create a dma tag for replies\n");
772		return (1);
773	}
774
775	/* Allocate some DMA accessable memory for replies */
776	if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
777	    BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
778		mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
779		    (u_long) (2 * PAGE_SIZE));
780		return (1);
781	}
782
783	mi.mpt = mpt;
784	mi.error = 0;
785
786	/* Load and lock it into "bus space" */
787	bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
788	    2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
789
790	if (mi.error) {
791		mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
792		    mi.error);
793		return (1);
794	}
795	mpt->reply_phys = mi.phys;
796
797	/* Create a child tag for data buffers */
798
799	/*
800	 * XXX: we should say that nsegs is 'unrestricted, but that
801	 * XXX: tickles a horrible bug in the busdma code. Instead,
802	 * XXX: we'll derive a reasonable segment limit from MAXPHYS
803	 */
804	nsegs = (MAXPHYS / PAGE_SIZE) + 1;
805	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1,
806	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
807	    NULL, NULL, MAXBSIZE, nsegs, BUS_SPACE_MAXSIZE_32BIT, 0,
808	    &mpt->buffer_dmat) != 0) {
809		mpt_prt(mpt, "cannot create a dma tag for data buffers\n");
810		return (1);
811	}
812
813	/* Create a child tag for request buffers */
814	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
815	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
816	    NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0,
817	    &mpt->request_dmat) != 0) {
818		mpt_prt(mpt, "cannot create a dma tag for requests\n");
819		return (1);
820	}
821
822	/* Allocate some DMA accessable memory for requests */
823	if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
824	    BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
825		mpt_prt(mpt, "cannot allocate %d bytes of request memory\n",
826		    MPT_REQ_MEM_SIZE(mpt));
827		return (1);
828	}
829
830	mi.mpt = mpt;
831	mi.error = 0;
832
833	/* Load and lock it into "bus space" */
834        bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
835	    MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0);
836
837	if (mi.error) {
838		mpt_prt(mpt, "error %d loading dma map for DMA request queue\n",
839		    mi.error);
840		return (1);
841	}
842	mpt->request_phys = mi.phys;
843
844	/*
845	 * Now create per-request dma maps
846	 */
847	i = 0;
848	pptr =  mpt->request_phys;
849	vptr =  mpt->request;
850	end = pptr + MPT_REQ_MEM_SIZE(mpt);
851	while(pptr < end) {
852		request_t *req = &mpt->request_pool[i];
853		req->index = i++;
854
855		/* Store location of Request Data */
856		req->req_pbuf = pptr;
857		req->req_vbuf = vptr;
858
859		pptr += MPT_REQUEST_AREA;
860		vptr += MPT_REQUEST_AREA;
861
862		req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
863		req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
864
865		error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
866		if (error) {
867			mpt_prt(mpt, "error %d creating per-cmd DMA maps\n",
868			    error);
869			return (1);
870		}
871	}
872
873	return (0);
874}
875
876
877
878/* Deallocate memory that was allocated by mpt_dma_mem_alloc
879 */
880static void
881mpt_dma_mem_free(struct mpt_softc *mpt)
882{
883	int i;
884
885        /* Make sure we aren't double destroying */
886        if (mpt->reply_dmat == 0) {
887		mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
888		return;
889        }
890
891	for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) {
892		bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap);
893	}
894	bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
895	bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
896	bus_dma_tag_destroy(mpt->request_dmat);
897	bus_dma_tag_destroy(mpt->buffer_dmat);
898	bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
899	bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
900	bus_dma_tag_destroy(mpt->reply_dmat);
901	bus_dma_tag_destroy(mpt->parent_dmat);
902	mpt->reply_dmat = 0;
903	free(mpt->request_pool, M_DEVBUF);
904	mpt->request_pool = 0;
905
906}
907
908
909
910/* Reads modifiable (via PCI transactions) config registers */
911static void
912mpt_read_config_regs(struct mpt_softc *mpt)
913{
914	mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
915	mpt->pci_cfg.LatencyTimer_LineSize =
916	    pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
917	mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
918	mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
919	mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
920	mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
921	mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
922	mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
923	mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
924	mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
925}
926
927/* Sets modifiable config registers */
928void
929mpt_set_config_regs(struct mpt_softc *mpt)
930{
931	uint32_t val;
932
933#define MPT_CHECK(reg, offset, size)					\
934	val = pci_read_config(mpt->dev, offset, size);			\
935	if (mpt->pci_cfg.reg != val) {					\
936		mpt_prt(mpt,						\
937		    "Restoring " #reg " to 0x%X from 0x%X\n",		\
938		    mpt->pci_cfg.reg, val);				\
939	}
940
941	if (mpt->verbose >= MPT_PRT_DEBUG) {
942		MPT_CHECK(Command, PCIR_COMMAND, 2);
943		MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
944		MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
945		MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
946		MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
947		MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
948		MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
949		MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
950		MPT_CHECK(IntLine, PCIR_INTLINE, 1);
951		MPT_CHECK(PMCSR, 0x44, 4);
952	}
953#undef MPT_CHECK
954
955	pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
956	pci_write_config(mpt->dev, PCIR_CACHELNSZ,
957	    mpt->pci_cfg.LatencyTimer_LineSize, 2);
958	pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
959	pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
960	pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
961	pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
962	pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
963	pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
964	pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
965	pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
966}
967
968static void
969mpt_pci_intr(void *arg)
970{
971	struct mpt_softc *mpt;
972
973	mpt = (struct mpt_softc *)arg;
974	MPT_LOCK(mpt);
975	mpt_intr(mpt);
976	MPT_UNLOCK(mpt);
977}
978