mpt_pci.c revision 164417
1/*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * Partially derived from Matt Jacob's ISP driver. 7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 8 * Feral Software 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32/*- 33 * Copyright (c) 2002, 2006 by Matthew Jacob 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions are 38 * met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 42 * substantially similar to the "NO WARRANTY" disclaimer below 43 * ("Disclaimer") and any redistribution must be conditioned upon including 44 * a substantially similar Disclaimer requirement for further binary 45 * redistribution. 46 * 3. Neither the names of the above listed copyright holders nor the names 47 * of any contributors may be used to endorse or promote products derived 48 * from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 * 62 * Support from Chris Ellsworth in order to make SAS adapters work 63 * is gratefully acknowledged. 64 * 65 * Support from LSI-Logic has also gone a great deal toward making this a 66 * workable subsystem and is gratefully acknowledged. 67 */ 68/* 69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 70 * Copyright (c) 2005, WHEEL Sp. z o.o. 71 * Copyright (c) 2004, 2005 Justin T. Gibbs 72 * All rights reserved. 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions are 76 * met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 80 * substantially similar to the "NO WARRANTY" disclaimer below 81 * ("Disclaimer") and any redistribution must be conditioned upon including 82 * a substantially similar Disclaimer requirement for further binary 83 * redistribution. 84 * 3. Neither the names of the above listed copyright holders nor the names 85 * of any contributors may be used to endorse or promote products derived 86 * from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 99 */ 100 101#include <sys/cdefs.h> 102__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 164417 2006-11-19 23:24:52Z mjacob $"); 103 104#include <dev/mpt/mpt.h> 105#include <dev/mpt/mpt_cam.h> 106#include <dev/mpt/mpt_raid.h> 107 108 109#ifndef PCI_VENDOR_LSI 110#define PCI_VENDOR_LSI 0x1000 111#endif 112 113#ifndef PCI_PRODUCT_LSI_FC909 114#define PCI_PRODUCT_LSI_FC909 0x0620 115#endif 116 117#ifndef PCI_PRODUCT_LSI_FC909A 118#define PCI_PRODUCT_LSI_FC909A 0x0621 119#endif 120 121#ifndef PCI_PRODUCT_LSI_FC919 122#define PCI_PRODUCT_LSI_FC919 0x0624 123#endif 124 125#ifndef PCI_PRODUCT_LSI_FC929 126#define PCI_PRODUCT_LSI_FC929 0x0622 127#endif 128 129#ifndef PCI_PRODUCT_LSI_FC929X 130#define PCI_PRODUCT_LSI_FC929X 0x0626 131#endif 132 133#ifndef PCI_PRODUCT_LSI_FC919X 134#define PCI_PRODUCT_LSI_FC919X 0x0628 135#endif 136 137#ifndef PCI_PRODUCT_LSI_FC7X04X 138#define PCI_PRODUCT_LSI_FC7X04X 0x0640 139#endif 140 141#ifndef PCI_PRODUCT_LSI_FC646 142#define PCI_PRODUCT_LSI_FC646 0x0646 143#endif 144 145#ifndef PCI_PRODUCT_LSI_1030 146#define PCI_PRODUCT_LSI_1030 0x0030 147#endif 148 149#ifndef PCI_PRODUCT_LSI_SAS1064 150#define PCI_PRODUCT_LSI_SAS1064 0x0050 151#endif 152 153#ifndef PCI_PRODUCT_LSI_SAS1064A 154#define PCI_PRODUCT_LSI_SAS1064A 0x005C 155#endif 156 157#ifndef PCI_PRODUCT_LSI_SAS1064E 158#define PCI_PRODUCT_LSI_SAS1064E 0x0056 159#endif 160 161#ifndef PCI_PRODUCT_LSI_SAS1066 162#define PCI_PRODUCT_LSI_SAS1066 0x005E 163#endif 164 165#ifndef PCI_PRODUCT_LSI_SAS1066E 166#define PCI_PRODUCT_LSI_SAS1066E 0x005A 167#endif 168 169#ifndef PCI_PRODUCT_LSI_SAS1068 170#define PCI_PRODUCT_LSI_SAS1068 0x0054 171#endif 172 173#ifndef PCI_PRODUCT_LSI_SAS1068E 174#define PCI_PRODUCT_LSI_SAS1068E 0x0058 175#endif 176 177#ifndef PCI_PRODUCT_LSI_SAS1078 178#define PCI_PRODUCT_LSI_SAS1078 0x0060 179#endif 180 181#ifndef PCIM_CMD_SERRESPEN 182#define PCIM_CMD_SERRESPEN 0x0100 183#endif 184 185 186#define MPT_IO_BAR 0 187#define MPT_MEM_BAR 1 188 189static int mpt_pci_probe(device_t); 190static int mpt_pci_attach(device_t); 191static void mpt_free_bus_resources(struct mpt_softc *mpt); 192static int mpt_pci_detach(device_t); 193static int mpt_pci_shutdown(device_t); 194static int mpt_dma_mem_alloc(struct mpt_softc *mpt); 195static void mpt_dma_mem_free(struct mpt_softc *mpt); 196static void mpt_read_config_regs(struct mpt_softc *mpt); 197static void mpt_pci_intr(void *); 198 199static device_method_t mpt_methods[] = { 200 /* Device interface */ 201 DEVMETHOD(device_probe, mpt_pci_probe), 202 DEVMETHOD(device_attach, mpt_pci_attach), 203 DEVMETHOD(device_detach, mpt_pci_detach), 204 DEVMETHOD(device_shutdown, mpt_pci_shutdown), 205 { 0, 0 } 206}; 207 208static driver_t mpt_driver = { 209 "mpt", mpt_methods, sizeof(struct mpt_softc) 210}; 211static devclass_t mpt_devclass; 212DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0); 213MODULE_VERSION(mpt, 1); 214 215static int 216mpt_pci_probe(device_t dev) 217{ 218 char *desc; 219 220 if (pci_get_vendor(dev) != PCI_VENDOR_LSI) { 221 return (ENXIO); 222 } 223 224 switch ((pci_get_device(dev) & ~1)) { 225 case PCI_PRODUCT_LSI_FC909: 226 desc = "LSILogic FC909 FC Adapter"; 227 break; 228 case PCI_PRODUCT_LSI_FC909A: 229 desc = "LSILogic FC909A FC Adapter"; 230 break; 231 case PCI_PRODUCT_LSI_FC919: 232 desc = "LSILogic FC919 FC Adapter"; 233 break; 234 case PCI_PRODUCT_LSI_FC929: 235 desc = "Dual LSILogic FC929 FC Adapter"; 236 break; 237 case PCI_PRODUCT_LSI_FC919X: 238 desc = "LSILogic FC919 FC PCI-X Adapter"; 239 break; 240 case PCI_PRODUCT_LSI_FC929X: 241 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter"; 242 break; 243 case PCI_PRODUCT_LSI_FC646: 244 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter"; 245 break; 246 case PCI_PRODUCT_LSI_FC7X04X: 247 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter"; 248 break; 249 case PCI_PRODUCT_LSI_1030: 250 desc = "LSILogic 1030 Ultra4 Adapter"; 251 break; 252 case PCI_PRODUCT_LSI_SAS1064: 253 case PCI_PRODUCT_LSI_SAS1064A: 254 case PCI_PRODUCT_LSI_SAS1064E: 255 case PCI_PRODUCT_LSI_SAS1066: 256 case PCI_PRODUCT_LSI_SAS1066E: 257 case PCI_PRODUCT_LSI_SAS1068: 258 case PCI_PRODUCT_LSI_SAS1068E: 259 case PCI_PRODUCT_LSI_SAS1078: 260 desc = "LSILogic SAS/SATA Adapter"; 261 break; 262 default: 263 return (ENXIO); 264 } 265 266 device_set_desc(dev, desc); 267 return (0); 268} 269 270#if __FreeBSD_version < 500000 271static void 272mpt_set_options(struct mpt_softc *mpt) 273{ 274 int bitmap; 275 276 bitmap = 0; 277 if (getenv_int("mpt_disable", &bitmap)) { 278 if (bitmap & (1 << mpt->unit)) { 279 mpt->disabled = 1; 280 } 281 } 282 bitmap = 0; 283 if (getenv_int("mpt_debug", &bitmap)) { 284 if (bitmap & (1 << mpt->unit)) { 285 mpt->verbose = MPT_PRT_DEBUG; 286 } 287 } 288 bitmap = 0; 289 if (getenv_int("mpt_debug1", &bitmap)) { 290 if (bitmap & (1 << mpt->unit)) { 291 mpt->verbose = MPT_PRT_DEBUG1; 292 } 293 } 294 bitmap = 0; 295 if (getenv_int("mpt_debug2", &bitmap)) { 296 if (bitmap & (1 << mpt->unit)) { 297 mpt->verbose = MPT_PRT_DEBUG2; 298 } 299 } 300 bitmap = 0; 301 if (getenv_int("mpt_debug3", &bitmap)) { 302 if (bitmap & (1 << mpt->unit)) { 303 mpt->verbose = MPT_PRT_DEBUG3; 304 } 305 } 306 307 mpt->cfg_role = MPT_ROLE_DEFAULT; 308 bitmap = 0; 309 if (getenv_int("mpt_nil_role", &bitmap)) { 310 if (bitmap & (1 << mpt->unit)) { 311 mpt->cfg_role = 0; 312 } 313 mpt->do_cfg_role = 1; 314 } 315 bitmap = 0; 316 if (getenv_int("mpt_tgt_role", &bitmap)) { 317 if (bitmap & (1 << mpt->unit)) { 318 mpt->cfg_role |= MPT_ROLE_TARGET; 319 } 320 mpt->do_cfg_role = 1; 321 } 322 bitmap = 0; 323 if (getenv_int("mpt_ini_role", &bitmap)) { 324 if (bitmap & (1 << mpt->unit)) { 325 mpt->cfg_role |= MPT_ROLE_INITIATOR; 326 } 327 mpt->do_cfg_role = 1; 328 } 329 330 mpt->msi_enable = 0; 331} 332#else 333static void 334mpt_set_options(struct mpt_softc *mpt) 335{ 336 int tval; 337 338 tval = 0; 339 if (resource_int_value(device_get_name(mpt->dev), 340 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) { 341 mpt->disabled = 1; 342 } 343 tval = 0; 344 if (resource_int_value(device_get_name(mpt->dev), 345 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 346 mpt->verbose = tval; 347 } 348 tval = -1; 349 if (resource_int_value(device_get_name(mpt->dev), 350 device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 && 351 tval <= 3) { 352 mpt->cfg_role = tval; 353 mpt->do_cfg_role = 1; 354 } 355 356 tval = 0; 357 mpt->msi_enable = 0; 358 if (resource_int_value(device_get_name(mpt->dev), 359 device_get_unit(mpt->dev), "msi_enable", &tval) == 0 && tval == 1) { 360 mpt->msi_enable = 1; 361 } 362} 363#endif 364 365 366static void 367mpt_link_peer(struct mpt_softc *mpt) 368{ 369 struct mpt_softc *mpt2; 370 371 if (mpt->unit == 0) { 372 return; 373 } 374 /* 375 * XXX: depends on probe order 376 */ 377 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1); 378 379 if (mpt2 == NULL) { 380 return; 381 } 382 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 383 return; 384 } 385 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 386 return; 387 } 388 mpt->mpt2 = mpt2; 389 mpt2->mpt2 = mpt; 390 if (mpt->verbose >= MPT_PRT_DEBUG) { 391 mpt_prt(mpt, "linking with peer (mpt%d)\n", 392 device_get_unit(mpt2->dev)); 393 } 394} 395 396static void 397mpt_unlink_peer(struct mpt_softc *mpt) 398{ 399 if (mpt->mpt2) { 400 mpt->mpt2->mpt2 = NULL; 401 } 402} 403 404 405static int 406mpt_pci_attach(device_t dev) 407{ 408 struct mpt_softc *mpt; 409 int iqd; 410 uint32_t data, cmd; 411 412 /* Allocate the softc structure */ 413 mpt = (struct mpt_softc*)device_get_softc(dev); 414 if (mpt == NULL) { 415 device_printf(dev, "cannot allocate softc\n"); 416 return (ENOMEM); 417 } 418 memset(mpt, 0, sizeof(struct mpt_softc)); 419 switch ((pci_get_device(dev) & ~1)) { 420 case PCI_PRODUCT_LSI_FC909: 421 case PCI_PRODUCT_LSI_FC909A: 422 case PCI_PRODUCT_LSI_FC919: 423 case PCI_PRODUCT_LSI_FC929: 424 case PCI_PRODUCT_LSI_FC919X: 425 case PCI_PRODUCT_LSI_FC646: 426 case PCI_PRODUCT_LSI_FC7X04X: 427 mpt->is_fc = 1; 428 break; 429 case PCI_PRODUCT_LSI_SAS1064: 430 case PCI_PRODUCT_LSI_SAS1064A: 431 case PCI_PRODUCT_LSI_SAS1064E: 432 case PCI_PRODUCT_LSI_SAS1066: 433 case PCI_PRODUCT_LSI_SAS1066E: 434 case PCI_PRODUCT_LSI_SAS1068: 435 case PCI_PRODUCT_LSI_SAS1068E: 436 case PCI_PRODUCT_LSI_SAS1078: 437 mpt->is_sas = 1; 438 break; 439 default: 440 mpt->is_spi = 1; 441 break; 442 } 443 mpt->dev = dev; 444 mpt->unit = device_get_unit(dev); 445 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT; 446 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT; 447 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT; 448 mpt->verbose = MPT_PRT_NONE; 449 mpt->role = MPT_ROLE_NONE; 450 mpt_set_options(mpt); 451 if (mpt->verbose == MPT_PRT_NONE) { 452 mpt->verbose = MPT_PRT_WARN; 453 /* Print INFO level (if any) if bootverbose is set */ 454 mpt->verbose += (bootverbose != 0)? 1 : 0; 455 } 456 /* Make sure memory access decoders are enabled */ 457 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 458 if ((cmd & PCIM_CMD_MEMEN) == 0) { 459 device_printf(dev, "Memory accesses disabled"); 460 return (ENXIO); 461 } 462 463 /* 464 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 465 */ 466 cmd |= 467 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 468 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 469 pci_write_config(dev, PCIR_COMMAND, cmd, 2); 470 471 /* 472 * Make sure we've disabled the ROM. 473 */ 474 data = pci_read_config(dev, PCIR_BIOS, 4); 475 data &= ~1; 476 pci_write_config(dev, PCIR_BIOS, data, 4); 477 478 /* 479 * Is this part a dual? 480 * If so, link with our partner (around yet) 481 */ 482 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 || 483 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC646 || 484 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X || 485 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) { 486 mpt_link_peer(mpt); 487 } 488 489 /* 490 * Set up register access. PIO mode is required for 491 * certain reset operations (but must be disabled for 492 * some cards otherwise). 493 */ 494 mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR); 495 mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT, 496 &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE); 497 if (mpt->pci_pio_reg == NULL) { 498 device_printf(dev, "unable to map registers in PIO mode\n"); 499 goto bad; 500 } 501 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg); 502 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg); 503 504 /* Allocate kernel virtual memory for the 9x9's Mem0 region */ 505 mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR); 506 mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY, 507 &mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE); 508 if (mpt->pci_reg == NULL) { 509 device_printf(dev, "Unable to memory map registers.\n"); 510 if (mpt->is_sas) { 511 device_printf(dev, "Giving Up.\n"); 512 goto bad; 513 } 514 device_printf(dev, "Falling back to PIO mode.\n"); 515 mpt->pci_st = mpt->pci_pio_st; 516 mpt->pci_sh = mpt->pci_pio_sh; 517 } else { 518 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 519 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 520 } 521 522 /* Get a handle to the interrupt */ 523 iqd = 0; 524 if (mpt->msi_enable && pci_msi_count(dev) == 1) { 525 mpt->pci_msi_count = 1; 526 if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) { 527 iqd = 1; 528 } else { 529 mpt->pci_msi_count = 0; 530 } 531 } 532 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 533 RF_ACTIVE | RF_SHAREABLE); 534 if (mpt->pci_irq == NULL) { 535 device_printf(dev, "could not allocate interrupt\n"); 536 goto bad; 537 } 538 539 MPT_LOCK_SETUP(mpt); 540 541 /* Disable interrupts at the part */ 542 mpt_disable_ints(mpt); 543 544 /* Register the interrupt handler */ 545 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr, 546 mpt, &mpt->ih)) { 547 device_printf(dev, "could not setup interrupt\n"); 548 goto bad; 549 } 550 551 /* Allocate dma memory */ 552/* XXX JGibbs -Should really be done based on IOCFacts. */ 553 if (mpt_dma_mem_alloc(mpt)) { 554 mpt_prt(mpt, "Could not allocate DMA memory\n"); 555 goto bad; 556 } 557 558 /* 559 * Save the PCI config register values 560 * 561 * Hard resets are known to screw up the BAR for diagnostic 562 * memory accesses (Mem1). 563 * 564 * Using Mem1 is known to make the chip stop responding to 565 * configuration space transfers, so we need to save it now 566 */ 567 568 mpt_read_config_regs(mpt); 569 570 /* 571 * Disable PIO until we need it 572 */ 573 if (mpt->is_sas) { 574 pci_disable_io(dev, SYS_RES_IOPORT); 575 } 576 577 /* Initialize the hardware */ 578 if (mpt->disabled == 0) { 579 MPT_LOCK(mpt); 580 if (mpt_attach(mpt) != 0) { 581 MPT_UNLOCK(mpt); 582 goto bad; 583 } 584 MPT_UNLOCK(mpt); 585 } else { 586 mpt_prt(mpt, "device disabled at user request\n"); 587 goto bad; 588 } 589 590 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown, 591 dev, SHUTDOWN_PRI_DEFAULT); 592 593 if (mpt->eh == NULL) { 594 mpt_prt(mpt, "shutdown event registration failed\n"); 595 MPT_LOCK(mpt); 596 (void) mpt_detach(mpt); 597 MPT_UNLOCK(mpt); 598 goto bad; 599 } 600 KASSERT(MPT_OWNED(mpt) == 0, ("leaving attach with device locked")); 601 return (0); 602 603bad: 604 mpt_dma_mem_free(mpt); 605 mpt_free_bus_resources(mpt); 606 mpt_unlink_peer(mpt); 607 608 MPT_LOCK_DESTROY(mpt); 609 610 /* 611 * but return zero to preserve unit numbering 612 */ 613 return (0); 614} 615 616/* 617 * Free bus resources 618 */ 619static void 620mpt_free_bus_resources(struct mpt_softc *mpt) 621{ 622 if (mpt->ih) { 623 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 624 mpt->ih = 0; 625 } 626 627 if (mpt->pci_irq) { 628 bus_release_resource(mpt->dev, SYS_RES_IRQ, 629 mpt->pci_msi_count ? 1 : 0, mpt->pci_irq); 630 mpt->pci_irq = 0; 631 } 632 633 if (mpt->pci_msi_count) { 634 pci_release_msi(mpt->dev); 635 mpt->pci_msi_count = 0; 636 } 637 638 if (mpt->pci_pio_reg) { 639 bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid, 640 mpt->pci_pio_reg); 641 mpt->pci_pio_reg = 0; 642 } 643 if (mpt->pci_reg) { 644 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid, 645 mpt->pci_reg); 646 mpt->pci_reg = 0; 647 } 648 MPT_LOCK_DESTROY(mpt); 649} 650 651 652/* 653 * Disconnect ourselves from the system. 654 */ 655static int 656mpt_pci_detach(device_t dev) 657{ 658 struct mpt_softc *mpt; 659 660 mpt = (struct mpt_softc*)device_get_softc(dev); 661 662 if (mpt) { 663 MPT_LOCK(mpt); 664 mpt_disable_ints(mpt); 665 mpt_detach(mpt); 666 mpt_reset(mpt, /*reinit*/FALSE); 667 mpt_dma_mem_free(mpt); 668 mpt_free_bus_resources(mpt); 669 mpt_raid_free_mem(mpt); 670 if (mpt->eh != NULL) { 671 EVENTHANDLER_DEREGISTER(shutdown_final, mpt->eh); 672 } 673 MPT_UNLOCK(mpt); 674 } 675 return(0); 676} 677 678 679/* 680 * Disable the hardware 681 */ 682static int 683mpt_pci_shutdown(device_t dev) 684{ 685 struct mpt_softc *mpt; 686 687 mpt = (struct mpt_softc *)device_get_softc(dev); 688 if (mpt) { 689 int r; 690 MPT_LOCK(mpt); 691 r = mpt_shutdown(mpt); 692 MPT_UNLOCK(mpt); 693 return (r); 694 } 695 return(0); 696} 697 698static int 699mpt_dma_mem_alloc(struct mpt_softc *mpt) 700{ 701 int i, error, nsegs; 702 uint8_t *vptr; 703 uint32_t pptr, end; 704 size_t len; 705 struct mpt_map_info mi; 706 707 /* Check if we alreay have allocated the reply memory */ 708 if (mpt->reply_phys != 0) { 709 return 0; 710 } 711 712 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt); 713#ifdef RELENG_4 714 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK); 715 if (mpt->request_pool == NULL) { 716 mpt_prt(mpt, "cannot allocate request pool\n"); 717 return (1); 718 } 719 memset(mpt->request_pool, 0, len); 720#else 721 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO); 722 if (mpt->request_pool == NULL) { 723 mpt_prt(mpt, "cannot allocate request pool\n"); 724 return (1); 725 } 726#endif 727 728 /* 729 * Create a parent dma tag for this device. 730 * 731 * Align at byte boundaries, 732 * Limit to 32-bit addressing for request/reply queues. 733 */ 734 if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev), 735 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR, 736 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 737 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 738 /*nsegments*/BUS_SPACE_MAXSIZE_32BIT, 739 /*maxsegsz*/BUS_SPACE_UNRESTRICTED, /*flags*/0, 740 &mpt->parent_dmat) != 0) { 741 mpt_prt(mpt, "cannot create parent dma tag\n"); 742 return (1); 743 } 744 745 /* Create a child tag for reply buffers */ 746 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 747 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 748 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 749 &mpt->reply_dmat) != 0) { 750 mpt_prt(mpt, "cannot create a dma tag for replies\n"); 751 return (1); 752 } 753 754 /* Allocate some DMA accessable memory for replies */ 755 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 756 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 757 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n", 758 (u_long) (2 * PAGE_SIZE)); 759 return (1); 760 } 761 762 mi.mpt = mpt; 763 mi.error = 0; 764 765 /* Load and lock it into "bus space" */ 766 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 767 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0); 768 769 if (mi.error) { 770 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n", 771 mi.error); 772 return (1); 773 } 774 mpt->reply_phys = mi.phys; 775 776 /* Create a child tag for data buffers */ 777 778 /* 779 * XXX: we should say that nsegs is 'unrestricted, but that 780 * XXX: tickles a horrible bug in the busdma code. Instead, 781 * XXX: we'll derive a reasonable segment limit from MAXPHYS 782 */ 783 nsegs = (MAXPHYS / PAGE_SIZE) + 1; 784 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1, 785 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 786 NULL, NULL, MAXBSIZE, nsegs, BUS_SPACE_MAXSIZE_32BIT, 0, 787 &mpt->buffer_dmat) != 0) { 788 mpt_prt(mpt, "cannot create a dma tag for data buffers\n"); 789 return (1); 790 } 791 792 /* Create a child tag for request buffers */ 793 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 794 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 795 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0, 796 &mpt->request_dmat) != 0) { 797 mpt_prt(mpt, "cannot create a dma tag for requests\n"); 798 return (1); 799 } 800 801 /* Allocate some DMA accessable memory for requests */ 802 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request, 803 BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) { 804 mpt_prt(mpt, "cannot allocate %d bytes of request memory\n", 805 MPT_REQ_MEM_SIZE(mpt)); 806 return (1); 807 } 808 809 mi.mpt = mpt; 810 mi.error = 0; 811 812 /* Load and lock it into "bus space" */ 813 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request, 814 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0); 815 816 if (mi.error) { 817 mpt_prt(mpt, "error %d loading dma map for DMA request queue\n", 818 mi.error); 819 return (1); 820 } 821 mpt->request_phys = mi.phys; 822 823 /* 824 * Now create per-request dma maps 825 */ 826 i = 0; 827 pptr = mpt->request_phys; 828 vptr = mpt->request; 829 end = pptr + MPT_REQ_MEM_SIZE(mpt); 830 while(pptr < end) { 831 request_t *req = &mpt->request_pool[i]; 832 req->index = i++; 833 834 /* Store location of Request Data */ 835 req->req_pbuf = pptr; 836 req->req_vbuf = vptr; 837 838 pptr += MPT_REQUEST_AREA; 839 vptr += MPT_REQUEST_AREA; 840 841 req->sense_pbuf = (pptr - MPT_SENSE_SIZE); 842 req->sense_vbuf = (vptr - MPT_SENSE_SIZE); 843 844 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap); 845 if (error) { 846 mpt_prt(mpt, "error %d creating per-cmd DMA maps\n", 847 error); 848 return (1); 849 } 850 } 851 852 return (0); 853} 854 855 856 857/* Deallocate memory that was allocated by mpt_dma_mem_alloc 858 */ 859static void 860mpt_dma_mem_free(struct mpt_softc *mpt) 861{ 862 int i; 863 864 /* Make sure we aren't double destroying */ 865 if (mpt->reply_dmat == 0) { 866 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n"); 867 return; 868 } 869 870 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) { 871 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap); 872 } 873 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap); 874 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap); 875 bus_dma_tag_destroy(mpt->request_dmat); 876 bus_dma_tag_destroy(mpt->buffer_dmat); 877 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 878 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 879 bus_dma_tag_destroy(mpt->reply_dmat); 880 bus_dma_tag_destroy(mpt->parent_dmat); 881 mpt->reply_dmat = 0; 882 free(mpt->request_pool, M_DEVBUF); 883 mpt->request_pool = 0; 884 885} 886 887 888 889/* Reads modifiable (via PCI transactions) config registers */ 890static void 891mpt_read_config_regs(struct mpt_softc *mpt) 892{ 893 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 894 mpt->pci_cfg.LatencyTimer_LineSize = 895 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 896 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 897 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 898 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 899 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 900 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 901 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 902 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 903 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 904} 905 906/* Sets modifiable config registers */ 907void 908mpt_set_config_regs(struct mpt_softc *mpt) 909{ 910 uint32_t val; 911 912#define MPT_CHECK(reg, offset, size) \ 913 val = pci_read_config(mpt->dev, offset, size); \ 914 if (mpt->pci_cfg.reg != val) { \ 915 mpt_prt(mpt, \ 916 "Restoring " #reg " to 0x%X from 0x%X\n", \ 917 mpt->pci_cfg.reg, val); \ 918 } 919 920 if (mpt->verbose >= MPT_PRT_DEBUG) { 921 MPT_CHECK(Command, PCIR_COMMAND, 2); 922 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 923 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 924 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 925 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 926 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 927 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 928 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 929 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 930 MPT_CHECK(PMCSR, 0x44, 4); 931 } 932#undef MPT_CHECK 933 934 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 935 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 936 mpt->pci_cfg.LatencyTimer_LineSize, 2); 937 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 938 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 939 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 940 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 941 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 942 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 943 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 944 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 945} 946 947static void 948mpt_pci_intr(void *arg) 949{ 950 struct mpt_softc *mpt; 951 952 mpt = (struct mpt_softc *)arg; 953 MPT_LOCK(mpt); 954 mpt_intr(mpt); 955 MPT_UNLOCK(mpt); 956} 957