mpt_pci.c revision 164305
1/*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * Partially derived from Matt Jacob's ISP driver. 7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 8 * Feral Software 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32/*- 33 * Copyright (c) 2002, 2006 by Matthew Jacob 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions are 38 * met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 42 * substantially similar to the "NO WARRANTY" disclaimer below 43 * ("Disclaimer") and any redistribution must be conditioned upon including 44 * a substantially similar Disclaimer requirement for further binary 45 * redistribution. 46 * 3. Neither the names of the above listed copyright holders nor the names 47 * of any contributors may be used to endorse or promote products derived 48 * from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 * 62 * Support from Chris Ellsworth in order to make SAS adapters work 63 * is gratefully acknowledged. 64 * 65 * Support from LSI-Logic has also gone a great deal toward making this a 66 * workable subsystem and is gratefully acknowledged. 67 */ 68/* 69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 70 * Copyright (c) 2005, WHEEL Sp. z o.o. 71 * Copyright (c) 2004, 2005 Justin T. Gibbs 72 * All rights reserved. 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions are 76 * met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 80 * substantially similar to the "NO WARRANTY" disclaimer below 81 * ("Disclaimer") and any redistribution must be conditioned upon including 82 * a substantially similar Disclaimer requirement for further binary 83 * redistribution. 84 * 3. Neither the names of the above listed copyright holders nor the names 85 * of any contributors may be used to endorse or promote products derived 86 * from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 99 */ 100 101#include <sys/cdefs.h> 102__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 164305 2006-11-15 20:04:57Z jhb $"); 103 104#include <dev/mpt/mpt.h> 105#include <dev/mpt/mpt_cam.h> 106#include <dev/mpt/mpt_raid.h> 107 108 109#ifndef PCI_VENDOR_LSI 110#define PCI_VENDOR_LSI 0x1000 111#endif 112 113#ifndef PCI_PRODUCT_LSI_FC909 114#define PCI_PRODUCT_LSI_FC909 0x0620 115#endif 116 117#ifndef PCI_PRODUCT_LSI_FC909A 118#define PCI_PRODUCT_LSI_FC909A 0x0621 119#endif 120 121#ifndef PCI_PRODUCT_LSI_FC919 122#define PCI_PRODUCT_LSI_FC919 0x0624 123#endif 124 125#ifndef PCI_PRODUCT_LSI_FC929 126#define PCI_PRODUCT_LSI_FC929 0x0622 127#endif 128 129#ifndef PCI_PRODUCT_LSI_FC929X 130#define PCI_PRODUCT_LSI_FC929X 0x0626 131#endif 132 133#ifndef PCI_PRODUCT_LSI_FC919X 134#define PCI_PRODUCT_LSI_FC919X 0x0628 135#endif 136 137#ifndef PCI_PRODUCT_LSI_FC7X04X 138#define PCI_PRODUCT_LSI_FC7X04X 0x0640 139#endif 140 141#ifndef PCI_PRODUCT_LSI_FC646 142#define PCI_PRODUCT_LSI_FC646 0x0646 143#endif 144 145#ifndef PCI_PRODUCT_LSI_1030 146#define PCI_PRODUCT_LSI_1030 0x0030 147#endif 148 149#ifndef PCI_PRODUCT_LSI_SAS1064 150#define PCI_PRODUCT_LSI_SAS1064 0x0050 151#endif 152 153#ifndef PCI_PRODUCT_LSI_SAS1064A 154#define PCI_PRODUCT_LSI_SAS1064A 0x005C 155#endif 156 157#ifndef PCI_PRODUCT_LSI_SAS1064E 158#define PCI_PRODUCT_LSI_SAS1064E 0x0056 159#endif 160 161#ifndef PCI_PRODUCT_LSI_SAS1066 162#define PCI_PRODUCT_LSI_SAS1066 0x005E 163#endif 164 165#ifndef PCI_PRODUCT_LSI_SAS1066E 166#define PCI_PRODUCT_LSI_SAS1066E 0x005A 167#endif 168 169#ifndef PCI_PRODUCT_LSI_SAS1068 170#define PCI_PRODUCT_LSI_SAS1068 0x0054 171#endif 172 173#ifndef PCI_PRODUCT_LSI_SAS1068E 174#define PCI_PRODUCT_LSI_SAS1068E 0x0058 175#endif 176 177#ifndef PCI_PRODUCT_LSI_SAS1078 178#define PCI_PRODUCT_LSI_SAS1078 0x0060 179#endif 180 181#ifndef PCIM_CMD_SERRESPEN 182#define PCIM_CMD_SERRESPEN 0x0100 183#endif 184 185 186#define MPT_IO_BAR 0 187#define MPT_MEM_BAR 1 188 189static int mpt_pci_probe(device_t); 190static int mpt_pci_attach(device_t); 191static void mpt_free_bus_resources(struct mpt_softc *mpt); 192static int mpt_pci_detach(device_t); 193static int mpt_pci_shutdown(device_t); 194static int mpt_dma_mem_alloc(struct mpt_softc *mpt); 195static void mpt_dma_mem_free(struct mpt_softc *mpt); 196static void mpt_read_config_regs(struct mpt_softc *mpt); 197static void mpt_pci_intr(void *); 198 199static device_method_t mpt_methods[] = { 200 /* Device interface */ 201 DEVMETHOD(device_probe, mpt_pci_probe), 202 DEVMETHOD(device_attach, mpt_pci_attach), 203 DEVMETHOD(device_detach, mpt_pci_detach), 204 DEVMETHOD(device_shutdown, mpt_pci_shutdown), 205 { 0, 0 } 206}; 207 208static driver_t mpt_driver = { 209 "mpt", mpt_methods, sizeof(struct mpt_softc) 210}; 211static devclass_t mpt_devclass; 212DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0); 213MODULE_VERSION(mpt, 1); 214 215static int 216mpt_pci_probe(device_t dev) 217{ 218 char *desc; 219 220 if (pci_get_vendor(dev) != PCI_VENDOR_LSI) { 221 return (ENXIO); 222 } 223 224 switch ((pci_get_device(dev) & ~1)) { 225 case PCI_PRODUCT_LSI_FC909: 226 desc = "LSILogic FC909 FC Adapter"; 227 break; 228 case PCI_PRODUCT_LSI_FC909A: 229 desc = "LSILogic FC909A FC Adapter"; 230 break; 231 case PCI_PRODUCT_LSI_FC919: 232 desc = "LSILogic FC919 FC Adapter"; 233 break; 234 case PCI_PRODUCT_LSI_FC929: 235 desc = "Dual LSILogic FC929 FC Adapter"; 236 break; 237 case PCI_PRODUCT_LSI_FC919X: 238 desc = "LSILogic FC919 FC PCI-X Adapter"; 239 break; 240 case PCI_PRODUCT_LSI_FC929X: 241 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter"; 242 break; 243 case PCI_PRODUCT_LSI_FC646: 244 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter"; 245 break; 246 case PCI_PRODUCT_LSI_FC7X04X: 247 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter"; 248 break; 249 case PCI_PRODUCT_LSI_1030: 250 desc = "LSILogic 1030 Ultra4 Adapter"; 251 break; 252 case PCI_PRODUCT_LSI_SAS1064: 253 case PCI_PRODUCT_LSI_SAS1064A: 254 case PCI_PRODUCT_LSI_SAS1064E: 255 case PCI_PRODUCT_LSI_SAS1066: 256 case PCI_PRODUCT_LSI_SAS1066E: 257 case PCI_PRODUCT_LSI_SAS1068: 258 case PCI_PRODUCT_LSI_SAS1068E: 259 case PCI_PRODUCT_LSI_SAS1078: 260 desc = "LSILogic SAS/SATA Adapter"; 261 break; 262 default: 263 return (ENXIO); 264 } 265 266 device_set_desc(dev, desc); 267 return (0); 268} 269 270#if __FreeBSD_version < 500000 271static void 272mpt_set_options(struct mpt_softc *mpt) 273{ 274 int bitmap; 275 276 bitmap = 0; 277 if (getenv_int("mpt_disable", &bitmap)) { 278 if (bitmap & (1 << mpt->unit)) { 279 mpt->disabled = 1; 280 } 281 } 282 bitmap = 0; 283 if (getenv_int("mpt_debug", &bitmap)) { 284 if (bitmap & (1 << mpt->unit)) { 285 mpt->verbose = MPT_PRT_DEBUG; 286 } 287 } 288 bitmap = 0; 289 if (getenv_int("mpt_debug1", &bitmap)) { 290 if (bitmap & (1 << mpt->unit)) { 291 mpt->verbose = MPT_PRT_DEBUG1; 292 } 293 } 294 bitmap = 0; 295 if (getenv_int("mpt_debug2", &bitmap)) { 296 if (bitmap & (1 << mpt->unit)) { 297 mpt->verbose = MPT_PRT_DEBUG2; 298 } 299 } 300 bitmap = 0; 301 if (getenv_int("mpt_debug3", &bitmap)) { 302 if (bitmap & (1 << mpt->unit)) { 303 mpt->verbose = MPT_PRT_DEBUG3; 304 } 305 } 306 307 mpt->cfg_role = MPT_ROLE_DEFAULT; 308 bitmap = 0; 309 if (getenv_int("mpt_nil_role", &bitmap)) { 310 if (bitmap & (1 << mpt->unit)) { 311 mpt->cfg_role = 0; 312 } 313 mpt->do_cfg_role = 1; 314 } 315 bitmap = 0; 316 if (getenv_int("mpt_tgt_role", &bitmap)) { 317 if (bitmap & (1 << mpt->unit)) { 318 mpt->cfg_role |= MPT_ROLE_TARGET; 319 } 320 mpt->do_cfg_role = 1; 321 } 322 bitmap = 0; 323 if (getenv_int("mpt_ini_role", &bitmap)) { 324 if (bitmap & (1 << mpt->unit)) { 325 mpt->cfg_role |= MPT_ROLE_INITIATOR; 326 } 327 mpt->do_cfg_role = 1; 328 } 329} 330#else 331static void 332mpt_set_options(struct mpt_softc *mpt) 333{ 334 int tval; 335 336 tval = 0; 337 if (resource_int_value(device_get_name(mpt->dev), 338 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) { 339 mpt->disabled = 1; 340 } 341 tval = 0; 342 if (resource_int_value(device_get_name(mpt->dev), 343 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 344 mpt->verbose = tval; 345 } 346 tval = -1; 347 if (resource_int_value(device_get_name(mpt->dev), 348 device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 && 349 tval <= 3) { 350 mpt->cfg_role = tval; 351 mpt->do_cfg_role = 1; 352 } 353} 354#endif 355 356 357static void 358mpt_link_peer(struct mpt_softc *mpt) 359{ 360 struct mpt_softc *mpt2; 361 362 if (mpt->unit == 0) { 363 return; 364 } 365 /* 366 * XXX: depends on probe order 367 */ 368 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1); 369 370 if (mpt2 == NULL) { 371 return; 372 } 373 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 374 return; 375 } 376 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 377 return; 378 } 379 mpt->mpt2 = mpt2; 380 mpt2->mpt2 = mpt; 381 if (mpt->verbose >= MPT_PRT_DEBUG) { 382 mpt_prt(mpt, "linking with peer (mpt%d)\n", 383 device_get_unit(mpt2->dev)); 384 } 385} 386 387static void 388mpt_unlink_peer(struct mpt_softc *mpt) 389{ 390 if (mpt->mpt2) { 391 mpt->mpt2->mpt2 = NULL; 392 } 393} 394 395 396static int 397mpt_pci_attach(device_t dev) 398{ 399 struct mpt_softc *mpt; 400 int iqd; 401 uint32_t data, cmd; 402 403 /* Allocate the softc structure */ 404 mpt = (struct mpt_softc*)device_get_softc(dev); 405 if (mpt == NULL) { 406 device_printf(dev, "cannot allocate softc\n"); 407 return (ENOMEM); 408 } 409 memset(mpt, 0, sizeof(struct mpt_softc)); 410 switch ((pci_get_device(dev) & ~1)) { 411 case PCI_PRODUCT_LSI_FC909: 412 case PCI_PRODUCT_LSI_FC909A: 413 case PCI_PRODUCT_LSI_FC919: 414 case PCI_PRODUCT_LSI_FC929: 415 case PCI_PRODUCT_LSI_FC919X: 416 case PCI_PRODUCT_LSI_FC646: 417 case PCI_PRODUCT_LSI_FC7X04X: 418 mpt->is_fc = 1; 419 break; 420 case PCI_PRODUCT_LSI_SAS1064: 421 case PCI_PRODUCT_LSI_SAS1064A: 422 case PCI_PRODUCT_LSI_SAS1064E: 423 case PCI_PRODUCT_LSI_SAS1066: 424 case PCI_PRODUCT_LSI_SAS1066E: 425 case PCI_PRODUCT_LSI_SAS1068: 426 case PCI_PRODUCT_LSI_SAS1068E: 427 case PCI_PRODUCT_LSI_SAS1078: 428 mpt->is_sas = 1; 429 break; 430 default: 431 mpt->is_spi = 1; 432 break; 433 } 434 mpt->dev = dev; 435 mpt->unit = device_get_unit(dev); 436 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT; 437 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT; 438 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT; 439 mpt->verbose = MPT_PRT_NONE; 440 mpt->role = MPT_ROLE_NONE; 441 mpt_set_options(mpt); 442 if (mpt->verbose == MPT_PRT_NONE) { 443 mpt->verbose = MPT_PRT_WARN; 444 /* Print INFO level (if any) if bootverbose is set */ 445 mpt->verbose += (bootverbose != 0)? 1 : 0; 446 } 447 /* Make sure memory access decoders are enabled */ 448 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 449 if ((cmd & PCIM_CMD_MEMEN) == 0) { 450 device_printf(dev, "Memory accesses disabled"); 451 return (ENXIO); 452 } 453 454 /* 455 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 456 */ 457 cmd |= 458 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 459 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 460 pci_write_config(dev, PCIR_COMMAND, cmd, 2); 461 462 /* 463 * Make sure we've disabled the ROM. 464 */ 465 data = pci_read_config(dev, PCIR_BIOS, 4); 466 data &= ~1; 467 pci_write_config(dev, PCIR_BIOS, data, 4); 468 469 /* 470 * Is this part a dual? 471 * If so, link with our partner (around yet) 472 */ 473 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 || 474 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC646 || 475 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X || 476 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) { 477 mpt_link_peer(mpt); 478 } 479 480 /* 481 * Set up register access. PIO mode is required for 482 * certain reset operations (but must be disabled for 483 * some cards otherwise). 484 */ 485 mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR); 486 mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT, 487 &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE); 488 if (mpt->pci_pio_reg == NULL) { 489 device_printf(dev, "unable to map registers in PIO mode\n"); 490 goto bad; 491 } 492 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg); 493 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg); 494 495 /* Allocate kernel virtual memory for the 9x9's Mem0 region */ 496 mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR); 497 mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY, 498 &mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE); 499 if (mpt->pci_reg == NULL) { 500 device_printf(dev, "Unable to memory map registers.\n"); 501 if (mpt->is_sas) { 502 device_printf(dev, "Giving Up.\n"); 503 goto bad; 504 } 505 device_printf(dev, "Falling back to PIO mode.\n"); 506 mpt->pci_st = mpt->pci_pio_st; 507 mpt->pci_sh = mpt->pci_pio_sh; 508 } else { 509 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 510 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 511 } 512 513 /* Get a handle to the interrupt */ 514 iqd = 0; 515 if (pci_msi_count(dev) == 1) { 516 mpt->pci_msi_count = 1; 517 if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) 518 iqd = 1; 519 else 520 mpt->pci_msi_count = 0; 521 } 522 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 523 RF_ACTIVE | RF_SHAREABLE); 524 if (mpt->pci_irq == NULL) { 525 device_printf(dev, "could not allocate interrupt\n"); 526 goto bad; 527 } 528 529 MPT_LOCK_SETUP(mpt); 530 531 /* Disable interrupts at the part */ 532 mpt_disable_ints(mpt); 533 534 /* Register the interrupt handler */ 535 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr, 536 mpt, &mpt->ih)) { 537 device_printf(dev, "could not setup interrupt\n"); 538 goto bad; 539 } 540 541 /* Allocate dma memory */ 542/* XXX JGibbs -Should really be done based on IOCFacts. */ 543 if (mpt_dma_mem_alloc(mpt)) { 544 mpt_prt(mpt, "Could not allocate DMA memory\n"); 545 goto bad; 546 } 547 548 /* 549 * Save the PCI config register values 550 * 551 * Hard resets are known to screw up the BAR for diagnostic 552 * memory accesses (Mem1). 553 * 554 * Using Mem1 is known to make the chip stop responding to 555 * configuration space transfers, so we need to save it now 556 */ 557 558 mpt_read_config_regs(mpt); 559 560 /* 561 * Disable PIO until we need it 562 */ 563 if (mpt->is_sas) { 564 pci_disable_io(dev, SYS_RES_IOPORT); 565 } 566 567 /* Initialize the hardware */ 568 if (mpt->disabled == 0) { 569 MPT_LOCK(mpt); 570 if (mpt_attach(mpt) != 0) { 571 MPT_UNLOCK(mpt); 572 goto bad; 573 } 574 MPT_UNLOCK(mpt); 575 } else { 576 mpt_prt(mpt, "device disabled at user request\n"); 577 goto bad; 578 } 579 580 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown, 581 dev, SHUTDOWN_PRI_DEFAULT); 582 583 if (mpt->eh == NULL) { 584 mpt_prt(mpt, "shutdown event registration failed\n"); 585 MPT_LOCK(mpt); 586 (void) mpt_detach(mpt); 587 MPT_UNLOCK(mpt); 588 goto bad; 589 } 590 KASSERT(MPT_OWNED(mpt) == 0, ("leaving attach with device locked")); 591 return (0); 592 593bad: 594 mpt_dma_mem_free(mpt); 595 mpt_free_bus_resources(mpt); 596 mpt_unlink_peer(mpt); 597 598 MPT_LOCK_DESTROY(mpt); 599 600 /* 601 * but return zero to preserve unit numbering 602 */ 603 return (0); 604} 605 606/* 607 * Free bus resources 608 */ 609static void 610mpt_free_bus_resources(struct mpt_softc *mpt) 611{ 612 if (mpt->ih) { 613 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 614 mpt->ih = 0; 615 } 616 617 if (mpt->pci_irq) { 618 bus_release_resource(mpt->dev, SYS_RES_IRQ, 619 mpt->pci_msi_count ? 1 : 0, mpt->pci_irq); 620 mpt->pci_irq = 0; 621 } 622 623 if (mpt->pci_msi_count) { 624 pci_release_msi(mpt->dev); 625 mpt->pci_msi_count = 0; 626 } 627 628 if (mpt->pci_pio_reg) { 629 bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid, 630 mpt->pci_pio_reg); 631 mpt->pci_pio_reg = 0; 632 } 633 if (mpt->pci_reg) { 634 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid, 635 mpt->pci_reg); 636 mpt->pci_reg = 0; 637 } 638 MPT_LOCK_DESTROY(mpt); 639} 640 641 642/* 643 * Disconnect ourselves from the system. 644 */ 645static int 646mpt_pci_detach(device_t dev) 647{ 648 struct mpt_softc *mpt; 649 650 mpt = (struct mpt_softc*)device_get_softc(dev); 651 652 if (mpt) { 653 MPT_LOCK(mpt); 654 mpt_disable_ints(mpt); 655 mpt_detach(mpt); 656 mpt_reset(mpt, /*reinit*/FALSE); 657 mpt_dma_mem_free(mpt); 658 mpt_free_bus_resources(mpt); 659 mpt_raid_free_mem(mpt); 660 if (mpt->eh != NULL) { 661 EVENTHANDLER_DEREGISTER(shutdown_final, mpt->eh); 662 } 663 MPT_UNLOCK(mpt); 664 } 665 return(0); 666} 667 668 669/* 670 * Disable the hardware 671 */ 672static int 673mpt_pci_shutdown(device_t dev) 674{ 675 struct mpt_softc *mpt; 676 677 mpt = (struct mpt_softc *)device_get_softc(dev); 678 if (mpt) { 679 int r; 680 MPT_LOCK(mpt); 681 r = mpt_shutdown(mpt); 682 MPT_UNLOCK(mpt); 683 return (r); 684 } 685 return(0); 686} 687 688static int 689mpt_dma_mem_alloc(struct mpt_softc *mpt) 690{ 691 int i, error, nsegs; 692 uint8_t *vptr; 693 uint32_t pptr, end; 694 size_t len; 695 struct mpt_map_info mi; 696 697 /* Check if we alreay have allocated the reply memory */ 698 if (mpt->reply_phys != 0) { 699 return 0; 700 } 701 702 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt); 703#ifdef RELENG_4 704 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK); 705 if (mpt->request_pool == NULL) { 706 mpt_prt(mpt, "cannot allocate request pool\n"); 707 return (1); 708 } 709 memset(mpt->request_pool, 0, len); 710#else 711 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO); 712 if (mpt->request_pool == NULL) { 713 mpt_prt(mpt, "cannot allocate request pool\n"); 714 return (1); 715 } 716#endif 717 718 /* 719 * Create a parent dma tag for this device. 720 * 721 * Align at byte boundaries, 722 * Limit to 32-bit addressing for request/reply queues. 723 */ 724 if (mpt_dma_tag_create(mpt, /*parent*/NULL, /*alignment*/1, 725 /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR, 726 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 727 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 728 /*nsegments*/BUS_SPACE_MAXSIZE_32BIT, 729 /*maxsegsz*/BUS_SPACE_UNRESTRICTED, /*flags*/0, 730 &mpt->parent_dmat) != 0) { 731 mpt_prt(mpt, "cannot create parent dma tag\n"); 732 return (1); 733 } 734 735 /* Create a child tag for reply buffers */ 736 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 737 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 738 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 739 &mpt->reply_dmat) != 0) { 740 mpt_prt(mpt, "cannot create a dma tag for replies\n"); 741 return (1); 742 } 743 744 /* Allocate some DMA accessable memory for replies */ 745 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 746 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 747 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n", 748 (u_long) (2 * PAGE_SIZE)); 749 return (1); 750 } 751 752 mi.mpt = mpt; 753 mi.error = 0; 754 755 /* Load and lock it into "bus space" */ 756 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 757 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0); 758 759 if (mi.error) { 760 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n", 761 mi.error); 762 return (1); 763 } 764 mpt->reply_phys = mi.phys; 765 766 /* Create a child tag for data buffers */ 767 768 /* 769 * XXX: we should say that nsegs is 'unrestricted, but that 770 * XXX: tickles a horrible bug in the busdma code. Instead, 771 * XXX: we'll derive a reasonable segment limit from MAXPHYS 772 */ 773 nsegs = (MAXPHYS / PAGE_SIZE) + 1; 774 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1, 775 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 776 NULL, NULL, MAXBSIZE, nsegs, BUS_SPACE_MAXSIZE_32BIT, 0, 777 &mpt->buffer_dmat) != 0) { 778 mpt_prt(mpt, "cannot create a dma tag for data buffers\n"); 779 return (1); 780 } 781 782 /* Create a child tag for request buffers */ 783 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 784 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 785 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0, 786 &mpt->request_dmat) != 0) { 787 mpt_prt(mpt, "cannot create a dma tag for requests\n"); 788 return (1); 789 } 790 791 /* Allocate some DMA accessable memory for requests */ 792 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request, 793 BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) { 794 mpt_prt(mpt, "cannot allocate %d bytes of request memory\n", 795 MPT_REQ_MEM_SIZE(mpt)); 796 return (1); 797 } 798 799 mi.mpt = mpt; 800 mi.error = 0; 801 802 /* Load and lock it into "bus space" */ 803 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request, 804 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0); 805 806 if (mi.error) { 807 mpt_prt(mpt, "error %d loading dma map for DMA request queue\n", 808 mi.error); 809 return (1); 810 } 811 mpt->request_phys = mi.phys; 812 813 /* 814 * Now create per-request dma maps 815 */ 816 i = 0; 817 pptr = mpt->request_phys; 818 vptr = mpt->request; 819 end = pptr + MPT_REQ_MEM_SIZE(mpt); 820 while(pptr < end) { 821 request_t *req = &mpt->request_pool[i]; 822 req->index = i++; 823 824 /* Store location of Request Data */ 825 req->req_pbuf = pptr; 826 req->req_vbuf = vptr; 827 828 pptr += MPT_REQUEST_AREA; 829 vptr += MPT_REQUEST_AREA; 830 831 req->sense_pbuf = (pptr - MPT_SENSE_SIZE); 832 req->sense_vbuf = (vptr - MPT_SENSE_SIZE); 833 834 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap); 835 if (error) { 836 mpt_prt(mpt, "error %d creating per-cmd DMA maps\n", 837 error); 838 return (1); 839 } 840 } 841 842 return (0); 843} 844 845 846 847/* Deallocate memory that was allocated by mpt_dma_mem_alloc 848 */ 849static void 850mpt_dma_mem_free(struct mpt_softc *mpt) 851{ 852 int i; 853 854 /* Make sure we aren't double destroying */ 855 if (mpt->reply_dmat == 0) { 856 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n"); 857 return; 858 } 859 860 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) { 861 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap); 862 } 863 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap); 864 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap); 865 bus_dma_tag_destroy(mpt->request_dmat); 866 bus_dma_tag_destroy(mpt->buffer_dmat); 867 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 868 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 869 bus_dma_tag_destroy(mpt->reply_dmat); 870 bus_dma_tag_destroy(mpt->parent_dmat); 871 mpt->reply_dmat = 0; 872 free(mpt->request_pool, M_DEVBUF); 873 mpt->request_pool = 0; 874 875} 876 877 878 879/* Reads modifiable (via PCI transactions) config registers */ 880static void 881mpt_read_config_regs(struct mpt_softc *mpt) 882{ 883 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 884 mpt->pci_cfg.LatencyTimer_LineSize = 885 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 886 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 887 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 888 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 889 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 890 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 891 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 892 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 893 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 894} 895 896/* Sets modifiable config registers */ 897void 898mpt_set_config_regs(struct mpt_softc *mpt) 899{ 900 uint32_t val; 901 902#define MPT_CHECK(reg, offset, size) \ 903 val = pci_read_config(mpt->dev, offset, size); \ 904 if (mpt->pci_cfg.reg != val) { \ 905 mpt_prt(mpt, \ 906 "Restoring " #reg " to 0x%X from 0x%X\n", \ 907 mpt->pci_cfg.reg, val); \ 908 } 909 910 if (mpt->verbose >= MPT_PRT_DEBUG) { 911 MPT_CHECK(Command, PCIR_COMMAND, 2); 912 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 913 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 914 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 915 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 916 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 917 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 918 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 919 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 920 MPT_CHECK(PMCSR, 0x44, 4); 921 } 922#undef MPT_CHECK 923 924 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 925 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 926 mpt->pci_cfg.LatencyTimer_LineSize, 2); 927 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 928 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 929 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 930 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 931 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 932 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 933 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 934 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 935} 936 937static void 938mpt_pci_intr(void *arg) 939{ 940 struct mpt_softc *mpt; 941 942 mpt = (struct mpt_softc *)arg; 943 MPT_LOCK(mpt); 944 mpt_intr(mpt); 945 MPT_UNLOCK(mpt); 946} 947