mpt_pci.c revision 160290
1/*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * Partially derived from Matt Jacob's ISP driver. 7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 8 * Feral Software 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32/*- 33 * Copyright (c) 2002, 2006 by Matthew Jacob 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions are 38 * met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 42 * substantially similar to the "NO WARRANTY" disclaimer below 43 * ("Disclaimer") and any redistribution must be conditioned upon including 44 * a substantially similar Disclaimer requirement for further binary 45 * redistribution. 46 * 3. Neither the names of the above listed copyright holders nor the names 47 * of any contributors may be used to endorse or promote products derived 48 * from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 * 62 * Support from Chris Ellsworth in order to make SAS adapters work 63 * is gratefully acknowledged. 64 * 65 * Support from LSI-Logic has also gone a great deal toward making this a 66 * workable subsystem and is gratefully acknowledged. 67 */ 68/* 69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 70 * Copyright (c) 2005, WHEEL Sp. z o.o. 71 * Copyright (c) 2004, 2005 Justin T. Gibbs 72 * All rights reserved. 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions are 76 * met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 80 * substantially similar to the "NO WARRANTY" disclaimer below 81 * ("Disclaimer") and any redistribution must be conditioned upon including 82 * a substantially similar Disclaimer requirement for further binary 83 * redistribution. 84 * 3. Neither the names of the above listed copyright holders nor the names 85 * of any contributors may be used to endorse or promote products derived 86 * from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 99 */ 100 101#include <sys/cdefs.h> 102__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 160290 2006-07-12 07:48:50Z mjacob $"); 103 104#include <dev/mpt/mpt.h> 105#include <dev/mpt/mpt_cam.h> 106#include <dev/mpt/mpt_raid.h> 107 108 109#ifndef PCI_VENDOR_LSI 110#define PCI_VENDOR_LSI 0x1000 111#endif 112 113#ifndef PCI_PRODUCT_LSI_FC909 114#define PCI_PRODUCT_LSI_FC909 0x0620 115#endif 116 117#ifndef PCI_PRODUCT_LSI_FC909A 118#define PCI_PRODUCT_LSI_FC909A 0x0621 119#endif 120 121#ifndef PCI_PRODUCT_LSI_FC919 122#define PCI_PRODUCT_LSI_FC919 0x0624 123#endif 124 125#ifndef PCI_PRODUCT_LSI_FC929 126#define PCI_PRODUCT_LSI_FC929 0x0622 127#endif 128 129#ifndef PCI_PRODUCT_LSI_FC929X 130#define PCI_PRODUCT_LSI_FC929X 0x0626 131#endif 132 133#ifndef PCI_PRODUCT_LSI_FC919X 134#define PCI_PRODUCT_LSI_FC919X 0x0628 135#endif 136 137#ifndef PCI_PRODUCT_LSI_FC7X04X 138#define PCI_PRODUCT_LSI_FC7X04X 0x0640 139#endif 140 141#ifndef PCI_PRODUCT_LSI_1030 142#define PCI_PRODUCT_LSI_1030 0x0030 143#endif 144 145#ifndef PCI_PRODUCT_LSI_SAS1064 146#define PCI_PRODUCT_LSI_SAS1064 0x0050 147#endif 148 149#ifndef PCI_PRODUCT_LSI_SAS1064A 150#define PCI_PRODUCT_LSI_SAS1064A 0x005C 151#endif 152 153#ifndef PCI_PRODUCT_LSI_SAS1064E 154#define PCI_PRODUCT_LSI_SAS1064E 0x0056 155#endif 156 157#ifndef PCI_PRODUCT_LSI_SAS1066 158#define PCI_PRODUCT_LSI_SAS1066 0x005E 159#endif 160 161#ifndef PCI_PRODUCT_LSI_SAS1066E 162#define PCI_PRODUCT_LSI_SAS1066E 0x005A 163#endif 164 165#ifndef PCI_PRODUCT_LSI_SAS1068 166#define PCI_PRODUCT_LSI_SAS1068 0x0054 167#endif 168 169#ifndef PCI_PRODUCT_LSI_SAS1068E 170#define PCI_PRODUCT_LSI_SAS1068E 0x0058 171#endif 172 173#ifndef PCI_PRODUCT_LSI_SAS1078 174#define PCI_PRODUCT_LSI_SAS1078 0x0060 175#endif 176 177#ifndef PCIM_CMD_SERRESPEN 178#define PCIM_CMD_SERRESPEN 0x0100 179#endif 180 181 182#define MPT_IO_BAR 0 183#define MPT_MEM_BAR 1 184 185static int mpt_pci_probe(device_t); 186static int mpt_pci_attach(device_t); 187static void mpt_free_bus_resources(struct mpt_softc *mpt); 188static int mpt_pci_detach(device_t); 189static int mpt_pci_shutdown(device_t); 190static int mpt_dma_mem_alloc(struct mpt_softc *mpt); 191static void mpt_dma_mem_free(struct mpt_softc *mpt); 192static void mpt_read_config_regs(struct mpt_softc *mpt); 193static void mpt_pci_intr(void *); 194 195static device_method_t mpt_methods[] = { 196 /* Device interface */ 197 DEVMETHOD(device_probe, mpt_pci_probe), 198 DEVMETHOD(device_attach, mpt_pci_attach), 199 DEVMETHOD(device_detach, mpt_pci_detach), 200 DEVMETHOD(device_shutdown, mpt_pci_shutdown), 201 { 0, 0 } 202}; 203 204static driver_t mpt_driver = { 205 "mpt", mpt_methods, sizeof(struct mpt_softc) 206}; 207static devclass_t mpt_devclass; 208DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0); 209MODULE_VERSION(mpt, 1); 210 211static int 212mpt_pci_probe(device_t dev) 213{ 214 char *desc; 215 216 if (pci_get_vendor(dev) != PCI_VENDOR_LSI) { 217 return (ENXIO); 218 } 219 220 switch ((pci_get_device(dev) & ~1)) { 221 case PCI_PRODUCT_LSI_FC909: 222 desc = "LSILogic FC909 FC Adapter"; 223 break; 224 case PCI_PRODUCT_LSI_FC909A: 225 desc = "LSILogic FC909A FC Adapter"; 226 break; 227 case PCI_PRODUCT_LSI_FC919: 228 desc = "LSILogic FC919 FC Adapter"; 229 break; 230 case PCI_PRODUCT_LSI_FC929: 231 desc = "LSILogic FC929 FC Adapter"; 232 break; 233 case PCI_PRODUCT_LSI_FC919X: 234 desc = "LSILogic FC919X FC Adapter"; 235 break; 236 case PCI_PRODUCT_LSI_FC929X: 237 desc = "LSILogic FC929X 2Gb/s FC Adapter"; 238 break; 239 case PCI_PRODUCT_LSI_FC7X04X: 240 desc = "LSILogic FC7X04X 4Gb/s FC Adapter"; 241 break; 242 case PCI_PRODUCT_LSI_1030: 243 desc = "LSILogic 1030 Ultra4 Adapter"; 244 break; 245 case PCI_PRODUCT_LSI_SAS1064: 246 case PCI_PRODUCT_LSI_SAS1064A: 247 case PCI_PRODUCT_LSI_SAS1064E: 248 case PCI_PRODUCT_LSI_SAS1066: 249 case PCI_PRODUCT_LSI_SAS1066E: 250 case PCI_PRODUCT_LSI_SAS1068: 251 case PCI_PRODUCT_LSI_SAS1068E: 252 case PCI_PRODUCT_LSI_SAS1078: 253 desc = "LSILogic SAS Adapter"; 254 break; 255 default: 256 return (ENXIO); 257 } 258 259 device_set_desc(dev, desc); 260 return (0); 261} 262 263#if __FreeBSD_version < 500000 264static void 265mpt_set_options(struct mpt_softc *mpt) 266{ 267 int bitmap; 268 269 bitmap = 0; 270 if (getenv_int("mpt_disable", &bitmap)) { 271 if (bitmap & (1 << mpt->unit)) { 272 mpt->disabled = 1; 273 } 274 } 275 bitmap = 0; 276 if (getenv_int("mpt_debug", &bitmap)) { 277 if (bitmap & (1 << mpt->unit)) { 278 mpt->verbose = MPT_PRT_DEBUG; 279 } 280 } 281 bitmap = 0; 282 if (getenv_int("mpt_debug1", &bitmap)) { 283 if (bitmap & (1 << mpt->unit)) { 284 mpt->verbose = MPT_PRT_DEBUG1; 285 } 286 } 287 bitmap = 0; 288 if (getenv_int("mpt_debug2", &bitmap)) { 289 if (bitmap & (1 << mpt->unit)) { 290 mpt->verbose = MPT_PRT_DEBUG2; 291 } 292 } 293 bitmap = 0; 294 if (getenv_int("mpt_debug3", &bitmap)) { 295 if (bitmap & (1 << mpt->unit)) { 296 mpt->verbose = MPT_PRT_DEBUG3; 297 } 298 } 299 300 mpt->cfg_role = MPT_ROLE_DEFAULT; 301 bitmap = 0; 302 if (getenv_int("mpt_nil_role", &bitmap)) { 303 if (bitmap & (1 << mpt->unit)) { 304 mpt->cfg_role = 0; 305 } 306 mpt->do_cfg_role = 1; 307 } 308 bitmap = 0; 309 if (getenv_int("mpt_tgt_role", &bitmap)) { 310 if (bitmap & (1 << mpt->unit)) { 311 mpt->cfg_role |= MPT_ROLE_TARGET; 312 } 313 mpt->do_cfg_role = 1; 314 } 315 bitmap = 0; 316 if (getenv_int("mpt_ini_role", &bitmap)) { 317 if (bitmap & (1 << mpt->unit)) { 318 mpt->cfg_role |= MPT_ROLE_INITIATOR; 319 } 320 mpt->do_cfg_role = 1; 321 } 322} 323#else 324static void 325mpt_set_options(struct mpt_softc *mpt) 326{ 327 int tval; 328 329 tval = 0; 330 if (resource_int_value(device_get_name(mpt->dev), 331 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) { 332 mpt->disabled = 1; 333 } 334 tval = 0; 335 if (resource_int_value(device_get_name(mpt->dev), 336 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 337 mpt->verbose = tval; 338 } 339 tval = -1; 340 if (resource_int_value(device_get_name(mpt->dev), 341 device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 && 342 tval <= 3) { 343 mpt->cfg_role = tval; 344 mpt->do_cfg_role = 1; 345 } 346} 347#endif 348 349 350static void 351mpt_link_peer(struct mpt_softc *mpt) 352{ 353 struct mpt_softc *mpt2; 354 355 if (mpt->unit == 0) { 356 return; 357 } 358 /* 359 * XXX: depends on probe order 360 */ 361 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1); 362 363 if (mpt2 == NULL) { 364 return; 365 } 366 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 367 return; 368 } 369 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 370 return; 371 } 372 mpt->mpt2 = mpt2; 373 mpt2->mpt2 = mpt; 374 if (mpt->verbose >= MPT_PRT_DEBUG) { 375 mpt_prt(mpt, "linking with peer (mpt%d)\n", 376 device_get_unit(mpt2->dev)); 377 } 378} 379 380static void 381mpt_unlink_peer(struct mpt_softc *mpt) 382{ 383 if (mpt->mpt2) { 384 mpt->mpt2->mpt2 = NULL; 385 } 386} 387 388 389static int 390mpt_pci_attach(device_t dev) 391{ 392 struct mpt_softc *mpt; 393 int iqd; 394 uint32_t data, cmd; 395 396 /* Allocate the softc structure */ 397 mpt = (struct mpt_softc*)device_get_softc(dev); 398 if (mpt == NULL) { 399 device_printf(dev, "cannot allocate softc\n"); 400 return (ENOMEM); 401 } 402 memset(mpt, 0, sizeof(struct mpt_softc)); 403 switch ((pci_get_device(dev) & ~1)) { 404 case PCI_PRODUCT_LSI_FC909: 405 case PCI_PRODUCT_LSI_FC909A: 406 case PCI_PRODUCT_LSI_FC919: 407 case PCI_PRODUCT_LSI_FC929: 408 case PCI_PRODUCT_LSI_FC919X: 409 case PCI_PRODUCT_LSI_FC7X04X: 410 mpt->is_fc = 1; 411 break; 412 case PCI_PRODUCT_LSI_SAS1064: 413 case PCI_PRODUCT_LSI_SAS1064A: 414 case PCI_PRODUCT_LSI_SAS1064E: 415 case PCI_PRODUCT_LSI_SAS1066: 416 case PCI_PRODUCT_LSI_SAS1066E: 417 case PCI_PRODUCT_LSI_SAS1068: 418 case PCI_PRODUCT_LSI_SAS1068E: 419 case PCI_PRODUCT_LSI_SAS1078: 420 mpt->is_sas = 1; 421 break; 422 default: 423 mpt->is_spi = 1; 424 break; 425 } 426 mpt->dev = dev; 427 mpt->unit = device_get_unit(dev); 428 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT; 429 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT; 430 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT; 431 mpt->verbose = MPT_PRT_NONE; 432 mpt->role = MPT_ROLE_NONE; 433 mpt_set_options(mpt); 434 if (mpt->verbose == MPT_PRT_NONE) { 435 mpt->verbose = MPT_PRT_WARN; 436 /* Print INFO level (if any) if bootverbose is set */ 437 mpt->verbose += (bootverbose != 0)? 1 : 0; 438 } 439 /* Make sure memory access decoders are enabled */ 440 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 441 if ((cmd & PCIM_CMD_MEMEN) == 0) { 442 device_printf(dev, "Memory accesses disabled"); 443 return (ENXIO); 444 } 445 446 /* 447 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 448 */ 449 cmd |= 450 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 451 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 452 pci_write_config(dev, PCIR_COMMAND, cmd, 2); 453 454 /* 455 * Make sure we've disabled the ROM. 456 */ 457 data = pci_read_config(dev, PCIR_BIOS, 4); 458 data &= ~1; 459 pci_write_config(dev, PCIR_BIOS, data, 4); 460 461 /* 462 * Is this part a dual? 463 * If so, link with our partner (around yet) 464 */ 465 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 || 466 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X || 467 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) { 468 mpt_link_peer(mpt); 469 } 470 471 /* 472 * Set up register access. PIO mode is required for 473 * certain reset operations (but must be disabled for 474 * some cards otherwise). 475 */ 476 mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR); 477 mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT, 478 &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE); 479 if (mpt->pci_pio_reg == NULL) { 480 device_printf(dev, "unable to map registers in PIO mode\n"); 481 goto bad; 482 } 483 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg); 484 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg); 485 486 /* Allocate kernel virtual memory for the 9x9's Mem0 region */ 487 mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR); 488 mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY, 489 &mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE); 490 if (mpt->pci_reg == NULL) { 491 device_printf(dev, "Unable to memory map registers.\n"); 492 if (mpt->is_sas) { 493 device_printf(dev, "Giving Up.\n"); 494 goto bad; 495 } 496 device_printf(dev, "Falling back to PIO mode.\n"); 497 mpt->pci_st = mpt->pci_pio_st; 498 mpt->pci_sh = mpt->pci_pio_sh; 499 } else { 500 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 501 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 502 } 503 504 /* Get a handle to the interrupt */ 505 iqd = 0; 506#if __FreeBSD_version < 500000 507 mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0, 1, 508 RF_ACTIVE | RF_SHAREABLE); 509#else 510 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 511 RF_ACTIVE | RF_SHAREABLE); 512#endif 513 if (mpt->pci_irq == NULL) { 514 device_printf(dev, "could not allocate interrupt\n"); 515 goto bad; 516 } 517 518 MPT_LOCK_SETUP(mpt); 519 520 /* Disable interrupts at the part */ 521 mpt_disable_ints(mpt); 522 523 /* Register the interrupt handler */ 524 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr, 525 mpt, &mpt->ih)) { 526 device_printf(dev, "could not setup interrupt\n"); 527 goto bad; 528 } 529 530 /* Allocate dma memory */ 531/* XXX JGibbs -Should really be done based on IOCFacts. */ 532 if (mpt_dma_mem_alloc(mpt)) { 533 mpt_prt(mpt, "Could not allocate DMA memory\n"); 534 goto bad; 535 } 536 537 /* 538 * Save the PCI config register values 539 * 540 * Hard resets are known to screw up the BAR for diagnostic 541 * memory accesses (Mem1). 542 * 543 * Using Mem1 is known to make the chip stop responding to 544 * configuration space transfers, so we need to save it now 545 */ 546 547 mpt_read_config_regs(mpt); 548 549 /* 550 * Disable PIO until we need it 551 */ 552 if (mpt->is_sas) { 553 pci_disable_io(dev, SYS_RES_IOPORT); 554 } 555 556 /* Initialize the hardware */ 557 if (mpt->disabled == 0) { 558 MPT_LOCK(mpt); 559 if (mpt_attach(mpt) != 0) { 560 MPT_UNLOCK(mpt); 561 goto bad; 562 } 563 MPT_UNLOCK(mpt); 564 } else { 565 mpt_prt(mpt, "device disabled at user request\n"); 566 goto bad; 567 } 568 569 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown, 570 dev, SHUTDOWN_PRI_DEFAULT); 571 572 if (mpt->eh == NULL) { 573 mpt_prt(mpt, "shutdown event registration failed\n"); 574 MPT_LOCK(mpt); 575 (void) mpt_detach(mpt); 576 MPT_UNLOCK(mpt); 577 goto bad; 578 } 579 KASSERT(MPT_OWNED(mpt) == 0, ("leaving attach with device locked")); 580 return (0); 581 582bad: 583 mpt_dma_mem_free(mpt); 584 mpt_free_bus_resources(mpt); 585 mpt_unlink_peer(mpt); 586 587 MPT_LOCK_DESTROY(mpt); 588 589 /* 590 * but return zero to preserve unit numbering 591 */ 592 return (0); 593} 594 595/* 596 * Free bus resources 597 */ 598static void 599mpt_free_bus_resources(struct mpt_softc *mpt) 600{ 601 if (mpt->ih) { 602 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 603 mpt->ih = 0; 604 } 605 606 if (mpt->pci_irq) { 607 bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq); 608 mpt->pci_irq = 0; 609 } 610 611 if (mpt->pci_pio_reg) { 612 bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid, 613 mpt->pci_pio_reg); 614 mpt->pci_pio_reg = 0; 615 } 616 if (mpt->pci_reg) { 617 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid, 618 mpt->pci_reg); 619 mpt->pci_reg = 0; 620 } 621 MPT_LOCK_DESTROY(mpt); 622} 623 624 625/* 626 * Disconnect ourselves from the system. 627 */ 628static int 629mpt_pci_detach(device_t dev) 630{ 631 struct mpt_softc *mpt; 632 633 mpt = (struct mpt_softc*)device_get_softc(dev); 634 635 if (mpt) { 636 MPT_LOCK(mpt); 637 mpt_disable_ints(mpt); 638 mpt_detach(mpt); 639 mpt_reset(mpt, /*reinit*/FALSE); 640 mpt_dma_mem_free(mpt); 641 mpt_free_bus_resources(mpt); 642 mpt_raid_free_mem(mpt); 643 if (mpt->eh != NULL) { 644 EVENTHANDLER_DEREGISTER(shutdown_final, mpt->eh); 645 } 646 MPT_UNLOCK(mpt); 647 } 648 return(0); 649} 650 651 652/* 653 * Disable the hardware 654 */ 655static int 656mpt_pci_shutdown(device_t dev) 657{ 658 struct mpt_softc *mpt; 659 660 mpt = (struct mpt_softc *)device_get_softc(dev); 661 if (mpt) { 662 int r; 663 MPT_LOCK(mpt); 664 r = mpt_shutdown(mpt); 665 MPT_UNLOCK(mpt); 666 return (r); 667 } 668 return(0); 669} 670 671static int 672mpt_dma_mem_alloc(struct mpt_softc *mpt) 673{ 674 int i, error, nsegs; 675 uint8_t *vptr; 676 uint32_t pptr, end; 677 size_t len; 678 struct mpt_map_info mi; 679 680 /* Check if we alreay have allocated the reply memory */ 681 if (mpt->reply_phys != 0) { 682 return 0; 683 } 684 685 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt); 686#ifdef RELENG_4 687 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK); 688 if (mpt->request_pool == NULL) { 689 mpt_prt(mpt, "cannot allocate request pool\n"); 690 return (1); 691 } 692 memset(mpt->request_pool, 0, len); 693#else 694 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO); 695 if (mpt->request_pool == NULL) { 696 mpt_prt(mpt, "cannot allocate request pool\n"); 697 return (1); 698 } 699#endif 700 701 /* 702 * Create a parent dma tag for this device. 703 * 704 * Align at byte boundaries, 705 * Limit to 32-bit addressing for request/reply queues. 706 */ 707 if (mpt_dma_tag_create(mpt, /*parent*/NULL, /*alignment*/1, 708 /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR, 709 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 710 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 711 /*nsegments*/BUS_SPACE_MAXSIZE_32BIT, 712 /*maxsegsz*/BUS_SPACE_UNRESTRICTED, /*flags*/0, 713 &mpt->parent_dmat) != 0) { 714 mpt_prt(mpt, "cannot create parent dma tag\n"); 715 return (1); 716 } 717 718 /* Create a child tag for reply buffers */ 719 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 720 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 721 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 722 &mpt->reply_dmat) != 0) { 723 mpt_prt(mpt, "cannot create a dma tag for replies\n"); 724 return (1); 725 } 726 727 /* Allocate some DMA accessable memory for replies */ 728 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 729 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 730 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n", 731 (u_long) (2 * PAGE_SIZE)); 732 return (1); 733 } 734 735 mi.mpt = mpt; 736 mi.error = 0; 737 738 /* Load and lock it into "bus space" */ 739 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 740 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0); 741 742 if (mi.error) { 743 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n", 744 mi.error); 745 return (1); 746 } 747 mpt->reply_phys = mi.phys; 748 749 /* Create a child tag for data buffers */ 750 751 /* 752 * XXX: we should say that nsegs is 'unrestricted, but that 753 * XXX: tickles a horrible bug in the busdma code. Instead, 754 * XXX: we'll derive a reasonable segment limit from MAXPHYS 755 */ 756 nsegs = (MAXPHYS / PAGE_SIZE) + 1; 757 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1, 758 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 759 NULL, NULL, MAXBSIZE, nsegs, BUS_SPACE_MAXSIZE_32BIT, 0, 760 &mpt->buffer_dmat) != 0) { 761 mpt_prt(mpt, "cannot create a dma tag for data buffers\n"); 762 return (1); 763 } 764 765 /* Create a child tag for request buffers */ 766 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 767 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 768 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0, 769 &mpt->request_dmat) != 0) { 770 mpt_prt(mpt, "cannot create a dma tag for requests\n"); 771 return (1); 772 } 773 774 /* Allocate some DMA accessable memory for requests */ 775 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request, 776 BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) { 777 mpt_prt(mpt, "cannot allocate %d bytes of request memory\n", 778 MPT_REQ_MEM_SIZE(mpt)); 779 return (1); 780 } 781 782 mi.mpt = mpt; 783 mi.error = 0; 784 785 /* Load and lock it into "bus space" */ 786 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request, 787 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0); 788 789 if (mi.error) { 790 mpt_prt(mpt, "error %d loading dma map for DMA request queue\n", 791 mi.error); 792 return (1); 793 } 794 mpt->request_phys = mi.phys; 795 796 /* 797 * Now create per-request dma maps 798 */ 799 i = 0; 800 pptr = mpt->request_phys; 801 vptr = mpt->request; 802 end = pptr + MPT_REQ_MEM_SIZE(mpt); 803 while(pptr < end) { 804 request_t *req = &mpt->request_pool[i]; 805 req->index = i++; 806 807 /* Store location of Request Data */ 808 req->req_pbuf = pptr; 809 req->req_vbuf = vptr; 810 811 pptr += MPT_REQUEST_AREA; 812 vptr += MPT_REQUEST_AREA; 813 814 req->sense_pbuf = (pptr - MPT_SENSE_SIZE); 815 req->sense_vbuf = (vptr - MPT_SENSE_SIZE); 816 817 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap); 818 if (error) { 819 mpt_prt(mpt, "error %d creating per-cmd DMA maps\n", 820 error); 821 return (1); 822 } 823 } 824 825 return (0); 826} 827 828 829 830/* Deallocate memory that was allocated by mpt_dma_mem_alloc 831 */ 832static void 833mpt_dma_mem_free(struct mpt_softc *mpt) 834{ 835 int i; 836 837 /* Make sure we aren't double destroying */ 838 if (mpt->reply_dmat == 0) { 839 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n"); 840 return; 841 } 842 843 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) { 844 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap); 845 } 846 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap); 847 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap); 848 bus_dma_tag_destroy(mpt->request_dmat); 849 bus_dma_tag_destroy(mpt->buffer_dmat); 850 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 851 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 852 bus_dma_tag_destroy(mpt->reply_dmat); 853 bus_dma_tag_destroy(mpt->parent_dmat); 854 mpt->reply_dmat = 0; 855 free(mpt->request_pool, M_DEVBUF); 856 mpt->request_pool = 0; 857 858} 859 860 861 862/* Reads modifiable (via PCI transactions) config registers */ 863static void 864mpt_read_config_regs(struct mpt_softc *mpt) 865{ 866 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 867 mpt->pci_cfg.LatencyTimer_LineSize = 868 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 869 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 870 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 871 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 872 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 873 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 874 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 875 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 876 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 877} 878 879/* Sets modifiable config registers */ 880void 881mpt_set_config_regs(struct mpt_softc *mpt) 882{ 883 uint32_t val; 884 885#define MPT_CHECK(reg, offset, size) \ 886 val = pci_read_config(mpt->dev, offset, size); \ 887 if (mpt->pci_cfg.reg != val) { \ 888 mpt_prt(mpt, \ 889 "Restoring " #reg " to 0x%X from 0x%X\n", \ 890 mpt->pci_cfg.reg, val); \ 891 } 892 893 if (mpt->verbose >= MPT_PRT_DEBUG) { 894 MPT_CHECK(Command, PCIR_COMMAND, 2); 895 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 896 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 897 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 898 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 899 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 900 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 901 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 902 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 903 MPT_CHECK(PMCSR, 0x44, 4); 904 } 905#undef MPT_CHECK 906 907 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 908 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 909 mpt->pci_cfg.LatencyTimer_LineSize, 2); 910 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 911 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 912 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 913 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 914 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 915 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 916 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 917 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 918} 919 920static void 921mpt_pci_intr(void *arg) 922{ 923 struct mpt_softc *mpt; 924 925 mpt = (struct mpt_softc *)arg; 926 MPT_LOCK(mpt); 927 mpt_intr(mpt); 928 MPT_UNLOCK(mpt); 929} 930