mpt_pci.c revision 159178
1/*-
2 * PCI specific probe and attach routines for LSI Fusion Adapters
3 * FreeBSD Version.
4 *
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8 * Feral Software
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice immediately at the beginning of the file, without modification,
16 *    this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32/*-
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
38 * met:
39 * 1. Redistributions of source code must retain the above copyright
40 *    notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 *    substantially similar to the "NO WARRANTY" disclaimer below
43 *    ("Disclaimer") and any redistribution must be conditioned upon including
44 *    a substantially similar Disclaimer requirement for further binary
45 *    redistribution.
46 * 3. Neither the names of the above listed copyright holders nor the names
47 *    of any contributors may be used to endorse or promote products derived
48 *    from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
64 *
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
67 */
68/*
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
73 *
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
76 * met:
77 * 1. Redistributions of source code must retain the above copyright
78 *    notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 *    substantially similar to the "NO WARRANTY" disclaimer below
81 *    ("Disclaimer") and any redistribution must be conditioned upon including
82 *    a substantially similar Disclaimer requirement for further binary
83 *    redistribution.
84 * 3. Neither the names of the above listed copyright holders nor the names
85 *    of any contributors may be used to endorse or promote products derived
86 *    from this software without specific prior written permission.
87 *
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
99 */
100
101#include <sys/cdefs.h>
102__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 159178 2006-06-02 18:50:39Z mjacob $");
103
104#include <dev/mpt/mpt.h>
105#include <dev/mpt/mpt_cam.h>
106#include <dev/mpt/mpt_raid.h>
107
108
109#ifndef	PCI_VENDOR_LSI
110#define	PCI_VENDOR_LSI			0x1000
111#endif
112
113#ifndef	PCI_PRODUCT_LSI_FC909
114#define	PCI_PRODUCT_LSI_FC909		0x0620
115#endif
116
117#ifndef	PCI_PRODUCT_LSI_FC909A
118#define	PCI_PRODUCT_LSI_FC909A		0x0621
119#endif
120
121#ifndef	PCI_PRODUCT_LSI_FC919
122#define	PCI_PRODUCT_LSI_FC919		0x0624
123#endif
124
125#ifndef	PCI_PRODUCT_LSI_FC929
126#define	PCI_PRODUCT_LSI_FC929		0x0622
127#endif
128
129#ifndef	PCI_PRODUCT_LSI_FC929X
130#define	PCI_PRODUCT_LSI_FC929X		0x0626
131#endif
132
133#ifndef	PCI_PRODUCT_LSI_FC7X04X
134#define	PCI_PRODUCT_LSI_FC7X04X		0x0640
135#endif
136
137#ifndef	PCI_PRODUCT_LSI_1030
138#define	PCI_PRODUCT_LSI_1030		0x0030
139#endif
140
141#ifndef	PCI_PRODUCT_LSI_SAS1064
142#define PCI_PRODUCT_LSI_SAS1064		0x0050
143#endif
144
145#ifndef PCI_PRODUCT_LSI_SAS1064A
146#define PCI_PRODUCT_LSI_SAS1064A	0x005C
147#endif
148
149#ifndef PCI_PRODUCT_LSI_SAS1064E
150#define PCI_PRODUCT_LSI_SAS1064E	0x0056
151#endif
152
153#ifndef PCI_PRODUCT_LSI_SAS1066
154#define PCI_PRODUCT_LSI_SAS1066		0x005E
155#endif
156
157#ifndef PCI_PRODUCT_LSI_SAS1066E
158#define PCI_PRODUCT_LSI_SAS1066E	0x005A
159#endif
160
161#ifndef PCI_PRODUCT_LSI_SAS1068
162#define PCI_PRODUCT_LSI_SAS1068		0x0054
163#endif
164
165#ifndef PCI_PRODUCT_LSI_SAS1068E
166#define PCI_PRODUCT_LSI_SAS1068E	0x0058
167#endif
168
169#ifndef PCI_PRODUCT_LSI_SAS1078
170#define PCI_PRODUCT_LSI_SAS1078		0x0060
171#endif
172
173#ifndef	PCIM_CMD_SERRESPEN
174#define	PCIM_CMD_SERRESPEN	0x0100
175#endif
176
177
178#define	MPT_IO_BAR	0
179#define	MPT_MEM_BAR	1
180
181static int mpt_pci_probe(device_t);
182static int mpt_pci_attach(device_t);
183static void mpt_free_bus_resources(struct mpt_softc *mpt);
184static int mpt_pci_detach(device_t);
185static int mpt_pci_shutdown(device_t);
186static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
187static void mpt_dma_mem_free(struct mpt_softc *mpt);
188static void mpt_read_config_regs(struct mpt_softc *mpt);
189static void mpt_pci_intr(void *);
190
191static device_method_t mpt_methods[] = {
192	/* Device interface */
193	DEVMETHOD(device_probe,		mpt_pci_probe),
194	DEVMETHOD(device_attach,	mpt_pci_attach),
195	DEVMETHOD(device_detach,	mpt_pci_detach),
196	DEVMETHOD(device_shutdown,	mpt_pci_shutdown),
197	{ 0, 0 }
198};
199
200static driver_t mpt_driver = {
201	"mpt", mpt_methods, sizeof(struct mpt_softc)
202};
203static devclass_t mpt_devclass;
204DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
205MODULE_VERSION(mpt, 1);
206
207static int
208mpt_pci_probe(device_t dev)
209{
210	char *desc;
211
212	if (pci_get_vendor(dev) != PCI_VENDOR_LSI)
213		return (ENXIO);
214
215	switch ((pci_get_device(dev) & ~1)) {
216	case PCI_PRODUCT_LSI_FC909:
217		desc = "LSILogic FC909 FC Adapter";
218		break;
219	case PCI_PRODUCT_LSI_FC909A:
220		desc = "LSILogic FC909A FC Adapter";
221		break;
222	case PCI_PRODUCT_LSI_FC919:
223		desc = "LSILogic FC919 FC Adapter";
224		break;
225	case PCI_PRODUCT_LSI_FC929:
226		desc = "LSILogic FC929 FC Adapter";
227		break;
228	case PCI_PRODUCT_LSI_FC929X:
229		desc = "LSILogic FC929X 2Gb/s FC Adapter";
230		break;
231	case PCI_PRODUCT_LSI_FC7X04X:
232		desc = "LSILogic FC7X04X 4Gb/s FC Adapter";
233		break;
234	case PCI_PRODUCT_LSI_1030:
235		desc = "LSILogic 1030 Ultra4 Adapter";
236		break;
237	case PCI_PRODUCT_LSI_SAS1064:
238	case PCI_PRODUCT_LSI_SAS1064A:
239	case PCI_PRODUCT_LSI_SAS1064E:
240	case PCI_PRODUCT_LSI_SAS1066:
241	case PCI_PRODUCT_LSI_SAS1066E:
242	case PCI_PRODUCT_LSI_SAS1068:
243	case PCI_PRODUCT_LSI_SAS1068E:
244	case PCI_PRODUCT_LSI_SAS1078:
245		desc = "LSILogic SAS Adapter";
246		break;
247	default:
248		return (ENXIO);
249	}
250
251	device_set_desc(dev, desc);
252	return (0);
253}
254
255#if	__FreeBSD_version < 500000
256static void
257mpt_set_options(struct mpt_softc *mpt)
258{
259	int bitmap;
260
261	bitmap = 0;
262	if (getenv_int("mpt_disable", &bitmap)) {
263		if (bitmap & (1 << mpt->unit)) {
264			mpt->disabled = 1;
265		}
266	}
267	bitmap = 0;
268	if (getenv_int("mpt_debug", &bitmap)) {
269		if (bitmap & (1 << mpt->unit)) {
270			mpt->verbose = MPT_PRT_DEBUG;
271		}
272	}
273	bitmap = 0;
274	if (getenv_int("mpt_debug1", &bitmap)) {
275		if (bitmap & (1 << mpt->unit)) {
276			mpt->verbose = MPT_PRT_DEBUG1;
277		}
278	}
279	bitmap = 0;
280	if (getenv_int("mpt_debug2", &bitmap)) {
281		if (bitmap & (1 << mpt->unit)) {
282			mpt->verbose = MPT_PRT_DEBUG2;
283		}
284	}
285	bitmap = 0;
286	if (getenv_int("mpt_debug3", &bitmap)) {
287		if (bitmap & (1 << mpt->unit)) {
288			mpt->verbose = MPT_PRT_DEBUG3;
289		}
290	}
291}
292#else
293static void
294mpt_set_options(struct mpt_softc *mpt)
295{
296	int tval;
297
298	tval = 0;
299	if (resource_int_value(device_get_name(mpt->dev),
300	    device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
301		mpt->disabled = 1;
302	}
303	tval = 0;
304	if (resource_int_value(device_get_name(mpt->dev),
305	    device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
306		mpt->verbose = tval;
307	}
308	tval = 0;
309	if (resource_int_value(device_get_name(mpt->dev),
310	    device_get_unit(mpt->dev), "role", &tval) == 0 && tval != 0 &&
311	    tval <= 3) {
312		mpt->role = tval;
313	}
314}
315#endif
316
317
318static void
319mpt_link_peer(struct mpt_softc *mpt)
320{
321	struct mpt_softc *mpt2;
322
323	if (mpt->unit == 0) {
324		return;
325	}
326	/*
327	 * XXX: depends on probe order
328	 */
329	mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
330
331	if (mpt2 == NULL) {
332		return;
333	}
334	if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
335		return;
336	}
337	if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
338		return;
339	}
340	mpt->mpt2 = mpt2;
341	mpt2->mpt2 = mpt;
342	if (mpt->verbose >= MPT_PRT_DEBUG) {
343		mpt_prt(mpt, "linking with peer (mpt%d)\n",
344		    device_get_unit(mpt2->dev));
345	}
346}
347
348static void
349mpt_unlink_peer(struct mpt_softc *mpt)
350{
351	if (mpt->mpt2) {
352		mpt->mpt2->mpt2 = NULL;
353	}
354}
355
356
357static int
358mpt_pci_attach(device_t dev)
359{
360	struct mpt_softc *mpt;
361	int		  iqd;
362	uint32_t	  data, cmd;
363
364	/* Allocate the softc structure */
365	mpt  = (struct mpt_softc*)device_get_softc(dev);
366	if (mpt == NULL) {
367		device_printf(dev, "cannot allocate softc\n");
368		return (ENOMEM);
369	}
370	memset(mpt, 0, sizeof(struct mpt_softc));
371	switch ((pci_get_device(dev) & ~1)) {
372	case PCI_PRODUCT_LSI_FC909:
373	case PCI_PRODUCT_LSI_FC909A:
374	case PCI_PRODUCT_LSI_FC919:
375	case PCI_PRODUCT_LSI_FC929:
376	case PCI_PRODUCT_LSI_FC7X04X:
377		mpt->is_fc = 1;
378		break;
379	case PCI_PRODUCT_LSI_SAS1064:
380	case PCI_PRODUCT_LSI_SAS1064A:
381	case PCI_PRODUCT_LSI_SAS1064E:
382	case PCI_PRODUCT_LSI_SAS1066:
383	case PCI_PRODUCT_LSI_SAS1066E:
384	case PCI_PRODUCT_LSI_SAS1068:
385	case PCI_PRODUCT_LSI_SAS1068E:
386	case PCI_PRODUCT_LSI_SAS1078:
387		mpt->is_sas = 1;
388		break;
389	default:
390		mpt->is_spi = 1;
391		break;
392	}
393	mpt->dev = dev;
394	mpt->unit = device_get_unit(dev);
395	mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
396	mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
397	mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
398	mpt->verbose = MPT_PRT_NONE;
399	mpt->role = MPT_ROLE_NONE;
400	mpt_set_options(mpt);
401	if (mpt->verbose == MPT_PRT_NONE) {
402		mpt->verbose = MPT_PRT_WARN;
403		/* Print INFO level (if any) if bootverbose is set */
404		mpt->verbose += (bootverbose != 0)? 1 : 0;
405	}
406	/* Make sure memory access decoders are enabled */
407	cmd = pci_read_config(dev, PCIR_COMMAND, 2);
408	if ((cmd & PCIM_CMD_MEMEN) == 0) {
409		device_printf(dev, "Memory accesses disabled");
410		return (ENXIO);
411	}
412
413	/*
414	 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
415	 */
416	cmd |=
417	    PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
418	    PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
419	pci_write_config(dev, PCIR_COMMAND, cmd, 2);
420
421	/*
422	 * Make sure we've disabled the ROM.
423	 */
424	data = pci_read_config(dev, PCIR_BIOS, 4);
425	data &= ~1;
426	pci_write_config(dev, PCIR_BIOS, data, 4);
427
428	/*
429	 * Is this part a dual?
430	 * If so, link with our partner (around yet)
431	 */
432	if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
433	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X ||
434	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
435		mpt_link_peer(mpt);
436	}
437
438	/*
439	 * Set up register access.  PIO mode is required for
440	 * certain reset operations (but must be disabled for
441	 * some cards otherwise).
442	 */
443	mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR);
444	mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT,
445			    &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE);
446	if (mpt->pci_pio_reg == NULL) {
447		device_printf(dev, "unable to map registers in PIO mode\n");
448		goto bad;
449	}
450	mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
451	mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
452
453	/* Allocate kernel virtual memory for the 9x9's Mem0 region */
454	mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR);
455	mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
456			&mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE);
457	if (mpt->pci_reg == NULL) {
458		device_printf(dev, "Unable to memory map registers.\n");
459		if (mpt->is_sas) {
460			device_printf(dev, "Giving Up.\n");
461			goto bad;
462		}
463		device_printf(dev, "Falling back to PIO mode.\n");
464		mpt->pci_st = mpt->pci_pio_st;
465		mpt->pci_sh = mpt->pci_pio_sh;
466	} else {
467		mpt->pci_st = rman_get_bustag(mpt->pci_reg);
468		mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
469	}
470
471	/* Get a handle to the interrupt */
472	iqd = 0;
473#if __FreeBSD_version < 500000
474	mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0, 1,
475	    RF_ACTIVE | RF_SHAREABLE);
476#else
477	mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
478	    RF_ACTIVE | RF_SHAREABLE);
479#endif
480	if (mpt->pci_irq == NULL) {
481		device_printf(dev, "could not allocate interrupt\n");
482		goto bad;
483	}
484
485	MPT_LOCK_SETUP(mpt);
486
487	/* Disable interrupts at the part */
488	mpt_disable_ints(mpt);
489
490	/* Register the interrupt handler */
491	if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr,
492	    mpt, &mpt->ih)) {
493		device_printf(dev, "could not setup interrupt\n");
494		goto bad;
495	}
496
497	/* Allocate dma memory */
498/* XXX JGibbs -Should really be done based on IOCFacts. */
499	if (mpt_dma_mem_alloc(mpt)) {
500		mpt_prt(mpt, "Could not allocate DMA memory\n");
501		goto bad;
502	}
503
504	/*
505	 * Save the PCI config register values
506 	 *
507	 * Hard resets are known to screw up the BAR for diagnostic
508	 * memory accesses (Mem1).
509	 *
510	 * Using Mem1 is known to make the chip stop responding to
511	 * configuration space transfers, so we need to save it now
512	 */
513
514	mpt_read_config_regs(mpt);
515
516	/*
517	 * Disable PIO until we need it
518	 */
519	pci_disable_io(dev, SYS_RES_IOPORT);
520
521	/* Initialize the hardware */
522	if (mpt->disabled == 0) {
523		MPT_LOCK(mpt);
524		if (mpt_attach(mpt) != 0) {
525			MPT_UNLOCK(mpt);
526			goto bad;
527		}
528		MPT_UNLOCK(mpt);
529	} else {
530		mpt_prt(mpt, "device disabled at user request\n");
531		goto bad;
532	}
533
534	mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
535	    dev, SHUTDOWN_PRI_DEFAULT);
536
537	if (mpt->eh == NULL) {
538		mpt_prt(mpt, "shutdown event registration failed\n");
539		MPT_LOCK(mpt);
540		(void) mpt_detach(mpt);
541		MPT_UNLOCK(mpt);
542		goto bad;
543	}
544	KASSERT(MPT_OWNED(mpt) == 0, ("leaving attach with device locked"));
545	return (0);
546
547bad:
548	mpt_dma_mem_free(mpt);
549	mpt_free_bus_resources(mpt);
550	mpt_unlink_peer(mpt);
551
552	MPT_LOCK_DESTROY(mpt);
553
554	/*
555	 * but return zero to preserve unit numbering
556	 */
557	return (0);
558}
559
560/*
561 * Free bus resources
562 */
563static void
564mpt_free_bus_resources(struct mpt_softc *mpt)
565{
566	if (mpt->ih) {
567		bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
568		mpt->ih = 0;
569	}
570
571	if (mpt->pci_irq) {
572		bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq);
573		mpt->pci_irq = 0;
574	}
575
576	if (mpt->pci_pio_reg) {
577		bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid,
578			mpt->pci_pio_reg);
579		mpt->pci_pio_reg = 0;
580	}
581	if (mpt->pci_reg) {
582		bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid,
583			mpt->pci_reg);
584		mpt->pci_reg = 0;
585	}
586	MPT_LOCK_DESTROY(mpt);
587}
588
589
590/*
591 * Disconnect ourselves from the system.
592 */
593static int
594mpt_pci_detach(device_t dev)
595{
596	struct mpt_softc *mpt;
597
598	mpt  = (struct mpt_softc*)device_get_softc(dev);
599
600	if (mpt) {
601		MPT_LOCK(mpt);
602		mpt_disable_ints(mpt);
603		mpt_detach(mpt);
604		mpt_reset(mpt, /*reinit*/FALSE);
605		mpt_dma_mem_free(mpt);
606		mpt_free_bus_resources(mpt);
607		mpt_raid_free_mem(mpt);
608		if (mpt->eh != NULL) {
609                        EVENTHANDLER_DEREGISTER(shutdown_final, mpt->eh);
610		}
611		MPT_UNLOCK(mpt);
612	}
613	return(0);
614}
615
616
617/*
618 * Disable the hardware
619 */
620static int
621mpt_pci_shutdown(device_t dev)
622{
623	struct mpt_softc *mpt;
624
625	mpt = (struct mpt_softc *)device_get_softc(dev);
626	if (mpt) {
627		int r;
628		MPT_LOCK(mpt);
629		r = mpt_shutdown(mpt);
630		MPT_UNLOCK(mpt);
631		return (r);
632	}
633	return(0);
634}
635
636static int
637mpt_dma_mem_alloc(struct mpt_softc *mpt)
638{
639	int i, error, nsegs;
640	uint8_t *vptr;
641	uint32_t pptr, end;
642	size_t len;
643	struct mpt_map_info mi;
644
645	/* Check if we alreay have allocated the reply memory */
646	if (mpt->reply_phys != 0) {
647		return 0;
648	}
649
650	len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
651#ifdef	RELENG_4
652	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
653	if (mpt->request_pool == NULL) {
654		mpt_prt(mpt, "cannot allocate request pool\n");
655		return (1);
656	}
657	memset(mpt->request_pool, 0, len);
658#else
659	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
660	if (mpt->request_pool == NULL) {
661		mpt_prt(mpt, "cannot allocate request pool\n");
662		return (1);
663	}
664#endif
665
666	/*
667	 * Create a parent dma tag for this device.
668	 *
669	 * Align at byte boundaries,
670	 * Limit to 32-bit addressing for request/reply queues.
671	 */
672	if (mpt_dma_tag_create(mpt, /*parent*/NULL, /*alignment*/1,
673	    /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
674	    /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
675	    /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
676	    /*nsegments*/BUS_SPACE_MAXSIZE_32BIT,
677	    /*maxsegsz*/BUS_SPACE_UNRESTRICTED, /*flags*/0,
678	    &mpt->parent_dmat) != 0) {
679		mpt_prt(mpt, "cannot create parent dma tag\n");
680		return (1);
681	}
682
683	/* Create a child tag for reply buffers */
684	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
685	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
686	    NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
687	    &mpt->reply_dmat) != 0) {
688		mpt_prt(mpt, "cannot create a dma tag for replies\n");
689		return (1);
690	}
691
692	/* Allocate some DMA accessable memory for replies */
693	if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
694	    BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
695		mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
696		    (u_long) (2 * PAGE_SIZE));
697		return (1);
698	}
699
700	mi.mpt = mpt;
701	mi.error = 0;
702
703	/* Load and lock it into "bus space" */
704	bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
705	    2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
706
707	if (mi.error) {
708		mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
709		    mi.error);
710		return (1);
711	}
712	mpt->reply_phys = mi.phys;
713
714	/* Create a child tag for data buffers */
715
716	/*
717	 * XXX: we should say that nsegs is 'unrestricted, but that
718	 * XXX: tickles a horrible bug in the busdma code. Instead,
719	 * XXX: we'll derive a reasonable segment limit from MAXPHYS
720	 */
721	nsegs = (MAXPHYS / PAGE_SIZE) + 1;
722	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1,
723	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
724	    NULL, NULL, MAXBSIZE, nsegs, BUS_SPACE_MAXSIZE_32BIT, 0,
725	    &mpt->buffer_dmat) != 0) {
726		mpt_prt(mpt, "cannot create a dma tag for data buffers\n");
727		return (1);
728	}
729
730	/* Create a child tag for request buffers */
731	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
732	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
733	    NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0,
734	    &mpt->request_dmat) != 0) {
735		mpt_prt(mpt, "cannot create a dma tag for requests\n");
736		return (1);
737	}
738
739	/* Allocate some DMA accessable memory for requests */
740	if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
741	    BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
742		mpt_prt(mpt, "cannot allocate %d bytes of request memory\n",
743		    MPT_REQ_MEM_SIZE(mpt));
744		return (1);
745	}
746
747	mi.mpt = mpt;
748	mi.error = 0;
749
750	/* Load and lock it into "bus space" */
751        bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
752	    MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0);
753
754	if (mi.error) {
755		mpt_prt(mpt, "error %d loading dma map for DMA request queue\n",
756		    mi.error);
757		return (1);
758	}
759	mpt->request_phys = mi.phys;
760
761	/*
762	 * Now create per-request dma maps
763	 */
764	i = 0;
765	pptr =  mpt->request_phys;
766	vptr =  mpt->request;
767	end = pptr + MPT_REQ_MEM_SIZE(mpt);
768	while(pptr < end) {
769		request_t *req = &mpt->request_pool[i];
770		req->index = i++;
771
772		/* Store location of Request Data */
773		req->req_pbuf = pptr;
774		req->req_vbuf = vptr;
775
776		pptr += MPT_REQUEST_AREA;
777		vptr += MPT_REQUEST_AREA;
778
779		req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
780		req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
781
782		error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
783		if (error) {
784			mpt_prt(mpt, "error %d creating per-cmd DMA maps\n",
785			    error);
786			return (1);
787		}
788	}
789
790	return (0);
791}
792
793
794
795/* Deallocate memory that was allocated by mpt_dma_mem_alloc
796 */
797static void
798mpt_dma_mem_free(struct mpt_softc *mpt)
799{
800	int i;
801
802        /* Make sure we aren't double destroying */
803        if (mpt->reply_dmat == 0) {
804		mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
805		return;
806        }
807
808	for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) {
809		bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap);
810	}
811	bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
812	bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
813	bus_dma_tag_destroy(mpt->request_dmat);
814	bus_dma_tag_destroy(mpt->buffer_dmat);
815	bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
816	bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
817	bus_dma_tag_destroy(mpt->reply_dmat);
818	bus_dma_tag_destroy(mpt->parent_dmat);
819	mpt->reply_dmat = 0;
820	free(mpt->request_pool, M_DEVBUF);
821	mpt->request_pool = 0;
822
823}
824
825
826
827/* Reads modifiable (via PCI transactions) config registers */
828static void
829mpt_read_config_regs(struct mpt_softc *mpt)
830{
831	mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
832	mpt->pci_cfg.LatencyTimer_LineSize =
833	    pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
834	mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
835	mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
836	mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
837	mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
838	mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
839	mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
840	mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
841	mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
842}
843
844/* Sets modifiable config registers */
845void
846mpt_set_config_regs(struct mpt_softc *mpt)
847{
848	uint32_t val;
849
850#define MPT_CHECK(reg, offset, size)					\
851	val = pci_read_config(mpt->dev, offset, size);			\
852	if (mpt->pci_cfg.reg != val) {					\
853		mpt_prt(mpt,						\
854		    "Restoring " #reg " to 0x%X from 0x%X\n",		\
855		    mpt->pci_cfg.reg, val);				\
856	}
857
858	if (mpt->verbose >= MPT_PRT_DEBUG) {
859		MPT_CHECK(Command, PCIR_COMMAND, 2);
860		MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
861		MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
862		MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
863		MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
864		MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
865		MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
866		MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
867		MPT_CHECK(IntLine, PCIR_INTLINE, 1);
868		MPT_CHECK(PMCSR, 0x44, 4);
869	}
870#undef MPT_CHECK
871
872	pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
873	pci_write_config(mpt->dev, PCIR_CACHELNSZ,
874	    mpt->pci_cfg.LatencyTimer_LineSize, 2);
875	pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
876	pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
877	pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
878	pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
879	pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
880	pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
881	pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
882	pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
883}
884
885static void
886mpt_pci_intr(void *arg)
887{
888	struct mpt_softc *mpt;
889
890	mpt = (struct mpt_softc *)arg;
891	MPT_LOCK(mpt);
892	mpt_intr(mpt);
893	MPT_UNLOCK(mpt);
894}
895