mpt_pci.c revision 159091
1/*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * Partially derived from Matt Jacob's ISP driver. 7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 8 * Feral Software 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32/*- 33 * Copyright (c) 2002, 2006 by Matthew Jacob 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions are 38 * met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 42 * substantially similar to the "NO WARRANTY" disclaimer below 43 * ("Disclaimer") and any redistribution must be conditioned upon including 44 * a substantially similar Disclaimer requirement for further binary 45 * redistribution. 46 * 3. Neither the names of the above listed copyright holders nor the names 47 * of any contributors may be used to endorse or promote products derived 48 * from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 * 62 * Support from Chris Ellsworth in order to make SAS adapters work 63 * is gratefully acknowledged. 64 * 65 * Support from LSI-Logic has also gone a great deal toward making this a 66 * workable subsystem and is gratefully acknowledged. 67 */ 68/* 69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 70 * Copyright (c) 2005, WHEEL Sp. z o.o. 71 * Copyright (c) 2004, 2005 Justin T. Gibbs 72 * All rights reserved. 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions are 76 * met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 80 * substantially similar to the "NO WARRANTY" disclaimer below 81 * ("Disclaimer") and any redistribution must be conditioned upon including 82 * a substantially similar Disclaimer requirement for further binary 83 * redistribution. 84 * 3. Neither the names of the above listed copyright holders nor the names 85 * of any contributors may be used to endorse or promote products derived 86 * from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 99 */ 100 101#include <sys/cdefs.h> 102__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 159091 2006-05-31 00:35:44Z mjacob $"); 103 104#include <dev/mpt/mpt.h> 105#include <dev/mpt/mpt_cam.h> 106#include <dev/mpt/mpt_raid.h> 107 108 109#ifndef PCI_VENDOR_LSI 110#define PCI_VENDOR_LSI 0x1000 111#endif 112 113#ifndef PCI_PRODUCT_LSI_FC909 114#define PCI_PRODUCT_LSI_FC909 0x0620 115#endif 116 117#ifndef PCI_PRODUCT_LSI_FC909A 118#define PCI_PRODUCT_LSI_FC909A 0x0621 119#endif 120 121#ifndef PCI_PRODUCT_LSI_FC919 122#define PCI_PRODUCT_LSI_FC919 0x0624 123#endif 124 125#ifndef PCI_PRODUCT_LSI_FC929 126#define PCI_PRODUCT_LSI_FC929 0x0622 127#endif 128 129#ifndef PCI_PRODUCT_LSI_FC929X 130#define PCI_PRODUCT_LSI_FC929X 0x0626 131#endif 132 133#ifndef PCI_PRODUCT_LSI_FC7X04X 134#define PCI_PRODUCT_LSI_FC7X04X 0x0640 135#endif 136 137#ifndef PCI_PRODUCT_LSI_1030 138#define PCI_PRODUCT_LSI_1030 0x0030 139#endif 140 141#ifndef PCI_PRODUCT_LSI_SAS1064 142#define PCI_PRODUCT_LSI_SAS1064 0x0050 143#endif 144 145#ifndef PCI_PRODUCT_LSI_SAS1064A 146#define PCI_PRODUCT_LSI_SAS1064A 0x005C 147#endif 148 149#ifndef PCI_PRODUCT_LSI_SAS1064E 150#define PCI_PRODUCT_LSI_SAS1064E 0x0056 151#endif 152 153#ifndef PCI_PRODUCT_LSI_SAS1066 154#define PCI_PRODUCT_LSI_SAS1066 0x005E 155#endif 156 157#ifndef PCI_PRODUCT_LSI_SAS1066E 158#define PCI_PRODUCT_LSI_SAS1066E 0x005A 159#endif 160 161#ifndef PCI_PRODUCT_LSI_SAS1068 162#define PCI_PRODUCT_LSI_SAS1068 0x0054 163#endif 164 165#ifndef PCI_PRODUCT_LSI_SAS1068E 166#define PCI_PRODUCT_LSI_SAS1068E 0x0058 167#endif 168 169#ifndef PCI_PRODUCT_LSI_SAS1078 170#define PCI_PRODUCT_LSI_SAS1078 0x0060 171#endif 172 173#ifndef PCIM_CMD_SERRESPEN 174#define PCIM_CMD_SERRESPEN 0x0100 175#endif 176 177 178#define MPT_IO_BAR 0 179#define MPT_MEM_BAR 1 180 181static int mpt_pci_probe(device_t); 182static int mpt_pci_attach(device_t); 183static void mpt_free_bus_resources(struct mpt_softc *mpt); 184static int mpt_pci_detach(device_t); 185static int mpt_pci_shutdown(device_t); 186static int mpt_dma_mem_alloc(struct mpt_softc *mpt); 187static void mpt_dma_mem_free(struct mpt_softc *mpt); 188static void mpt_read_config_regs(struct mpt_softc *mpt); 189static void mpt_pci_intr(void *); 190 191static device_method_t mpt_methods[] = { 192 /* Device interface */ 193 DEVMETHOD(device_probe, mpt_pci_probe), 194 DEVMETHOD(device_attach, mpt_pci_attach), 195 DEVMETHOD(device_detach, mpt_pci_detach), 196 DEVMETHOD(device_shutdown, mpt_pci_shutdown), 197 { 0, 0 } 198}; 199 200static driver_t mpt_driver = { 201 "mpt", mpt_methods, sizeof(struct mpt_softc) 202}; 203static devclass_t mpt_devclass; 204DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0); 205MODULE_VERSION(mpt, 1); 206 207static int 208mpt_pci_probe(device_t dev) 209{ 210 char *desc; 211 212 if (pci_get_vendor(dev) != PCI_VENDOR_LSI) 213 return (ENXIO); 214 215 switch ((pci_get_device(dev) & ~1)) { 216 case PCI_PRODUCT_LSI_FC909: 217 desc = "LSILogic FC909 FC Adapter"; 218 break; 219 case PCI_PRODUCT_LSI_FC909A: 220 desc = "LSILogic FC909A FC Adapter"; 221 break; 222 case PCI_PRODUCT_LSI_FC919: 223 desc = "LSILogic FC919 FC Adapter"; 224 break; 225 case PCI_PRODUCT_LSI_FC929: 226 desc = "LSILogic FC929 FC Adapter"; 227 break; 228 case PCI_PRODUCT_LSI_FC929X: 229 desc = "LSILogic FC929X 2Gb/s FC Adapter"; 230 break; 231 case PCI_PRODUCT_LSI_FC7X04X: 232 desc = "LSILogic FC7X04X 4Gb/s FC Adapter"; 233 break; 234 case PCI_PRODUCT_LSI_1030: 235 desc = "LSILogic 1030 Ultra4 Adapter"; 236 break; 237 case PCI_PRODUCT_LSI_SAS1064: 238 case PCI_PRODUCT_LSI_SAS1064A: 239 case PCI_PRODUCT_LSI_SAS1064E: 240 case PCI_PRODUCT_LSI_SAS1066: 241 case PCI_PRODUCT_LSI_SAS1066E: 242 case PCI_PRODUCT_LSI_SAS1068: 243 case PCI_PRODUCT_LSI_SAS1068E: 244 case PCI_PRODUCT_LSI_SAS1078: 245 desc = "LSILogic SAS Adapter"; 246 break; 247 default: 248 return (ENXIO); 249 } 250 251 device_set_desc(dev, desc); 252 return (0); 253} 254 255#if __FreeBSD_version < 500000 256static void 257mpt_set_options(struct mpt_softc *mpt) 258{ 259 int bitmap; 260 261 bitmap = 0; 262 if (getenv_int("mpt_disable", &bitmap)) { 263 if (bitmap & (1 << mpt->unit)) { 264 mpt->disabled = 1; 265 } 266 } 267 bitmap = 0; 268 if (getenv_int("mpt_debug", &bitmap)) { 269 if (bitmap & (1 << mpt->unit)) { 270 mpt->verbose = MPT_PRT_DEBUG; 271 } 272 } 273 bitmap = 0; 274 if (getenv_int("mpt_debug1", &bitmap)) { 275 if (bitmap & (1 << mpt->unit)) { 276 mpt->verbose = MPT_PRT_DEBUG1; 277 } 278 } 279 bitmap = 0; 280 if (getenv_int("mpt_debug2", &bitmap)) { 281 if (bitmap & (1 << mpt->unit)) { 282 mpt->verbose = MPT_PRT_DEBUG2; 283 } 284 } 285 bitmap = 0; 286 if (getenv_int("mpt_debug3", &bitmap)) { 287 if (bitmap & (1 << mpt->unit)) { 288 mpt->verbose = MPT_PRT_DEBUG3; 289 } 290 } 291} 292#else 293static void 294mpt_set_options(struct mpt_softc *mpt) 295{ 296 int tval; 297 298 tval = 0; 299 if (resource_int_value(device_get_name(mpt->dev), 300 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) { 301 mpt->disabled = 1; 302 } 303 tval = 0; 304 if (resource_int_value(device_get_name(mpt->dev), 305 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 306 mpt->verbose = tval; 307 } 308 tval = 0; 309 if (resource_int_value(device_get_name(mpt->dev), 310 device_get_unit(mpt->dev), "role", &tval) == 0 && tval != 0 && 311 tval <= 3) { 312 mpt->role = tval; 313 } 314} 315#endif 316 317 318static void 319mpt_link_peer(struct mpt_softc *mpt) 320{ 321 struct mpt_softc *mpt2; 322 323 if (mpt->unit == 0) { 324 return; 325 } 326 /* 327 * XXX: depends on probe order 328 */ 329 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1); 330 331 if (mpt2 == NULL) { 332 return; 333 } 334 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 335 return; 336 } 337 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 338 return; 339 } 340 mpt->mpt2 = mpt2; 341 mpt2->mpt2 = mpt; 342 if (mpt->verbose >= MPT_PRT_DEBUG) { 343 mpt_prt(mpt, "linking with peer (mpt%d)\n", 344 device_get_unit(mpt2->dev)); 345 } 346} 347 348static void 349mpt_unlink_peer(struct mpt_softc *mpt) 350{ 351 if (mpt->mpt2) { 352 mpt->mpt2->mpt2 = NULL; 353 } 354} 355 356 357static int 358mpt_pci_attach(device_t dev) 359{ 360 struct mpt_softc *mpt; 361 int iqd; 362 uint32_t data, cmd; 363 364 /* Allocate the softc structure */ 365 mpt = (struct mpt_softc*)device_get_softc(dev); 366 if (mpt == NULL) { 367 device_printf(dev, "cannot allocate softc\n"); 368 return (ENOMEM); 369 } 370 memset(mpt, 0, sizeof(struct mpt_softc)); 371 switch ((pci_get_device(dev) & ~1)) { 372 case PCI_PRODUCT_LSI_FC909: 373 case PCI_PRODUCT_LSI_FC909A: 374 case PCI_PRODUCT_LSI_FC919: 375 case PCI_PRODUCT_LSI_FC929: 376 case PCI_PRODUCT_LSI_FC7X04X: 377 mpt->is_fc = 1; 378 break; 379 case PCI_PRODUCT_LSI_SAS1064: 380 case PCI_PRODUCT_LSI_SAS1064A: 381 case PCI_PRODUCT_LSI_SAS1064E: 382 case PCI_PRODUCT_LSI_SAS1066: 383 case PCI_PRODUCT_LSI_SAS1066E: 384 case PCI_PRODUCT_LSI_SAS1068: 385 case PCI_PRODUCT_LSI_SAS1068E: 386 case PCI_PRODUCT_LSI_SAS1078: 387 mpt->is_sas = 1; 388 break; 389 default: 390 break; 391 } 392 mpt->dev = dev; 393 mpt->unit = device_get_unit(dev); 394 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT; 395 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT; 396 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT; 397 mpt->verbose = MPT_PRT_NONE; 398 mpt->role = MPT_ROLE_NONE; 399 mpt_set_options(mpt); 400 if (mpt->verbose == MPT_PRT_NONE) { 401 mpt->verbose = MPT_PRT_WARN; 402 /* Print INFO level (if any) if bootverbose is set */ 403 mpt->verbose += (bootverbose != 0)? 1 : 0; 404 } 405 /* Make sure memory access decoders are enabled */ 406 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 407 if ((cmd & PCIM_CMD_MEMEN) == 0) { 408 device_printf(dev, "Memory accesses disabled"); 409 return (ENXIO); 410 } 411 412 /* 413 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 414 */ 415 cmd |= 416 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 417 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 418 pci_write_config(dev, PCIR_COMMAND, cmd, 2); 419 420 /* 421 * Make sure we've disabled the ROM. 422 */ 423 data = pci_read_config(dev, PCIR_BIOS, 4); 424 data &= ~1; 425 pci_write_config(dev, PCIR_BIOS, data, 4); 426 427 /* 428 * Is this part a dual? 429 * If so, link with our partner (around yet) 430 */ 431 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 || 432 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X || 433 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) { 434 mpt_link_peer(mpt); 435 } 436 437 /* 438 * Set up register access. PIO mode is required for 439 * certain reset operations (but must be disabled for 440 * some cards otherwise). 441 */ 442 mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR); 443 mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT, 444 &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE); 445 if (mpt->pci_pio_reg == NULL) { 446 device_printf(dev, "unable to map registers in PIO mode\n"); 447 goto bad; 448 } 449 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg); 450 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg); 451 452 /* Allocate kernel virtual memory for the 9x9's Mem0 region */ 453 mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR); 454 mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY, 455 &mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE); 456 if (mpt->pci_reg == NULL) { 457 device_printf(dev, "Unable to memory map registers.\n"); 458 if (mpt->is_sas) { 459 device_printf(dev, "Giving Up.\n"); 460 goto bad; 461 } 462 device_printf(dev, "Falling back to PIO mode.\n"); 463 mpt->pci_st = mpt->pci_pio_st; 464 mpt->pci_sh = mpt->pci_pio_sh; 465 } else { 466 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 467 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 468 } 469 470 /* Get a handle to the interrupt */ 471 iqd = 0; 472#if __FreeBSD_version < 500000 473 mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0, 1, 474 RF_ACTIVE | RF_SHAREABLE); 475#else 476 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 477 RF_ACTIVE | RF_SHAREABLE); 478#endif 479 if (mpt->pci_irq == NULL) { 480 device_printf(dev, "could not allocate interrupt\n"); 481 goto bad; 482 } 483 484 MPT_LOCK_SETUP(mpt); 485 486 /* Disable interrupts at the part */ 487 mpt_disable_ints(mpt); 488 489 /* Register the interrupt handler */ 490 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr, 491 mpt, &mpt->ih)) { 492 device_printf(dev, "could not setup interrupt\n"); 493 goto bad; 494 } 495 496 /* Allocate dma memory */ 497/* XXX JGibbs -Should really be done based on IOCFacts. */ 498 if (mpt_dma_mem_alloc(mpt)) { 499 mpt_prt(mpt, "Could not allocate DMA memory\n"); 500 goto bad; 501 } 502 503 /* 504 * Save the PCI config register values 505 * 506 * Hard resets are known to screw up the BAR for diagnostic 507 * memory accesses (Mem1). 508 * 509 * Using Mem1 is known to make the chip stop responding to 510 * configuration space transfers, so we need to save it now 511 */ 512 513 mpt_read_config_regs(mpt); 514 515 /* 516 * Disable PIO until we need it 517 */ 518 pci_disable_io(dev, SYS_RES_IOPORT); 519 520 /* Initialize the hardware */ 521 if (mpt->disabled == 0) { 522 MPT_LOCK(mpt); 523 if (mpt_attach(mpt) != 0) { 524 MPT_UNLOCK(mpt); 525 goto bad; 526 } 527 MPT_UNLOCK(mpt); 528 } else { 529 mpt_prt(mpt, "device disabled at user request\n"); 530 goto bad; 531 } 532 533 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown, 534 dev, SHUTDOWN_PRI_DEFAULT); 535 536 if (mpt->eh == NULL) { 537 mpt_prt(mpt, "shutdown event registration failed\n"); 538 MPT_LOCK(mpt); 539 (void) mpt_detach(mpt); 540 MPT_UNLOCK(mpt); 541 goto bad; 542 } 543 KASSERT(MPT_OWNED(mpt) == 0, ("leaving attach with device locked")); 544 return (0); 545 546bad: 547 mpt_dma_mem_free(mpt); 548 mpt_free_bus_resources(mpt); 549 mpt_unlink_peer(mpt); 550 551 MPT_LOCK_DESTROY(mpt); 552 553 /* 554 * but return zero to preserve unit numbering 555 */ 556 return (0); 557} 558 559/* 560 * Free bus resources 561 */ 562static void 563mpt_free_bus_resources(struct mpt_softc *mpt) 564{ 565 if (mpt->ih) { 566 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 567 mpt->ih = 0; 568 } 569 570 if (mpt->pci_irq) { 571 bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq); 572 mpt->pci_irq = 0; 573 } 574 575 if (mpt->pci_pio_reg) { 576 bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid, 577 mpt->pci_pio_reg); 578 mpt->pci_pio_reg = 0; 579 } 580 if (mpt->pci_reg) { 581 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid, 582 mpt->pci_reg); 583 mpt->pci_reg = 0; 584 } 585 MPT_LOCK_DESTROY(mpt); 586} 587 588 589/* 590 * Disconnect ourselves from the system. 591 */ 592static int 593mpt_pci_detach(device_t dev) 594{ 595 struct mpt_softc *mpt; 596 597 mpt = (struct mpt_softc*)device_get_softc(dev); 598 599 if (mpt) { 600 MPT_LOCK(mpt); 601 mpt_disable_ints(mpt); 602 mpt_detach(mpt); 603 mpt_reset(mpt, /*reinit*/FALSE); 604 mpt_dma_mem_free(mpt); 605 mpt_free_bus_resources(mpt); 606 mpt_raid_free_mem(mpt); 607 if (mpt->eh != NULL) { 608 EVENTHANDLER_DEREGISTER(shutdown_final, mpt->eh); 609 } 610 MPT_UNLOCK(mpt); 611 } 612 return(0); 613} 614 615 616/* 617 * Disable the hardware 618 */ 619static int 620mpt_pci_shutdown(device_t dev) 621{ 622 struct mpt_softc *mpt; 623 624 mpt = (struct mpt_softc *)device_get_softc(dev); 625 if (mpt) { 626 int r; 627 MPT_LOCK(mpt); 628 r = mpt_shutdown(mpt); 629 MPT_UNLOCK(mpt); 630 return (r); 631 } 632 return(0); 633} 634 635static int 636mpt_dma_mem_alloc(struct mpt_softc *mpt) 637{ 638 int i, error, nsegs; 639 uint8_t *vptr; 640 uint32_t pptr, end; 641 size_t len; 642 struct mpt_map_info mi; 643 644 /* Check if we alreay have allocated the reply memory */ 645 if (mpt->reply_phys != 0) { 646 return 0; 647 } 648 649 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt); 650#ifdef RELENG_4 651 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK); 652 if (mpt->request_pool == NULL) { 653 mpt_prt(mpt, "cannot allocate request pool\n"); 654 return (1); 655 } 656 memset(mpt->request_pool, 0, len); 657#else 658 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO); 659 if (mpt->request_pool == NULL) { 660 mpt_prt(mpt, "cannot allocate request pool\n"); 661 return (1); 662 } 663#endif 664 665 /* 666 * Create a parent dma tag for this device. 667 * 668 * Align at byte boundaries, 669 * Limit to 32-bit addressing for request/reply queues. 670 */ 671 if (mpt_dma_tag_create(mpt, /*parent*/NULL, /*alignment*/1, 672 /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR, 673 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 674 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 675 /*nsegments*/BUS_SPACE_MAXSIZE_32BIT, 676 /*maxsegsz*/BUS_SPACE_UNRESTRICTED, /*flags*/0, 677 &mpt->parent_dmat) != 0) { 678 mpt_prt(mpt, "cannot create parent dma tag\n"); 679 return (1); 680 } 681 682 /* Create a child tag for reply buffers */ 683 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 684 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 685 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 686 &mpt->reply_dmat) != 0) { 687 mpt_prt(mpt, "cannot create a dma tag for replies\n"); 688 return (1); 689 } 690 691 /* Allocate some DMA accessable memory for replies */ 692 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 693 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 694 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n", 695 (u_long) (2 * PAGE_SIZE)); 696 return (1); 697 } 698 699 mi.mpt = mpt; 700 mi.error = 0; 701 702 /* Load and lock it into "bus space" */ 703 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 704 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0); 705 706 if (mi.error) { 707 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n", 708 mi.error); 709 return (1); 710 } 711 mpt->reply_phys = mi.phys; 712 713 /* Create a child tag for data buffers */ 714 715 /* 716 * XXX: we should say that nsegs is 'unrestricted, but that 717 * XXX: tickles a horrible bug in the busdma code. Instead, 718 * XXX: we'll derive a reasonable segment limit from MAXPHYS 719 */ 720 nsegs = (MAXPHYS / PAGE_SIZE) + 1; 721 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1, 722 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 723 NULL, NULL, MAXBSIZE, nsegs, BUS_SPACE_MAXSIZE_32BIT, 0, 724 &mpt->buffer_dmat) != 0) { 725 mpt_prt(mpt, "cannot create a dma tag for data buffers\n"); 726 return (1); 727 } 728 729 /* Create a child tag for request buffers */ 730 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 731 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 732 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0, 733 &mpt->request_dmat) != 0) { 734 mpt_prt(mpt, "cannot create a dma tag for requests\n"); 735 return (1); 736 } 737 738 /* Allocate some DMA accessable memory for requests */ 739 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request, 740 BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) { 741 mpt_prt(mpt, "cannot allocate %d bytes of request memory\n", 742 MPT_REQ_MEM_SIZE(mpt)); 743 return (1); 744 } 745 746 mi.mpt = mpt; 747 mi.error = 0; 748 749 /* Load and lock it into "bus space" */ 750 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request, 751 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0); 752 753 if (mi.error) { 754 mpt_prt(mpt, "error %d loading dma map for DMA request queue\n", 755 mi.error); 756 return (1); 757 } 758 mpt->request_phys = mi.phys; 759 760 /* 761 * Now create per-request dma maps 762 */ 763 i = 0; 764 pptr = mpt->request_phys; 765 vptr = mpt->request; 766 end = pptr + MPT_REQ_MEM_SIZE(mpt); 767 while(pptr < end) { 768 request_t *req = &mpt->request_pool[i]; 769 req->index = i++; 770 771 /* Store location of Request Data */ 772 req->req_pbuf = pptr; 773 req->req_vbuf = vptr; 774 775 pptr += MPT_REQUEST_AREA; 776 vptr += MPT_REQUEST_AREA; 777 778 req->sense_pbuf = (pptr - MPT_SENSE_SIZE); 779 req->sense_vbuf = (vptr - MPT_SENSE_SIZE); 780 781 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap); 782 if (error) { 783 mpt_prt(mpt, "error %d creating per-cmd DMA maps\n", 784 error); 785 return (1); 786 } 787 } 788 789 return (0); 790} 791 792 793 794/* Deallocate memory that was allocated by mpt_dma_mem_alloc 795 */ 796static void 797mpt_dma_mem_free(struct mpt_softc *mpt) 798{ 799 int i; 800 801 /* Make sure we aren't double destroying */ 802 if (mpt->reply_dmat == 0) { 803 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n"); 804 return; 805 } 806 807 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) { 808 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap); 809 } 810 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap); 811 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap); 812 bus_dma_tag_destroy(mpt->request_dmat); 813 bus_dma_tag_destroy(mpt->buffer_dmat); 814 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 815 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 816 bus_dma_tag_destroy(mpt->reply_dmat); 817 bus_dma_tag_destroy(mpt->parent_dmat); 818 mpt->reply_dmat = 0; 819 free(mpt->request_pool, M_DEVBUF); 820 mpt->request_pool = 0; 821 822} 823 824 825 826/* Reads modifiable (via PCI transactions) config registers */ 827static void 828mpt_read_config_regs(struct mpt_softc *mpt) 829{ 830 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 831 mpt->pci_cfg.LatencyTimer_LineSize = 832 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 833 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 834 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 835 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 836 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 837 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 838 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 839 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 840 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 841} 842 843/* Sets modifiable config registers */ 844void 845mpt_set_config_regs(struct mpt_softc *mpt) 846{ 847 uint32_t val; 848 849#define MPT_CHECK(reg, offset, size) \ 850 val = pci_read_config(mpt->dev, offset, size); \ 851 if (mpt->pci_cfg.reg != val) { \ 852 mpt_prt(mpt, \ 853 "Restoring " #reg " to 0x%X from 0x%X\n", \ 854 mpt->pci_cfg.reg, val); \ 855 } 856 857 if (mpt->verbose >= MPT_PRT_DEBUG) { 858 MPT_CHECK(Command, PCIR_COMMAND, 2); 859 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 860 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 861 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 862 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 863 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 864 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 865 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 866 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 867 MPT_CHECK(PMCSR, 0x44, 4); 868 } 869#undef MPT_CHECK 870 871 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 872 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 873 mpt->pci_cfg.LatencyTimer_LineSize, 2); 874 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 875 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 876 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 877 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 878 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 879 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 880 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 881 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 882} 883 884static void 885mpt_pci_intr(void *arg) 886{ 887 struct mpt_softc *mpt; 888 889 mpt = (struct mpt_softc *)arg; 890 MPT_LOCK(mpt); 891 mpt_intr(mpt); 892 MPT_UNLOCK(mpt); 893} 894