mpt_pci.c revision 158279
1/*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * Partially derived from Matt Jacob's ISP driver. 7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 8 * Feral Software 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32/*- 33 * Copyright (c) 2002, 2006 by Matthew Jacob 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions are 38 * met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 42 * substantially similar to the "NO WARRANTY" disclaimer below 43 * ("Disclaimer") and any redistribution must be conditioned upon including 44 * a substantially similar Disclaimer requirement for further binary 45 * redistribution. 46 * 3. Neither the names of the above listed copyright holders nor the names 47 * of any contributors may be used to endorse or promote products derived 48 * from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 * 62 * Support from Chris Ellsworth in order to make SAS adapters work 63 * is gratefully acknowledged. 64 */ 65/* 66 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 67 * Copyright (c) 2005, WHEEL Sp. z o.o. 68 * Copyright (c) 2004, 2005 Justin T. Gibbs 69 * All rights reserved. 70 * 71 * Redistribution and use in source and binary forms, with or without 72 * modification, are permitted provided that the following conditions are 73 * met: 74 * 1. Redistributions of source code must retain the above copyright 75 * notice, this list of conditions and the following disclaimer. 76 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 77 * substantially similar to the "NO WARRANTY" disclaimer below 78 * ("Disclaimer") and any redistribution must be conditioned upon including 79 * a substantially similar Disclaimer requirement for further binary 80 * redistribution. 81 * 3. Neither the names of the above listed copyright holders nor the names 82 * of any contributors may be used to endorse or promote products derived 83 * from this software without specific prior written permission. 84 * 85 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 86 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 88 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 89 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 90 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 91 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 92 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 93 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 94 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 95 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 96 */ 97 98#include <sys/cdefs.h> 99__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 158279 2006-05-04 02:35:04Z mjacob $"); 100 101#include <dev/mpt/mpt.h> 102#include <dev/mpt/mpt_cam.h> 103#include <dev/mpt/mpt_raid.h> 104 105 106#ifndef PCI_VENDOR_LSI 107#define PCI_VENDOR_LSI 0x1000 108#endif 109 110#ifndef PCI_PRODUCT_LSI_FC909 111#define PCI_PRODUCT_LSI_FC909 0x0620 112#endif 113 114#ifndef PCI_PRODUCT_LSI_FC909A 115#define PCI_PRODUCT_LSI_FC909A 0x0621 116#endif 117 118#ifndef PCI_PRODUCT_LSI_FC919 119#define PCI_PRODUCT_LSI_FC919 0x0624 120#endif 121 122#ifndef PCI_PRODUCT_LSI_FC929 123#define PCI_PRODUCT_LSI_FC929 0x0622 124#endif 125 126#ifndef PCI_PRODUCT_LSI_FC929X 127#define PCI_PRODUCT_LSI_FC929X 0x0626 128#endif 129 130#ifndef PCI_PRODUCT_LSI_FC7X04X 131#define PCI_PRODUCT_LSI_FC7X04X 0x0640 132#endif 133 134#ifndef PCI_PRODUCT_LSI_1030 135#define PCI_PRODUCT_LSI_1030 0x0030 136#endif 137 138#ifndef PCI_PRODUCT_LSI_SAS1064 139#define PCI_PRODUCT_LSI_SAS1064 0x0050 140#endif 141 142#ifndef PCI_PRODUCT_LSI_SAS1064A 143#define PCI_PRODUCT_LSI_SAS1064A 0x005C 144#endif 145 146#ifndef PCI_PRODUCT_LSI_SAS1064E 147#define PCI_PRODUCT_LSI_SAS1064E 0x0056 148#endif 149 150#ifndef PCI_PRODUCT_LSI_SAS1066 151#define PCI_PRODUCT_LSI_SAS1066 0x005E 152#endif 153 154#ifndef PCI_PRODUCT_LSI_SAS1066E 155#define PCI_PRODUCT_LSI_SAS1066E 0x005A 156#endif 157 158#ifndef PCI_PRODUCT_LSI_SAS1068 159#define PCI_PRODUCT_LSI_SAS1068 0x0054 160#endif 161 162#ifndef PCI_PRODUCT_LSI_SAS1068E 163#define PCI_PRODUCT_LSI_SAS1068E 0x0058 164#endif 165 166#ifndef PCI_PRODUCT_LSI_SAS1078 167#define PCI_PRODUCT_LSI_SAS1078 0x0060 168#endif 169 170#ifndef PCIM_CMD_SERRESPEN 171#define PCIM_CMD_SERRESPEN 0x0100 172#endif 173 174 175#define MPT_IO_BAR 0 176#define MPT_MEM_BAR 1 177 178static int mpt_pci_probe(device_t); 179static int mpt_pci_attach(device_t); 180static void mpt_free_bus_resources(struct mpt_softc *mpt); 181static int mpt_pci_detach(device_t); 182static int mpt_pci_shutdown(device_t); 183static int mpt_dma_mem_alloc(struct mpt_softc *mpt); 184static void mpt_dma_mem_free(struct mpt_softc *mpt); 185static void mpt_read_config_regs(struct mpt_softc *mpt); 186static void mpt_pci_intr(void *); 187 188static device_method_t mpt_methods[] = { 189 /* Device interface */ 190 DEVMETHOD(device_probe, mpt_pci_probe), 191 DEVMETHOD(device_attach, mpt_pci_attach), 192 DEVMETHOD(device_detach, mpt_pci_detach), 193 DEVMETHOD(device_shutdown, mpt_pci_shutdown), 194 { 0, 0 } 195}; 196 197static driver_t mpt_driver = { 198 "mpt", mpt_methods, sizeof(struct mpt_softc) 199}; 200static devclass_t mpt_devclass; 201DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0); 202MODULE_VERSION(mpt, 1); 203 204static int 205mpt_pci_probe(device_t dev) 206{ 207 char *desc; 208 209 if (pci_get_vendor(dev) != PCI_VENDOR_LSI) 210 return (ENXIO); 211 212 switch ((pci_get_device(dev) & ~1)) { 213 case PCI_PRODUCT_LSI_FC909: 214 desc = "LSILogic FC909 FC Adapter"; 215 break; 216 case PCI_PRODUCT_LSI_FC909A: 217 desc = "LSILogic FC909A FC Adapter"; 218 break; 219 case PCI_PRODUCT_LSI_FC919: 220 desc = "LSILogic FC919 FC Adapter"; 221 break; 222 case PCI_PRODUCT_LSI_FC929: 223 desc = "LSILogic FC929 FC Adapter"; 224 break; 225 case PCI_PRODUCT_LSI_FC929X: 226 desc = "LSILogic FC929X 2Gb/s FC Adapter"; 227 break; 228 case PCI_PRODUCT_LSI_FC7X04X: 229 desc = "LSILogic FC7X04X 4Gb/s FC Adapter"; 230 break; 231 case PCI_PRODUCT_LSI_1030: 232 desc = "LSILogic 1030 Ultra4 Adapter"; 233 break; 234 case PCI_PRODUCT_LSI_SAS1064: 235 case PCI_PRODUCT_LSI_SAS1064A: 236 case PCI_PRODUCT_LSI_SAS1064E: 237 case PCI_PRODUCT_LSI_SAS1066: 238 case PCI_PRODUCT_LSI_SAS1066E: 239 case PCI_PRODUCT_LSI_SAS1068: 240 case PCI_PRODUCT_LSI_SAS1068E: 241 case PCI_PRODUCT_LSI_SAS1078: 242 desc = "LSILogic SAS Adapter"; 243 break; 244 default: 245 return (ENXIO); 246 } 247 248 device_set_desc(dev, desc); 249 return (0); 250} 251 252#if __FreeBSD_version < 500000 253static void 254mpt_set_options(struct mpt_softc *mpt) 255{ 256 int bitmap; 257 258 bitmap = 0; 259 if (getenv_int("mpt_disable", &bitmap)) { 260 if (bitmap & (1 << mpt->unit)) { 261 mpt->disabled = 1; 262 } 263 } 264 bitmap = 0; 265 if (getenv_int("mpt_debug", &bitmap)) { 266 if (bitmap & (1 << mpt->unit)) { 267 mpt->verbose = MPT_PRT_DEBUG; 268 } 269 } 270 bitmap = 0; 271 if (getenv_int("mpt_debug1", &bitmap)) { 272 if (bitmap & (1 << mpt->unit)) { 273 mpt->verbose = MPT_PRT_DEBUG1; 274 } 275 } 276 bitmap = 0; 277 if (getenv_int("mpt_debug2", &bitmap)) { 278 if (bitmap & (1 << mpt->unit)) { 279 mpt->verbose = MPT_PRT_DEBUG2; 280 } 281 } 282 bitmap = 0; 283 if (getenv_int("mpt_debug3", &bitmap)) { 284 if (bitmap & (1 << mpt->unit)) { 285 mpt->verbose = MPT_PRT_DEBUG3; 286 } 287 } 288} 289#else 290static void 291mpt_set_options(struct mpt_softc *mpt) 292{ 293 int tval; 294 295 tval = 0; 296 if (resource_int_value(device_get_name(mpt->dev), 297 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) { 298 mpt->disabled = 1; 299 } 300 tval = 0; 301 if (resource_int_value(device_get_name(mpt->dev), 302 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 303 mpt->verbose += tval; 304 } 305 tval = 0; 306 if (resource_int_value(device_get_name(mpt->dev), 307 device_get_unit(mpt->dev), "role", &tval) == 0 && tval != 0 && 308 tval <= 3) { 309 mpt->role = tval; 310 } 311} 312#endif 313 314 315static void 316mpt_link_peer(struct mpt_softc *mpt) 317{ 318 struct mpt_softc *mpt2; 319 320 if (mpt->unit == 0) { 321 return; 322 } 323 /* 324 * XXX: depends on probe order 325 */ 326 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1); 327 328 if (mpt2 == NULL) { 329 return; 330 } 331 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 332 return; 333 } 334 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 335 return; 336 } 337 mpt->mpt2 = mpt2; 338 mpt2->mpt2 = mpt; 339 if (mpt->verbose >= MPT_PRT_DEBUG) { 340 mpt_prt(mpt, "linking with peer (mpt%d)\n", 341 device_get_unit(mpt2->dev)); 342 } 343} 344 345static void 346mpt_unlink_peer(struct mpt_softc *mpt) 347{ 348 if (mpt->mpt2) { 349 mpt->mpt2->mpt2 = NULL; 350 } 351} 352 353 354static int 355mpt_pci_attach(device_t dev) 356{ 357 struct mpt_softc *mpt; 358 int iqd; 359 uint32_t data, cmd; 360 361 /* Allocate the softc structure */ 362 mpt = (struct mpt_softc*)device_get_softc(dev); 363 if (mpt == NULL) { 364 device_printf(dev, "cannot allocate softc\n"); 365 return (ENOMEM); 366 } 367 memset(mpt, 0, sizeof(struct mpt_softc)); 368 switch ((pci_get_device(dev) & ~1)) { 369 case PCI_PRODUCT_LSI_FC909: 370 case PCI_PRODUCT_LSI_FC909A: 371 case PCI_PRODUCT_LSI_FC919: 372 case PCI_PRODUCT_LSI_FC929: 373 case PCI_PRODUCT_LSI_FC7X04X: 374 mpt->is_fc = 1; 375 break; 376 case PCI_PRODUCT_LSI_SAS1064: 377 case PCI_PRODUCT_LSI_SAS1064A: 378 case PCI_PRODUCT_LSI_SAS1064E: 379 case PCI_PRODUCT_LSI_SAS1066: 380 case PCI_PRODUCT_LSI_SAS1066E: 381 case PCI_PRODUCT_LSI_SAS1068: 382 case PCI_PRODUCT_LSI_SAS1068E: 383 case PCI_PRODUCT_LSI_SAS1078: 384 mpt->is_sas = 1; 385 break; 386 default: 387 break; 388 } 389 mpt->dev = dev; 390 mpt->unit = device_get_unit(dev); 391 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT; 392 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT; 393 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT; 394 mpt->verbose = MPT_PRT_NONE; 395 mpt->role = MPT_ROLE_NONE; 396 mpt_set_options(mpt); 397 if (mpt->verbose == MPT_PRT_NONE) { 398 mpt->verbose = MPT_PRT_WARN; 399 /* Print INFO level (if any) if bootverbose is set */ 400 mpt->verbose += (bootverbose != 0)? 1 : 0; 401 } 402 /* Make sure memory access decoders are enabled */ 403 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 404 if ((cmd & PCIM_CMD_MEMEN) == 0) { 405 device_printf(dev, "Memory accesses disabled"); 406 return (ENXIO); 407 } 408 409 /* 410 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 411 */ 412 cmd |= 413 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 414 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 415 pci_write_config(dev, PCIR_COMMAND, cmd, 2); 416 417 /* 418 * Make sure we've disabled the ROM. 419 */ 420 data = pci_read_config(dev, PCIR_BIOS, 4); 421 data &= ~1; 422 pci_write_config(dev, PCIR_BIOS, data, 4); 423 424 /* 425 * Is this part a dual? 426 * If so, link with our partner (around yet) 427 */ 428 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 || 429 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X || 430 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) { 431 mpt_link_peer(mpt); 432 } 433 434 /* 435 * Set up register access. PIO mode is required for 436 * certain reset operations (but must be disabled for 437 * some cards otherwise). 438 */ 439 mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR); 440 mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT, 441 &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE); 442 if (mpt->pci_pio_reg == NULL) { 443 device_printf(dev, "unable to map registers in PIO mode\n"); 444 goto bad; 445 } 446 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg); 447 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg); 448 449 /* Allocate kernel virtual memory for the 9x9's Mem0 region */ 450 mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR); 451 mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY, 452 &mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE); 453 if (mpt->pci_reg == NULL) { 454 device_printf(dev, "Unable to memory map registers.\n"); 455 if (mpt->is_sas) { 456 device_printf(dev, "Giving Up.\n"); 457 goto bad; 458 } 459 device_printf(dev, "Falling back to PIO mode.\n"); 460 mpt->pci_st = mpt->pci_pio_st; 461 mpt->pci_sh = mpt->pci_pio_sh; 462 } else { 463 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 464 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 465 } 466 467 /* Get a handle to the interrupt */ 468 iqd = 0; 469#if __FreeBSD_version < 500000 470 mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0, 1, 471 RF_ACTIVE | RF_SHAREABLE); 472#else 473 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 474 RF_ACTIVE | RF_SHAREABLE); 475#endif 476 if (mpt->pci_irq == NULL) { 477 device_printf(dev, "could not allocate interrupt\n"); 478 goto bad; 479 } 480 481 MPT_LOCK_SETUP(mpt); 482 483 /* Disable interrupts at the part */ 484 mpt_disable_ints(mpt); 485 486 /* Register the interrupt handler */ 487 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr, 488 mpt, &mpt->ih)) { 489 device_printf(dev, "could not setup interrupt\n"); 490 goto bad; 491 } 492 493 /* Allocate dma memory */ 494/* XXX JGibbs -Should really be done based on IOCFacts. */ 495 if (mpt_dma_mem_alloc(mpt)) { 496 device_printf(dev, "Could not allocate DMA memory\n"); 497 goto bad; 498 } 499 500 /* 501 * Save the PCI config register values 502 * 503 * Hard resets are known to screw up the BAR for diagnostic 504 * memory accesses (Mem1). 505 * 506 * Using Mem1 is known to make the chip stop responding to 507 * configuration space transfers, so we need to save it now 508 */ 509 510 mpt_read_config_regs(mpt); 511 512 /* 513 * Disable PIO until we need it 514 */ 515 pci_disable_io(dev, SYS_RES_IOPORT); 516 517 /* Initialize the hardware */ 518 if (mpt->disabled == 0) { 519 MPT_LOCK(mpt); 520 if (mpt_attach(mpt) != 0) { 521 MPT_UNLOCK(mpt); 522 goto bad; 523 } 524 MPT_UNLOCK(mpt); 525 } else { 526 mpt_prt(mpt, "device disabled at user request\n"); 527 goto bad; 528 } 529 530 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown, 531 dev, SHUTDOWN_PRI_DEFAULT); 532 533 if (mpt->eh == NULL) { 534 mpt_prt(mpt, "shutdown event registration failed\n"); 535 MPT_LOCK(mpt); 536 (void) mpt_detach(mpt); 537 MPT_UNLOCK(mpt); 538 goto bad; 539 } 540 KASSERT(MPT_OWNED(mpt) == 0, ("leaving attach with device locked")); 541 return (0); 542 543bad: 544 mpt_dma_mem_free(mpt); 545 mpt_free_bus_resources(mpt); 546 mpt_unlink_peer(mpt); 547 548 MPT_LOCK_DESTROY(mpt); 549 550 /* 551 * but return zero to preserve unit numbering 552 */ 553 return (0); 554} 555 556/* 557 * Free bus resources 558 */ 559static void 560mpt_free_bus_resources(struct mpt_softc *mpt) 561{ 562 if (mpt->ih) { 563 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 564 mpt->ih = 0; 565 } 566 567 if (mpt->pci_irq) { 568 bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq); 569 mpt->pci_irq = 0; 570 } 571 572 if (mpt->pci_pio_reg) { 573 bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid, 574 mpt->pci_pio_reg); 575 mpt->pci_pio_reg = 0; 576 } 577 if (mpt->pci_reg) { 578 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid, 579 mpt->pci_reg); 580 mpt->pci_reg = 0; 581 } 582 MPT_LOCK_DESTROY(mpt); 583} 584 585 586/* 587 * Disconnect ourselves from the system. 588 */ 589static int 590mpt_pci_detach(device_t dev) 591{ 592 struct mpt_softc *mpt; 593 594 mpt = (struct mpt_softc*)device_get_softc(dev); 595 596 if (mpt) { 597 MPT_LOCK(mpt); 598 mpt_disable_ints(mpt); 599 mpt_detach(mpt); 600 mpt_reset(mpt, /*reinit*/FALSE); 601 mpt_dma_mem_free(mpt); 602 mpt_free_bus_resources(mpt); 603 if (mpt->raid_volumes != NULL && mpt->ioc_page2 != NULL) { 604 int i; 605 for (i = 0; i < mpt->ioc_page2->MaxVolumes; i++) { 606 struct mpt_raid_volume *mpt_vol; 607 608 mpt_vol = &mpt->raid_volumes[i]; 609 if (mpt_vol->config_page) { 610 free(mpt_vol->config_page, M_DEVBUF); 611 } 612 } 613 } 614 if (mpt->ioc_page2 != NULL) 615 free(mpt->ioc_page2, M_DEVBUF); 616 if (mpt->ioc_page3 != NULL) 617 free(mpt->ioc_page3, M_DEVBUF); 618 if (mpt->raid_volumes != NULL) 619 free(mpt->raid_volumes, M_DEVBUF); 620 if (mpt->raid_disks != NULL) 621 free(mpt->raid_disks, M_DEVBUF); 622 if (mpt->eh != NULL) 623 EVENTHANDLER_DEREGISTER(shutdown_final, mpt->eh); 624 MPT_UNLOCK(mpt); 625 } 626 return(0); 627} 628 629 630/* 631 * Disable the hardware 632 */ 633static int 634mpt_pci_shutdown(device_t dev) 635{ 636 struct mpt_softc *mpt; 637 638 mpt = (struct mpt_softc *)device_get_softc(dev); 639 if (mpt) { 640 int r; 641 MPT_LOCK(mpt); 642 r = mpt_shutdown(mpt); 643 MPT_UNLOCK(mpt); 644 return (r); 645 } 646 return(0); 647} 648 649static int 650mpt_dma_mem_alloc(struct mpt_softc *mpt) 651{ 652 int i, error, nsegs; 653 uint8_t *vptr; 654 uint32_t pptr, end; 655 size_t len; 656 struct mpt_map_info mi; 657 device_t dev = mpt->dev; 658 659 /* Check if we alreay have allocated the reply memory */ 660 if (mpt->reply_phys != 0) { 661 return 0; 662 } 663 664 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt); 665#ifdef RELENG_4 666 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK); 667 if (mpt->request_pool == NULL) { 668 device_printf(dev, "cannot allocate request pool\n"); 669 return (1); 670 } 671 memset(mpt->request_pool, 0, len); 672#else 673 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO); 674 if (mpt->request_pool == NULL) { 675 device_printf(dev, "cannot allocate request pool\n"); 676 return (1); 677 } 678#endif 679 680 /* 681 * Create a parent dma tag for this device. 682 * 683 * Align at byte boundaries, limit to 32-bit addressing for 684 * request/reply queues. 685 */ 686 if (mpt_dma_tag_create(mpt, /*parent*/NULL, /*alignment*/1, 687 /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR, 688 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 689 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 690 /*nsegments*/BUS_SPACE_MAXSIZE_32BIT, 691 /*maxsegsz*/BUS_SPACE_UNRESTRICTED, /*flags*/0, 692 &mpt->parent_dmat) != 0) { 693 device_printf(dev, "cannot create parent dma tag\n"); 694 return (1); 695 } 696 697 /* Create a child tag for reply buffers */ 698 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 2 * PAGE_SIZE, 699 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 700 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 701 &mpt->reply_dmat) != 0) { 702 device_printf(dev, "cannot create a dma tag for replies\n"); 703 return (1); 704 } 705 706 /* Allocate some DMA accessable memory for replies */ 707 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 708 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 709 device_printf(dev, 710 "cannot allocate %lu bytes of reply memory\n", 711 (u_long) (2 * PAGE_SIZE)); 712 return (1); 713 } 714 715 mi.mpt = mpt; 716 mi.error = 0; 717 718 /* Load and lock it into "bus space" */ 719 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 720 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0); 721 722 if (mi.error) { 723 device_printf(dev, 724 "error %d loading dma map for DMA reply queue\n", mi.error); 725 return (1); 726 } 727 mpt->reply_phys = mi.phys; 728 729 /* Create a child tag for data buffers */ 730 731 /* 732 * XXX: we should say that nsegs is 'unrestricted, but that 733 * XXX: tickles a horrible bug in the busdma code. Instead, 734 * XXX: we'll derive a reasonable segment limit from MAXPHYS 735 */ 736 nsegs = (MAXPHYS / PAGE_SIZE) + 1; 737 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1, 738 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 739 NULL, NULL, MAXBSIZE, nsegs, BUS_SPACE_MAXSIZE_32BIT, 0, 740 &mpt->buffer_dmat) != 0) { 741 device_printf(dev, 742 "cannot create a dma tag for data buffers\n"); 743 return (1); 744 } 745 746 /* Create a child tag for request buffers */ 747 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 748 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 749 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0, 750 &mpt->request_dmat) != 0) { 751 device_printf(dev, "cannot create a dma tag for requests\n"); 752 return (1); 753 } 754 755 /* Allocate some DMA accessable memory for requests */ 756 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request, 757 BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) { 758 device_printf(dev, 759 "cannot allocate %d bytes of request memory\n", 760 MPT_REQ_MEM_SIZE(mpt)); 761 return (1); 762 } 763 764 mi.mpt = mpt; 765 mi.error = 0; 766 767 /* Load and lock it into "bus space" */ 768 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request, 769 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0); 770 771 if (mi.error) { 772 device_printf(dev, 773 "error %d loading dma map for DMA request queue\n", 774 mi.error); 775 return (1); 776 } 777 mpt->request_phys = mi.phys; 778 779 i = 0; 780 pptr = mpt->request_phys; 781 vptr = mpt->request; 782 end = pptr + MPT_REQ_MEM_SIZE(mpt); 783 while(pptr < end) { 784 request_t *req = &mpt->request_pool[i]; 785 req->index = i++; 786 787 /* Store location of Request Data */ 788 req->req_pbuf = pptr; 789 req->req_vbuf = vptr; 790 791 pptr += MPT_REQUEST_AREA; 792 vptr += MPT_REQUEST_AREA; 793 794 req->sense_pbuf = (pptr - MPT_SENSE_SIZE); 795 req->sense_vbuf = (vptr - MPT_SENSE_SIZE); 796 797 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap); 798 if (error) { 799 device_printf(dev, 800 "error %d creating per-cmd DMA maps\n", error); 801 return (1); 802 } 803 } 804 return (0); 805} 806 807 808 809/* Deallocate memory that was allocated by mpt_dma_mem_alloc 810 */ 811static void 812mpt_dma_mem_free(struct mpt_softc *mpt) 813{ 814 int i; 815 816 /* Make sure we aren't double destroying */ 817 if (mpt->reply_dmat == 0) { 818 if (mpt->verbose >= MPT_PRT_DEBUG) 819 device_printf(mpt->dev,"Already released dma memory\n"); 820 return; 821 } 822 823 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) { 824 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap); 825 } 826 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap); 827 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap); 828 bus_dma_tag_destroy(mpt->request_dmat); 829 bus_dma_tag_destroy(mpt->buffer_dmat); 830 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 831 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 832 bus_dma_tag_destroy(mpt->reply_dmat); 833 bus_dma_tag_destroy(mpt->parent_dmat); 834 mpt->reply_dmat = 0; 835 free(mpt->request_pool, M_DEVBUF); 836 mpt->request_pool = 0; 837 838} 839 840 841 842/* Reads modifiable (via PCI transactions) config registers */ 843static void 844mpt_read_config_regs(struct mpt_softc *mpt) 845{ 846 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 847 mpt->pci_cfg.LatencyTimer_LineSize = 848 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 849 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 850 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 851 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 852 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 853 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 854 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 855 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 856 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 857} 858 859/* Sets modifiable config registers */ 860void 861mpt_set_config_regs(struct mpt_softc *mpt) 862{ 863 uint32_t val; 864 865#define MPT_CHECK(reg, offset, size) \ 866 val = pci_read_config(mpt->dev, offset, size); \ 867 if (mpt->pci_cfg.reg != val) { \ 868 mpt_prt(mpt, \ 869 "Restoring " #reg " to 0x%X from 0x%X\n", \ 870 mpt->pci_cfg.reg, val); \ 871 } 872 873 if (mpt->verbose >= MPT_PRT_DEBUG) { 874 MPT_CHECK(Command, PCIR_COMMAND, 2); 875 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 876 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 877 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 878 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 879 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 880 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 881 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 882 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 883 MPT_CHECK(PMCSR, 0x44, 4); 884 } 885#undef MPT_CHECK 886 887 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 888 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 889 mpt->pci_cfg.LatencyTimer_LineSize, 2); 890 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 891 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 892 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 893 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 894 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 895 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 896 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 897 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 898} 899 900static void 901mpt_pci_intr(void *arg) 902{ 903 struct mpt_softc *mpt; 904 905 mpt = (struct mpt_softc *)arg; 906 MPT_LOCK(mpt); 907 mpt_intr(mpt); 908 MPT_UNLOCK(mpt); 909} 910