mpt_pci.c revision 157117
1/*-
2 * PCI specific probe and attach routines for LSI Fusion Adapters
3 * FreeBSD Version.
4 *
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8 * Feral Software
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice immediately at the beginning of the file, without modification,
16 *    this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32/*-
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
38 * met:
39 * 1. Redistributions of source code must retain the above copyright
40 *    notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 *    substantially similar to the "NO WARRANTY" disclaimer below
43 *    ("Disclaimer") and any redistribution must be conditioned upon including
44 *    a substantially similar Disclaimer requirement for further binary
45 *    redistribution.
46 * 3. Neither the names of the above listed copyright holders nor the names
47 *    of any contributors may be used to endorse or promote products derived
48 *    from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
64 */
65/*
66 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
67 * Copyright (c) 2005, WHEEL Sp. z o.o.
68 * Copyright (c) 2004, 2005 Justin T. Gibbs
69 * All rights reserved.
70 *
71 * Redistribution and use in source and binary forms, with or without
72 * modification, are permitted provided that the following conditions are
73 * met:
74 * 1. Redistributions of source code must retain the above copyright
75 *    notice, this list of conditions and the following disclaimer.
76 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
77 *    substantially similar to the "NO WARRANTY" disclaimer below
78 *    ("Disclaimer") and any redistribution must be conditioned upon including
79 *    a substantially similar Disclaimer requirement for further binary
80 *    redistribution.
81 * 3. Neither the names of the above listed copyright holders nor the names
82 *    of any contributors may be used to endorse or promote products derived
83 *    from this software without specific prior written permission.
84 *
85 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
86 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
89 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
90 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
91 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
92 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
93 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
94 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
95 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
96 */
97
98#include <sys/cdefs.h>
99__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 157117 2006-03-25 07:08:27Z mjacob $");
100
101#include <dev/mpt/mpt.h>
102#include <dev/mpt/mpt_cam.h>
103#include <dev/mpt/mpt_raid.h>
104
105
106#ifndef	PCI_VENDOR_LSI
107#define	PCI_VENDOR_LSI			0x1000
108#endif
109
110#ifndef	PCI_PRODUCT_LSI_FC909
111#define	PCI_PRODUCT_LSI_FC909		0x0620
112#endif
113
114#ifndef	PCI_PRODUCT_LSI_FC909A
115#define	PCI_PRODUCT_LSI_FC909A		0x0621
116#endif
117
118#ifndef	PCI_PRODUCT_LSI_FC919
119#define	PCI_PRODUCT_LSI_FC919		0x0624
120#endif
121
122#ifndef	PCI_PRODUCT_LSI_FC929
123#define	PCI_PRODUCT_LSI_FC929		0x0622
124#endif
125
126#ifndef	PCI_PRODUCT_LSI_FC929X
127#define	PCI_PRODUCT_LSI_FC929X		0x0626
128#endif
129
130#ifndef	PCI_PRODUCT_LSI_1030
131#define	PCI_PRODUCT_LSI_1030		0x0030
132#endif
133
134#ifndef	PCI_PRODUCT_LSI_SAS1064
135#define PCI_PRODUCT_LSI_SAS1064		0x0050
136#endif
137
138#ifndef PCI_PRODUCT_LSI_SAS1064A
139#define PCI_PRODUCT_LSI_SAS1064A	0x005C
140#endif
141
142#ifndef PCI_PRODUCT_LSI_SAS1064E
143#define PCI_PRODUCT_LSI_SAS1064E	0x0056
144#endif
145
146#ifndef PCI_PRODUCT_LSI_SAS1066
147#define PCI_PRODUCT_LSI_SAS1066		0x005E
148#endif
149
150#ifndef PCI_PRODUCT_LSI_SAS1066E
151#define PCI_PRODUCT_LSI_SAS1066E	0x005A
152#endif
153
154#ifndef PCI_PRODUCT_LSI_SAS1068
155#define PCI_PRODUCT_LSI_SAS1068		0x0054
156#endif
157
158#ifndef PCI_PRODUCT_LSI_SAS1068E
159#define PCI_PRODUCT_LSI_SAS1068E	0x0058
160#endif
161
162#ifndef PCI_PRODUCT_LSI_SAS1078
163#define PCI_PRODUCT_LSI_SAS1078		0x0060
164#endif
165
166#ifndef	PCIM_CMD_SERRESPEN
167#define	PCIM_CMD_SERRESPEN	0x0100
168#endif
169
170
171#define	MPT_IO_BAR	0
172#define	MPT_MEM_BAR	1
173
174static int mpt_pci_probe(device_t);
175static int mpt_pci_attach(device_t);
176static void mpt_free_bus_resources(struct mpt_softc *mpt);
177static int mpt_pci_detach(device_t);
178static int mpt_pci_shutdown(device_t);
179static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
180static void mpt_dma_mem_free(struct mpt_softc *mpt);
181static void mpt_read_config_regs(struct mpt_softc *mpt);
182static void mpt_pci_intr(void *);
183
184static device_method_t mpt_methods[] = {
185	/* Device interface */
186	DEVMETHOD(device_probe,		mpt_pci_probe),
187	DEVMETHOD(device_attach,	mpt_pci_attach),
188	DEVMETHOD(device_detach,	mpt_pci_detach),
189	DEVMETHOD(device_shutdown,	mpt_pci_shutdown),
190	{ 0, 0 }
191};
192
193static driver_t mpt_driver = {
194	"mpt", mpt_methods, sizeof(struct mpt_softc)
195};
196static devclass_t mpt_devclass;
197DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
198MODULE_VERSION(mpt, 1);
199
200static int
201mpt_pci_probe(device_t dev)
202{
203	char *desc;
204
205	if (pci_get_vendor(dev) != PCI_VENDOR_LSI)
206		return (ENXIO);
207
208	switch ((pci_get_device(dev) & ~1)) {
209	case PCI_PRODUCT_LSI_FC909:
210		desc = "LSILogic FC909 FC Adapter";
211		break;
212	case PCI_PRODUCT_LSI_FC909A:
213		desc = "LSILogic FC909A FC Adapter";
214		break;
215	case PCI_PRODUCT_LSI_FC919:
216		desc = "LSILogic FC919 FC Adapter";
217		break;
218	case PCI_PRODUCT_LSI_FC929:
219		desc = "LSILogic FC929 FC Adapter";
220		break;
221	case PCI_PRODUCT_LSI_FC929X:
222		desc = "LSILogic FC929X FC Adapter";
223		break;
224	case PCI_PRODUCT_LSI_1030:
225		desc = "LSILogic 1030 Ultra4 Adapter";
226		break;
227	case PCI_PRODUCT_LSI_SAS1064:
228	case PCI_PRODUCT_LSI_SAS1064A:
229	case PCI_PRODUCT_LSI_SAS1064E:
230	case PCI_PRODUCT_LSI_SAS1066:
231	case PCI_PRODUCT_LSI_SAS1066E:
232	case PCI_PRODUCT_LSI_SAS1068:
233	case PCI_PRODUCT_LSI_SAS1068E:
234	case PCI_PRODUCT_LSI_SAS1078:
235		desc = "LSILogic SAS Adapter";
236		break;
237	default:
238		return (ENXIO);
239	}
240
241	device_set_desc(dev, desc);
242	return (0);
243}
244
245#if	__FreeBSD_version < 500000
246static void
247mpt_set_options(struct mpt_softc *mpt)
248{
249	int bitmap;
250
251	bitmap = 0;
252	if (getenv_int("mpt_disable", &bitmap)) {
253		if (bitmap & (1 << mpt->unit)) {
254			mpt->disabled = 1;
255		}
256	}
257
258	bitmap = 0;
259	if (getenv_int("mpt_debug", &bitmap)) {
260		if (bitmap & (1 << mpt->unit)) {
261			mpt->verbose = MPT_PRT_DEBUG;
262		}
263	}
264	bitmap = 0;
265	if (getenv_int("mpt_target", &bitmap)) {
266		if (bitmap & (1 << mpt->unit)) {
267			mpt->role = MPT_ROLE_TARGET;
268		}
269	}
270	bitmap = 0;
271	if (getenv_int("mpt_none", &bitmap)) {
272		if (bitmap & (1 << mpt->unit)) {
273			mpt->role = MPT_ROLE_NONE;
274		}
275	}
276	bitmap = 0;
277	if (getenv_int("mpt_initiator", &bitmap)) {
278		if (bitmap & (1 << mpt->unit)) {
279			mpt->role = MPT_ROLE_INITIATOR;
280		}
281	}
282}
283#else
284static void
285mpt_set_options(struct mpt_softc *mpt)
286{
287	int tval;
288
289	tval = 0;
290	if (resource_int_value(device_get_name(mpt->dev),
291	    device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
292		mpt->disabled = 1;
293	}
294	tval = 0;
295	if (resource_int_value(device_get_name(mpt->dev),
296	    device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
297		mpt->verbose += tval;
298	}
299	tval = 0;
300	if (resource_int_value(device_get_name(mpt->dev),
301	    device_get_unit(mpt->dev), "role", &tval) == 0 && tval != 0 &&
302	    tval <= 3) {
303		mpt->role = tval;
304	}
305}
306#endif
307
308
309static void
310mpt_link_peer(struct mpt_softc *mpt)
311{
312	struct mpt_softc *mpt2;
313
314	if (mpt->unit == 0)
315		return;
316
317	/*
318	 * XXX: depends on probe order
319	 */
320	mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
321
322	if (mpt2 == NULL) {
323		return;
324	}
325	if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
326		return;
327	}
328	if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
329		return;
330	}
331	mpt->mpt2 = mpt2;
332	mpt2->mpt2 = mpt;
333	if (mpt->verbose >= MPT_PRT_DEBUG) {
334		mpt_prt(mpt, "linking with peer (mpt%d)\n",
335		    device_get_unit(mpt2->dev));
336	}
337}
338
339
340static int
341mpt_pci_attach(device_t dev)
342{
343	struct mpt_softc *mpt;
344	int		  iqd;
345	uint32_t	  data, cmd;
346
347	/* Allocate the softc structure */
348	mpt  = (struct mpt_softc*)device_get_softc(dev);
349	if (mpt == NULL) {
350		device_printf(dev, "cannot allocate softc\n");
351		return (ENOMEM);
352	}
353	bzero(mpt, sizeof(struct mpt_softc));
354	switch ((pci_get_device(dev) & ~1)) {
355	case PCI_PRODUCT_LSI_FC909:
356	case PCI_PRODUCT_LSI_FC909A:
357	case PCI_PRODUCT_LSI_FC919:
358	case PCI_PRODUCT_LSI_FC929:
359		mpt->is_fc = 1;
360		break;
361	case PCI_PRODUCT_LSI_SAS1064:
362	case PCI_PRODUCT_LSI_SAS1064A:
363	case PCI_PRODUCT_LSI_SAS1064E:
364	case PCI_PRODUCT_LSI_SAS1066:
365	case PCI_PRODUCT_LSI_SAS1066E:
366	case PCI_PRODUCT_LSI_SAS1068:
367	case PCI_PRODUCT_LSI_SAS1068E:
368	case PCI_PRODUCT_LSI_SAS1078:
369		mpt->is_sas = 1;
370		break;
371	default:
372		break;
373	}
374	mpt->dev = dev;
375	mpt->unit = device_get_unit(dev);
376	mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
377	mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
378	mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
379	mpt->verbose = MPT_PRT_NONE;
380	mpt->role = MPT_ROLE_DEFAULT;
381	mpt_set_options(mpt);
382	if (mpt->verbose == MPT_PRT_NONE) {
383		mpt->verbose = MPT_PRT_WARN;
384		/* Print INFO level (if any) if bootverbose is set */
385		mpt->verbose += (bootverbose != 0)? 1 : 0;
386	}
387	/* Make sure memory access decoders are enabled */
388	cmd = pci_read_config(dev, PCIR_COMMAND, 2);
389	if ((cmd & PCIM_CMD_MEMEN) == 0) {
390		device_printf(dev, "Memory accesses disabled");
391		goto bad;
392	}
393
394	/*
395	 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
396	 */
397	cmd |=
398	    PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
399	    PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
400	pci_write_config(dev, PCIR_COMMAND, cmd, 2);
401
402	/*
403	 * Make sure we've disabled the ROM.
404	 */
405	data = pci_read_config(dev, PCIR_BIOS, 4);
406	data &= ~1;
407	pci_write_config(dev, PCIR_BIOS, data, 4);
408
409	/*
410	 * Is this part a dual?
411	 * If so, link with our partner (around yet)
412	 */
413	if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
414	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
415		mpt_link_peer(mpt);
416	}
417
418	/*
419	 * Set up register access.  PIO mode is required for
420	 * certain reset operations (but must be disabled for
421	 * some cards otherwise).
422	 */
423	mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR);
424	mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT,
425			    &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE);
426	if (mpt->pci_pio_reg == NULL) {
427		device_printf(dev, "unable to map registers in PIO mode\n");
428		goto bad;
429	}
430	mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
431	mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
432
433	/* Allocate kernel virtual memory for the 9x9's Mem0 region */
434	mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR);
435	mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
436			&mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE);
437	if (mpt->pci_reg == NULL) {
438		device_printf(dev, "Unable to memory map registers.\n");
439		if (mpt->is_sas) {
440			device_printf(dev, "Giving Up.\n");
441			goto bad;
442		}
443		device_printf(dev, "Falling back to PIO mode.\n");
444		mpt->pci_st = mpt->pci_pio_st;
445		mpt->pci_sh = mpt->pci_pio_sh;
446	} else {
447		mpt->pci_st = rman_get_bustag(mpt->pci_reg);
448		mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
449	}
450
451	/* Get a handle to the interrupt */
452	iqd = 0;
453#if __FreeBSD_version < 500000
454	mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0, 1,
455	    RF_ACTIVE | RF_SHAREABLE);
456#else
457	mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
458	    RF_ACTIVE | RF_SHAREABLE);
459#endif
460	if (mpt->pci_irq == NULL) {
461		device_printf(dev, "could not allocate interrupt\n");
462		goto bad;
463	}
464
465	MPT_LOCK_SETUP(mpt);
466
467	/* Disable interrupts at the part */
468	mpt_disable_ints(mpt);
469
470	/* Register the interrupt handler */
471	if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr,
472	    mpt, &mpt->ih)) {
473		device_printf(dev, "could not setup interrupt\n");
474		goto bad;
475	}
476
477	/* Allocate dma memory */
478/* XXX JGibbs -Should really be done based on IOCFacts. */
479	if (mpt_dma_mem_alloc(mpt)) {
480		device_printf(dev, "Could not allocate DMA memory\n");
481		goto bad;
482	}
483
484	/*
485	 * Save the PCI config register values
486 	 *
487	 * Hard resets are known to screw up the BAR for diagnostic
488	 * memory accesses (Mem1).
489	 *
490	 * Using Mem1 is known to make the chip stop responding to
491	 * configuration space transfers, so we need to save it now
492	 */
493
494	mpt_read_config_regs(mpt);
495
496	/*
497	 * Disable PIO until we need it
498	 */
499	pci_disable_io(dev, SYS_RES_IOPORT);
500
501	switch (mpt->role) {
502	case MPT_ROLE_TARGET:
503		break;
504	case MPT_ROLE_INITIATOR:
505		break;
506	case MPT_ROLE_TARGET|MPT_ROLE_INITIATOR:
507		mpt->disabled = 1;
508		mpt_prt(mpt, "dual roles unsupported\n");
509		goto bad;
510	case MPT_ROLE_NONE:
511		device_printf(dev, "role of NONE same as disable\n");
512		mpt->disabled = 1;
513		goto bad;
514	}
515
516	/* Initialize the hardware */
517	if (mpt->disabled == 0) {
518		MPT_LOCK(mpt);
519		if (mpt_attach(mpt) != 0) {
520			MPT_UNLOCK(mpt);
521			goto bad;
522		}
523		MPT_UNLOCK(mpt);
524	} else {
525		mpt_prt(mpt, "device disabled at user request\n");
526		goto bad;
527	}
528
529	mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
530	    dev, SHUTDOWN_PRI_DEFAULT);
531
532	if (mpt->eh == NULL) {
533		mpt_prt(mpt, "shutdown event registration failed\n");
534		MPT_LOCK(mpt);
535		(void) mpt_detach(mpt);
536		MPT_UNLOCK(mpt);
537		goto bad;
538	}
539	return (0);
540
541bad:
542	mpt_dma_mem_free(mpt);
543	mpt_free_bus_resources(mpt);
544
545	/*
546	 * but return zero to preserve unit numbering
547	 */
548	return (0);
549}
550
551/*
552 * Free bus resources
553 */
554static void
555mpt_free_bus_resources(struct mpt_softc *mpt)
556{
557	if (mpt->ih) {
558		bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
559		mpt->ih = 0;
560	}
561
562	if (mpt->pci_irq) {
563		bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq);
564		mpt->pci_irq = 0;
565	}
566
567	if (mpt->pci_pio_reg) {
568		bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid,
569			mpt->pci_pio_reg);
570		mpt->pci_pio_reg = 0;
571	}
572	if (mpt->pci_reg) {
573		bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid,
574			mpt->pci_reg);
575		mpt->pci_reg = 0;
576	}
577	MPT_LOCK_DESTROY(mpt);
578}
579
580
581/*
582 * Disconnect ourselves from the system.
583 */
584static int
585mpt_pci_detach(device_t dev)
586{
587	struct mpt_softc *mpt;
588
589	mpt  = (struct mpt_softc*)device_get_softc(dev);
590
591	if (mpt) {
592		MPT_LOCK(mpt);
593		mpt_disable_ints(mpt);
594		mpt_detach(mpt);
595		mpt_reset(mpt, /*reinit*/FALSE);
596		mpt_dma_mem_free(mpt);
597		mpt_free_bus_resources(mpt);
598		if (mpt->raid_volumes != NULL && mpt->ioc_page2 != NULL) {
599			int i;
600			for (i = 0; i < mpt->ioc_page2->MaxVolumes; i++) {
601				struct mpt_raid_volume *mpt_vol;
602
603				mpt_vol = &mpt->raid_volumes[i];
604				if (mpt_vol->config_page) {
605					free(mpt_vol->config_page, M_DEVBUF);
606				}
607			}
608		}
609		if (mpt->ioc_page2 != NULL)
610			free(mpt->ioc_page2, M_DEVBUF);
611		if (mpt->ioc_page3 != NULL)
612			free(mpt->ioc_page3, M_DEVBUF);
613		if (mpt->raid_volumes != NULL)
614			free(mpt->raid_volumes, M_DEVBUF);
615		if (mpt->raid_disks != NULL)
616			free(mpt->raid_disks, M_DEVBUF);
617		if (mpt->eh != NULL)
618                        EVENTHANDLER_DEREGISTER(shutdown_final, mpt->eh);
619		MPT_UNLOCK(mpt);
620	}
621	return(0);
622}
623
624
625/*
626 * Disable the hardware
627 */
628static int
629mpt_pci_shutdown(device_t dev)
630{
631	struct mpt_softc *mpt;
632
633	mpt = (struct mpt_softc *)device_get_softc(dev);
634	if (mpt) {
635		int r;
636		MPT_LOCK(mpt);
637		r = mpt_shutdown(mpt);
638		MPT_UNLOCK(mpt);
639		return (r);
640	}
641	return(0);
642}
643
644static int
645mpt_dma_mem_alloc(struct mpt_softc *mpt)
646{
647	int i, error, nsegs;
648	uint8_t *vptr;
649	uint32_t pptr, end;
650	size_t len;
651	struct mpt_map_info mi;
652	device_t dev = mpt->dev;
653
654	/* Check if we alreay have allocated the reply memory */
655	if (mpt->reply_phys != 0) {
656		return 0;
657	}
658
659	len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
660#ifdef	RELENG_4
661	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
662	if (mpt->request_pool == NULL) {
663		device_printf(dev, "cannot allocate request pool\n");
664		return (1);
665	}
666	bzero(mpt->request_pool, len);
667#else
668	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
669	if (mpt->request_pool == NULL) {
670		device_printf(dev, "cannot allocate request pool\n");
671		return (1);
672	}
673#endif
674
675	/*
676	 * Create a parent dma tag for this device.
677	 *
678	 * Align at byte boundaries, limit to 32-bit addressing for
679	 * request/reply queues.
680	 */
681	if (mpt_dma_tag_create(mpt, /*parent*/NULL, /*alignment*/1,
682	    /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
683	    /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
684	    /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
685	    /*nsegments*/BUS_SPACE_MAXSIZE_32BIT,
686	    /*maxsegsz*/BUS_SPACE_UNRESTRICTED, /*flags*/0,
687	    &mpt->parent_dmat) != 0) {
688		device_printf(dev, "cannot create parent dma tag\n");
689		return (1);
690	}
691
692	/* Create a child tag for reply buffers */
693	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 2 * PAGE_SIZE,
694	    0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
695	    NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
696	    &mpt->reply_dmat) != 0) {
697		device_printf(dev, "cannot create a dma tag for replies\n");
698		return (1);
699	}
700
701	/* Allocate some DMA accessable memory for replies */
702	if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
703	    BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
704		device_printf(dev,
705		    "cannot allocate %lu bytes of reply memory\n",
706		    (u_long) (2 * PAGE_SIZE));
707		return (1);
708	}
709
710	mi.mpt = mpt;
711	mi.error = 0;
712
713	/* Load and lock it into "bus space" */
714	bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
715	    2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
716
717	if (mi.error) {
718		device_printf(dev,
719		    "error %d loading dma map for DMA reply queue\n", mi.error);
720		return (1);
721	}
722	mpt->reply_phys = mi.phys;
723
724	/* Create a child tag for data buffers */
725
726	/*
727	 * XXX: we should say that nsegs is 'unrestricted, but that
728	 * XXX: tickles a horrible bug in the busdma code. Instead,
729	 * XXX: we'll derive a reasonable segment limit from MAXPHYS
730	 */
731	nsegs = (MAXPHYS / PAGE_SIZE) + 1;
732	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1,
733	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
734	    NULL, NULL, MAXBSIZE, nsegs, BUS_SPACE_MAXSIZE_32BIT, 0,
735	    &mpt->buffer_dmat) != 0) {
736		device_printf(dev,
737		    "cannot create a dma tag for data buffers\n");
738		return (1);
739	}
740
741	/* Create a child tag for request buffers */
742	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE,
743	    0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
744	    NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0,
745	    &mpt->request_dmat) != 0) {
746		device_printf(dev, "cannot create a dma tag for requests\n");
747		return (1);
748	}
749
750	/* Allocate some DMA accessable memory for requests */
751	if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
752	    BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
753		device_printf(dev,
754		    "cannot allocate %d bytes of request memory\n",
755		    MPT_REQ_MEM_SIZE(mpt));
756		return (1);
757	}
758
759	mi.mpt = mpt;
760	mi.error = 0;
761
762	/* Load and lock it into "bus space" */
763        bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
764	    MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0);
765
766	if (mi.error) {
767		device_printf(dev,
768		    "error %d loading dma map for DMA request queue\n",
769		    mi.error);
770		return (1);
771	}
772	mpt->request_phys = mi.phys;
773
774	i = 0;
775	pptr =  mpt->request_phys;
776	vptr =  mpt->request;
777	end = pptr + MPT_REQ_MEM_SIZE(mpt);
778	while(pptr < end) {
779		request_t *req = &mpt->request_pool[i];
780		req->index = i++;
781
782		/* Store location of Request Data */
783		req->req_pbuf = pptr;
784		req->req_vbuf = vptr;
785
786		pptr += MPT_REQUEST_AREA;
787		vptr += MPT_REQUEST_AREA;
788
789		req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
790		req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
791
792		error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
793		if (error) {
794			device_printf(dev,
795			     "error %d creating per-cmd DMA maps\n", error);
796			return (1);
797		}
798	}
799	return (0);
800}
801
802
803
804/* Deallocate memory that was allocated by mpt_dma_mem_alloc
805 */
806static void
807mpt_dma_mem_free(struct mpt_softc *mpt)
808{
809	int i;
810
811        /* Make sure we aren't double destroying */
812        if (mpt->reply_dmat == 0) {
813		if (mpt->verbose >= MPT_PRT_DEBUG)
814			device_printf(mpt->dev,"Already released dma memory\n");
815		return;
816        }
817
818	for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) {
819		bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap);
820	}
821	bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
822	bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
823	bus_dma_tag_destroy(mpt->request_dmat);
824	bus_dma_tag_destroy(mpt->buffer_dmat);
825	bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
826	bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
827	bus_dma_tag_destroy(mpt->reply_dmat);
828	bus_dma_tag_destroy(mpt->parent_dmat);
829	mpt->reply_dmat = 0;
830	free(mpt->request_pool, M_DEVBUF);
831	mpt->request_pool = 0;
832
833}
834
835
836
837/* Reads modifiable (via PCI transactions) config registers */
838static void
839mpt_read_config_regs(struct mpt_softc *mpt)
840{
841	mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
842	mpt->pci_cfg.LatencyTimer_LineSize =
843	    pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
844	mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
845	mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
846	mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
847	mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
848	mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
849	mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
850	mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
851	mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
852}
853
854/* Sets modifiable config registers */
855void
856mpt_set_config_regs(struct mpt_softc *mpt)
857{
858	uint32_t val;
859
860#define MPT_CHECK(reg, offset, size)					\
861	val = pci_read_config(mpt->dev, offset, size);			\
862	if (mpt->pci_cfg.reg != val) {					\
863		mpt_prt(mpt,						\
864		    "Restoring " #reg " to 0x%X from 0x%X\n",		\
865		    mpt->pci_cfg.reg, val);				\
866	}
867
868	if (mpt->verbose >= MPT_PRT_DEBUG) {
869		MPT_CHECK(Command, PCIR_COMMAND, 2);
870		MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
871		MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
872		MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
873		MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
874		MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
875		MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
876		MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
877		MPT_CHECK(IntLine, PCIR_INTLINE, 1);
878		MPT_CHECK(PMCSR, 0x44, 4);
879	}
880#undef MPT_CHECK
881
882	pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
883	pci_write_config(mpt->dev, PCIR_CACHELNSZ,
884	    mpt->pci_cfg.LatencyTimer_LineSize, 2);
885	pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
886	pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
887	pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
888	pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
889	pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
890	pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
891	pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
892	pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
893}
894
895static void
896mpt_pci_intr(void *arg)
897{
898	struct mpt_softc *mpt;
899
900	mpt = (struct mpt_softc *)arg;
901	MPT_LOCK(mpt);
902	mpt_intr(mpt);
903	MPT_UNLOCK(mpt);
904}
905