mpt_pci.c revision 155521
1/*-
2 * PCI specific probe and attach routines for LSI Fusion Adapters
3 * FreeBSD Version.
4 *
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8 * Feral Software
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice immediately at the beginning of the file, without modification,
16 *    this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32/*
33 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
34 * Copyright (c) 2005, WHEEL Sp. z o.o.
35 * Copyright (c) 2004, 2005 Justin T. Gibbs
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions are
40 * met:
41 * 1. Redistributions of source code must retain the above copyright
42 *    notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
44 *    substantially similar to the "NO WARRANTY" disclaimer below
45 *    ("Disclaimer") and any redistribution must be conditioned upon including
46 *    a substantially similar Disclaimer requirement for further binary
47 *    redistribution.
48 * 3. Neither the names of the above listed copyright holders nor the names
49 *    of any contributors may be used to endorse or promote products derived
50 *    from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
53 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
56 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
62 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 */
64
65#include <sys/cdefs.h>
66__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 155521 2006-02-11 01:35:29Z mjacob $");
67
68#include <dev/mpt/mpt.h>
69#include <dev/mpt/mpt_cam.h>
70#include <dev/mpt/mpt_raid.h>
71
72
73#ifndef	PCI_VENDOR_LSI
74#define	PCI_VENDOR_LSI			0x1000
75#endif
76
77#ifndef	PCI_PRODUCT_LSI_FC909
78#define	PCI_PRODUCT_LSI_FC909		0x0620
79#endif
80
81#ifndef	PCI_PRODUCT_LSI_FC909A
82#define	PCI_PRODUCT_LSI_FC909A		0x0621
83#endif
84
85#ifndef	PCI_PRODUCT_LSI_FC919
86#define	PCI_PRODUCT_LSI_FC919		0x0624
87#endif
88
89#ifndef	PCI_PRODUCT_LSI_FC929
90#define	PCI_PRODUCT_LSI_FC929		0x0622
91#endif
92
93#ifndef	PCI_PRODUCT_LSI_FC929X
94#define	PCI_PRODUCT_LSI_FC929X		0x0626
95#endif
96
97#ifndef	PCI_PRODUCT_LSI_1030
98#define	PCI_PRODUCT_LSI_1030		0x0030
99#endif
100
101#ifndef	PCI_PRODUCT_LSI_SAS1064
102#define PCI_PRODUCT_LSI_SAS1064		0x0050
103#endif
104
105#ifndef PCI_PRODUCT_LSI_SAS1064A
106#define PCI_PRODUCT_LSI_SAS1064A	0x005C
107#endif
108
109#ifndef PCI_PRODUCT_LSI_SAS1064E
110#define PCI_PRODUCT_LSI_SAS1064E	0x0056
111#endif
112
113#ifndef PCI_PRODUCT_LSI_SAS1066
114#define PCI_PRODUCT_LSI_SAS1066		0x005E
115#endif
116
117#ifndef PCI_PRODUCT_LSI_SAS1066E
118#define PCI_PRODUCT_LSI_SAS1066E	0x005A
119#endif
120
121#ifndef PCI_PRODUCT_LSI_SAS1068
122#define PCI_PRODUCT_LSI_SAS1068		0x0054
123#endif
124
125#ifndef PCI_PRODUCT_LSI_SAS1068E
126#define PCI_PRODUCT_LSI_SAS1068E	0x0058
127#endif
128
129#ifndef PCI_PRODUCT_LSI_SAS1078
130#define PCI_PRODUCT_LSI_SAS1078		0x0060
131#endif
132
133#ifndef	PCIM_CMD_SERRESPEN
134#define	PCIM_CMD_SERRESPEN	0x0100
135#endif
136
137
138#define	MPT_IO_BAR	0
139#define	MPT_MEM_BAR	1
140
141static int mpt_pci_probe(device_t);
142static int mpt_pci_attach(device_t);
143static void mpt_free_bus_resources(struct mpt_softc *mpt);
144static int mpt_pci_detach(device_t);
145static int mpt_pci_shutdown(device_t);
146static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
147static void mpt_dma_mem_free(struct mpt_softc *mpt);
148static void mpt_read_config_regs(struct mpt_softc *mpt);
149static void mpt_pci_intr(void *);
150
151static device_method_t mpt_methods[] = {
152	/* Device interface */
153	DEVMETHOD(device_probe,		mpt_pci_probe),
154	DEVMETHOD(device_attach,	mpt_pci_attach),
155	DEVMETHOD(device_detach,	mpt_pci_detach),
156	DEVMETHOD(device_shutdown,	mpt_pci_shutdown),
157	{ 0, 0 }
158};
159
160static driver_t mpt_driver = {
161	"mpt", mpt_methods, sizeof(struct mpt_softc)
162};
163static devclass_t mpt_devclass;
164DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
165MODULE_VERSION(mpt, 1);
166
167static int
168mpt_pci_probe(device_t dev)
169{
170	char *desc;
171
172	if (pci_get_vendor(dev) != PCI_VENDOR_LSI)
173		return (ENXIO);
174
175	switch ((pci_get_device(dev) & ~1)) {
176	case PCI_PRODUCT_LSI_FC909:
177		desc = "LSILogic FC909 FC Adapter";
178		break;
179	case PCI_PRODUCT_LSI_FC909A:
180		desc = "LSILogic FC909A FC Adapter";
181		break;
182	case PCI_PRODUCT_LSI_FC919:
183		desc = "LSILogic FC919 FC Adapter";
184		break;
185	case PCI_PRODUCT_LSI_FC929:
186		desc = "LSILogic FC929 FC Adapter";
187		break;
188	case PCI_PRODUCT_LSI_FC929X:
189		desc = "LSILogic FC929X FC Adapter";
190		break;
191	case PCI_PRODUCT_LSI_1030:
192		desc = "LSILogic 1030 Ultra4 Adapter";
193		break;
194	case PCI_PRODUCT_LSI_SAS1064:
195	case PCI_PRODUCT_LSI_SAS1064A:
196	case PCI_PRODUCT_LSI_SAS1064E:
197	case PCI_PRODUCT_LSI_SAS1066:
198	case PCI_PRODUCT_LSI_SAS1066E:
199	case PCI_PRODUCT_LSI_SAS1068:
200	case PCI_PRODUCT_LSI_SAS1068E:
201	case PCI_PRODUCT_LSI_SAS1078:
202		desc = "LSILogic SAS Adapter";
203		break;
204	default:
205		return (ENXIO);
206	}
207
208	device_set_desc(dev, desc);
209	return (0);
210}
211
212#ifdef	RELENG_4
213static void
214mpt_set_options(struct mpt_softc *mpt)
215{
216	int bitmap;
217
218	bitmap = 0;
219	if (getenv_int("mpt_disable", &bitmap)) {
220		if (bitmap & (1 << mpt->unit)) {
221			mpt->disabled = 1;
222		}
223	}
224
225	bitmap = 0;
226	if (getenv_int("mpt_debug", &bitmap)) {
227		if (bitmap & (1 << mpt->unit)) {
228			mpt->verbose = MPT_PRT_DEBUG;
229		}
230	}
231
232}
233#else
234static void
235mpt_set_options(struct mpt_softc *mpt)
236{
237	int tval;
238
239	tval = 0;
240	if (resource_int_value(device_get_name(mpt->dev),
241	    device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
242		mpt->disabled = 1;
243	}
244	tval = 0;
245	if (resource_int_value(device_get_name(mpt->dev),
246	    device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
247		mpt->verbose += tval;
248	}
249}
250#endif
251
252
253static void
254mpt_link_peer(struct mpt_softc *mpt)
255{
256	struct mpt_softc *mpt2;
257
258	if (mpt->unit == 0)
259		return;
260
261	/*
262	 * XXX: depends on probe order
263	 */
264	mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
265
266	if (mpt2 == NULL) {
267		return;
268	}
269	if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
270		return;
271	}
272	if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
273		return;
274	}
275	mpt->mpt2 = mpt2;
276	mpt2->mpt2 = mpt;
277	if (mpt->verbose >= MPT_PRT_DEBUG) {
278		mpt_prt(mpt, "linking with peer (mpt%d)\n",
279		    device_get_unit(mpt2->dev));
280	}
281}
282
283
284static int
285mpt_pci_attach(device_t dev)
286{
287	struct mpt_softc *mpt;
288	int		  iqd;
289	uint32_t	  data, cmd;
290
291	/* Allocate the softc structure */
292	mpt  = (struct mpt_softc*)device_get_softc(dev);
293	if (mpt == NULL) {
294		device_printf(dev, "cannot allocate softc\n");
295		return (ENOMEM);
296	}
297	bzero(mpt, sizeof(struct mpt_softc));
298	switch ((pci_get_device(dev) & ~1)) {
299	case PCI_PRODUCT_LSI_FC909:
300	case PCI_PRODUCT_LSI_FC909A:
301	case PCI_PRODUCT_LSI_FC919:
302	case PCI_PRODUCT_LSI_FC929:
303		mpt->is_fc = 1;
304		break;
305	case PCI_PRODUCT_LSI_SAS1064:
306	case PCI_PRODUCT_LSI_SAS1064A:
307	case PCI_PRODUCT_LSI_SAS1064E:
308	case PCI_PRODUCT_LSI_SAS1066:
309	case PCI_PRODUCT_LSI_SAS1066E:
310	case PCI_PRODUCT_LSI_SAS1068:
311	case PCI_PRODUCT_LSI_SAS1068E:
312	case PCI_PRODUCT_LSI_SAS1078:
313		mpt->is_sas = 1;
314		break;
315	default:
316		break;
317	}
318	mpt->dev = dev;
319	mpt->unit = device_get_unit(dev);
320	mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
321	mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
322	mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
323	mpt->verbose = MPT_PRT_NONE;
324	mpt_set_options(mpt);
325	if (mpt->verbose == MPT_PRT_NONE) {
326		mpt->verbose = MPT_PRT_WARN;
327		/* Print INFO level (if any) if bootverbose is set */
328		mpt->verbose += (bootverbose != 0)? 1 : 0;
329	}
330	/* Make sure memory access decoders are enabled */
331	cmd = pci_read_config(dev, PCIR_COMMAND, 2);
332	if ((cmd & PCIM_CMD_MEMEN) == 0) {
333		device_printf(dev, "Memory accesses disabled");
334		goto bad;
335	}
336
337	/*
338	 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
339	 */
340	cmd |=
341	    PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
342	    PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
343	pci_write_config(dev, PCIR_COMMAND, cmd, 2);
344
345	/*
346	 * Make sure we've disabled the ROM.
347	 */
348	data = pci_read_config(dev, PCIR_BIOS, 4);
349	data &= ~1;
350	pci_write_config(dev, PCIR_BIOS, data, 4);
351
352	/*
353	 * Is this part a dual?
354	 * If so, link with our partner (around yet)
355	 */
356	if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
357	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
358		mpt_link_peer(mpt);
359	}
360
361	/*
362	 * Set up register access.  PIO mode is required for
363	 * certain reset operations (but must be disabled for
364	 * some cards otherwise).
365	 */
366	mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR);
367	mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT,
368			    &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE);
369	if (mpt->pci_pio_reg == NULL) {
370		device_printf(dev, "unable to map registers in PIO mode\n");
371		goto bad;
372	}
373	mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
374	mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
375
376	/* Allocate kernel virtual memory for the 9x9's Mem0 region */
377	mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR);
378	mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
379			&mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE);
380	if (mpt->pci_reg == NULL) {
381		device_printf(dev, "Unable to memory map registers.\n");
382		if (mpt->is_sas) {
383			device_printf(dev, "Giving Up.\n");
384			goto bad;
385		}
386		device_printf(dev, "Falling back to PIO mode.\n");
387		mpt->pci_st = mpt->pci_pio_st;
388		mpt->pci_sh = mpt->pci_pio_sh;
389	} else {
390		mpt->pci_st = rman_get_bustag(mpt->pci_reg);
391		mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
392	}
393
394	/* Get a handle to the interrupt */
395	iqd = 0;
396#if __FreeBSD_version < 500000
397	mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0, 1,
398	    RF_ACTIVE | RF_SHAREABLE);
399#else
400	mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
401	    RF_ACTIVE | RF_SHAREABLE);
402#endif
403	if (mpt->pci_irq == NULL) {
404		device_printf(dev, "could not allocate interrupt\n");
405		goto bad;
406	}
407
408	MPT_LOCK_SETUP(mpt);
409
410	/* Disable interrupts at the part */
411	mpt_disable_ints(mpt);
412
413	/* Register the interrupt handler */
414	if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr,
415	    mpt, &mpt->ih)) {
416		device_printf(dev, "could not setup interrupt\n");
417		goto bad;
418	}
419
420	/* Allocate dma memory */
421/* XXX JGibbs -Should really be done based on IOCFacts. */
422	if (mpt_dma_mem_alloc(mpt)) {
423		device_printf(dev, "Could not allocate DMA memory\n");
424		goto bad;
425	}
426
427	/*
428	 * Save the PCI config register values
429 	 *
430	 * Hard resets are known to screw up the BAR for diagnostic
431	 * memory accesses (Mem1).
432	 *
433	 * Using Mem1 is known to make the chip stop responding to
434	 * configuration space transfers, so we need to save it now
435	 */
436
437	mpt_read_config_regs(mpt);
438
439	/*
440	 * Disable PIO until we need it
441	 */
442	pci_disable_io(dev, SYS_RES_IOPORT);
443
444	/* Initialize the hardware */
445	if (mpt->disabled == 0) {
446
447		MPT_LOCK(mpt);
448		if (mpt_attach(mpt) != 0) {
449			MPT_UNLOCK(mpt);
450			goto bad;
451		}
452	}
453
454	return (0);
455
456bad:
457	mpt_dma_mem_free(mpt);
458	mpt_free_bus_resources(mpt);
459
460	/*
461	 * but return zero to preserve unit numbering
462	 */
463	return (0);
464}
465
466/*
467 * Free bus resources
468 */
469static void
470mpt_free_bus_resources(struct mpt_softc *mpt)
471{
472	if (mpt->ih) {
473		bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
474		mpt->ih = 0;
475	}
476
477	if (mpt->pci_irq) {
478		bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq);
479		mpt->pci_irq = 0;
480	}
481
482	if (mpt->pci_pio_reg) {
483		bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid,
484			mpt->pci_pio_reg);
485		mpt->pci_pio_reg = 0;
486	}
487	if (mpt->pci_reg) {
488		bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid,
489			mpt->pci_reg);
490		mpt->pci_reg = 0;
491	}
492	MPT_LOCK_DESTROY(mpt);
493}
494
495
496/*
497 * Disconnect ourselves from the system.
498 */
499static int
500mpt_pci_detach(device_t dev)
501{
502	struct mpt_softc *mpt;
503
504	mpt  = (struct mpt_softc*)device_get_softc(dev);
505	mpt_prt(mpt, "mpt_detach\n");
506
507	if (mpt) {
508		mpt_disable_ints(mpt);
509		mpt_detach(mpt);
510		mpt_reset(mpt, /*reinit*/FALSE);
511		mpt_dma_mem_free(mpt);
512		mpt_free_bus_resources(mpt);
513		if (mpt->raid_volumes != NULL
514		 && mpt->ioc_page2 != NULL) {
515			int i;
516
517			for (i = 0; i < mpt->ioc_page2->MaxVolumes; i++) {
518				struct mpt_raid_volume *mpt_vol;
519
520				mpt_vol = &mpt->raid_volumes[i];
521				if (mpt_vol->config_page)
522					free(mpt_vol->config_page, M_DEVBUF);
523			}
524		}
525		if (mpt->ioc_page2 != NULL)
526			free(mpt->ioc_page2, M_DEVBUF);
527		if (mpt->ioc_page3 != NULL)
528			free(mpt->ioc_page3, M_DEVBUF);
529		if (mpt->raid_volumes != NULL)
530			free(mpt->raid_volumes, M_DEVBUF);
531		if (mpt->raid_disks != NULL)
532			free(mpt->raid_disks, M_DEVBUF);
533		if (mpt->eh != NULL)
534                        EVENTHANDLER_DEREGISTER(shutdown_final, mpt->eh);
535	}
536	return(0);
537}
538
539
540/*
541 * Disable the hardware
542 * XXX - Called too early by New Bus!!!  ???
543 */
544static int
545mpt_pci_shutdown(device_t dev)
546{
547	struct mpt_softc *mpt;
548
549	mpt = (struct mpt_softc *)device_get_softc(dev);
550	if (mpt)
551		return (mpt_shutdown(mpt));
552	return(0);
553}
554
555static int
556mpt_dma_mem_alloc(struct mpt_softc *mpt)
557{
558	int i, error, nsegs;
559	uint8_t *vptr;
560	uint32_t pptr, end;
561	size_t len;
562	struct mpt_map_info mi;
563	device_t dev = mpt->dev;
564
565	/* Check if we alreay have allocated the reply memory */
566	if (mpt->reply_phys != 0) {
567		return 0;
568	}
569
570	len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
571#ifdef	RELENG_4
572	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
573	if (mpt->request_pool == NULL) {
574		device_printf(dev, "cannot allocate request pool\n");
575		return (1);
576	}
577	bzero(mpt->request_pool, len);
578#else
579	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
580	if (mpt->request_pool == NULL) {
581		device_printf(dev, "cannot allocate request pool\n");
582		return (1);
583	}
584#endif
585
586	/*
587	 * Create a parent dma tag for this device.
588	 *
589	 * Align at byte boundaries, limit to 32-bit addressing for
590	 * request/reply queues.
591	 */
592	if (mpt_dma_tag_create(mpt, /*parent*/NULL, /*alignment*/1,
593	    /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
594	    /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
595	    /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
596	    /*nsegments*/BUS_SPACE_MAXSIZE_32BIT,
597	    /*maxsegsz*/BUS_SPACE_UNRESTRICTED, /*flags*/0,
598	    &mpt->parent_dmat) != 0) {
599		device_printf(dev, "cannot create parent dma tag\n");
600		return (1);
601	}
602
603	/* Create a child tag for reply buffers */
604	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 2 * PAGE_SIZE,
605	    0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
606	    NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
607	    &mpt->reply_dmat) != 0) {
608		device_printf(dev, "cannot create a dma tag for replies\n");
609		return (1);
610	}
611
612	/* Allocate some DMA accessable memory for replies */
613	if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
614	    BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
615		device_printf(dev,
616		    "cannot allocate %lu bytes of reply memory\n",
617		    (u_long) (2 * PAGE_SIZE));
618		return (1);
619	}
620
621	mi.mpt = mpt;
622	mi.error = 0;
623
624	/* Load and lock it into "bus space" */
625	bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
626	    2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
627
628	if (mi.error) {
629		device_printf(dev,
630		    "error %d loading dma map for DMA reply queue\n", mi.error);
631		return (1);
632	}
633	mpt->reply_phys = mi.phys;
634
635	/* Create a child tag for data buffers */
636
637	/*
638	 * XXX: we should say that nsegs is 'unrestricted, but that
639	 * XXX: tickles a horrible bug in the busdma code. Instead,
640	 * XXX: we'll derive a reasonable segment limit from MAXPHYS
641	 */
642	nsegs = (MAXPHYS / PAGE_SIZE) + 1;
643	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1,
644	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
645	    NULL, NULL, MAXBSIZE, nsegs, BUS_SPACE_MAXSIZE_32BIT, 0,
646	    &mpt->buffer_dmat) != 0) {
647		device_printf(dev,
648		    "cannot create a dma tag for data buffers\n");
649		return (1);
650	}
651
652	/* Create a child tag for request buffers */
653	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE,
654	    0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
655	    NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0,
656	    &mpt->request_dmat) != 0) {
657		device_printf(dev, "cannot create a dma tag for requests\n");
658		return (1);
659	}
660
661	/* Allocate some DMA accessable memory for requests */
662	if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
663	    BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
664		device_printf(dev,
665		    "cannot allocate %d bytes of request memory\n",
666		    MPT_REQ_MEM_SIZE(mpt));
667		return (1);
668	}
669
670	mi.mpt = mpt;
671	mi.error = 0;
672
673	/* Load and lock it into "bus space" */
674        bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
675	    MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0);
676
677	if (mi.error) {
678		device_printf(dev,
679		    "error %d loading dma map for DMA request queue\n",
680		    mi.error);
681		return (1);
682	}
683	mpt->request_phys = mi.phys;
684
685	i = 0;
686	pptr =  mpt->request_phys;
687	vptr =  mpt->request;
688	end = pptr + MPT_REQ_MEM_SIZE(mpt);
689	while(pptr < end) {
690		request_t *req = &mpt->request_pool[i];
691		req->index = i++;
692
693		/* Store location of Request Data */
694		req->req_pbuf = pptr;
695		req->req_vbuf = vptr;
696
697		pptr += MPT_REQUEST_AREA;
698		vptr += MPT_REQUEST_AREA;
699
700		req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
701		req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
702
703		error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
704		if (error) {
705			device_printf(dev,
706			     "error %d creating per-cmd DMA maps\n", error);
707			return (1);
708		}
709	}
710	return (0);
711}
712
713
714
715/* Deallocate memory that was allocated by mpt_dma_mem_alloc
716 */
717static void
718mpt_dma_mem_free(struct mpt_softc *mpt)
719{
720	int i;
721
722        /* Make sure we aren't double destroying */
723        if (mpt->reply_dmat == 0) {
724		if (mpt->verbose >= MPT_PRT_DEBUG)
725			device_printf(mpt->dev,"Already released dma memory\n");
726		return;
727        }
728
729	for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) {
730		bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap);
731	}
732	bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
733	bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
734	bus_dma_tag_destroy(mpt->request_dmat);
735	bus_dma_tag_destroy(mpt->buffer_dmat);
736	bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
737	bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
738	bus_dma_tag_destroy(mpt->reply_dmat);
739	bus_dma_tag_destroy(mpt->parent_dmat);
740	mpt->reply_dmat = 0;
741	free(mpt->request_pool, M_DEVBUF);
742	mpt->request_pool = 0;
743
744}
745
746
747
748/* Reads modifiable (via PCI transactions) config registers */
749static void
750mpt_read_config_regs(struct mpt_softc *mpt)
751{
752	mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
753	mpt->pci_cfg.LatencyTimer_LineSize =
754	    pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
755	mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
756	mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
757	mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
758	mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
759	mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
760	mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
761	mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
762	mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
763}
764
765/* Sets modifiable config registers */
766void
767mpt_set_config_regs(struct mpt_softc *mpt)
768{
769	uint32_t val;
770
771#define MPT_CHECK(reg, offset, size)					\
772	val = pci_read_config(mpt->dev, offset, size);			\
773	if (mpt->pci_cfg.reg != val) {					\
774		mpt_prt(mpt,						\
775		    "Restoring " #reg " to 0x%X from 0x%X\n",		\
776		    mpt->pci_cfg.reg, val);				\
777	}
778
779	if (mpt->verbose >= MPT_PRT_DEBUG) {
780		MPT_CHECK(Command, PCIR_COMMAND, 2);
781		MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
782		MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
783		MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
784		MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
785		MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
786		MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
787		MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
788		MPT_CHECK(IntLine, PCIR_INTLINE, 1);
789		MPT_CHECK(PMCSR, 0x44, 4);
790	}
791#undef MPT_CHECK
792
793	pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
794	pci_write_config(mpt->dev, PCIR_CACHELNSZ,
795	    mpt->pci_cfg.LatencyTimer_LineSize, 2);
796	pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
797	pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
798	pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
799	pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
800	pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
801	pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
802	pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
803	pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
804}
805
806static void
807mpt_pci_intr(void *arg)
808{
809	struct mpt_softc *mpt;
810
811	mpt = (struct mpt_softc *)arg;
812	MPT_LOCK(mpt);
813	mpt_intr(mpt);
814	MPT_UNLOCK(mpt);
815}
816