mpt_pci.c revision 147883
1/*-
2 * PCI specific probe and attach routines for LSI Fusion Adapters
3 * FreeBSD Version.
4 *
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8 * Feral Software
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice immediately at the beginning of the file, without modification,
16 *    this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32/*
33 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
34 * Copyright (c) 2005, WHEEL Sp. z o.o.
35 * Copyright (c) 2004, 2005 Justin T. Gibbs
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions are
40 * met:
41 * 1. Redistributions of source code must retain the above copyright
42 *    notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
44 *    substantially similar to the "NO WARRANTY" disclaimer below
45 *    ("Disclaimer") and any redistribution must be conditioned upon including
46 *    a substantially similar Disclaimer requirement for further binary
47 *    redistribution.
48 * 3. Neither the name of the LSI Logic Corporation nor the names of its
49 *    contributors may be used to endorse or promote products derived from
50 *    this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
53 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
56 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
62 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 */
64
65#include <sys/cdefs.h>
66__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 147883 2005-07-10 15:05:39Z scottl $");
67
68#include <dev/mpt/mpt.h>
69#include <dev/mpt/mpt_cam.h>
70#include <dev/mpt/mpt_raid.h>
71
72#if __FreeBSD_version < 500000
73#include <pci/pcireg.h>
74#include <pci/pcivar.h>
75#else
76#include <dev/pci/pcireg.h>
77#include <dev/pci/pcivar.h>
78#endif
79
80#ifndef	PCI_VENDOR_LSI
81#define	PCI_VENDOR_LSI			0x1000
82#endif
83
84#ifndef	PCI_PRODUCT_LSI_FC909
85#define	PCI_PRODUCT_LSI_FC909		0x0620
86#endif
87
88#ifndef	PCI_PRODUCT_LSI_FC909A
89#define	PCI_PRODUCT_LSI_FC909A		0x0621
90#endif
91
92#ifndef	PCI_PRODUCT_LSI_FC919
93#define	PCI_PRODUCT_LSI_FC919		0x0624
94#endif
95
96#ifndef	PCI_PRODUCT_LSI_FC929
97#define	PCI_PRODUCT_LSI_FC929		0x0622
98#endif
99
100#ifndef	PCI_PRODUCT_LSI_1030
101#define	PCI_PRODUCT_LSI_1030		0x0030
102#endif
103
104#ifndef	PCIM_CMD_SERRESPEN
105#define	PCIM_CMD_SERRESPEN	0x0100
106#endif
107
108
109
110#define	MPT_IO_BAR	0
111#define	MPT_MEM_BAR	1
112
113static int mpt_pci_probe(device_t);
114static int mpt_pci_attach(device_t);
115static void mpt_free_bus_resources(struct mpt_softc *mpt);
116static int mpt_pci_detach(device_t);
117static int mpt_pci_shutdown(device_t);
118static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
119static void mpt_dma_mem_free(struct mpt_softc *mpt);
120static void mpt_read_config_regs(struct mpt_softc *mpt);
121static void mpt_pci_intr(void *);
122
123static device_method_t mpt_methods[] = {
124	/* Device interface */
125	DEVMETHOD(device_probe,		mpt_pci_probe),
126	DEVMETHOD(device_attach,	mpt_pci_attach),
127	DEVMETHOD(device_detach,	mpt_pci_detach),
128	DEVMETHOD(device_shutdown,	mpt_pci_shutdown),
129	{ 0, 0 }
130};
131
132static driver_t mpt_driver = {
133	"mpt", mpt_methods, sizeof(struct mpt_softc)
134};
135static devclass_t mpt_devclass;
136DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
137MODULE_VERSION(mpt, 1);
138
139static int
140mpt_pci_probe(device_t dev)
141{
142	char *desc;
143
144	if (pci_get_vendor(dev) != PCI_VENDOR_LSI)
145		return (ENXIO);
146
147	switch ((pci_get_device(dev) & ~1)) {
148	case PCI_PRODUCT_LSI_FC909:
149		desc = "LSILogic FC909 FC Adapter";
150		break;
151	case PCI_PRODUCT_LSI_FC909A:
152		desc = "LSILogic FC909A FC Adapter";
153		break;
154	case PCI_PRODUCT_LSI_FC919:
155		desc = "LSILogic FC919 FC Adapter";
156		break;
157	case PCI_PRODUCT_LSI_FC929:
158		desc = "LSILogic FC929 FC Adapter";
159		break;
160	case PCI_PRODUCT_LSI_1030:
161		desc = "LSILogic 1030 Ultra4 Adapter";
162		break;
163	default:
164		return (ENXIO);
165	}
166
167	device_set_desc(dev, desc);
168	return (0);
169}
170
171#ifdef	RELENG_4
172static void
173mpt_set_options(struct mpt_softc *mpt)
174{
175	int bitmap;
176
177	bitmap = 0;
178	if (getenv_int("mpt_disable", &bitmap)) {
179		if (bitmap & (1 << mpt->unit)) {
180			mpt->disabled = 1;
181		}
182	}
183
184	bitmap = 0;
185	if (getenv_int("mpt_debug", &bitmap)) {
186		if (bitmap & (1 << mpt->unit)) {
187			mpt->verbose = MPT_PRT_DEBUG;
188		}
189	}
190
191}
192#else
193static void
194mpt_set_options(struct mpt_softc *mpt)
195{
196	int tval;
197
198	tval = 0;
199	if (resource_int_value(device_get_name(mpt->dev),
200	    device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
201		mpt->disabled = 1;
202	}
203	tval = 0;
204	if (resource_int_value(device_get_name(mpt->dev),
205	    device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
206		mpt->verbose += tval;
207	}
208}
209#endif
210
211
212static void
213mpt_link_peer(struct mpt_softc *mpt)
214{
215	struct mpt_softc *mpt2;
216
217	if (mpt->unit == 0)
218		return;
219
220	/*
221	 * XXX: depends on probe order
222	 */
223	mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
224
225	if (mpt2 == NULL) {
226		return;
227	}
228	if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
229		return;
230	}
231	if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
232		return;
233	}
234	mpt->mpt2 = mpt2;
235	mpt2->mpt2 = mpt;
236	if (mpt->verbose >= MPT_PRT_DEBUG) {
237		mpt_prt(mpt, "linking with peer (mpt%d)\n",
238		    device_get_unit(mpt2->dev));
239	}
240}
241
242
243static int
244mpt_pci_attach(device_t dev)
245{
246	struct mpt_softc *mpt;
247	int		  iqd;
248	uint32_t	  data, cmd;
249
250	/* Allocate the softc structure */
251	mpt  = (struct mpt_softc*)device_get_softc(dev);
252	if (mpt == NULL) {
253		device_printf(dev, "cannot allocate softc\n");
254		return (ENOMEM);
255	}
256	bzero(mpt, sizeof(struct mpt_softc));
257	switch ((pci_get_device(dev) & ~1)) {
258	case PCI_PRODUCT_LSI_FC909:
259	case PCI_PRODUCT_LSI_FC909A:
260	case PCI_PRODUCT_LSI_FC919:
261	case PCI_PRODUCT_LSI_FC929:
262		mpt->is_fc = 1;
263		break;
264	default:
265		break;
266	}
267	mpt->dev = dev;
268	mpt->unit = device_get_unit(dev);
269	mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
270	mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
271	mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
272	mpt_set_options(mpt);
273	mpt->verbose = MPT_PRT_INFO;
274	mpt->verbose += (bootverbose != 0)? 1 : 0;
275
276	/* Make sure memory access decoders are enabled */
277	cmd = pci_read_config(dev, PCIR_COMMAND, 2);
278	if ((cmd & PCIM_CMD_MEMEN) == 0) {
279		device_printf(dev, "Memory accesses disabled");
280		goto bad;
281	}
282
283	/*
284	 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
285	 */
286	cmd |=
287	    PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
288	    PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
289	pci_write_config(dev, PCIR_COMMAND, cmd, 2);
290
291	/*
292	 * Make sure we've disabled the ROM.
293	 */
294	data = pci_read_config(dev, PCIR_BIOS, 4);
295	data &= ~1;
296	pci_write_config(dev, PCIR_BIOS, data, 4);
297
298	/*
299	 * Is this part a dual?
300	 * If so, link with our partner (around yet)
301	 */
302	if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
303	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
304		mpt_link_peer(mpt);
305	}
306
307	/*
308	 * Set up register access.  PIO mode is required for
309	 * certain reset operations.
310	 */
311	mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR);
312	mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT,
313			    &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE);
314	if (mpt->pci_pio_reg == NULL) {
315		device_printf(dev, "unable to map registers in PIO mode\n");
316		goto bad;
317	}
318	mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
319	mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
320
321	/* Allocate kernel virtual memory for the 9x9's Mem0 region */
322	mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR);
323	mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
324			&mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE);
325	if (mpt->pci_reg == NULL) {
326		device_printf(dev, "Unable to memory map registers.\n");
327		device_printf(dev, "Falling back to PIO mode.\n");
328		mpt->pci_st = mpt->pci_pio_st;
329		mpt->pci_sh = mpt->pci_pio_sh;
330	} else {
331		mpt->pci_st = rman_get_bustag(mpt->pci_reg);
332		mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
333	}
334
335	/* Get a handle to the interrupt */
336	iqd = 0;
337#if __FreeBSD_version < 500000
338	mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0, 1,
339	    RF_ACTIVE | RF_SHAREABLE);
340#else
341	mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
342	    RF_ACTIVE | RF_SHAREABLE);
343#endif
344	if (mpt->pci_irq == NULL) {
345		device_printf(dev, "could not allocate interrupt\n");
346		goto bad;
347	}
348
349	MPT_LOCK_SETUP(mpt);
350
351	/* Disable interrupts at the part */
352	mpt_disable_ints(mpt);
353
354	/* Register the interrupt handler */
355	if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr,
356	    mpt, &mpt->ih)) {
357		device_printf(dev, "could not setup interrupt\n");
358		goto bad;
359	}
360
361	/* Allocate dma memory */
362/* XXX JGibbs -Should really be done based on IOCFacts. */
363	if (mpt_dma_mem_alloc(mpt)) {
364		device_printf(dev, "Could not allocate DMA memory\n");
365		goto bad;
366	}
367
368	/*
369	 * Save the PCI config register values
370 	 *
371	 * Hard resets are known to screw up the BAR for diagnostic
372	 * memory accesses (Mem1).
373	 *
374	 * Using Mem1 is known to make the chip stop responding to
375	 * configuration space transfers, so we need to save it now
376	 */
377
378	mpt_read_config_regs(mpt);
379
380	/* Initialize the hardware */
381	if (mpt->disabled == 0) {
382		MPT_LOCK(mpt);
383		if (mpt_attach(mpt) != 0) {
384			MPT_UNLOCK(mpt);
385			goto bad;
386		}
387	}
388
389	return (0);
390
391bad:
392	mpt_dma_mem_free(mpt);
393	mpt_free_bus_resources(mpt);
394
395	/*
396	 * but return zero to preserve unit numbering
397	 */
398	return (0);
399}
400
401/*
402 * Free bus resources
403 */
404static void
405mpt_free_bus_resources(struct mpt_softc *mpt)
406{
407	if (mpt->ih) {
408		bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
409		mpt->ih = 0;
410	}
411
412	if (mpt->pci_irq) {
413		bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq);
414		mpt->pci_irq = 0;
415	}
416
417	if (mpt->pci_pio_reg) {
418		bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid,
419			mpt->pci_pio_reg);
420		mpt->pci_pio_reg = 0;
421	}
422	if (mpt->pci_reg) {
423		bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid,
424			mpt->pci_reg);
425		mpt->pci_reg = 0;
426	}
427	MPT_LOCK_DESTROY(mpt);
428}
429
430
431/*
432 * Disconnect ourselves from the system.
433 */
434static int
435mpt_pci_detach(device_t dev)
436{
437	struct mpt_softc *mpt;
438
439	mpt  = (struct mpt_softc*)device_get_softc(dev);
440	mpt_prt(mpt, "mpt_detach\n");
441
442	if (mpt) {
443		mpt_disable_ints(mpt);
444		mpt_detach(mpt);
445		mpt_reset(mpt, /*reinit*/FALSE);
446		mpt_dma_mem_free(mpt);
447		mpt_free_bus_resources(mpt);
448		if (mpt->raid_volumes != NULL
449		 && mpt->ioc_page2 != NULL) {
450			int i;
451
452			for (i = 0; i < mpt->ioc_page2->MaxVolumes; i++) {
453				struct mpt_raid_volume *mpt_vol;
454
455				mpt_vol = &mpt->raid_volumes[i];
456				if (mpt_vol->config_page)
457					free(mpt_vol->config_page, M_DEVBUF);
458			}
459		}
460		if (mpt->ioc_page2 != NULL)
461			free(mpt->ioc_page2, M_DEVBUF);
462		if (mpt->ioc_page3 != NULL)
463			free(mpt->ioc_page3, M_DEVBUF);
464		if (mpt->raid_volumes != NULL)
465			free(mpt->raid_volumes, M_DEVBUF);
466		if (mpt->raid_disks != NULL)
467			free(mpt->raid_disks, M_DEVBUF);
468		if (mpt->eh != NULL)
469                        EVENTHANDLER_DEREGISTER(shutdown_final, mpt->eh);
470	}
471	return(0);
472}
473
474
475/*
476 * Disable the hardware
477 * XXX - Called too early by New Bus!!!  ???
478 */
479static int
480mpt_pci_shutdown(device_t dev)
481{
482	struct mpt_softc *mpt;
483
484	mpt = (struct mpt_softc *)device_get_softc(dev);
485	if (mpt)
486		return (mpt_shutdown(mpt));
487	return(0);
488}
489
490static int
491mpt_dma_mem_alloc(struct mpt_softc *mpt)
492{
493	int i, error;
494	uint8_t *vptr;
495	uint32_t pptr, end;
496	size_t len;
497	struct mpt_map_info mi;
498	device_t dev = mpt->dev;
499
500	/* Check if we alreay have allocated the reply memory */
501	if (mpt->reply_phys != 0) {
502		return 0;
503	}
504
505	len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
506#ifdef	RELENG_4
507	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
508	if (mpt->request_pool == NULL) {
509		device_printf(dev, "cannot allocate request pool\n");
510		return (1);
511	}
512	bzero(mpt->request_pool, len);
513#else
514	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
515	if (mpt->request_pool == NULL) {
516		device_printf(dev, "cannot allocate request pool\n");
517		return (1);
518	}
519#endif
520
521	/*
522	 * Create a parent dma tag for this device
523	 *
524	 * Align at byte boundaries, limit to 32-bit addressing
525	 * (The chip supports 64-bit addressing, but this driver doesn't)
526	 */
527	if (mpt_dma_tag_create(mpt, /*parent*/NULL, /*alignment*/1,
528	    /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
529	    /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
530	    /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
531	    /*nsegments*/BUS_SPACE_MAXSIZE_32BIT,
532	    /*maxsegsz*/BUS_SPACE_UNRESTRICTED, /*flags*/0,
533	    &mpt->parent_dmat) != 0) {
534		device_printf(dev, "cannot create parent dma tag\n");
535		return (1);
536	}
537
538	/* Create a child tag for reply buffers */
539	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE,
540	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
541	    NULL, NULL, PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
542	    &mpt->reply_dmat) != 0) {
543		device_printf(dev, "cannot create a dma tag for replies\n");
544		return (1);
545	}
546
547	/* Allocate some DMA accessable memory for replies */
548	if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
549	    BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
550		device_printf(dev, "cannot allocate %lu bytes of reply memory\n",
551		     (u_long)PAGE_SIZE);
552		return (1);
553	}
554
555	mi.mpt = mpt;
556	mi.error = 0;
557
558	/* Load and lock it into "bus space" */
559	bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
560	    PAGE_SIZE, mpt_map_rquest, &mi, 0);
561
562	if (mi.error) {
563		device_printf(dev,
564		    "error %d loading dma map for DMA reply queue\n", mi.error);
565		return (1);
566	}
567	mpt->reply_phys = mi.phys;
568
569	/* Create a child tag for data buffers */
570	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1,
571	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
572	    NULL, NULL, MAXBSIZE, MPT_SGL_MAX, BUS_SPACE_MAXSIZE_32BIT, 0,
573	    &mpt->buffer_dmat) != 0) {
574		device_printf(dev,
575		    "cannot create a dma tag for data buffers\n");
576		return (1);
577	}
578
579	/* Create a child tag for request buffers */
580	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE,
581	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
582	    NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0,
583	    &mpt->request_dmat) != 0) {
584		device_printf(dev, "cannot create a dma tag for requests\n");
585		return (1);
586	}
587
588	/* Allocate some DMA accessable memory for requests */
589	if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
590	    BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
591		device_printf(dev,
592		    "cannot allocate %d bytes of request memory\n",
593		    MPT_REQ_MEM_SIZE(mpt));
594		return (1);
595	}
596
597	mi.mpt = mpt;
598	mi.error = 0;
599
600	/* Load and lock it into "bus space" */
601        bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
602	    MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0);
603
604	if (mi.error) {
605		device_printf(dev,
606		    "error %d loading dma map for DMA request queue\n",
607		    mi.error);
608		return (1);
609	}
610	mpt->request_phys = mi.phys;
611
612	i = 0;
613	pptr =  mpt->request_phys;
614	vptr =  mpt->request;
615	end = pptr + MPT_REQ_MEM_SIZE(mpt);
616	while(pptr < end) {
617		request_t *req = &mpt->request_pool[i];
618		req->index = i++;
619
620		/* Store location of Request Data */
621		req->req_pbuf = pptr;
622		req->req_vbuf = vptr;
623
624		pptr += MPT_REQUEST_AREA;
625		vptr += MPT_REQUEST_AREA;
626
627		req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
628		req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
629
630		error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
631		if (error) {
632			device_printf(dev,
633			     "error %d creating per-cmd DMA maps\n", error);
634			return (1);
635		}
636	}
637	return (0);
638}
639
640
641
642/* Deallocate memory that was allocated by mpt_dma_mem_alloc
643 */
644static void
645mpt_dma_mem_free(struct mpt_softc *mpt)
646{
647	int i;
648
649        /* Make sure we aren't double destroying */
650        if (mpt->reply_dmat == 0) {
651		if (mpt->verbose >= MPT_PRT_DEBUG)
652			device_printf(mpt->dev,"Already released dma memory\n");
653		return;
654        }
655
656	for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) {
657		bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap);
658	}
659	bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
660	bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
661	bus_dma_tag_destroy(mpt->request_dmat);
662	bus_dma_tag_destroy(mpt->buffer_dmat);
663	bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
664	bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
665	bus_dma_tag_destroy(mpt->reply_dmat);
666	bus_dma_tag_destroy(mpt->parent_dmat);
667	mpt->reply_dmat = 0;
668	free(mpt->request_pool, M_DEVBUF);
669	mpt->request_pool = 0;
670
671}
672
673
674
675/* Reads modifiable (via PCI transactions) config registers */
676static void
677mpt_read_config_regs(struct mpt_softc *mpt)
678{
679	mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
680	mpt->pci_cfg.LatencyTimer_LineSize =
681	    pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
682	mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
683	mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
684	mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
685	mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
686	mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
687	mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
688	mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
689	mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
690}
691
692/* Sets modifiable config registers */
693void
694mpt_set_config_regs(struct mpt_softc *mpt)
695{
696	uint32_t val;
697
698#define MPT_CHECK(reg, offset, size)					\
699	val = pci_read_config(mpt->dev, offset, size);			\
700	if (mpt->pci_cfg.reg != val) {					\
701		mpt_prt(mpt,						\
702		    "Restoring " #reg " to 0x%X from 0x%X\n",		\
703		    mpt->pci_cfg.reg, val);				\
704	}
705
706	if (mpt->verbose >= MPT_PRT_DEBUG) {
707		MPT_CHECK(Command, PCIR_COMMAND, 2);
708		MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
709		MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
710		MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
711		MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
712		MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
713		MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
714		MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
715		MPT_CHECK(IntLine, PCIR_INTLINE, 1);
716		MPT_CHECK(PMCSR, 0x44, 4);
717	}
718#undef MPT_CHECK
719
720	pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
721	pci_write_config(mpt->dev, PCIR_CACHELNSZ,
722	    mpt->pci_cfg.LatencyTimer_LineSize, 2);
723	pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
724	pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
725	pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
726	pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
727	pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
728	pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
729	pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
730	pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
731}
732
733static void
734mpt_pci_intr(void *arg)
735{
736	struct mpt_softc *mpt;
737
738	mpt = (struct mpt_softc *)arg;
739	MPT_LOCK(mpt);
740	mpt_intr(mpt);
741	MPT_UNLOCK(mpt);
742}
743