mpt_pci.c revision 123740
1/*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * Partially derived from Matt Jacob's ISP driver. 7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 8 * Feral Software 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33#include <sys/cdefs.h> 34__FBSDID("$FreeBSD: head/sys/dev/mpt/mpt_pci.c 123740 2003-12-23 02:36:43Z peter $"); 35 36#include <sys/param.h> 37#include <sys/systm.h> 38#include <sys/kernel.h> 39#include <sys/module.h> 40#include <sys/bus.h> 41 42#include <dev/pci/pcireg.h> 43#include <dev/pci/pcivar.h> 44 45#include <machine/bus_memio.h> 46#include <machine/bus_pio.h> 47#include <machine/bus.h> 48#include <machine/resource.h> 49#include <sys/rman.h> 50#include <sys/malloc.h> 51 52#include <dev/mpt/mpt_freebsd.h> 53 54#ifndef PCI_VENDOR_LSI 55#define PCI_VENDOR_LSI 0x1000 56#endif 57 58#ifndef PCI_PRODUCT_LSI_FC909 59#define PCI_PRODUCT_LSI_FC909 0x0620 60#endif 61 62#ifndef PCI_PRODUCT_LSI_FC909A 63#define PCI_PRODUCT_LSI_FC909A 0x0621 64#endif 65 66#ifndef PCI_PRODUCT_LSI_FC919 67#define PCI_PRODUCT_LSI_FC919 0x0624 68#endif 69 70#ifndef PCI_PRODUCT_LSI_FC929 71#define PCI_PRODUCT_LSI_FC929 0x0622 72#endif 73 74#ifndef PCI_PRODUCT_LSI_1030 75#define PCI_PRODUCT_LSI_1030 0x0030 76#endif 77 78#ifndef PCIM_CMD_SERRESPEN 79#define PCIM_CMD_SERRESPEN 0x0100 80#endif 81 82 83 84#define MEM_MAP_REG 0x14 85#define MEM_MAP_SRAM 0x1C 86 87static int mpt_probe(device_t); 88static int mpt_attach(device_t); 89static void mpt_free_bus_resources(mpt_softc_t *mpt); 90static int mpt_detach(device_t); 91static int mpt_shutdown(device_t); 92static int mpt_dma_mem_alloc(mpt_softc_t *mpt); 93static void mpt_dma_mem_free(mpt_softc_t *mpt); 94static void mpt_read_config_regs(mpt_softc_t *mpt); 95static void mpt_pci_intr(void *); 96 97static device_method_t mpt_methods[] = { 98 /* Device interface */ 99 DEVMETHOD(device_probe, mpt_probe), 100 DEVMETHOD(device_attach, mpt_attach), 101 DEVMETHOD(device_detach, mpt_detach), 102 DEVMETHOD(device_shutdown, mpt_shutdown), 103 { 0, 0 } 104}; 105 106static driver_t mpt_driver = { 107 "mpt", mpt_methods, sizeof (mpt_softc_t) 108}; 109static devclass_t mpt_devclass; 110DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0); 111MODULE_VERSION(mpt, 1); 112 113int 114mpt_intr(void *dummy) 115{ 116 int nrepl = 0; 117 u_int32_t reply; 118 mpt_softc_t *mpt = (mpt_softc_t *)dummy; 119 120 if ((mpt_read(mpt, MPT_OFFSET_INTR_STATUS) & MPT_INTR_REPLY_READY) == 0) 121 return (0); 122 reply = mpt_pop_reply_queue(mpt); 123 while (reply != MPT_REPLY_EMPTY) { 124 nrepl++; 125 if (mpt->verbose > 1) { 126 if ((reply & MPT_CONTEXT_REPLY) != 0) { 127 /* Address reply; IOC has something to say */ 128 mpt_print_reply(MPT_REPLY_PTOV(mpt, reply)); 129 } else { 130 /* Context reply ; all went well */ 131 mpt_prt(mpt, "context %u reply OK", reply); 132 } 133 } 134 mpt_done(mpt, reply); 135 reply = mpt_pop_reply_queue(mpt); 136 } 137 return (nrepl != 0); 138} 139 140static int 141mpt_probe(device_t dev) 142{ 143 char *desc; 144 145 if (pci_get_vendor(dev) != PCI_VENDOR_LSI) 146 return (ENXIO); 147 148 switch ((pci_get_device(dev) & ~1)) { 149 case PCI_PRODUCT_LSI_FC909: 150 desc = "LSILogic FC909 FC Adapter"; 151 break; 152 case PCI_PRODUCT_LSI_FC909A: 153 desc = "LSILogic FC909A FC Adapter"; 154 break; 155 case PCI_PRODUCT_LSI_FC919: 156 desc = "LSILogic FC919 FC Adapter"; 157 break; 158 case PCI_PRODUCT_LSI_FC929: 159 desc = "LSILogic FC929 FC Adapter"; 160 break; 161 case PCI_PRODUCT_LSI_1030: 162 desc = "LSILogic 1030 Ultra4 Adapter"; 163 break; 164 default: 165 return (ENXIO); 166 } 167 168 device_set_desc(dev, desc); 169 return (0); 170} 171 172#ifdef RELENG_4 173static void 174mpt_set_options(mpt_softc_t *mpt) 175{ 176 int bitmap; 177 178 bitmap = 0; 179 if (getenv_int("mpt_disable", &bitmap)) { 180 if (bitmap & (1 << mpt->unit)) { 181 mpt->disabled = 1; 182 } 183 } 184 185 bitmap = 0; 186 if (getenv_int("mpt_debug", &bitmap)) { 187 if (bitmap & (1 << mpt->unit)) { 188 mpt->verbose = 2; 189 } 190 } 191 192} 193#else 194static void 195mpt_set_options(mpt_softc_t *mpt) 196{ 197 int tval; 198 199 tval = 0; 200 if (resource_int_value(device_get_name(mpt->dev), 201 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) { 202 mpt->disabled = 1; 203 } 204 tval = 0; 205 if (resource_int_value(device_get_name(mpt->dev), 206 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 207 mpt->verbose += tval; 208 } 209} 210#endif 211 212 213static void 214mpt_link_peer(mpt_softc_t *mpt) 215{ 216 mpt_softc_t *mpt2; 217 218 if (mpt->unit == 0) { 219 return; 220 } 221 222 /* 223 * XXX: depends on probe order 224 */ 225 mpt2 = (mpt_softc_t *) devclass_get_softc(mpt_devclass, mpt->unit-1); 226 227 if (mpt2 == NULL) { 228 return; 229 } 230 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 231 return; 232 } 233 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 234 return; 235 } 236 mpt->mpt2 = mpt2; 237 mpt2->mpt2 = mpt; 238 if (mpt->verbose) { 239 mpt_prt(mpt, "linking with peer (mpt%d)", 240 device_get_unit(mpt2->dev)); 241 } 242} 243 244 245static int 246mpt_attach(device_t dev) 247{ 248 int iqd; 249 u_int32_t data, cmd; 250 mpt_softc_t *mpt; 251 252 /* Allocate the softc structure */ 253 mpt = (mpt_softc_t*) device_get_softc(dev); 254 if (mpt == NULL) { 255 device_printf(dev, "cannot allocate softc\n"); 256 return (ENOMEM); 257 } 258 bzero(mpt, sizeof (mpt_softc_t)); 259 switch ((pci_get_device(dev) & ~1)) { 260 case PCI_PRODUCT_LSI_FC909: 261 case PCI_PRODUCT_LSI_FC909A: 262 case PCI_PRODUCT_LSI_FC919: 263 case PCI_PRODUCT_LSI_FC929: 264 mpt->is_fc = 1; 265 break; 266 default: 267 break; 268 } 269 mpt->dev = dev; 270 mpt->unit = device_get_unit(dev); 271 mpt_set_options(mpt); 272 mpt->verbose += (bootverbose != 0)? 1 : 0; 273 274 /* Make sure memory access decoders are enabled */ 275 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 276 if ((cmd & PCIM_CMD_MEMEN) == 0) { 277 device_printf(dev, "Memory accesses disabled"); 278 goto bad; 279 } 280 281 /* 282 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 283 */ 284 cmd |= 285 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 286 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 287 pci_write_config(dev, PCIR_COMMAND, cmd, 2); 288 289 /* 290 * Make sure we've disabled the ROM. 291 */ 292 data = pci_read_config(dev, PCIR_BIOS, 4); 293 data &= ~1; 294 pci_write_config(dev, PCIR_BIOS, data, 4); 295 296 297 /* 298 * Is this part a dual? 299 * If so, link with our partner (around yet) 300 */ 301 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 || 302 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) { 303 mpt_link_peer(mpt); 304 } 305 306 /* Set up the memory regions */ 307 /* Allocate kernel virtual memory for the 9x9's Mem0 region */ 308 mpt->pci_reg_id = MEM_MAP_REG; 309 mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY, 310 &mpt->pci_reg_id, 0, ~0, 0, RF_ACTIVE); 311 if (mpt->pci_reg == NULL) { 312 device_printf(dev, "unable to map any ports\n"); 313 goto bad; 314 } 315 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 316 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 317 /* Get the Physical Address */ 318 mpt->pci_pa = rman_get_start(mpt->pci_reg); 319 320 /* Get a handle to the interrupt */ 321 iqd = 0; 322 mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0, 323 1, RF_ACTIVE | RF_SHAREABLE); 324 if (mpt->pci_irq == NULL) { 325 device_printf(dev, "could not allocate interrupt\n"); 326 goto bad; 327 } 328 329 /* Register the interrupt handler */ 330 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr, 331 mpt, &mpt->ih)) { 332 device_printf(dev, "could not setup interrupt\n"); 333 goto bad; 334 } 335 336 MPT_LOCK_SETUP(mpt); 337 338 /* Disable interrupts at the part */ 339 mpt_disable_ints(mpt); 340 341 /* Allocate dma memory */ 342 if (mpt_dma_mem_alloc(mpt)) { 343 device_printf(dev, "Could not allocate DMA memory\n"); 344 goto bad; 345 } 346 347 /* 348 * Save the PCI config register values 349 * 350 * Hard resets are known to screw up the BAR for diagnostic 351 * memory accesses (Mem1). 352 * 353 * Using Mem1 is known to make the chip stop responding to 354 * configuration space transfers, so we need to save it now 355 */ 356 357 mpt_read_config_regs(mpt); 358 359 /* Initialize the hardware */ 360 if (mpt->disabled == 0) { 361 MPT_LOCK(mpt); 362 if (mpt_init(mpt, MPT_DB_INIT_HOST) != 0) { 363 MPT_UNLOCK(mpt); 364 goto bad; 365 } 366 367 /* 368 * Attach to CAM 369 */ 370 MPTLOCK_2_CAMLOCK(mpt); 371 mpt_cam_attach(mpt); 372 CAMLOCK_2_MPTLOCK(mpt); 373 MPT_UNLOCK(mpt); 374 } 375 376 return (0); 377 378bad: 379 mpt_dma_mem_free(mpt); 380 mpt_free_bus_resources(mpt); 381 382 /* 383 * but return zero to preserve unit numbering 384 */ 385 return (0); 386} 387 388/* 389 * Free bus resources 390 */ 391static void 392mpt_free_bus_resources(mpt_softc_t *mpt) 393{ 394 if (mpt->ih) { 395 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 396 mpt->ih = 0; 397 } 398 399 if (mpt->pci_irq) { 400 bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq); 401 mpt->pci_irq = 0; 402 } 403 404 if (mpt->pci_reg) { 405 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_reg_id, 406 mpt->pci_reg); 407 mpt->pci_reg = 0; 408 } 409 MPT_LOCK_DESTROY(mpt); 410} 411 412 413/* 414 * Disconnect ourselves from the system. 415 */ 416static int 417mpt_detach(device_t dev) 418{ 419 mpt_softc_t *mpt; 420 mpt = (mpt_softc_t*) device_get_softc(dev); 421 422 mpt_prt(mpt, "mpt_detach"); 423 424 if (mpt) { 425 mpt_disable_ints(mpt); 426 mpt_cam_detach(mpt); 427 mpt_reset(mpt); 428 mpt_dma_mem_free(mpt); 429 mpt_free_bus_resources(mpt); 430 } 431 return(0); 432} 433 434 435/* 436 * Disable the hardware 437 */ 438static int 439mpt_shutdown(device_t dev) 440{ 441 mpt_softc_t *mpt; 442 mpt = (mpt_softc_t*) device_get_softc(dev); 443 444 if (mpt) { 445 mpt_reset(mpt); 446 } 447 return(0); 448} 449 450 451struct imush { 452 mpt_softc_t *mpt; 453 int error; 454 u_int32_t phys; 455}; 456 457static void 458mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error) 459{ 460 struct imush *imushp = (struct imush *) arg; 461 imushp->error = error; 462 imushp->phys = segs->ds_addr; 463} 464 465 466static int 467mpt_dma_mem_alloc(mpt_softc_t *mpt) 468{ 469 int i, error; 470 u_char *vptr; 471 u_int32_t pptr, end; 472 size_t len; 473 struct imush im; 474 device_t dev = mpt->dev; 475 476 /* Check if we alreay have allocated the reply memory */ 477 if (mpt->reply_phys != 0) { 478 return 0; 479 } 480 481 len = sizeof (request_t *) * MPT_REQ_MEM_SIZE(mpt); 482#ifdef RELENG_4 483 mpt->request_pool = (request_t *) malloc(len, M_DEVBUF, M_WAITOK); 484 if (mpt->request_pool == NULL) { 485 device_printf(dev, "cannot allocate request pool\n"); 486 return (1); 487 } 488 bzero(mpt->request_pool, len); 489#else 490 mpt->request_pool = (request_t *) 491 malloc(len, M_DEVBUF, M_WAITOK | M_ZERO); 492 if (mpt->request_pool == NULL) { 493 device_printf(dev, "cannot allocate request pool\n"); 494 return (1); 495 } 496#endif 497 498 /* 499 * Create a dma tag for this device 500 * 501 * Align at page boundaries, limit to 32-bit addressing 502 * (The chip supports 64-bit addressing, but this driver doesn't) 503 */ 504 if (bus_dma_tag_create(NULL, PAGE_SIZE, 0, BUS_SPACE_MAXADDR_32BIT, 505 BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT, 506 BUS_SPACE_MAXSIZE_32BIT, BUS_SPACE_UNRESTRICTED, 0, 507 busdma_lock_mutex, &Giant, &mpt->parent_dmat) != 0) { 508 device_printf(dev, "cannot create parent dma tag\n"); 509 return (1); 510 } 511 512 /* Create a child tag for reply buffers */ 513 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE, 514 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 515 NULL, NULL, PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 516 busdma_lock_mutex, &Giant, &mpt->reply_dmat) != 0) { 517 device_printf(dev, "cannot create a dma tag for replies\n"); 518 return (1); 519 } 520 521 /* Allocate some DMA accessable memory for replies */ 522 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 523 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 524 device_printf(dev, "cannot allocate %lu bytes of reply memory\n", 525 (u_long)PAGE_SIZE); 526 return (1); 527 } 528 529 im.mpt = mpt; 530 im.error = 0; 531 532 /* Load and lock it into "bus space" */ 533 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 534 PAGE_SIZE, mpt_map_rquest, &im, 0); 535 536 if (im.error) { 537 device_printf(dev, 538 "error %d loading dma map for DMA reply queue\n", im.error); 539 return (1); 540 } 541 mpt->reply_phys = im.phys; 542 543 /* Create a child tag for data buffers */ 544 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE, 545 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 546 NULL, NULL, MAXBSIZE, MPT_SGL_MAX, BUS_SPACE_MAXSIZE_32BIT, 0, 547 busdma_lock_mutex, &Giant, &mpt->buffer_dmat) != 0) { 548 device_printf(dev, 549 "cannot create a dma tag for data buffers\n"); 550 return (1); 551 } 552 553 /* Create a child tag for request buffers */ 554 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE, 555 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 556 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0, 557 busdma_lock_mutex, &Giant, &mpt->request_dmat) != 0) { 558 device_printf(dev, "cannot create a dma tag for requests\n"); 559 return (1); 560 } 561 562 /* Allocate some DMA accessable memory for requests */ 563 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request, 564 BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) { 565 device_printf(dev, 566 "cannot allocate %d bytes of request memory\n", 567 MPT_REQ_MEM_SIZE(mpt)); 568 return (1); 569 } 570 571 im.mpt = mpt; 572 im.error = 0; 573 574 /* Load and lock it into "bus space" */ 575 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request, 576 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &im, 0); 577 578 if (im.error) { 579 device_printf(dev, 580 "error %d loading dma map for DMA request queue\n", 581 im.error); 582 return (1); 583 } 584 mpt->request_phys = im.phys; 585 586 i = 0; 587 pptr = mpt->request_phys; 588 vptr = mpt->request; 589 end = pptr + MPT_REQ_MEM_SIZE(mpt); 590 while(pptr < end) { 591 request_t *req = &mpt->request_pool[i]; 592 req->index = i++; 593 594 /* Store location of Request Data */ 595 req->req_pbuf = pptr; 596 req->req_vbuf = vptr; 597 598 pptr += MPT_REQUEST_AREA; 599 vptr += MPT_REQUEST_AREA; 600 601 req->sense_pbuf = (pptr - MPT_SENSE_SIZE); 602 req->sense_vbuf = (vptr - MPT_SENSE_SIZE); 603 604 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap); 605 if (error) { 606 device_printf(dev, 607 "error %d creating per-cmd DMA maps\n", error); 608 return (1); 609 } 610 } 611 return (0); 612} 613 614 615 616/* Deallocate memory that was allocated by mpt_dma_mem_alloc 617 */ 618static void 619mpt_dma_mem_free(mpt_softc_t *mpt) 620{ 621 int i; 622 623 /* Make sure we aren't double destroying */ 624 if (mpt->reply_dmat == 0) { 625 if (mpt->verbose) 626 device_printf(mpt->dev,"Already released dma memory\n"); 627 return; 628 } 629 630 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) { 631 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap); 632 } 633 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap); 634 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap); 635 bus_dma_tag_destroy(mpt->request_dmat); 636 bus_dma_tag_destroy(mpt->buffer_dmat); 637 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 638 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 639 bus_dma_tag_destroy(mpt->reply_dmat); 640 bus_dma_tag_destroy(mpt->parent_dmat); 641 mpt->reply_dmat = 0; 642 free(mpt->request_pool, M_DEVBUF); 643 mpt->request_pool = 0; 644 645} 646 647 648 649/* Reads modifiable (via PCI transactions) config registers */ 650static void 651mpt_read_config_regs(mpt_softc_t *mpt) 652{ 653 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 654 mpt->pci_cfg.LatencyTimer_LineSize = 655 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 656 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 657 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 658 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 659 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 660 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 661 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 662 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 663 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 664} 665 666/* Sets modifiable config registers */ 667void 668mpt_set_config_regs(mpt_softc_t *mpt) 669{ 670 u_int32_t val; 671 672#define MPT_CHECK(reg, offset, size) \ 673 val = pci_read_config(mpt->dev, offset, size); \ 674 if (mpt->pci_cfg.reg != val) { \ 675 mpt_prt(mpt, \ 676 "Restoring " #reg " to 0x%X from 0x%X\n", \ 677 mpt->pci_cfg.reg, val); \ 678 } 679 680 if (mpt->verbose) { 681 MPT_CHECK(Command, PCIR_COMMAND, 2); 682 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 683 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 684 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 685 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 686 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 687 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 688 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 689 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 690 MPT_CHECK(PMCSR, 0x44, 4); 691 } 692#undef MPT_CHECK 693 694 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 695 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 696 mpt->pci_cfg.LatencyTimer_LineSize, 2); 697 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 698 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 699 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 700 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 701 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 702 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 703 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 704 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 705} 706 707static void 708mpt_pci_intr(void *arg) 709{ 710 mpt_softc_t *mpt = arg; 711 MPT_LOCK(mpt); 712 (void) mpt_intr(mpt); 713 MPT_UNLOCK(mpt); 714} 715