mpt_pci.c revision 102303
1/* $FreeBSD: head/sys/dev/mpt/mpt_pci.c 102303 2002-08-23 06:56:08Z mjacob $ */
2/*
3 * PCI specific probe and attach routines for LSI '909 FC  adapters.
4 * FreeBSD Version.
5 *
6 * Copyright (c)  2000, 2001 by Greg Ansley
7 * Partially derived from Matt Jacob's ISP driver.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice immediately at the beginning of the file, without modification,
14 *    this list of conditions, and the following disclaimer.
15 * 2. The name of the author may not be used to endorse or promote products
16 *    derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
22 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30/*
31 * Additional Copyright (c) 2002 by Matthew Jacob under same license.
32 */
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/kernel.h>
37#include <sys/module.h>
38#include <sys/bus.h>
39
40#include <pci/pcireg.h>
41#include <pci/pcivar.h>
42
43#include <machine/bus_memio.h>
44#include <machine/bus_pio.h>
45#include <machine/bus.h>
46#include <machine/resource.h>
47#include <sys/rman.h>
48#include <sys/malloc.h>
49
50#include <dev/mpt/mpt_freebsd.h>
51
52#ifndef	PCI_VENDOR_LSI
53#define	PCI_VENDOR_LSI			0x1000
54#endif
55
56#ifndef	PCI_PRODUCT_LSI_FC909
57#define	PCI_PRODUCT_LSI_FC909		0x0620
58#endif
59
60#ifndef	PCI_PRODUCT_LSI_FC929
61#define	PCI_PRODUCT_LSI_FC929		0x0622
62#endif
63
64#ifndef	PCI_PRODUCT_LSI_1030
65#define	PCI_PRODUCT_LSI_1030		0x0030
66#endif
67
68#ifndef	PCIM_CMD_SERRESPEN
69#define	PCIM_CMD_SERRESPEN	0x0100
70#endif
71
72
73
74#define	MEM_MAP_REG	0x14
75#define	MEM_MAP_SRAM	0x1C
76
77static int mpt_probe(device_t);
78static int mpt_attach(device_t);
79static void mpt_free_bus_resources(mpt_softc_t *mpt);
80static int mpt_detach(device_t);
81static int mpt_shutdown(device_t);
82static int mpt_dma_mem_alloc(mpt_softc_t *mpt);
83static void mpt_dma_mem_free(mpt_softc_t *mpt);
84static void mpt_read_config_regs(mpt_softc_t *mpt);
85static void mpt_pci_intr(void *);
86
87static device_method_t mpt_methods[] = {
88	/* Device interface */
89	DEVMETHOD(device_probe,		mpt_probe),
90	DEVMETHOD(device_attach,	mpt_attach),
91	DEVMETHOD(device_detach,	mpt_detach),
92	DEVMETHOD(device_shutdown,	mpt_shutdown),
93	{ 0, 0 }
94};
95
96static driver_t mpt_driver = {
97	"mpt", mpt_methods, sizeof (mpt_softc_t)
98};
99static devclass_t mpt_devclass;
100DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
101MODULE_VERSION(mpt, 1);
102
103int
104mpt_intr(void *dummy)
105{
106	u_int32_t reply;
107	mpt_softc_t *mpt = (mpt_softc_t *)dummy;
108
109	reply = mpt_pop_reply_queue(mpt);
110	while (reply != MPT_REPLY_EMPTY) {
111		if (mpt->verbose > 1) {
112			if ((reply & MPT_CONTEXT_REPLY) != 0)  {
113				/* Address reply; IOC has something to say */
114				mpt_print_reply(MPT_REPLY_PTOV(mpt, reply));
115			} else {
116				/* Context reply ; all went well */
117				device_printf(mpt->dev,
118				    "context %u reply OK\n", reply);
119			}
120		}
121		mpt_done(mpt, reply);
122		reply = mpt_pop_reply_queue(mpt);
123	}
124	return 0;
125}
126
127static int
128mpt_probe(device_t dev)
129{
130	char *desc;
131
132	if (pci_get_vendor(dev) != PCI_VENDOR_LSI)
133		return (ENXIO);
134
135	switch ((pci_get_device(dev) & ~1)) {
136	case PCI_PRODUCT_LSI_FC909:
137		desc = "LSILogic FC909 FC Adapter";
138		break;
139	case PCI_PRODUCT_LSI_FC929:
140		desc = "LSILogic FC929 FC Adapter";
141		break;
142	case PCI_PRODUCT_LSI_1030:
143		desc = "LSILogic 1030 Ultra4 Adapter";
144		break;
145	default:
146		return (ENXIO);
147	}
148
149	device_set_desc(dev, desc);
150	return (0);
151}
152
153#ifdef	RELENG_4
154static void
155mpt_set_options(mpt_softc_t *mpt)
156{
157	int bitmap;
158
159	bitmap = 0;
160	if (getenv_int("mpt_disable", &bitmap)) {
161		if (bitmap & (1 << mpt->unit)) {
162			mpt->disabled = 1;
163		}
164	}
165
166	bitmap = 0;
167	if (getenv_int("mpt_debug", &bitmap)) {
168		if (bitmap & (1 << mpt->unit)) {
169			mpt->verbose = 2;
170		}
171	}
172
173}
174#else
175static void
176mpt_set_options(mpt_softc_t *mpt)
177{
178	int tval;
179
180	tval = 0;
181	if (resource_int_value(device_get_name(mpt->dev),
182	    device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
183		mpt->disabled = 1;
184	}
185	tval = 0;
186	if (resource_int_value(device_get_name(mpt->dev),
187	    device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
188		mpt->verbose += tval;
189	}
190}
191#endif
192
193
194static void
195mpt_link_peer(mpt_softc_t *mpt)
196{
197	mpt_softc_t *mpt2;
198
199	if (mpt->unit == 0) {
200		return;
201	}
202
203	/*
204	 * XXX: depends on probe order
205	 */
206	mpt2 = (mpt_softc_t *) devclass_get_softc(mpt_devclass, mpt->unit-1);
207
208	if (mpt2 == NULL) {
209		return;
210	}
211	if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
212		return;
213	}
214	if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
215		return;
216	}
217	mpt->mpt2 = mpt2;
218	mpt2->mpt2 = mpt;
219	if (mpt->verbose) {
220		device_printf(mpt->dev, "linking with peer (mpt%d)\n",
221		    device_get_unit(mpt2->dev));
222	}
223}
224
225
226static int
227mpt_attach(device_t dev)
228{
229	int iqd;
230	u_int32_t data, cmd;
231	mpt_softc_t *mpt;
232
233	/* Allocate the softc structure */
234	mpt  = (mpt_softc_t*) device_get_softc(dev);
235	if (mpt == NULL) {
236		device_printf(dev, "cannot allocate softc\n");
237		return (ENOMEM);
238	}
239	bzero(mpt, sizeof (mpt_softc_t));
240	switch ((pci_get_device(dev) & ~1)) {
241	case PCI_PRODUCT_LSI_FC909:
242	case PCI_PRODUCT_LSI_FC929:
243		mpt->is_fc = 1;
244		break;
245	default:
246		break;
247	}
248	mpt->dev = dev;
249	mpt->unit = device_get_unit(dev);
250	mpt_set_options(mpt);
251	mpt->verbose += (bootverbose != 0)? 1 : 0;
252
253	/* Make sure memory access decoders are enabled */
254	cmd = pci_read_config(dev, PCIR_COMMAND, 2);
255	if ((cmd & PCIM_CMD_MEMEN) == 0) {
256		device_printf(dev, "Memory accesses disabled");
257		goto bad;
258	}
259
260	/*
261	 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
262	 */
263	cmd |=
264	    PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
265	    PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
266	pci_write_config(dev, PCIR_COMMAND, cmd, 2);
267
268	/*
269	 * Make sure we've disabled the ROM.
270	 */
271	data = pci_read_config(dev, PCIR_BIOS, 4);
272	data &= ~1;
273	pci_write_config(dev, PCIR_BIOS, data, 4);
274
275
276	/*
277	 * Is this part a dual?
278	 * If so, link with our partner (around yet)
279	 */
280	if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
281	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
282		mpt_link_peer(mpt);
283	}
284
285	/* Set up the memory regions */
286	/* Allocate kernel virtual memory for the 9x9's Mem0 region */
287	mpt->pci_reg_id = MEM_MAP_REG;
288	mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
289			&mpt->pci_reg_id, 0, ~0, 0, RF_ACTIVE);
290	if (mpt->pci_reg == NULL) {
291		device_printf(dev, "unable to map any ports\n");
292		goto bad;
293	}
294	mpt->pci_st = rman_get_bustag(mpt->pci_reg);
295	mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
296	/*   Get the Physical Address */
297	mpt->pci_pa = rman_get_start(mpt->pci_reg);
298
299	/* Get a handle to the interrupt */
300	iqd = 0;
301	mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0,
302	    1, RF_ACTIVE | RF_SHAREABLE);
303	if (mpt->pci_irq == NULL) {
304		device_printf(dev, "could not allocate interrupt\n");
305		goto bad;
306	}
307
308	/* Register the interrupt handler */
309	if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr,
310	    mpt, &mpt->ih)) {
311		device_printf(dev, "could not setup interrupt\n");
312		goto bad;
313	}
314
315	MPT_LOCK_SETUP(mpt);
316
317	/* Disable interrupts at the part */
318	mpt_disable_ints(mpt);
319
320	/* Allocate dma memory */
321	if (mpt_dma_mem_alloc(mpt)) {
322		device_printf(dev, "Could not allocate DMA memory\n");
323		goto bad;
324	}
325
326	/*
327	 * Save the PCI config register values
328 	 *
329	 * Hard resets are known to screw up the BAR for diagnostic
330	 * memory accesses (Mem1).
331	 *
332	 * Using Mem1 is known to make the chip stop responding to
333	 * configuration space transfers, so we need to save it now
334	 */
335
336	mpt_read_config_regs(mpt);
337
338	/* Initialize the hardware */
339	if (mpt->disabled == 0) {
340		MPT_LOCK(mpt);
341		if (mpt_init(mpt, MPT_DB_INIT_HOST) != 0) {
342			MPT_UNLOCK(mpt);
343			goto bad;
344		}
345
346		/*
347		 *  Attach to CAM
348		 */
349		MPTLOCK_2_CAMLOCK(mpt);
350		mpt_cam_attach(mpt);
351		CAMLOCK_2_MPTLOCK(mpt);
352		MPT_UNLOCK(mpt);
353	}
354
355	return (0);
356
357bad:
358	mpt_dma_mem_free(mpt);
359	mpt_free_bus_resources(mpt);
360
361	/*
362	 * but return zero to preserve unit numbering
363	 */
364	return (0);
365}
366
367/*
368 * Free bus resources
369 */
370static void
371mpt_free_bus_resources(mpt_softc_t *mpt)
372{
373	if (mpt->ih) {
374		bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
375		mpt->ih = 0;
376	}
377
378	if (mpt->pci_irq) {
379		bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq);
380		mpt->pci_irq = 0;
381	}
382
383	if (mpt->pci_reg) {
384		bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_reg_id,
385			mpt->pci_reg);
386		mpt->pci_reg = 0;
387	}
388	MPT_LOCK_DESTROY(mpt);
389}
390
391
392/*
393 * Disconnect ourselves from the system.
394 */
395static int
396mpt_detach(device_t dev)
397{
398	mpt_softc_t *mpt;
399	mpt  = (mpt_softc_t*) device_get_softc(dev);
400
401	device_printf(mpt->dev,"mpt_detach!\n");
402
403	if (mpt) {
404		mpt_disable_ints(mpt);
405		mpt_cam_detach(mpt);
406		mpt_reset(mpt);
407		mpt_dma_mem_free(mpt);
408		mpt_free_bus_resources(mpt);
409	}
410	return(0);
411}
412
413
414/*
415 * Disable the hardware
416 */
417static int
418mpt_shutdown(device_t dev)
419{
420	mpt_softc_t *mpt;
421	mpt  = (mpt_softc_t*) device_get_softc(dev);
422
423	if (mpt) {
424		mpt_reset(mpt);
425	}
426	return(0);
427}
428
429
430struct imush {
431	mpt_softc_t *mpt;
432	int error;
433	u_int32_t phys;
434};
435
436static void
437mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error)
438{
439	struct imush *imushp = (struct imush *) arg;
440	imushp->error = error;
441	imushp->phys = segs->ds_addr;
442}
443
444
445static int
446mpt_dma_mem_alloc(mpt_softc_t *mpt)
447{
448	int i, error;
449	u_char *vptr;
450	u_int32_t pptr, end;
451	struct imush im;
452	device_t dev = mpt->dev;
453
454	/* Check if we alreay have allocated the reply memory */
455	if (mpt->reply_phys != NULL)
456		return 0;
457
458	/*
459	 * Create a dma tag for this device
460	 *
461	 * Align at page boundaries, limit to 32-bit addressing
462	 * (The chip supports 64-bit addressing, but this driver doesn't)
463	 */
464	if (bus_dma_tag_create(NULL, PAGE_SIZE, 0, BUS_SPACE_MAXADDR_32BIT,
465	    BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT,
466	    BUS_SPACE_MAXSIZE_32BIT, BUS_SPACE_UNRESTRICTED, 0,
467	    &mpt->parent_dmat) != 0) {
468		device_printf(dev, "cannot create parent dma tag\n");
469		return (1);
470	}
471
472	/* Create a child tag for reply buffers */
473	if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
474	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
475	    NULL, NULL, PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
476	    &mpt->reply_dmat) != 0) {
477		device_printf(dev, "cannot create a dma tag for replies\n");
478		return (1);
479	}
480
481	/* Allocate some DMA accessable memory for replies */
482	if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
483	    BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
484		device_printf(dev, "cannot allocate %d bytes of reply memory\n",
485		     PAGE_SIZE);
486		return (1);
487	}
488
489	im.mpt = mpt;
490	im.error = 0;
491
492	/* Load and lock it into "bus space" */
493	bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
494	    PAGE_SIZE, mpt_map_rquest, &im, 0);
495
496	if (im.error) {
497		device_printf(dev,
498		    "error %d loading dma map for DMA reply queue\n", im.error);
499		return (1);
500	}
501	mpt->reply_phys = im.phys;
502
503	/* Create a child tag for data buffers */
504	if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
505	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
506	    NULL, NULL, MAXBSIZE, MPT_SGL_MAX, BUS_SPACE_MAXSIZE_32BIT, 0,
507	    &mpt->buffer_dmat) != 0) {
508		device_printf(dev,
509		    "cannot create a dma tag for data buffers\n");
510		return (1);
511	}
512
513	/* Create a child tag for request buffers */
514	if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
515	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
516	    NULL, NULL, MPT_REQ_MEM_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
517	    &mpt->request_dmat) != 0) {
518		device_printf(dev, "cannot create a dma tag for requests\n");
519		return (1);
520	}
521
522	/* Allocate some DMA accessable memory for requests */
523	if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
524	    BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
525		device_printf(dev,
526		    "cannot allocate %d bytes of request memory\n",
527		    MPT_REQ_MEM_SIZE);
528		return (1);
529	}
530
531	im.mpt = mpt;
532	im.error = 0;
533
534	/* Load and lock it into "bus space" */
535        bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
536	    MPT_REQ_MEM_SIZE, mpt_map_rquest, &im, 0);
537
538	if (im.error) {
539		device_printf(dev,
540		    "error %d loading dma map for DMA request queue\n",
541		    im.error);
542		return (1);
543	}
544	mpt->request_phys = im.phys;
545
546	i = 0;
547	pptr =  mpt->request_phys;
548	vptr =  mpt->request;
549	end = pptr + MPT_REQ_MEM_SIZE;
550	while(pptr < end) {
551		request_t *req = &mpt->requests[i];
552		req->index = i++;
553
554		/* Store location of Request Data */
555		req->req_pbuf = pptr;
556		req->req_vbuf = vptr;
557
558		pptr += MPT_REQUEST_AREA;
559		vptr += MPT_REQUEST_AREA;
560
561		req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
562		req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
563
564		error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
565		if (error) {
566			device_printf(dev,
567			     "error %d creating per-cmd DMA maps\n", error);
568			return (1);
569		}
570	}
571	return (0);
572}
573
574
575
576/* Deallocate memory that was allocated by mpt_dma_mem_alloc
577 */
578static void
579mpt_dma_mem_free(mpt_softc_t *mpt)
580{
581	int i;
582
583        /* Make sure we aren't double destroying */
584        if (mpt->reply_dmat == 0) {
585		if (mpt->verbose)
586			device_printf(mpt->dev,"Already released dma memory\n");
587		return;
588        }
589
590	for (i = 0; i < MPT_MAX_REQUESTS; i++) {
591		bus_dmamap_destroy(mpt->buffer_dmat, mpt->requests[i].dmap);
592	}
593	bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
594	bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
595	bus_dma_tag_destroy(mpt->request_dmat);
596	bus_dma_tag_destroy(mpt->buffer_dmat);
597	bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
598	bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
599	bus_dma_tag_destroy(mpt->reply_dmat);
600	bus_dma_tag_destroy(mpt->parent_dmat);
601	mpt->reply_dmat = 0;
602
603}
604
605
606
607/* Reads modifiable (via PCI transactions) config registers */
608static void
609mpt_read_config_regs(mpt_softc_t *mpt)
610{
611	mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
612	mpt->pci_cfg.LatencyTimer_LineSize =
613	    pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
614	mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_MAPS, 4);
615	mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0x4, 4);
616	mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x8, 4);
617	mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0xC, 4);
618	mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x10, 4);
619	mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
620	mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
621	mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
622}
623
624/* Sets modifiable config registers */
625void
626mpt_set_config_regs(mpt_softc_t *mpt)
627{
628	u_int32_t val;
629
630#define MPT_CHECK(reg, offset, size)					\
631	val = pci_read_config(mpt->dev, offset, size);			\
632	if (mpt->pci_cfg.reg != val) {					\
633		device_printf(mpt->dev,					\
634		    "Restoring " #reg " to 0x%X from 0x%X\n",		\
635		    mpt->pci_cfg.reg, val);				\
636	}
637
638	if (mpt->verbose) {
639		MPT_CHECK(Command, PCIR_COMMAND, 2);
640		MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
641		MPT_CHECK(IO_BAR, PCIR_MAPS, 4);
642		MPT_CHECK(Mem0_BAR[0], PCIR_MAPS+0x4, 4);
643		MPT_CHECK(Mem0_BAR[1], PCIR_MAPS+0x8, 4);
644		MPT_CHECK(Mem1_BAR[0], PCIR_MAPS+0xC, 4);
645		MPT_CHECK(Mem1_BAR[1], PCIR_MAPS+0x10, 4);
646		MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
647		MPT_CHECK(IntLine, PCIR_INTLINE, 1);
648		MPT_CHECK(PMCSR, 0x44, 4);
649	}
650#undef MPT_CHECK
651
652	pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
653	pci_write_config(mpt->dev, PCIR_CACHELNSZ,
654	    mpt->pci_cfg.LatencyTimer_LineSize, 2);
655	pci_write_config(mpt->dev, PCIR_MAPS, mpt->pci_cfg.IO_BAR, 4);
656	pci_write_config(mpt->dev, PCIR_MAPS+0x4, mpt->pci_cfg.Mem0_BAR[0], 4);
657	pci_write_config(mpt->dev, PCIR_MAPS+0x8, mpt->pci_cfg.Mem0_BAR[1], 4);
658	pci_write_config(mpt->dev, PCIR_MAPS+0xC, mpt->pci_cfg.Mem1_BAR[0], 4);
659	pci_write_config(mpt->dev, PCIR_MAPS+0x10, mpt->pci_cfg.Mem1_BAR[1], 4);
660	pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
661	pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
662	pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
663}
664
665static void
666mpt_pci_intr(void *arg)
667{
668	mpt_softc_t *mpt = arg;
669	MPT_LOCK(mpt);
670	mpt_intr(mpt);
671	MPT_UNLOCK(mpt);
672}
673