mpi_ioc.h revision 170251
1/* $FreeBSD: head/sys/dev/mpt/mpilib/mpi_ioc.h 170251 2007-06-03 22:58:27Z scottl $ */ 2/*- 3 * Copyright (c) 2000-2005, LSI Logic Corporation and its contributors. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * substantially similar to the "NO WARRANTY" disclaimer below 13 * ("Disclaimer") and any redistribution must be conditioned upon including 14 * a substantially similar Disclaimer requirement for further binary 15 * redistribution. 16 * 3. Neither the name of the LSI Logic Corporation nor the names of its 17 * contributors may be used to endorse or promote products derived from 18 * this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 30 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * Name: mpi_ioc.h 33 * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages 34 * Creation Date: August 11, 2000 35 * 36 * mpi_ioc.h Version: 01.05.14 37 * 38 * Version History 39 * --------------- 40 * 41 * Date Version Description 42 * -------- -------- ------------------------------------------------------ 43 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 44 * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure. 45 * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY. 46 * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure. 47 * Added _MSG_EVENT_ACK_REPLY structure. 48 * Added _MSG_FW_DOWNLOAD_REPLY structure. 49 * Added _MSG_TOOLBOX_REPLY structure. 50 * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure. 51 * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI, 52 * _LINK_STATUS, _LOOP_STATE and _LOGOUT. 53 * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in 54 * _MSG_EVENT_ACK_REPLY structure to match specification. 55 * 11-02-00 01.01.01 Original release for post 1.0 work. 56 * Added a value for Manufacturer to WhoInit. 57 * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and 58 * removed toolbox message. 59 * 01-09-01 01.01.03 Added event enabled and disabled defines. 60 * Added structures for FwHeader and DataHeader. 61 * Added ImageType to FwUpload reply. 62 * 02-20-01 01.01.04 Started using MPI_POINTER. 63 * 02-27-01 01.01.05 Added event for RAID status change and its event data. 64 * Added IocNumber field to MSG_IOC_FACTS_REPLY. 65 * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER. 66 * Added structure offset comments. 67 * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE. 68 * 08-08-01 01.02.01 Original release for v1.2 work. 69 * New format for FWVersion and ProductId in 70 * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER. 71 * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and 72 * related structure and defines. 73 * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED. 74 * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE. 75 * Replaced a reserved field in MSG_IOC_FACTS_REPLY with 76 * IOCExceptions and changed DataImageSize to reserved. 77 * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and 78 * MPI_FW_UPLOAD_ITYPE_NVDATA. 79 * 09-28-01 01.02.03 Modified Event Data for Integrated RAID. 80 * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field. 81 * 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY. 82 * 05-31-02 01.02.06 Added define for 83 * MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID. 84 * Added AliasIndex to EVENT_DATA_LOGOUT structure. 85 * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_. 86 * 06-26-03 01.02.08 Added new values to the product family defines. 87 * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and 88 * added related defines. 89 * 05-11-04 01.03.01 Original release for MPI v1.3. 90 * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT. 91 * Added three new fields to MSG_IOC_FACTS_REPLY. 92 * Defined four new bits for the IOCCapabilities field of 93 * the IOCFacts reply. 94 * Added two new PortTypes for the PortFacts reply. 95 * Added six new events along with their EventData 96 * structures. 97 * Added a new MsgFlag to the FwDownload request to 98 * indicate last segment. 99 * Defined a new image type of boot loader. 100 * Added FW family codes for SAS product families. 101 * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to 102 * MSG_IOC_FACTS_REPLY. 103 * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event. 104 * 12-09-04 01.05.04 Added Unsupported device to SAS Device event. 105 * 01-15-05 01.05.05 Added event data for SAS SES Event. 106 * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define. 107 * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts 108 * Reply and IOC Init Request. 109 * 03-11-05 01.05.08 Added family code for 1068E family. 110 * Removed IOCFacts Reply EEDP Capability bit. 111 * 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits. 112 * Added Max SATA Targets to SAS Discovery Error event. 113 * 08-30-05 01.05.10 Added 4 new events and their event data structures. 114 * Added new ReasonCode value for SAS Device Status Change 115 * event. 116 * Added new family code for FC949E. 117 * 03-27-06 01.05.11 Added MPI_IOCFACTS_CAPABILITY_TLR. 118 * Added additional Reason Codes and more event data fields 119 * to EVENT_DATA_SAS_DEVICE_STATUS_CHANGE. 120 * Added EVENT_DATA_SAS_BROADCAST_PRIMITIVE structure and 121 * new event. 122 * Added MPI_EVENT_SAS_SMP_ERROR and event data structure. 123 * Added MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE and event 124 * data structure. 125 * Added MPI_EVENT_SAS_INIT_TABLE_OVERFLOW and event 126 * data structure. 127 * Added MPI_EXT_IMAGE_TYPE_INITIALIZATION. 128 * 10-11-06 01.05.12 Added MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED. 129 * Added MaxInitiators field to PortFacts reply. 130 * Added SAS Device Status Change ReasonCode for 131 * asynchronous notificaiton. 132 * Added MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE and event 133 * data structure. 134 * Added new ImageType values for FWDownload and FWUpload 135 * requests. 136 * 02-28-07 01.05.13 Added MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT for SAS 137 * Broadcast Event Data (replacing _RESERVED2). 138 * For Discovery Error Event Data DiscoveryStatus field, 139 * replaced _MULTPL_PATHS with _UNSUPPORTED_DEVICE and 140 * added _MULTI_PORT_DOMAIN. 141 * 05-24-07 01.05.14 Added Common Boot Block type to FWDownload Request. 142 * Added Common Boot Block type to FWUpload Request. 143 * -------------------------------------------------------------------------- 144 */ 145 146#ifndef MPI_IOC_H 147#define MPI_IOC_H 148 149 150/***************************************************************************** 151* 152* I O C M e s s a g e s 153* 154*****************************************************************************/ 155 156/****************************************************************************/ 157/* IOCInit message */ 158/****************************************************************************/ 159 160typedef struct _MSG_IOC_INIT 161{ 162 U8 WhoInit; /* 00h */ 163 U8 Reserved; /* 01h */ 164 U8 ChainOffset; /* 02h */ 165 U8 Function; /* 03h */ 166 U8 Flags; /* 04h */ 167 U8 MaxDevices; /* 05h */ 168 U8 MaxBuses; /* 06h */ 169 U8 MsgFlags; /* 07h */ 170 U32 MsgContext; /* 08h */ 171 U16 ReplyFrameSize; /* 0Ch */ 172 U8 Reserved1[2]; /* 0Eh */ 173 U32 HostMfaHighAddr; /* 10h */ 174 U32 SenseBufferHighAddr; /* 14h */ 175 U32 ReplyFifoHostSignalingAddr; /* 18h */ 176 SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */ 177 U16 MsgVersion; /* 28h */ 178 U16 HeaderVersion; /* 2Ah */ 179} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT, 180 IOCInit_t, MPI_POINTER pIOCInit_t; 181 182/* WhoInit values */ 183#define MPI_WHOINIT_NO_ONE (0x00) 184#define MPI_WHOINIT_SYSTEM_BIOS (0x01) 185#define MPI_WHOINIT_ROM_BIOS (0x02) 186#define MPI_WHOINIT_PCI_PEER (0x03) 187#define MPI_WHOINIT_HOST_DRIVER (0x04) 188#define MPI_WHOINIT_MANUFACTURER (0x05) 189 190/* Flags values */ 191#define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04) 192#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02) 193#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01) 194 195/* MsgVersion */ 196#define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00) 197#define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8) 198#define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF) 199#define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0) 200 201/* HeaderVersion */ 202#define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00) 203#define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8) 204#define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF) 205#define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0) 206 207 208typedef struct _MSG_IOC_INIT_REPLY 209{ 210 U8 WhoInit; /* 00h */ 211 U8 Reserved; /* 01h */ 212 U8 MsgLength; /* 02h */ 213 U8 Function; /* 03h */ 214 U8 Flags; /* 04h */ 215 U8 MaxDevices; /* 05h */ 216 U8 MaxBuses; /* 06h */ 217 U8 MsgFlags; /* 07h */ 218 U32 MsgContext; /* 08h */ 219 U16 Reserved2; /* 0Ch */ 220 U16 IOCStatus; /* 0Eh */ 221 U32 IOCLogInfo; /* 10h */ 222} MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY, 223 IOCInitReply_t, MPI_POINTER pIOCInitReply_t; 224 225 226 227/****************************************************************************/ 228/* IOC Facts message */ 229/****************************************************************************/ 230 231typedef struct _MSG_IOC_FACTS 232{ 233 U8 Reserved[2]; /* 00h */ 234 U8 ChainOffset; /* 01h */ 235 U8 Function; /* 02h */ 236 U8 Reserved1[3]; /* 03h */ 237 U8 MsgFlags; /* 04h */ 238 U32 MsgContext; /* 08h */ 239} MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS, 240 IOCFacts_t, MPI_POINTER pIOCFacts_t; 241 242typedef struct _MPI_FW_VERSION_STRUCT 243{ 244 U8 Dev; /* 00h */ 245 U8 Unit; /* 01h */ 246 U8 Minor; /* 02h */ 247 U8 Major; /* 03h */ 248} MPI_FW_VERSION_STRUCT; 249 250typedef union _MPI_FW_VERSION 251{ 252 MPI_FW_VERSION_STRUCT Struct; 253 U32 Word; 254} MPI_FW_VERSION; 255 256/* IOC Facts Reply */ 257typedef struct _MSG_IOC_FACTS_REPLY 258{ 259 U16 MsgVersion; /* 00h */ 260 U8 MsgLength; /* 02h */ 261 U8 Function; /* 03h */ 262 U16 HeaderVersion; /* 04h */ 263 U8 IOCNumber; /* 06h */ 264 U8 MsgFlags; /* 07h */ 265 U32 MsgContext; /* 08h */ 266 U16 IOCExceptions; /* 0Ch */ 267 U16 IOCStatus; /* 0Eh */ 268 U32 IOCLogInfo; /* 10h */ 269 U8 MaxChainDepth; /* 14h */ 270 U8 WhoInit; /* 15h */ 271 U8 BlockSize; /* 16h */ 272 U8 Flags; /* 17h */ 273 U16 ReplyQueueDepth; /* 18h */ 274 U16 RequestFrameSize; /* 1Ah */ 275 U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */ 276 U16 ProductID; /* 1Eh */ 277 U32 CurrentHostMfaHighAddr; /* 20h */ 278 U16 GlobalCredits; /* 24h */ 279 U8 NumberOfPorts; /* 26h */ 280 U8 EventState; /* 27h */ 281 U32 CurrentSenseBufferHighAddr; /* 28h */ 282 U16 CurReplyFrameSize; /* 2Ch */ 283 U8 MaxDevices; /* 2Eh */ 284 U8 MaxBuses; /* 2Fh */ 285 U32 FWImageSize; /* 30h */ 286 U32 IOCCapabilities; /* 34h */ 287 MPI_FW_VERSION FWVersion; /* 38h */ 288 U16 HighPriorityQueueDepth; /* 3Ch */ 289 U16 Reserved2; /* 3Eh */ 290 SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */ 291 U32 ReplyFifoHostSignalingAddr; /* 4Ch */ 292} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY, 293 IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t; 294 295#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00) 296#define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8) 297#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF) 298#define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0) 299 300#define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00) 301#define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8) 302#define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF) 303#define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0) 304 305#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001) 306#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002) 307#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004) 308#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008) 309#define MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010) 310 311#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01) 312#define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02) 313#define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04) 314 315#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00) 316#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01) 317 318#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001) 319#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002) 320#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004) 321#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008) 322#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010) 323#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020) 324#define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040) 325#define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080) 326#define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100) 327#define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200) 328#define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400) 329#define MPI_IOCFACTS_CAPABILITY_TLR (0x00000800) 330 331 332/***************************************************************************** 333* 334* P o r t M e s s a g e s 335* 336*****************************************************************************/ 337 338/****************************************************************************/ 339/* Port Facts message and Reply */ 340/****************************************************************************/ 341 342typedef struct _MSG_PORT_FACTS 343{ 344 U8 Reserved[2]; /* 00h */ 345 U8 ChainOffset; /* 02h */ 346 U8 Function; /* 03h */ 347 U8 Reserved1[2]; /* 04h */ 348 U8 PortNumber; /* 06h */ 349 U8 MsgFlags; /* 07h */ 350 U32 MsgContext; /* 08h */ 351} MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS, 352 PortFacts_t, MPI_POINTER pPortFacts_t; 353 354typedef struct _MSG_PORT_FACTS_REPLY 355{ 356 U16 Reserved; /* 00h */ 357 U8 MsgLength; /* 02h */ 358 U8 Function; /* 03h */ 359 U16 Reserved1; /* 04h */ 360 U8 PortNumber; /* 06h */ 361 U8 MsgFlags; /* 07h */ 362 U32 MsgContext; /* 08h */ 363 U16 Reserved2; /* 0Ch */ 364 U16 IOCStatus; /* 0Eh */ 365 U32 IOCLogInfo; /* 10h */ 366 U8 Reserved3; /* 14h */ 367 U8 PortType; /* 15h */ 368 U16 MaxDevices; /* 16h */ 369 U16 PortSCSIID; /* 18h */ 370 U16 ProtocolFlags; /* 1Ah */ 371 U16 MaxPostedCmdBuffers; /* 1Ch */ 372 U16 MaxPersistentIDs; /* 1Eh */ 373 U16 MaxLanBuckets; /* 20h */ 374 U8 MaxInitiators; /* 22h */ 375 U8 Reserved4; /* 23h */ 376 U32 Reserved5; /* 24h */ 377} MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY, 378 PortFactsReply_t, MPI_POINTER pPortFactsReply_t; 379 380 381/* PortTypes values */ 382 383#define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00) 384#define MPI_PORTFACTS_PORTTYPE_SCSI (0x01) 385#define MPI_PORTFACTS_PORTTYPE_FC (0x10) 386#define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20) 387#define MPI_PORTFACTS_PORTTYPE_SAS (0x30) 388 389/* ProtocolFlags values */ 390 391#define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01) 392#define MPI_PORTFACTS_PROTOCOL_LAN (0x02) 393#define MPI_PORTFACTS_PROTOCOL_TARGET (0x04) 394#define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08) 395 396 397/****************************************************************************/ 398/* Port Enable Message */ 399/****************************************************************************/ 400 401typedef struct _MSG_PORT_ENABLE 402{ 403 U8 Reserved[2]; /* 00h */ 404 U8 ChainOffset; /* 02h */ 405 U8 Function; /* 03h */ 406 U8 Reserved1[2]; /* 04h */ 407 U8 PortNumber; /* 06h */ 408 U8 MsgFlags; /* 07h */ 409 U32 MsgContext; /* 08h */ 410} MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE, 411 PortEnable_t, MPI_POINTER pPortEnable_t; 412 413typedef struct _MSG_PORT_ENABLE_REPLY 414{ 415 U8 Reserved[2]; /* 00h */ 416 U8 MsgLength; /* 02h */ 417 U8 Function; /* 03h */ 418 U8 Reserved1[2]; /* 04h */ 419 U8 PortNumber; /* 05h */ 420 U8 MsgFlags; /* 07h */ 421 U32 MsgContext; /* 08h */ 422 U16 Reserved2; /* 0Ch */ 423 U16 IOCStatus; /* 0Eh */ 424 U32 IOCLogInfo; /* 10h */ 425} MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY, 426 PortEnableReply_t, MPI_POINTER pPortEnableReply_t; 427 428 429/***************************************************************************** 430* 431* E v e n t M e s s a g e s 432* 433*****************************************************************************/ 434 435/****************************************************************************/ 436/* Event Notification messages */ 437/****************************************************************************/ 438 439typedef struct _MSG_EVENT_NOTIFY 440{ 441 U8 Switch; /* 00h */ 442 U8 Reserved; /* 01h */ 443 U8 ChainOffset; /* 02h */ 444 U8 Function; /* 03h */ 445 U8 Reserved1[3]; /* 04h */ 446 U8 MsgFlags; /* 07h */ 447 U32 MsgContext; /* 08h */ 448} MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY, 449 EventNotification_t, MPI_POINTER pEventNotification_t; 450 451/* Event Notification Reply */ 452 453typedef struct _MSG_EVENT_NOTIFY_REPLY 454{ 455 U16 EventDataLength; /* 00h */ 456 U8 MsgLength; /* 02h */ 457 U8 Function; /* 03h */ 458 U8 Reserved1[2]; /* 04h */ 459 U8 AckRequired; /* 06h */ 460 U8 MsgFlags; /* 07h */ 461 U32 MsgContext; /* 08h */ 462 U8 Reserved2[2]; /* 0Ch */ 463 U16 IOCStatus; /* 0Eh */ 464 U32 IOCLogInfo; /* 10h */ 465 U32 Event; /* 14h */ 466 U32 EventContext; /* 18h */ 467 U32 Data[1]; /* 1Ch */ 468} MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY, 469 EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t; 470 471/* Event Acknowledge */ 472 473typedef struct _MSG_EVENT_ACK 474{ 475 U8 Reserved[2]; /* 00h */ 476 U8 ChainOffset; /* 02h */ 477 U8 Function; /* 03h */ 478 U8 Reserved1[3]; /* 04h */ 479 U8 MsgFlags; /* 07h */ 480 U32 MsgContext; /* 08h */ 481 U32 Event; /* 0Ch */ 482 U32 EventContext; /* 10h */ 483} MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK, 484 EventAck_t, MPI_POINTER pEventAck_t; 485 486typedef struct _MSG_EVENT_ACK_REPLY 487{ 488 U8 Reserved[2]; /* 00h */ 489 U8 MsgLength; /* 02h */ 490 U8 Function; /* 03h */ 491 U8 Reserved1[3]; /* 04h */ 492 U8 MsgFlags; /* 07h */ 493 U32 MsgContext; /* 08h */ 494 U16 Reserved2; /* 0Ch */ 495 U16 IOCStatus; /* 0Eh */ 496 U32 IOCLogInfo; /* 10h */ 497} MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY, 498 EventAckReply_t, MPI_POINTER pEventAckReply_t; 499 500/* Switch */ 501 502#define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00) 503#define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01) 504 505/* Event */ 506 507#define MPI_EVENT_NONE (0x00000000) 508#define MPI_EVENT_LOG_DATA (0x00000001) 509#define MPI_EVENT_STATE_CHANGE (0x00000002) 510#define MPI_EVENT_UNIT_ATTENTION (0x00000003) 511#define MPI_EVENT_IOC_BUS_RESET (0x00000004) 512#define MPI_EVENT_EXT_BUS_RESET (0x00000005) 513#define MPI_EVENT_RESCAN (0x00000006) 514#define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007) 515#define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008) 516#define MPI_EVENT_LOGOUT (0x00000009) 517#define MPI_EVENT_EVENT_CHANGE (0x0000000A) 518#define MPI_EVENT_INTEGRATED_RAID (0x0000000B) 519#define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C) 520#define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D) 521#define MPI_EVENT_QUEUE_FULL (0x0000000E) 522#define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F) 523#define MPI_EVENT_SAS_SES (0x00000010) 524#define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011) 525#define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012) 526#define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013) 527#define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014) 528#define MPI_EVENT_IR2 (0x00000015) 529#define MPI_EVENT_SAS_DISCOVERY (0x00000016) 530#define MPI_EVENT_SAS_BROADCAST_PRIMITIVE (0x00000017) 531#define MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x00000018) 532#define MPI_EVENT_SAS_INIT_TABLE_OVERFLOW (0x00000019) 533#define MPI_EVENT_SAS_SMP_ERROR (0x0000001A) 534#define MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE (0x0000001B) 535#define MPI_EVENT_LOG_ENTRY_ADDED (0x00000021) 536 537/* AckRequired field values */ 538 539#define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00) 540#define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01) 541 542/* EventChange Event data */ 543 544typedef struct _EVENT_DATA_EVENT_CHANGE 545{ 546 U8 EventState; /* 00h */ 547 U8 Reserved; /* 01h */ 548 U16 Reserved1; /* 02h */ 549} EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE, 550 EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t; 551 552/* LogEntryAdded Event data */ 553 554/* this structure matches MPI_LOG_0_ENTRY in mpi_cnfg.h */ 555#define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH (0x1C) 556typedef struct _EVENT_DATA_LOG_ENTRY 557{ 558 U32 TimeStamp; /* 00h */ 559 U32 Reserved1; /* 04h */ 560 U16 LogSequence; /* 08h */ 561 U16 LogEntryQualifier; /* 0Ah */ 562 U8 LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH]; /* 0Ch */ 563} EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY, 564 MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t; 565 566typedef struct _EVENT_DATA_LOG_ENTRY_ADDED 567{ 568 U16 LogSequence; /* 00h */ 569 U16 Reserved1; /* 02h */ 570 U32 Reserved2; /* 04h */ 571 EVENT_DATA_LOG_ENTRY LogEntry; /* 08h */ 572} EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED, 573 MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t; 574 575/* SCSI Event data for Port, Bus and Device forms */ 576 577typedef struct _EVENT_DATA_SCSI 578{ 579 U8 TargetID; /* 00h */ 580 U8 BusPort; /* 01h */ 581 U16 Reserved; /* 02h */ 582} EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI, 583 EventDataScsi_t, MPI_POINTER pEventDataScsi_t; 584 585/* SCSI Device Status Change Event data */ 586 587typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE 588{ 589 U8 TargetID; /* 00h */ 590 U8 Bus; /* 01h */ 591 U8 ReasonCode; /* 02h */ 592 U8 LUN; /* 03h */ 593 U8 ASC; /* 04h */ 594 U8 ASCQ; /* 05h */ 595 U16 Reserved; /* 06h */ 596} EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE, 597 MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE, 598 MpiEventDataScsiDeviceStatusChange_t, 599 MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t; 600 601/* MPI SCSI Device Status Change Event data ReasonCode values */ 602#define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03) 603#define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04) 604#define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05) 605 606/* SAS Device Status Change Event data */ 607 608typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE 609{ 610 U8 TargetID; /* 00h */ 611 U8 Bus; /* 01h */ 612 U8 ReasonCode; /* 02h */ 613 U8 Reserved; /* 03h */ 614 U8 ASC; /* 04h */ 615 U8 ASCQ; /* 05h */ 616 U16 DevHandle; /* 06h */ 617 U32 DeviceInfo; /* 08h */ 618 U16 ParentDevHandle; /* 0Ch */ 619 U8 PhyNum; /* 0Eh */ 620 U8 Reserved1; /* 0Fh */ 621 U64 SASAddress; /* 10h */ 622 U8 LUN[8]; /* 18h */ 623 U16 TaskTag; /* 20h */ 624 U16 Reserved2; /* 22h */ 625} EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, 626 MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, 627 MpiEventDataSasDeviceStatusChange_t, 628 MPI_POINTER pMpiEventDataSasDeviceStatusChange_t; 629 630/* MPI SAS Device Status Change Event data ReasonCode values */ 631#define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03) 632#define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04) 633#define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05) 634#define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06) 635#define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07) 636#define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08) 637#define MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09) 638#define MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A) 639#define MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B) 640#define MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C) 641#define MPI_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D) 642 643 644/* SCSI Event data for Queue Full event */ 645 646typedef struct _EVENT_DATA_QUEUE_FULL 647{ 648 U8 TargetID; /* 00h */ 649 U8 Bus; /* 01h */ 650 U16 CurrentDepth; /* 02h */ 651} EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL, 652 EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t; 653 654/* MPI Integrated RAID Event data */ 655 656typedef struct _EVENT_DATA_RAID 657{ 658 U8 VolumeID; /* 00h */ 659 U8 VolumeBus; /* 01h */ 660 U8 ReasonCode; /* 02h */ 661 U8 PhysDiskNum; /* 03h */ 662 U8 ASC; /* 04h */ 663 U8 ASCQ; /* 05h */ 664 U16 Reserved; /* 06h */ 665 U32 SettingsStatus; /* 08h */ 666} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID, 667 MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t; 668 669/* MPI Integrated RAID Event data ReasonCode values */ 670#define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00) 671#define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01) 672#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02) 673#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03) 674#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04) 675#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05) 676#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06) 677#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07) 678#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08) 679#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09) 680#define MPI_EVENT_RAID_RC_SMART_DATA (0x0A) 681#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B) 682 683 684/* MPI Integrated RAID Resync Update Event data */ 685 686typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE 687{ 688 U8 VolumeID; /* 00h */ 689 U8 VolumeBus; /* 01h */ 690 U8 ResyncComplete; /* 02h */ 691 U8 Reserved1; /* 03h */ 692 U32 Reserved2; /* 04h */ 693} MPI_EVENT_DATA_IR_RESYNC_UPDATE, 694 MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE, 695 MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t; 696 697/* MPI IR2 Event data */ 698 699/* MPI_LD_STATE or MPI_PD_STATE */ 700typedef struct _IR2_STATE_CHANGED 701{ 702 U16 PreviousState; /* 00h */ 703 U16 NewState; /* 02h */ 704} IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED; 705 706typedef struct _IR2_PD_INFO 707{ 708 U16 DeviceHandle; /* 00h */ 709 U8 TruncEnclosureHandle; /* 02h */ 710 U8 TruncatedSlot; /* 03h */ 711} IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO; 712 713typedef union _MPI_IR2_RC_EVENT_DATA 714{ 715 IR2_STATE_CHANGED StateChanged; 716 U32 Lba; 717 IR2_PD_INFO PdInfo; 718} MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA; 719 720typedef struct _MPI_EVENT_DATA_IR2 721{ 722 U8 TargetID; /* 00h */ 723 U8 Bus; /* 01h */ 724 U8 ReasonCode; /* 02h */ 725 U8 PhysDiskNum; /* 03h */ 726 MPI_IR2_RC_EVENT_DATA IR2EventData; /* 04h */ 727} MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2, 728 MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t; 729 730/* MPI IR2 Event data ReasonCode values */ 731#define MPI_EVENT_IR2_RC_LD_STATE_CHANGED (0x01) 732#define MPI_EVENT_IR2_RC_PD_STATE_CHANGED (0x02) 733#define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL (0x03) 734#define MPI_EVENT_IR2_RC_PD_INSERTED (0x04) 735#define MPI_EVENT_IR2_RC_PD_REMOVED (0x05) 736#define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED (0x06) 737#define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR (0x07) 738 739/* defines for logical disk states */ 740#define MPI_LD_STATE_OPTIMAL (0x00) 741#define MPI_LD_STATE_DEGRADED (0x01) 742#define MPI_LD_STATE_FAILED (0x02) 743#define MPI_LD_STATE_MISSING (0x03) 744#define MPI_LD_STATE_OFFLINE (0x04) 745 746/* defines for physical disk states */ 747#define MPI_PD_STATE_ONLINE (0x00) 748#define MPI_PD_STATE_MISSING (0x01) 749#define MPI_PD_STATE_NOT_COMPATIBLE (0x02) 750#define MPI_PD_STATE_FAILED (0x03) 751#define MPI_PD_STATE_INITIALIZING (0x04) 752#define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST (0x05) 753#define MPI_PD_STATE_FAILED_AT_HOST_REQUEST (0x06) 754#define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON (0xFF) 755 756/* MPI Link Status Change Event data */ 757 758typedef struct _EVENT_DATA_LINK_STATUS 759{ 760 U8 State; /* 00h */ 761 U8 Reserved; /* 01h */ 762 U16 Reserved1; /* 02h */ 763 U8 Reserved2; /* 04h */ 764 U8 Port; /* 05h */ 765 U16 Reserved3; /* 06h */ 766} EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS, 767 EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t; 768 769#define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000) 770#define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001) 771 772/* MPI Loop State Change Event data */ 773 774typedef struct _EVENT_DATA_LOOP_STATE 775{ 776 U8 Character4; /* 00h */ 777 U8 Character3; /* 01h */ 778 U8 Type; /* 02h */ 779 U8 Reserved; /* 03h */ 780 U8 Reserved1; /* 04h */ 781 U8 Port; /* 05h */ 782 U16 Reserved2; /* 06h */ 783} EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE, 784 EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t; 785 786#define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001) 787#define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002) 788#define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003) 789 790/* MPI LOGOUT Event data */ 791 792typedef struct _EVENT_DATA_LOGOUT 793{ 794 U32 NPortID; /* 00h */ 795 U8 AliasIndex; /* 04h */ 796 U8 Port; /* 05h */ 797 U16 Reserved1; /* 06h */ 798} EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT, 799 EventDataLogout_t, MPI_POINTER pEventDataLogout_t; 800 801#define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF) 802 803/* SAS SES Event data */ 804 805typedef struct _EVENT_DATA_SAS_SES 806{ 807 U8 PhyNum; /* 00h */ 808 U8 Port; /* 01h */ 809 U8 PortWidth; /* 02h */ 810 U8 Reserved1; /* 04h */ 811} EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES, 812 MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t; 813 814/* SAS Broadcast Primitive Event data */ 815 816typedef struct _EVENT_DATA_SAS_BROADCAST_PRIMITIVE 817{ 818 U8 PhyNum; /* 00h */ 819 U8 Port; /* 01h */ 820 U8 PortWidth; /* 02h */ 821 U8 Primitive; /* 04h */ 822} EVENT_DATA_SAS_BROADCAST_PRIMITIVE, 823 MPI_POINTER PTR_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, 824 MpiEventDataSasBroadcastPrimitive_t, 825 MPI_POINTER pMpiEventDataSasBroadcastPrimitive_t; 826 827#define MPI_EVENT_PRIMITIVE_CHANGE (0x01) 828#define MPI_EVENT_PRIMITIVE_EXPANDER (0x03) 829#define MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04) 830#define MPI_EVENT_PRIMITIVE_RESERVED3 (0x05) 831#define MPI_EVENT_PRIMITIVE_RESERVED4 (0x06) 832#define MPI_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07) 833#define MPI_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08) 834 835/* SAS Phy Link Status Event data */ 836 837typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS 838{ 839 U8 PhyNum; /* 00h */ 840 U8 LinkRates; /* 01h */ 841 U16 DevHandle; /* 02h */ 842 U64 SASAddress; /* 04h */ 843} EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS, 844 MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t; 845 846/* defines for the LinkRates field of the SAS PHY Link Status event */ 847#define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0) 848#define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4) 849#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F) 850#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0) 851#define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00) 852#define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01) 853#define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02) 854#define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03) 855#define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08) 856#define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09) 857 858/* SAS Discovery Event data */ 859 860typedef struct _EVENT_DATA_SAS_DISCOVERY 861{ 862 U32 DiscoveryStatus; /* 00h */ 863 U32 Reserved1; /* 04h */ 864} EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY, 865 EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t; 866 867#define MPI_EVENT_SAS_DSCVRY_COMPLETE (0x00000000) 868#define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS (0x00000001) 869#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK (0xFFFF0000) 870#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT (16) 871 872/* SAS Discovery Errror Event data */ 873 874typedef struct _EVENT_DATA_DISCOVERY_ERROR 875{ 876 U32 DiscoveryStatus; /* 00h */ 877 U8 Port; /* 04h */ 878 U8 Reserved1; /* 05h */ 879 U16 Reserved2; /* 06h */ 880} EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR, 881 EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t; 882 883#define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001) 884#define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002) 885#define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004) 886#define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008) 887#define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010) 888#define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020) 889#define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040) 890#define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080) 891#define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100) 892#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200) 893#define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400) 894#define MPI_EVENT_DSCVRY_ERR_DS_UNSUPPORTED_DEVICE (0x00000800) 895#define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000) 896#define MPI_EVENT_DSCVRY_ERR_DS_MULTI_PORT_DOMAIN (0x00002000) 897 898/* SAS SMP Error Event data */ 899 900typedef struct _EVENT_DATA_SAS_SMP_ERROR 901{ 902 U8 Status; /* 00h */ 903 U8 Port; /* 01h */ 904 U8 SMPFunctionResult; /* 02h */ 905 U8 Reserved1; /* 03h */ 906 U64 SASAddress; /* 04h */ 907} EVENT_DATA_SAS_SMP_ERROR, MPI_POINTER PTR_EVENT_DATA_SAS_SMP_ERROR, 908 MpiEventDataSasSmpError_t, MPI_POINTER pMpiEventDataSasSmpError_t; 909 910/* defines for the Status field of the SAS SMP Error event */ 911#define MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID (0x00) 912#define MPI_EVENT_SAS_SMP_CRC_ERROR (0x01) 913#define MPI_EVENT_SAS_SMP_TIMEOUT (0x02) 914#define MPI_EVENT_SAS_SMP_NO_DESTINATION (0x03) 915#define MPI_EVENT_SAS_SMP_BAD_DESTINATION (0x04) 916 917/* SAS Initiator Device Status Change Event data */ 918 919typedef struct _EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE 920{ 921 U8 ReasonCode; /* 00h */ 922 U8 Port; /* 01h */ 923 U16 DevHandle; /* 02h */ 924 U64 SASAddress; /* 04h */ 925} EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, 926 MPI_POINTER PTR_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, 927 MpiEventDataSasInitDevStatusChange_t, 928 MPI_POINTER pMpiEventDataSasInitDevStatusChange_t; 929 930/* defines for the ReasonCode field of the SAS Initiator Device Status Change event */ 931#define MPI_EVENT_SAS_INIT_RC_ADDED (0x01) 932 933/* SAS Initiator Device Table Overflow Event data */ 934 935typedef struct _EVENT_DATA_SAS_INIT_TABLE_OVERFLOW 936{ 937 U8 MaxInit; /* 00h */ 938 U8 CurrentInit; /* 01h */ 939 U16 Reserved1; /* 02h */ 940} EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, 941 MPI_POINTER PTR_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, 942 MpiEventDataSasInitTableOverflow_t, 943 MPI_POINTER pMpiEventDataSasInitTableOverflow_t; 944 945/* SAS Expander Status Change Event data */ 946 947typedef struct _EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE 948{ 949 U8 ReasonCode; /* 00h */ 950 U8 Reserved1; /* 01h */ 951 U16 Reserved2; /* 02h */ 952 U8 PhysicalPort; /* 04h */ 953 U8 Reserved3; /* 05h */ 954 U16 EnclosureHandle; /* 06h */ 955 U64 SASAddress; /* 08h */ 956 U32 DiscoveryStatus; /* 10h */ 957 U16 DevHandle; /* 14h */ 958 U16 ParentDevHandle; /* 16h */ 959 U16 ExpanderChangeCount; /* 18h */ 960 U16 ExpanderRouteIndexes; /* 1Ah */ 961 U8 NumPhys; /* 1Ch */ 962 U8 SASLevel; /* 1Dh */ 963 U8 Flags; /* 1Eh */ 964 U8 Reserved4; /* 1Fh */ 965} EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE, 966 MPI_POINTER PTR_EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE, 967 MpiEventDataSasExpanderStatusChange_t, 968 MPI_POINTER pMpiEventDataSasExpanderStatusChange_t; 969 970/* values for ReasonCode field of SAS Expander Status Change Event data */ 971#define MPI_EVENT_SAS_EXP_RC_ADDED (0x00) 972#define MPI_EVENT_SAS_EXP_RC_NOT_RESPONDING (0x01) 973 974/* values for DiscoveryStatus field of SAS Expander Status Change Event data */ 975#define MPI_EVENT_SAS_EXP_DS_LOOP_DETECTED (0x00000001) 976#define MPI_EVENT_SAS_EXP_DS_UNADDRESSABLE_DEVICE (0x00000002) 977#define MPI_EVENT_SAS_EXP_DS_MULTIPLE_PORTS (0x00000004) 978#define MPI_EVENT_SAS_EXP_DS_EXPANDER_ERR (0x00000008) 979#define MPI_EVENT_SAS_EXP_DS_SMP_TIMEOUT (0x00000010) 980#define MPI_EVENT_SAS_EXP_DS_OUT_ROUTE_ENTRIES (0x00000020) 981#define MPI_EVENT_SAS_EXP_DS_INDEX_NOT_EXIST (0x00000040) 982#define MPI_EVENT_SAS_EXP_DS_SMP_FUNCTION_FAILED (0x00000080) 983#define MPI_EVENT_SAS_EXP_DS_SMP_CRC_ERROR (0x00000100) 984#define MPI_EVENT_SAS_EXP_DS_SUBTRACTIVE_LINK (0x00000200) 985#define MPI_EVENT_SAS_EXP_DS_TABLE_LINK (0x00000400) 986#define MPI_EVENT_SAS_EXP_DS_UNSUPPORTED_DEVICE (0x00000800) 987 988/* values for Flags field of SAS Expander Status Change Event data */ 989#define MPI_EVENT_SAS_EXP_FLAGS_ROUTE_TABLE_CONFIG (0x02) 990#define MPI_EVENT_SAS_EXP_FLAGS_CONFIG_IN_PROGRESS (0x01) 991 992 993 994/***************************************************************************** 995* 996* F i r m w a r e L o a d M e s s a g e s 997* 998*****************************************************************************/ 999 1000/****************************************************************************/ 1001/* Firmware Download message and associated structures */ 1002/****************************************************************************/ 1003 1004typedef struct _MSG_FW_DOWNLOAD 1005{ 1006 U8 ImageType; /* 00h */ 1007 U8 Reserved; /* 01h */ 1008 U8 ChainOffset; /* 02h */ 1009 U8 Function; /* 03h */ 1010 U8 Reserved1[3]; /* 04h */ 1011 U8 MsgFlags; /* 07h */ 1012 U32 MsgContext; /* 08h */ 1013 SGE_MPI_UNION SGL; /* 0Ch */ 1014} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD, 1015 FWDownload_t, MPI_POINTER pFWDownload_t; 1016 1017#define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01) 1018 1019#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00) 1020#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01) 1021#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02) 1022#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03) 1023#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04) 1024#define MPI_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06) 1025#define MPI_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07) 1026#define MPI_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08) 1027#define MPI_FW_DOWNLOAD_ITYPE_MEGARAID (0x09) 1028#define MPI_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B) 1029 1030 1031typedef struct _FWDownloadTCSGE 1032{ 1033 U8 Reserved; /* 00h */ 1034 U8 ContextSize; /* 01h */ 1035 U8 DetailsLength; /* 02h */ 1036 U8 Flags; /* 03h */ 1037 U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */ 1038 U32 ImageOffset; /* 08h */ 1039 U32 ImageSize; /* 0Ch */ 1040} FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE, 1041 FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t; 1042 1043/* Firmware Download reply */ 1044typedef struct _MSG_FW_DOWNLOAD_REPLY 1045{ 1046 U8 ImageType; /* 00h */ 1047 U8 Reserved; /* 01h */ 1048 U8 MsgLength; /* 02h */ 1049 U8 Function; /* 03h */ 1050 U8 Reserved1[3]; /* 04h */ 1051 U8 MsgFlags; /* 07h */ 1052 U32 MsgContext; /* 08h */ 1053 U16 Reserved2; /* 0Ch */ 1054 U16 IOCStatus; /* 0Eh */ 1055 U32 IOCLogInfo; /* 10h */ 1056} MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY, 1057 FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t; 1058 1059 1060/****************************************************************************/ 1061/* Firmware Upload message and associated structures */ 1062/****************************************************************************/ 1063 1064typedef struct _MSG_FW_UPLOAD 1065{ 1066 U8 ImageType; /* 00h */ 1067 U8 Reserved; /* 01h */ 1068 U8 ChainOffset; /* 02h */ 1069 U8 Function; /* 03h */ 1070 U8 Reserved1[3]; /* 04h */ 1071 U8 MsgFlags; /* 07h */ 1072 U32 MsgContext; /* 08h */ 1073 SGE_MPI_UNION SGL; /* 0Ch */ 1074} MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD, 1075 FWUpload_t, MPI_POINTER pFWUpload_t; 1076 1077#define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00) 1078#define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01) 1079#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02) 1080#define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03) 1081#define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04) 1082#define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05) 1083#define MPI_FW_UPLOAD_ITYPE_MANUFACTURING (0x06) 1084#define MPI_FW_UPLOAD_ITYPE_CONFIG_1 (0x07) 1085#define MPI_FW_UPLOAD_ITYPE_CONFIG_2 (0x08) 1086#define MPI_FW_UPLOAD_ITYPE_MEGARAID (0x09) 1087#define MPI_FW_UPLOAD_ITYPE_COMPLETE (0x0A) 1088#define MPI_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B) 1089 1090typedef struct _FWUploadTCSGE 1091{ 1092 U8 Reserved; /* 00h */ 1093 U8 ContextSize; /* 01h */ 1094 U8 DetailsLength; /* 02h */ 1095 U8 Flags; /* 03h */ 1096 U32 Reserved1; /* 04h */ 1097 U32 ImageOffset; /* 08h */ 1098 U32 ImageSize; /* 0Ch */ 1099} FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE, 1100 FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t; 1101 1102/* Firmware Upload reply */ 1103typedef struct _MSG_FW_UPLOAD_REPLY 1104{ 1105 U8 ImageType; /* 00h */ 1106 U8 Reserved; /* 01h */ 1107 U8 MsgLength; /* 02h */ 1108 U8 Function; /* 03h */ 1109 U8 Reserved1[3]; /* 04h */ 1110 U8 MsgFlags; /* 07h */ 1111 U32 MsgContext; /* 08h */ 1112 U16 Reserved2; /* 0Ch */ 1113 U16 IOCStatus; /* 0Eh */ 1114 U32 IOCLogInfo; /* 10h */ 1115 U32 ActualImageSize; /* 14h */ 1116} MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY, 1117 FWUploadReply_t, MPI_POINTER pFWUploadReply_t; 1118 1119 1120typedef struct _MPI_FW_HEADER 1121{ 1122 U32 ArmBranchInstruction0; /* 00h */ 1123 U32 Signature0; /* 04h */ 1124 U32 Signature1; /* 08h */ 1125 U32 Signature2; /* 0Ch */ 1126 U32 ArmBranchInstruction1; /* 10h */ 1127 U32 ArmBranchInstruction2; /* 14h */ 1128 U32 Reserved; /* 18h */ 1129 U32 Checksum; /* 1Ch */ 1130 U16 VendorId; /* 20h */ 1131 U16 ProductId; /* 22h */ 1132 MPI_FW_VERSION FWVersion; /* 24h */ 1133 U32 SeqCodeVersion; /* 28h */ 1134 U32 ImageSize; /* 2Ch */ 1135 U32 NextImageHeaderOffset; /* 30h */ 1136 U32 LoadStartAddress; /* 34h */ 1137 U32 IopResetVectorValue; /* 38h */ 1138 U32 IopResetRegAddr; /* 3Ch */ 1139 U32 VersionNameWhat; /* 40h */ 1140 U8 VersionName[32]; /* 44h */ 1141 U32 VendorNameWhat; /* 64h */ 1142 U8 VendorName[32]; /* 68h */ 1143} MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER, 1144 MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t; 1145 1146#define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840) 1147 1148/* defines for using the ProductId field */ 1149#define MPI_FW_HEADER_PID_TYPE_MASK (0xF000) 1150#define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000) 1151#define MPI_FW_HEADER_PID_TYPE_FC (0x1000) 1152#define MPI_FW_HEADER_PID_TYPE_SAS (0x2000) 1153 1154#define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A) 1155#define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5) 1156#define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA) 1157 1158#define MPI_FW_HEADER_PID_PROD_MASK (0x0F00) 1159#define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100) 1160#define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200) 1161#define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300) 1162#define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400) 1163#define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500) 1164#define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600) 1165#define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700) 1166 1167#define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF) 1168/* SCSI */ 1169#define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001) 1170#define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002) 1171#define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003) 1172#define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004) 1173#define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005) 1174#define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006) 1175#define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007) 1176#define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008) 1177#define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009) 1178#define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A) 1179#define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B) 1180#define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C) 1181/* Fibre Channel */ 1182#define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000) 1183#define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) /* 919 and 929 */ 1184#define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) /* 919X and 929X */ 1185#define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) /* 919XL and 929XL */ 1186#define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004) /* 939X and 949X */ 1187#define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005) 1188#define MPI_FW_HEADER_PID_FAMILY_949E_FC (0x0006) 1189/* SAS */ 1190#define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001) 1191#define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002) 1192#define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003) 1193#define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004) /* 1068E, 1066E, and 1064E */ 1194 1195typedef struct _MPI_EXT_IMAGE_HEADER 1196{ 1197 U8 ImageType; /* 00h */ 1198 U8 Reserved; /* 01h */ 1199 U16 Reserved1; /* 02h */ 1200 U32 Checksum; /* 04h */ 1201 U32 ImageSize; /* 08h */ 1202 U32 NextImageHeaderOffset; /* 0Ch */ 1203 U32 LoadStartAddress; /* 10h */ 1204 U32 Reserved2; /* 14h */ 1205} MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER, 1206 MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t; 1207 1208/* defines for the ImageType field */ 1209#define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00) 1210#define MPI_EXT_IMAGE_TYPE_FW (0x01) 1211#define MPI_EXT_IMAGE_TYPE_NVDATA (0x03) 1212#define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04) 1213#define MPI_EXT_IMAGE_TYPE_INITIALIZATION (0x05) 1214 1215#endif 1216