mpsvar.h revision 322658
1/*-
2 * Copyright (c) 2009 Yahoo! Inc.
3 * Copyright (c) 2011-2015 LSI Corp.
4 * Copyright (c) 2013-2015 Avago Technologies
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
29 *
30 * $FreeBSD: stable/11/sys/dev/mps/mpsvar.h 322658 2017-08-18 14:25:07Z ken $
31 */
32
33#ifndef _MPSVAR_H
34#define _MPSVAR_H
35
36#define MPS_DRIVER_VERSION	"21.02.00.00-fbsd"
37
38#define MPS_DB_MAX_WAIT		2500
39
40#define MPS_REQ_FRAMES		1024
41#define MPS_EVT_REPLY_FRAMES	32
42#define MPS_REPLY_FRAMES	MPS_REQ_FRAMES
43#define MPS_CHAIN_FRAMES	2048
44#define MPS_MAXIO_PAGES		(-1)
45#define MPS_SENSE_LEN		SSD_FULL_SIZE
46#define MPS_MSI_COUNT		1
47#define MPS_SGE64_SIZE		12
48#define MPS_SGE32_SIZE		8
49#define MPS_SGC_SIZE		8
50
51#define	 CAN_SLEEP			1
52#define  NO_SLEEP			0
53
54#define MPS_PERIODIC_DELAY	1	/* 1 second heartbeat/watchdog check */
55#define MPS_ATA_ID_TIMEOUT	5	/* 5 second timeout for SATA ID cmd */
56#define MPS_MISSING_CHECK_DELAY	10	/* 10 seconds between missing check */
57
58#define MPS_SCSI_RI_INVALID_FRAME	(0x00000002)
59#define MPS_STRING_LENGTH               64
60
61#define DEFAULT_SPINUP_WAIT	3	/* seconds to wait for spinup */
62
63#include <sys/endian.h>
64
65/*
66 * host mapping related macro definitions
67 */
68#define MPS_MAPTABLE_BAD_IDX	0xFFFFFFFF
69#define MPS_DPM_BAD_IDX		0xFFFF
70#define MPS_ENCTABLE_BAD_IDX	0xFF
71#define MPS_MAX_MISSING_COUNT	0x0F
72#define MPS_DEV_RESERVED	0x20000000
73#define MPS_MAP_IN_USE		0x10000000
74#define MPS_MAP_BAD_ID		0xFFFFFFFF
75
76/*
77 * WarpDrive controller
78 */
79#define	MPS_CHIP_WD_DEVICE_ID	0x007E
80#define	MPS_WD_LSI_OEM		0x80
81#define	MPS_WD_HIDE_EXPOSE_MASK	0x03
82#define	MPS_WD_HIDE_ALWAYS	0x00
83#define	MPS_WD_EXPOSE_ALWAYS	0x01
84#define	MPS_WD_HIDE_IF_VOLUME	0x02
85#define	MPS_WD_RETRY		0x01
86#define	MPS_MAN_PAGE10_SIZE	0x5C	/* Hardcode for now */
87#define MPS_MAX_DISKS_IN_VOL	10
88
89/*
90 * WarpDrive Event Logging
91 */
92#define	MPI2_WD_LOG_ENTRY	0x8002
93#define	MPI2_WD_SSD_THROTTLING	0x0041
94#define	MPI2_WD_DRIVE_LIFE_WARN	0x0043
95#define	MPI2_WD_DRIVE_LIFE_DEAD	0x0044
96#define	MPI2_WD_RAIL_MON_FAIL	0x004D
97
98typedef uint8_t u8;
99typedef uint16_t u16;
100typedef uint32_t u32;
101typedef uint64_t u64;
102
103/**
104 * struct dev_mapping_table - device mapping information
105 * @physical_id: SAS address for drives or WWID for RAID volumes
106 * @device_info: bitfield provides detailed info about the device
107 * @phy_bits: bitfields indicating controller phys
108 * @dpm_entry_num: index of this device in device persistent map table
109 * @dev_handle: device handle for the device pointed by this entry
110 * @id: target id
111 * @missing_count: number of times the device not detected by driver
112 * @hide_flag: Hide this physical disk/not (foreign configuration)
113 * @init_complete: Whether the start of the day checks completed or not
114 */
115struct dev_mapping_table {
116	u64	physical_id;
117	u32	device_info;
118	u32	phy_bits;
119	u16	dpm_entry_num;
120	u16	dev_handle;
121	u16	reserved1;
122	u16	id;
123	u8	missing_count;
124	u8	init_complete;
125	u8	TLR_bits;
126	u8	reserved2;
127};
128
129/**
130 * struct enc_mapping_table -  mapping information about an enclosure
131 * @enclosure_id: Logical ID of this enclosure
132 * @start_index: index to the entry in dev_mapping_table
133 * @phy_bits: bitfields indicating controller phys
134 * @dpm_entry_num: index of this enclosure in device persistent map table
135 * @enc_handle: device handle for the enclosure pointed by this entry
136 * @num_slots: number of slots in the enclosure
137 * @start_slot: Starting slot id
138 * @missing_count: number of times the device not detected by driver
139 * @removal_flag: used to mark the device for removal
140 * @skip_search: used as a flag to include/exclude enclosure for search
141 * @init_complete: Whether the start of the day checks completed or not
142 */
143struct enc_mapping_table {
144	u64	enclosure_id;
145	u32	start_index;
146	u32	phy_bits;
147	u16	dpm_entry_num;
148	u16	enc_handle;
149	u16	num_slots;
150	u16	start_slot;
151	u8	missing_count;
152	u8	removal_flag;
153	u8	skip_search;
154	u8	init_complete;
155};
156
157/**
158 * struct map_removal_table - entries to be removed from mapping table
159 * @dpm_entry_num: index of this device in device persistent map table
160 * @dev_handle: device handle for the device pointed by this entry
161 */
162struct map_removal_table{
163	u16	dpm_entry_num;
164	u16	dev_handle;
165};
166
167typedef struct mps_fw_diagnostic_buffer {
168	size_t		size;
169	uint8_t		extended_type;
170	uint8_t		buffer_type;
171	uint8_t		force_release;
172	uint32_t	product_specific[23];
173	uint8_t		immediate;
174	uint8_t		enabled;
175	uint8_t		valid_data;
176	uint8_t		owned_by_firmware;
177	uint32_t	unique_id;
178} mps_fw_diagnostic_buffer_t;
179
180struct mps_softc;
181struct mps_command;
182struct mpssas_softc;
183union ccb;
184struct mpssas_target;
185struct mps_column_map;
186
187MALLOC_DECLARE(M_MPT2);
188
189typedef void mps_evt_callback_t(struct mps_softc *, uintptr_t,
190    MPI2_EVENT_NOTIFICATION_REPLY *reply);
191typedef void mps_command_callback_t(struct mps_softc *, struct mps_command *cm);
192
193struct mps_chain {
194	TAILQ_ENTRY(mps_chain)		chain_link;
195	MPI2_SGE_IO_UNION		*chain;
196	uint32_t			chain_busaddr;
197};
198
199/*
200 * This needs to be at least 2 to support SMP passthrough.
201 */
202#define       MPS_IOVEC_COUNT 2
203
204struct mps_command {
205	TAILQ_ENTRY(mps_command)	cm_link;
206	TAILQ_ENTRY(mps_command)	cm_recovery;
207	struct mps_softc		*cm_sc;
208	union ccb			*cm_ccb;
209	void				*cm_data;
210	u_int				cm_length;
211	u_int				cm_out_len;
212	struct uio			cm_uio;
213	struct iovec			cm_iovec[MPS_IOVEC_COUNT];
214	u_int				cm_max_segs;
215	u_int				cm_sglsize;
216	MPI2_SGE_IO_UNION		*cm_sge;
217	uint8_t				*cm_req;
218	uint8_t				*cm_reply;
219	uint32_t			cm_reply_data;
220	mps_command_callback_t		*cm_complete;
221	void				*cm_complete_data;
222	struct mpssas_target		*cm_targ;
223	MPI2_REQUEST_DESCRIPTOR_UNION	cm_desc;
224	u_int	                	cm_lun;
225	u_int				cm_flags;
226#define MPS_CM_FLAGS_POLLED		(1 << 0)
227#define MPS_CM_FLAGS_COMPLETE		(1 << 1)
228#define MPS_CM_FLAGS_SGE_SIMPLE		(1 << 2)
229#define MPS_CM_FLAGS_DATAOUT		(1 << 3)
230#define MPS_CM_FLAGS_DATAIN		(1 << 4)
231#define MPS_CM_FLAGS_WAKEUP		(1 << 5)
232#define MPS_CM_FLAGS_DD_IO		(1 << 6)
233#define MPS_CM_FLAGS_USE_UIO		(1 << 7)
234#define MPS_CM_FLAGS_SMP_PASS		(1 << 8)
235#define	MPS_CM_FLAGS_CHAIN_FAILED	(1 << 9)
236#define	MPS_CM_FLAGS_ERROR_MASK		MPS_CM_FLAGS_CHAIN_FAILED
237#define	MPS_CM_FLAGS_USE_CCB		(1 << 10)
238#define	MPS_CM_FLAGS_SATA_ID_TIMEOUT	(1 << 11)
239	u_int				cm_state;
240#define MPS_CM_STATE_FREE		0
241#define MPS_CM_STATE_BUSY		1
242#define MPS_CM_STATE_TIMEDOUT		2
243	bus_dmamap_t			cm_dmamap;
244	struct scsi_sense_data		*cm_sense;
245	TAILQ_HEAD(, mps_chain)		cm_chain_list;
246	uint32_t			cm_req_busaddr;
247	uint32_t			cm_sense_busaddr;
248	struct callout			cm_callout;
249};
250
251struct mps_column_map {
252	uint16_t			dev_handle;
253	uint8_t				phys_disk_num;
254};
255
256struct mps_event_handle {
257	TAILQ_ENTRY(mps_event_handle)	eh_list;
258	mps_evt_callback_t		*callback;
259	void				*data;
260	u32				mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
261};
262
263struct mps_softc {
264	device_t			mps_dev;
265	struct cdev			*mps_cdev;
266	u_int				mps_flags;
267#define MPS_FLAGS_INTX		(1 << 0)
268#define MPS_FLAGS_MSI		(1 << 1)
269#define MPS_FLAGS_BUSY		(1 << 2)
270#define MPS_FLAGS_SHUTDOWN	(1 << 3)
271#define MPS_FLAGS_DIAGRESET	(1 << 4)
272#define	MPS_FLAGS_ATTACH_DONE	(1 << 5)
273#define	MPS_FLAGS_WD_AVAILABLE	(1 << 6)
274#define	MPS_FLAGS_REALLOCATED	(1 << 7)
275	u_int				mps_debug;
276	u_int				disable_msix;
277	u_int				disable_msi;
278	u_int				msi_msgs;
279	int				tm_cmds_active;
280	int				io_cmds_active;
281	int				io_cmds_highwater;
282	int				chain_free;
283	int				max_chains;
284	int				max_io_pages;
285	int				chain_free_lowwater;
286	u_int				enable_ssu;
287	int				spinup_wait_time;
288	int				use_phynum;
289	uint64_t			chain_alloc_fail;
290	struct sysctl_ctx_list		sysctl_ctx;
291	struct sysctl_oid		*sysctl_tree;
292	char                            fw_version[16];
293	struct mps_command		*commands;
294	struct mps_chain		*chains;
295	struct callout			periodic;
296	struct callout			device_check_callout;
297
298	struct mpssas_softc		*sassc;
299	char            tmp_string[MPS_STRING_LENGTH];
300	TAILQ_HEAD(, mps_command)	req_list;
301	TAILQ_HEAD(, mps_command)	high_priority_req_list;
302	TAILQ_HEAD(, mps_chain)		chain_list;
303	TAILQ_HEAD(, mps_command)	tm_list;
304	int				replypostindex;
305	int				replyfreeindex;
306
307	struct resource			*mps_regs_resource;
308	bus_space_handle_t		mps_bhandle;
309	bus_space_tag_t			mps_btag;
310	int				mps_regs_rid;
311
312	bus_dma_tag_t			mps_parent_dmat;
313	bus_dma_tag_t			buffer_dmat;
314
315	MPI2_IOC_FACTS_REPLY		*facts;
316	int				num_reqs;
317	int				num_replies;
318	int				fqdepth;	/* Free queue */
319	int				pqdepth;	/* Post queue */
320
321	u32             event_mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
322	TAILQ_HEAD(, mps_event_handle)	event_list;
323	struct mps_event_handle		*mps_log_eh;
324
325	struct mtx			mps_mtx;
326	struct intr_config_hook		mps_ich;
327	struct resource			*mps_irq[MPS_MSI_COUNT];
328	void				*mps_intrhand[MPS_MSI_COUNT];
329	int				mps_irq_rid[MPS_MSI_COUNT];
330
331	uint8_t				*req_frames;
332	bus_addr_t			req_busaddr;
333	bus_dma_tag_t			req_dmat;
334	bus_dmamap_t			req_map;
335
336	uint8_t				*reply_frames;
337	bus_addr_t			reply_busaddr;
338	bus_dma_tag_t			reply_dmat;
339	bus_dmamap_t			reply_map;
340
341	struct scsi_sense_data		*sense_frames;
342	bus_addr_t			sense_busaddr;
343	bus_dma_tag_t			sense_dmat;
344	bus_dmamap_t			sense_map;
345
346	uint8_t				*chain_frames;
347	bus_addr_t			chain_busaddr;
348	bus_dma_tag_t			chain_dmat;
349	bus_dmamap_t			chain_map;
350
351	MPI2_REPLY_DESCRIPTORS_UNION	*post_queue;
352	bus_addr_t			post_busaddr;
353	uint32_t			*free_queue;
354	bus_addr_t			free_busaddr;
355	bus_dma_tag_t			queues_dmat;
356	bus_dmamap_t			queues_map;
357
358	uint8_t				*fw_diag_buffer;
359	bus_addr_t			fw_diag_busaddr;
360	bus_dma_tag_t			fw_diag_dmat;
361	bus_dmamap_t			fw_diag_map;
362
363	uint8_t				ir_firmware;
364
365	/* static config pages */
366	Mpi2IOCPage8_t			ioc_pg8;
367
368	/* host mapping support */
369	struct dev_mapping_table	*mapping_table;
370	struct enc_mapping_table	*enclosure_table;
371	struct map_removal_table	*removal_table;
372	uint8_t				*dpm_entry_used;
373	uint8_t				*dpm_flush_entry;
374	Mpi2DriverMappingPage0_t	*dpm_pg0;
375	uint16_t			max_devices;
376	uint16_t			max_enclosures;
377	uint16_t			max_expanders;
378	uint8_t				max_volumes;
379	uint8_t				num_enc_table_entries;
380	uint8_t				num_rsvd_entries;
381	uint16_t			max_dpm_entries;
382	uint8_t				is_dpm_enable;
383	uint8_t				track_mapping_events;
384	uint32_t			pending_map_events;
385
386	/* FW diag Buffer List */
387	mps_fw_diagnostic_buffer_t
388				fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
389
390	/* Event Recording IOCTL support */
391	uint32_t			events_to_record[4];
392	mps_event_entry_t		recorded_events[MPS_EVENT_QUEUE_SIZE];
393	uint8_t				event_index;
394	uint32_t			event_number;
395
396	/* EEDP and TLR support */
397	uint8_t				eedp_enabled;
398	uint8_t				control_TLR;
399
400	/* Shutdown Event Handler */
401	eventhandler_tag		shutdown_eh;
402
403	/* To track topo events during reset */
404#define	MPS_DIAG_RESET_TIMEOUT	300000
405	uint8_t				wait_for_port_enable;
406	uint8_t				port_enable_complete;
407	uint8_t				msleep_fake_chan;
408
409	/* WD controller */
410	uint8_t             WD_available;
411	uint8_t				WD_valid_config;
412	uint8_t				WD_hide_expose;
413
414	/* Direct Drive for WarpDrive */
415	uint8_t				DD_num_phys_disks;
416	uint16_t			DD_dev_handle;
417	uint32_t			DD_stripe_size;
418	uint32_t			DD_stripe_exponent;
419	uint32_t			DD_block_size;
420	uint16_t			DD_block_exponent;
421	uint64_t			DD_max_lba;
422	struct mps_column_map		DD_column_map[MPS_MAX_DISKS_IN_VOL];
423
424	char				exclude_ids[80];
425	struct timeval			lastfail;
426
427	/* StartStopUnit command handling at shutdown */
428	uint32_t			SSU_refcount;
429	uint8_t				SSU_started;
430};
431
432struct mps_config_params {
433	MPI2_CONFIG_EXT_PAGE_HEADER_UNION	hdr;
434	u_int		action;
435	u_int		page_address;	/* Attributes, not a phys address */
436	u_int		status;
437	void		*buffer;
438	u_int		length;
439	int		timeout;
440	void		(*callback)(struct mps_softc *, struct mps_config_params *);
441	void		*cbdata;
442};
443
444struct scsi_read_capacity_eedp
445{
446	uint8_t addr[8];
447	uint8_t length[4];
448	uint8_t protect;
449};
450
451static __inline uint32_t
452mps_regread(struct mps_softc *sc, uint32_t offset)
453{
454	return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset));
455}
456
457static __inline void
458mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val)
459{
460	bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val);
461}
462
463/* free_queue must have Little Endian address
464 * TODO- cm_reply_data is unwanted. We can remove it.
465 * */
466static __inline void
467mps_free_reply(struct mps_softc *sc, uint32_t busaddr)
468{
469	if (++sc->replyfreeindex >= sc->fqdepth)
470		sc->replyfreeindex = 0;
471	sc->free_queue[sc->replyfreeindex] = htole32(busaddr);
472	mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
473}
474
475static __inline struct mps_chain *
476mps_alloc_chain(struct mps_softc *sc)
477{
478	struct mps_chain *chain;
479
480	if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
481		TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
482		sc->chain_free--;
483		if (sc->chain_free < sc->chain_free_lowwater)
484			sc->chain_free_lowwater = sc->chain_free;
485	} else
486		sc->chain_alloc_fail++;
487	return (chain);
488}
489
490static __inline void
491mps_free_chain(struct mps_softc *sc, struct mps_chain *chain)
492{
493	sc->chain_free++;
494	TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
495}
496
497static __inline void
498mps_free_command(struct mps_softc *sc, struct mps_command *cm)
499{
500	struct mps_chain *chain, *chain_temp;
501
502	if (cm->cm_reply != NULL)
503		mps_free_reply(sc, cm->cm_reply_data);
504	cm->cm_reply = NULL;
505	cm->cm_flags = 0;
506	cm->cm_complete = NULL;
507	cm->cm_complete_data = NULL;
508	cm->cm_ccb = NULL;
509	cm->cm_targ = NULL;
510	cm->cm_max_segs = 0;
511	cm->cm_lun = 0;
512	cm->cm_state = MPS_CM_STATE_FREE;
513	cm->cm_data = NULL;
514	cm->cm_length = 0;
515	cm->cm_out_len = 0;
516	cm->cm_sglsize = 0;
517	cm->cm_sge = NULL;
518
519	TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
520		TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
521		mps_free_chain(sc, chain);
522	}
523	TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
524}
525
526static __inline struct mps_command *
527mps_alloc_command(struct mps_softc *sc)
528{
529	struct mps_command *cm;
530
531	cm = TAILQ_FIRST(&sc->req_list);
532	if (cm == NULL)
533		return (NULL);
534
535	TAILQ_REMOVE(&sc->req_list, cm, cm_link);
536	KASSERT(cm->cm_state == MPS_CM_STATE_FREE, ("mps: Allocating busy command\n"));
537	cm->cm_state = MPS_CM_STATE_BUSY;
538	return (cm);
539}
540
541static __inline void
542mps_free_high_priority_command(struct mps_softc *sc, struct mps_command *cm)
543{
544	struct mps_chain *chain, *chain_temp;
545
546	if (cm->cm_reply != NULL)
547		mps_free_reply(sc, cm->cm_reply_data);
548	cm->cm_reply = NULL;
549	cm->cm_flags = 0;
550	cm->cm_complete = NULL;
551	cm->cm_complete_data = NULL;
552	cm->cm_ccb = NULL;
553	cm->cm_targ = NULL;
554	cm->cm_lun = 0;
555	cm->cm_state = MPS_CM_STATE_FREE;
556	TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
557		TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
558		mps_free_chain(sc, chain);
559	}
560	TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
561}
562
563static __inline struct mps_command *
564mps_alloc_high_priority_command(struct mps_softc *sc)
565{
566	struct mps_command *cm;
567
568	cm = TAILQ_FIRST(&sc->high_priority_req_list);
569	if (cm == NULL)
570		return (NULL);
571
572	TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
573	KASSERT(cm->cm_state == MPS_CM_STATE_FREE, ("mps: Allocating busy command\n"));
574	cm->cm_state = MPS_CM_STATE_BUSY;
575	return (cm);
576}
577
578static __inline void
579mps_lock(struct mps_softc *sc)
580{
581	mtx_lock(&sc->mps_mtx);
582}
583
584static __inline void
585mps_unlock(struct mps_softc *sc)
586{
587	mtx_unlock(&sc->mps_mtx);
588}
589
590#define MPS_INFO	(1 << 0)	/* Basic info */
591#define MPS_FAULT	(1 << 1)	/* Hardware faults */
592#define MPS_EVENT	(1 << 2)	/* Event data from the controller */
593#define MPS_LOG		(1 << 3)	/* Log data from the controller */
594#define MPS_RECOVERY	(1 << 4)	/* Command error recovery tracing */
595#define MPS_ERROR	(1 << 5)	/* Parameter errors, programming bugs */
596#define MPS_INIT	(1 << 6)	/* Things related to system init */
597#define MPS_XINFO	(1 << 7)	/* More detailed/noisy info */
598#define MPS_USER	(1 << 8)	/* Trace user-generated commands */
599#define MPS_MAPPING	(1 << 9)	/* Trace device mappings */
600#define MPS_TRACE	(1 << 10)	/* Function-by-function trace */
601
602#define	MPS_SSU_DISABLE_SSD_DISABLE_HDD	0
603#define	MPS_SSU_ENABLE_SSD_DISABLE_HDD	1
604#define	MPS_SSU_DISABLE_SSD_ENABLE_HDD	2
605#define	MPS_SSU_ENABLE_SSD_ENABLE_HDD	3
606
607#define mps_printf(sc, args...)				\
608	device_printf((sc)->mps_dev, ##args)
609
610#define mps_print_field(sc, msg, args...)		\
611	printf("\t" msg, ##args)
612
613#define mps_vprintf(sc, args...)			\
614do {							\
615	if (bootverbose)				\
616		mps_printf(sc, ##args);			\
617} while (0)
618
619#define mps_dprint(sc, level, msg, args...)		\
620do {							\
621	if ((sc)->mps_debug & (level))			\
622		device_printf((sc)->mps_dev, msg, ##args);	\
623} while (0)
624
625#define MPS_PRINTFIELD_START(sc, tag...)	\
626	mps_printf((sc), ##tag);			\
627	mps_print_field((sc), ":\n")
628#define MPS_PRINTFIELD_END(sc, tag)		\
629	mps_printf((sc), tag "\n")
630#define MPS_PRINTFIELD(sc, facts, attr, fmt)	\
631	mps_print_field((sc), #attr ": " #fmt "\n", (facts)->attr)
632
633#define MPS_FUNCTRACE(sc)			\
634	mps_dprint((sc), MPS_TRACE, "%s\n", __func__)
635
636#define  CAN_SLEEP                      1
637#define  NO_SLEEP                       0
638
639static __inline void
640mps_from_u64(uint64_t data, U64 *mps)
641{
642	(mps)->High = htole32((uint32_t)((data) >> 32));
643	(mps)->Low = htole32((uint32_t)((data) & 0xffffffff));
644}
645
646static __inline uint64_t
647mps_to_u64(U64 *data)
648{
649
650	return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
651}
652
653static __inline void
654mps_mask_intr(struct mps_softc *sc)
655{
656	uint32_t mask;
657
658	mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
659	mask |= MPI2_HIM_REPLY_INT_MASK;
660	mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
661}
662
663static __inline void
664mps_unmask_intr(struct mps_softc *sc)
665{
666	uint32_t mask;
667
668	mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
669	mask &= ~MPI2_HIM_REPLY_INT_MASK;
670	mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
671}
672
673int mps_pci_setup_interrupts(struct mps_softc *sc);
674int mps_pci_restore(struct mps_softc *sc);
675
676void mps_get_tunables(struct mps_softc *sc);
677int mps_attach(struct mps_softc *sc);
678int mps_free(struct mps_softc *sc);
679void mps_intr(void *);
680void mps_intr_msi(void *);
681void mps_intr_locked(void *);
682int mps_register_events(struct mps_softc *, u32 *, mps_evt_callback_t *,
683    void *, struct mps_event_handle **);
684int mps_restart(struct mps_softc *);
685int mps_update_events(struct mps_softc *, struct mps_event_handle *, u32 *);
686void mps_deregister_events(struct mps_softc *, struct mps_event_handle *);
687int mps_push_sge(struct mps_command *, void *, size_t, int);
688int mps_add_dmaseg(struct mps_command *, vm_paddr_t, size_t, u_int, int);
689int mps_attach_sas(struct mps_softc *sc);
690int mps_detach_sas(struct mps_softc *sc);
691int mps_read_config_page(struct mps_softc *, struct mps_config_params *);
692int mps_write_config_page(struct mps_softc *, struct mps_config_params *);
693void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int );
694void mpi_init_sge(struct mps_command *cm, void *req, void *sge);
695int mps_attach_user(struct mps_softc *);
696void mps_detach_user(struct mps_softc *);
697void mpssas_record_event(struct mps_softc *sc,
698    MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
699
700int mps_map_command(struct mps_softc *sc, struct mps_command *cm);
701int mps_wait_command(struct mps_softc *sc, struct mps_command **cm, int timeout,
702    int sleep_flag);
703
704int mps_config_get_bios_pg3(struct mps_softc *sc, Mpi2ConfigReply_t
705    *mpi_reply, Mpi2BiosPage3_t *config_page);
706int mps_config_get_raid_volume_pg0(struct mps_softc *sc, Mpi2ConfigReply_t
707    *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
708int mps_config_get_ioc_pg8(struct mps_softc *sc, Mpi2ConfigReply_t *,
709    Mpi2IOCPage8_t *);
710int mps_config_get_man_pg10(struct mps_softc *sc, Mpi2ConfigReply_t *mpi_reply);
711int mps_config_get_sas_device_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
712    Mpi2SasDevicePage0_t *, u32 , u16 );
713int mps_config_get_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
714    Mpi2DriverMappingPage0_t *, u16 );
715int mps_config_get_raid_volume_pg1(struct mps_softc *sc,
716    Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
717    u16 handle);
718int mps_config_get_volume_wwid(struct mps_softc *sc, u16 volume_handle,
719    u64 *wwid);
720int mps_config_get_raid_pd_pg0(struct mps_softc *sc,
721    Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
722    u32 page_address);
723void mpssas_ir_shutdown(struct mps_softc *sc);
724
725int mps_reinit(struct mps_softc *sc);
726void mpssas_handle_reinit(struct mps_softc *sc);
727
728void mps_base_static_config_pages(struct mps_softc *sc);
729void mps_wd_config_pages(struct mps_softc *sc);
730
731int mps_mapping_initialize(struct mps_softc *);
732void mps_mapping_topology_change_event(struct mps_softc *,
733    Mpi2EventDataSasTopologyChangeList_t *);
734void mps_mapping_free_memory(struct mps_softc *sc);
735int mps_config_set_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
736    Mpi2DriverMappingPage0_t *, u16 );
737void mps_mapping_exit(struct mps_softc *);
738void mps_mapping_check_devices(void *);
739int mps_mapping_allocate_memory(struct mps_softc *sc);
740unsigned int mps_mapping_get_tid(struct mps_softc *, uint64_t , u16);
741unsigned int mps_mapping_get_tid_from_handle(struct mps_softc *sc,
742    u16 handle);
743unsigned int mps_mapping_get_raid_tid(struct mps_softc *sc, u64 wwid,
744     u16 volHandle);
745unsigned int mps_mapping_get_raid_tid_from_handle(struct mps_softc *sc,
746    u16 volHandle);
747void mps_mapping_enclosure_dev_status_change_event(struct mps_softc *,
748    Mpi2EventDataSasEnclDevStatusChange_t *event_data);
749void mps_mapping_ir_config_change_event(struct mps_softc *sc,
750    Mpi2EventDataIrConfigChangeList_t *event_data);
751int mps_mapping_dump(SYSCTL_HANDLER_ARGS);
752int mps_mapping_encl_dump(SYSCTL_HANDLER_ARGS);
753
754void mpssas_evt_handler(struct mps_softc *sc, uintptr_t data,
755    MPI2_EVENT_NOTIFICATION_REPLY *event);
756void mpssas_prepare_remove(struct mpssas_softc *sassc, uint16_t handle);
757void mpssas_prepare_volume_remove(struct mpssas_softc *sassc, uint16_t handle);
758int mpssas_startup(struct mps_softc *sc);
759struct mpssas_target * mpssas_find_target_by_handle(struct mpssas_softc *, int, uint16_t);
760void mpssas_realloc_targets(struct mps_softc *sc, int maxtargets);
761struct mps_command * mpssas_alloc_tm(struct mps_softc *sc);
762void mpssas_free_tm(struct mps_softc *sc, struct mps_command *tm);
763void mpssas_release_simq_reinit(struct mpssas_softc *sassc);
764int mpssas_send_reset(struct mps_softc *sc, struct mps_command *tm,
765    uint8_t type);
766
767SYSCTL_DECL(_hw_mps);
768
769/* Compatibility shims for different OS versions */
770#if __FreeBSD_version >= 800001
771#define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
772    kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
773#define mps_kproc_exit(arg)	kproc_exit(arg)
774#else
775#define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
776    kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
777#define mps_kproc_exit(arg)	kthread_exit(arg)
778#endif
779
780#if defined(CAM_PRIORITY_XPT)
781#define MPS_PRIORITY_XPT	CAM_PRIORITY_XPT
782#else
783#define MPS_PRIORITY_XPT	5
784#endif
785
786#if __FreeBSD_version < 800107
787// Prior to FreeBSD-8.0 scp3_flags was not defined.
788#define spc3_flags reserved
789
790#define SPC3_SID_PROTECT    0x01
791#define SPC3_SID_3PC        0x08
792#define SPC3_SID_TPGS_MASK  0x30
793#define SPC3_SID_TPGS_IMPLICIT  0x10
794#define SPC3_SID_TPGS_EXPLICIT  0x20
795#define SPC3_SID_ACC        0x40
796#define SPC3_SID_SCCS       0x80
797
798#define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE
799#endif
800
801#endif
802
803