mps.c revision 303029
1/*-
2 * Copyright (c) 2009 Yahoo! Inc.
3 * Copyright (c) 2011-2015 LSI Corp.
4 * Copyright (c) 2013-2015 Avago Technologies
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
29 *
30 * $FreeBSD: stable/11/sys/dev/mps/mps.c 303029 2016-07-19 16:46:27Z slm $
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: stable/11/sys/dev/mps/mps.c 303029 2016-07-19 16:46:27Z slm $");
35
36/* Communications core for Avago Technologies (LSI) MPT2 */
37
38/* TODO Move headers to mpsvar */
39#include <sys/types.h>
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/kernel.h>
43#include <sys/selinfo.h>
44#include <sys/lock.h>
45#include <sys/mutex.h>
46#include <sys/module.h>
47#include <sys/bus.h>
48#include <sys/conf.h>
49#include <sys/bio.h>
50#include <sys/malloc.h>
51#include <sys/uio.h>
52#include <sys/sysctl.h>
53#include <sys/queue.h>
54#include <sys/kthread.h>
55#include <sys/taskqueue.h>
56#include <sys/endian.h>
57#include <sys/eventhandler.h>
58
59#include <machine/bus.h>
60#include <machine/resource.h>
61#include <sys/rman.h>
62#include <sys/proc.h>
63
64#include <dev/pci/pcivar.h>
65
66#include <cam/cam.h>
67#include <cam/scsi/scsi_all.h>
68
69#include <dev/mps/mpi/mpi2_type.h>
70#include <dev/mps/mpi/mpi2.h>
71#include <dev/mps/mpi/mpi2_ioc.h>
72#include <dev/mps/mpi/mpi2_sas.h>
73#include <dev/mps/mpi/mpi2_cnfg.h>
74#include <dev/mps/mpi/mpi2_init.h>
75#include <dev/mps/mpi/mpi2_tool.h>
76#include <dev/mps/mps_ioctl.h>
77#include <dev/mps/mpsvar.h>
78#include <dev/mps/mps_table.h>
79
80static int mps_diag_reset(struct mps_softc *sc, int sleep_flag);
81static int mps_init_queues(struct mps_softc *sc);
82static int mps_message_unit_reset(struct mps_softc *sc, int sleep_flag);
83static int mps_transition_operational(struct mps_softc *sc);
84static int mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching);
85static void mps_iocfacts_free(struct mps_softc *sc);
86static void mps_startup(void *arg);
87static int mps_send_iocinit(struct mps_softc *sc);
88static int mps_alloc_queues(struct mps_softc *sc);
89static int mps_alloc_replies(struct mps_softc *sc);
90static int mps_alloc_requests(struct mps_softc *sc);
91static int mps_attach_log(struct mps_softc *sc);
92static __inline void mps_complete_command(struct mps_softc *sc,
93    struct mps_command *cm);
94static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data,
95    MPI2_EVENT_NOTIFICATION_REPLY *reply);
96static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm);
97static void mps_periodic(void *);
98static int mps_reregister_events(struct mps_softc *sc);
99static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm);
100static int mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts);
101static int mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag);
102SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters");
103
104MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory");
105
106/*
107 * Do a "Diagnostic Reset" aka a hard reset.  This should get the chip out of
108 * any state and back to its initialization state machine.
109 */
110static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d };
111
112/* Added this union to smoothly convert le64toh cm->cm_desc.Words.
113 * Compiler only support unint64_t to be passed as argument.
114 * Otherwise it will through below error
115 * "aggregate value used where an integer was expected"
116 */
117
118typedef union _reply_descriptor {
119        u64 word;
120        struct {
121                u32 low;
122                u32 high;
123        } u;
124}reply_descriptor,address_descriptor;
125
126/* Rate limit chain-fail messages to 1 per minute */
127static struct timeval mps_chainfail_interval = { 60, 0 };
128
129/*
130 * sleep_flag can be either CAN_SLEEP or NO_SLEEP.
131 * If this function is called from process context, it can sleep
132 * and there is no harm to sleep, in case if this fuction is called
133 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set.
134 * based on sleep flags driver will call either msleep, pause or DELAY.
135 * msleep and pause are of same variant, but pause is used when mps_mtx
136 * is not hold by driver.
137 *
138 */
139static int
140mps_diag_reset(struct mps_softc *sc,int sleep_flag)
141{
142	uint32_t reg;
143	int i, error, tries = 0;
144	uint8_t first_wait_done = FALSE;
145
146	mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
147
148	/* Clear any pending interrupts */
149	mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
150
151	/*Force NO_SLEEP for threads prohibited to sleep
152 	* e.a Thread from interrupt handler are prohibited to sleep.
153 	*/
154	if (curthread->td_no_sleeping != 0)
155		sleep_flag = NO_SLEEP;
156
157	/* Push the magic sequence */
158	error = ETIMEDOUT;
159	while (tries++ < 20) {
160		for (i = 0; i < sizeof(mpt2_reset_magic); i++)
161			mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET,
162			    mpt2_reset_magic[i]);
163		/* wait 100 msec */
164		if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
165			msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
166			    "mpsdiag", hz/10);
167		else if (sleep_flag == CAN_SLEEP)
168			pause("mpsdiag", hz/10);
169		else
170			DELAY(100 * 1000);
171
172		reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
173		if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) {
174			error = 0;
175			break;
176		}
177	}
178	if (error)
179		return (error);
180
181	/* Send the actual reset.  XXX need to refresh the reg? */
182	mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET,
183	    reg | MPI2_DIAG_RESET_ADAPTER);
184
185	/* Wait up to 300 seconds in 50ms intervals */
186	error = ETIMEDOUT;
187	for (i = 0; i < 6000; i++) {
188		/*
189		 * Wait 50 msec. If this is the first time through, wait 256
190		 * msec to satisfy Diag Reset timing requirements.
191		 */
192		if (first_wait_done) {
193			if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
194				msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
195				    "mpsdiag", hz/20);
196			else if (sleep_flag == CAN_SLEEP)
197				pause("mpsdiag", hz/20);
198			else
199				DELAY(50 * 1000);
200		} else {
201			DELAY(256 * 1000);
202			first_wait_done = TRUE;
203		}
204		/*
205		 * Check for the RESET_ADAPTER bit to be cleared first, then
206		 * wait for the RESET state to be cleared, which takes a little
207		 * longer.
208		 */
209		reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
210		if (reg & MPI2_DIAG_RESET_ADAPTER) {
211			continue;
212		}
213		reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
214		if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) {
215			error = 0;
216			break;
217		}
218	}
219	if (error)
220		return (error);
221
222	mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0);
223
224	return (0);
225}
226
227static int
228mps_message_unit_reset(struct mps_softc *sc, int sleep_flag)
229{
230
231	MPS_FUNCTRACE(sc);
232
233	mps_regwrite(sc, MPI2_DOORBELL_OFFSET,
234	    MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET <<
235	    MPI2_DOORBELL_FUNCTION_SHIFT);
236
237	if (mps_wait_db_ack(sc, 5, sleep_flag) != 0) {
238		mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed : <%s>\n",
239				__func__);
240		return (ETIMEDOUT);
241	}
242
243	return (0);
244}
245
246static int
247mps_transition_ready(struct mps_softc *sc)
248{
249	uint32_t reg, state;
250	int error, tries = 0;
251	int sleep_flags;
252
253	MPS_FUNCTRACE(sc);
254	/* If we are in attach call, do not sleep */
255	sleep_flags = (sc->mps_flags & MPS_FLAGS_ATTACH_DONE)
256					? CAN_SLEEP:NO_SLEEP;
257	error = 0;
258	while (tries++ < 1200) {
259		reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
260		mps_dprint(sc, MPS_INIT, "Doorbell= 0x%x\n", reg);
261
262		/*
263		 * Ensure the IOC is ready to talk.  If it's not, try
264		 * resetting it.
265		 */
266		if (reg & MPI2_DOORBELL_USED) {
267			mps_diag_reset(sc, sleep_flags);
268			DELAY(50000);
269			continue;
270		}
271
272		/* Is the adapter owned by another peer? */
273		if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) ==
274		    (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) {
275			device_printf(sc->mps_dev, "IOC is under the control "
276			    "of another peer host, aborting initialization.\n");
277			return (ENXIO);
278		}
279
280		state = reg & MPI2_IOC_STATE_MASK;
281		if (state == MPI2_IOC_STATE_READY) {
282			/* Ready to go! */
283			error = 0;
284			break;
285		} else if (state == MPI2_IOC_STATE_FAULT) {
286			mps_dprint(sc, MPS_FAULT, "IOC in fault state 0x%x, resetting\n",
287			    state & MPI2_DOORBELL_FAULT_CODE_MASK);
288			mps_diag_reset(sc, sleep_flags);
289		} else if (state == MPI2_IOC_STATE_OPERATIONAL) {
290			/* Need to take ownership */
291			mps_message_unit_reset(sc, sleep_flags);
292		} else if (state == MPI2_IOC_STATE_RESET) {
293			/* Wait a bit, IOC might be in transition */
294			mps_dprint(sc, MPS_FAULT,
295			    "IOC in unexpected reset state\n");
296		} else {
297			mps_dprint(sc, MPS_FAULT,
298			    "IOC in unknown state 0x%x\n", state);
299			error = EINVAL;
300			break;
301		}
302
303		/* Wait 50ms for things to settle down. */
304		DELAY(50000);
305	}
306
307	if (error)
308		device_printf(sc->mps_dev, "Cannot transition IOC to ready\n");
309
310	return (error);
311}
312
313static int
314mps_transition_operational(struct mps_softc *sc)
315{
316	uint32_t reg, state;
317	int error;
318
319	MPS_FUNCTRACE(sc);
320
321	error = 0;
322	reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
323	mps_dprint(sc, MPS_INIT, "Doorbell= 0x%x\n", reg);
324
325	state = reg & MPI2_IOC_STATE_MASK;
326	if (state != MPI2_IOC_STATE_READY) {
327		if ((error = mps_transition_ready(sc)) != 0) {
328			mps_dprint(sc, MPS_FAULT,
329			    "%s failed to transition ready\n", __func__);
330			return (error);
331		}
332	}
333
334	error = mps_send_iocinit(sc);
335	return (error);
336}
337
338/*
339 * This is called during attach and when re-initializing due to a Diag Reset.
340 * IOC Facts is used to allocate many of the structures needed by the driver.
341 * If called from attach, de-allocation is not required because the driver has
342 * not allocated any structures yet, but if called from a Diag Reset, previously
343 * allocated structures based on IOC Facts will need to be freed and re-
344 * allocated bases on the latest IOC Facts.
345 */
346static int
347mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching)
348{
349	int error;
350	Mpi2IOCFactsReply_t saved_facts;
351	uint8_t saved_mode, reallocating;
352
353	mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
354
355	/* Save old IOC Facts and then only reallocate if Facts have changed */
356	if (!attaching) {
357		bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY));
358	}
359
360	/*
361	 * Get IOC Facts.  In all cases throughout this function, panic if doing
362	 * a re-initialization and only return the error if attaching so the OS
363	 * can handle it.
364	 */
365	if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) {
366		if (attaching) {
367			mps_dprint(sc, MPS_FAULT, "%s failed to get IOC Facts "
368			    "with error %d\n", __func__, error);
369			return (error);
370		} else {
371			panic("%s failed to get IOC Facts with error %d\n",
372			    __func__, error);
373		}
374	}
375
376	mps_print_iocfacts(sc, sc->facts);
377
378	snprintf(sc->fw_version, sizeof(sc->fw_version),
379	    "%02d.%02d.%02d.%02d",
380	    sc->facts->FWVersion.Struct.Major,
381	    sc->facts->FWVersion.Struct.Minor,
382	    sc->facts->FWVersion.Struct.Unit,
383	    sc->facts->FWVersion.Struct.Dev);
384
385	mps_printf(sc, "Firmware: %s, Driver: %s\n", sc->fw_version,
386	    MPS_DRIVER_VERSION);
387	mps_printf(sc, "IOCCapabilities: %b\n", sc->facts->IOCCapabilities,
388	    "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf"
389	    "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR"
390	    "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc");
391
392	/*
393	 * If the chip doesn't support event replay then a hard reset will be
394	 * required to trigger a full discovery.  Do the reset here then
395	 * retransition to Ready.  A hard reset might have already been done,
396	 * but it doesn't hurt to do it again.  Only do this if attaching, not
397	 * for a Diag Reset.
398	 */
399	if (attaching) {
400		if ((sc->facts->IOCCapabilities &
401		    MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0) {
402			mps_diag_reset(sc, NO_SLEEP);
403			if ((error = mps_transition_ready(sc)) != 0) {
404				mps_dprint(sc, MPS_FAULT, "%s failed to "
405				    "transition to ready with error %d\n",
406				    __func__, error);
407				return (error);
408			}
409		}
410	}
411
412	/*
413	 * Set flag if IR Firmware is loaded.  If the RAID Capability has
414	 * changed from the previous IOC Facts, log a warning, but only if
415	 * checking this after a Diag Reset and not during attach.
416	 */
417	saved_mode = sc->ir_firmware;
418	if (sc->facts->IOCCapabilities &
419	    MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)
420		sc->ir_firmware = 1;
421	if (!attaching) {
422		if (sc->ir_firmware != saved_mode) {
423			mps_dprint(sc, MPS_FAULT, "%s new IR/IT mode in IOC "
424			    "Facts does not match previous mode\n", __func__);
425		}
426	}
427
428	/* Only deallocate and reallocate if relevant IOC Facts have changed */
429	reallocating = FALSE;
430	if ((!attaching) &&
431	    ((saved_facts.MsgVersion != sc->facts->MsgVersion) ||
432	    (saved_facts.HeaderVersion != sc->facts->HeaderVersion) ||
433	    (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) ||
434	    (saved_facts.RequestCredit != sc->facts->RequestCredit) ||
435	    (saved_facts.ProductID != sc->facts->ProductID) ||
436	    (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) ||
437	    (saved_facts.IOCRequestFrameSize !=
438	    sc->facts->IOCRequestFrameSize) ||
439	    (saved_facts.MaxTargets != sc->facts->MaxTargets) ||
440	    (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) ||
441	    (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) ||
442	    (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) ||
443	    (saved_facts.MaxReplyDescriptorPostQueueDepth !=
444	    sc->facts->MaxReplyDescriptorPostQueueDepth) ||
445	    (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) ||
446	    (saved_facts.MaxVolumes != sc->facts->MaxVolumes) ||
447	    (saved_facts.MaxPersistentEntries !=
448	    sc->facts->MaxPersistentEntries))) {
449		reallocating = TRUE;
450	}
451
452	/*
453	 * Some things should be done if attaching or re-allocating after a Diag
454	 * Reset, but are not needed after a Diag Reset if the FW has not
455	 * changed.
456	 */
457	if (attaching || reallocating) {
458		/*
459		 * Check if controller supports FW diag buffers and set flag to
460		 * enable each type.
461		 */
462		if (sc->facts->IOCCapabilities &
463		    MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER)
464			sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE].
465			    enabled = TRUE;
466		if (sc->facts->IOCCapabilities &
467		    MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER)
468			sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT].
469			    enabled = TRUE;
470		if (sc->facts->IOCCapabilities &
471		    MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER)
472			sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED].
473			    enabled = TRUE;
474
475		/*
476		 * Set flag if EEDP is supported and if TLR is supported.
477		 */
478		if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP)
479			sc->eedp_enabled = TRUE;
480		if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR)
481			sc->control_TLR = TRUE;
482
483		/*
484		 * Size the queues. Since the reply queues always need one free
485		 * entry, we'll just deduct one reply message here.
486		 */
487		sc->num_reqs = MIN(MPS_REQ_FRAMES, sc->facts->RequestCredit);
488		sc->num_replies = MIN(MPS_REPLY_FRAMES + MPS_EVT_REPLY_FRAMES,
489		    sc->facts->MaxReplyDescriptorPostQueueDepth) - 1;
490
491		/*
492		 * Initialize all Tail Queues
493		 */
494		TAILQ_INIT(&sc->req_list);
495		TAILQ_INIT(&sc->high_priority_req_list);
496		TAILQ_INIT(&sc->chain_list);
497		TAILQ_INIT(&sc->tm_list);
498	}
499
500	/*
501	 * If doing a Diag Reset and the FW is significantly different
502	 * (reallocating will be set above in IOC Facts comparison), then all
503	 * buffers based on the IOC Facts will need to be freed before they are
504	 * reallocated.
505	 */
506	if (reallocating) {
507		mps_iocfacts_free(sc);
508		mpssas_realloc_targets(sc, saved_facts.MaxTargets);
509	}
510
511	/*
512	 * Any deallocation has been completed.  Now start reallocating
513	 * if needed.  Will only need to reallocate if attaching or if the new
514	 * IOC Facts are different from the previous IOC Facts after a Diag
515	 * Reset. Targets have already been allocated above if needed.
516	 */
517	if (attaching || reallocating) {
518		if (((error = mps_alloc_queues(sc)) != 0) ||
519		    ((error = mps_alloc_replies(sc)) != 0) ||
520		    ((error = mps_alloc_requests(sc)) != 0)) {
521			if (attaching ) {
522				mps_dprint(sc, MPS_FAULT, "%s failed to alloc "
523				    "queues with error %d\n", __func__, error);
524				mps_free(sc);
525				return (error);
526			} else {
527				panic("%s failed to alloc queues with error "
528				    "%d\n", __func__, error);
529			}
530		}
531	}
532
533	/* Always initialize the queues */
534	bzero(sc->free_queue, sc->fqdepth * 4);
535	mps_init_queues(sc);
536
537	/*
538	 * Always get the chip out of the reset state, but only panic if not
539	 * attaching.  If attaching and there is an error, that is handled by
540	 * the OS.
541	 */
542	error = mps_transition_operational(sc);
543	if (error != 0) {
544		if (attaching) {
545			mps_printf(sc, "%s failed to transition to operational "
546			    "with error %d\n", __func__, error);
547			mps_free(sc);
548			return (error);
549		} else {
550			panic("%s failed to transition to operational with "
551			    "error %d\n", __func__, error);
552		}
553	}
554
555	/*
556	 * Finish the queue initialization.
557	 * These are set here instead of in mps_init_queues() because the
558	 * IOC resets these values during the state transition in
559	 * mps_transition_operational().  The free index is set to 1
560	 * because the corresponding index in the IOC is set to 0, and the
561	 * IOC treats the queues as full if both are set to the same value.
562	 * Hence the reason that the queue can't hold all of the possible
563	 * replies.
564	 */
565	sc->replypostindex = 0;
566	mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
567	mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0);
568
569	/*
570	 * Attach the subsystems so they can prepare their event masks.
571	 */
572	/* XXX Should be dynamic so that IM/IR and user modules can attach */
573	if (attaching) {
574		if (((error = mps_attach_log(sc)) != 0) ||
575		    ((error = mps_attach_sas(sc)) != 0) ||
576		    ((error = mps_attach_user(sc)) != 0)) {
577			mps_printf(sc, "%s failed to attach all subsystems: "
578			    "error %d\n", __func__, error);
579			mps_free(sc);
580			return (error);
581		}
582
583		if ((error = mps_pci_setup_interrupts(sc)) != 0) {
584			mps_printf(sc, "%s failed to setup interrupts\n",
585			    __func__);
586			mps_free(sc);
587			return (error);
588		}
589	}
590
591	/*
592	 * Set flag if this is a WD controller.  This shouldn't ever change, but
593	 * reset it after a Diag Reset, just in case.
594	 */
595	sc->WD_available = FALSE;
596	if (pci_get_device(sc->mps_dev) == MPI2_MFGPAGE_DEVID_SSS6200)
597		sc->WD_available = TRUE;
598
599	return (error);
600}
601
602/*
603 * This is called if memory is being free (during detach for example) and when
604 * buffers need to be reallocated due to a Diag Reset.
605 */
606static void
607mps_iocfacts_free(struct mps_softc *sc)
608{
609	struct mps_command *cm;
610	int i;
611
612	mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
613
614	if (sc->free_busaddr != 0)
615		bus_dmamap_unload(sc->queues_dmat, sc->queues_map);
616	if (sc->free_queue != NULL)
617		bus_dmamem_free(sc->queues_dmat, sc->free_queue,
618		    sc->queues_map);
619	if (sc->queues_dmat != NULL)
620		bus_dma_tag_destroy(sc->queues_dmat);
621
622	if (sc->chain_busaddr != 0)
623		bus_dmamap_unload(sc->chain_dmat, sc->chain_map);
624	if (sc->chain_frames != NULL)
625		bus_dmamem_free(sc->chain_dmat, sc->chain_frames,
626		    sc->chain_map);
627	if (sc->chain_dmat != NULL)
628		bus_dma_tag_destroy(sc->chain_dmat);
629
630	if (sc->sense_busaddr != 0)
631		bus_dmamap_unload(sc->sense_dmat, sc->sense_map);
632	if (sc->sense_frames != NULL)
633		bus_dmamem_free(sc->sense_dmat, sc->sense_frames,
634		    sc->sense_map);
635	if (sc->sense_dmat != NULL)
636		bus_dma_tag_destroy(sc->sense_dmat);
637
638	if (sc->reply_busaddr != 0)
639		bus_dmamap_unload(sc->reply_dmat, sc->reply_map);
640	if (sc->reply_frames != NULL)
641		bus_dmamem_free(sc->reply_dmat, sc->reply_frames,
642		    sc->reply_map);
643	if (sc->reply_dmat != NULL)
644		bus_dma_tag_destroy(sc->reply_dmat);
645
646	if (sc->req_busaddr != 0)
647		bus_dmamap_unload(sc->req_dmat, sc->req_map);
648	if (sc->req_frames != NULL)
649		bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map);
650	if (sc->req_dmat != NULL)
651		bus_dma_tag_destroy(sc->req_dmat);
652
653	if (sc->chains != NULL)
654		free(sc->chains, M_MPT2);
655	if (sc->commands != NULL) {
656		for (i = 1; i < sc->num_reqs; i++) {
657			cm = &sc->commands[i];
658			bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap);
659		}
660		free(sc->commands, M_MPT2);
661	}
662	if (sc->buffer_dmat != NULL)
663		bus_dma_tag_destroy(sc->buffer_dmat);
664}
665
666/*
667 * The terms diag reset and hard reset are used interchangeably in the MPI
668 * docs to mean resetting the controller chip.  In this code diag reset
669 * cleans everything up, and the hard reset function just sends the reset
670 * sequence to the chip.  This should probably be refactored so that every
671 * subsystem gets a reset notification of some sort, and can clean up
672 * appropriately.
673 */
674int
675mps_reinit(struct mps_softc *sc)
676{
677	int error;
678	struct mpssas_softc *sassc;
679
680	sassc = sc->sassc;
681
682	MPS_FUNCTRACE(sc);
683
684	mtx_assert(&sc->mps_mtx, MA_OWNED);
685
686	if (sc->mps_flags & MPS_FLAGS_DIAGRESET) {
687		mps_dprint(sc, MPS_INIT, "%s reset already in progress\n",
688			   __func__);
689		return 0;
690	}
691
692	mps_dprint(sc, MPS_INFO, "Reinitializing controller,\n");
693	/* make sure the completion callbacks can recognize they're getting
694	 * a NULL cm_reply due to a reset.
695	 */
696	sc->mps_flags |= MPS_FLAGS_DIAGRESET;
697
698	/*
699	 * Mask interrupts here.
700	 */
701	mps_dprint(sc, MPS_INIT, "%s mask interrupts\n", __func__);
702	mps_mask_intr(sc);
703
704	error = mps_diag_reset(sc, CAN_SLEEP);
705	if (error != 0) {
706		/* XXXSL No need to panic here */
707		panic("%s hard reset failed with error %d\n",
708		    __func__, error);
709	}
710
711	/* Restore the PCI state, including the MSI-X registers */
712	mps_pci_restore(sc);
713
714	/* Give the I/O subsystem special priority to get itself prepared */
715	mpssas_handle_reinit(sc);
716
717	/*
718	 * Get IOC Facts and allocate all structures based on this information.
719	 * The attach function will also call mps_iocfacts_allocate at startup.
720	 * If relevant values have changed in IOC Facts, this function will free
721	 * all of the memory based on IOC Facts and reallocate that memory.
722	 */
723	if ((error = mps_iocfacts_allocate(sc, FALSE)) != 0) {
724		panic("%s IOC Facts based allocation failed with error %d\n",
725		    __func__, error);
726	}
727
728	/*
729	 * Mapping structures will be re-allocated after getting IOC Page8, so
730	 * free these structures here.
731	 */
732	mps_mapping_exit(sc);
733
734	/*
735	 * The static page function currently read is IOC Page8.  Others can be
736	 * added in future.  It's possible that the values in IOC Page8 have
737	 * changed after a Diag Reset due to user modification, so always read
738	 * these.  Interrupts are masked, so unmask them before getting config
739	 * pages.
740	 */
741	mps_unmask_intr(sc);
742	sc->mps_flags &= ~MPS_FLAGS_DIAGRESET;
743	mps_base_static_config_pages(sc);
744
745	/*
746	 * Some mapping info is based in IOC Page8 data, so re-initialize the
747	 * mapping tables.
748	 */
749	mps_mapping_initialize(sc);
750
751	/*
752	 * Restart will reload the event masks clobbered by the reset, and
753	 * then enable the port.
754	 */
755	mps_reregister_events(sc);
756
757	/* the end of discovery will release the simq, so we're done. */
758	mps_dprint(sc, MPS_INFO, "%s finished sc %p post %u free %u\n",
759	    __func__, sc, sc->replypostindex, sc->replyfreeindex);
760
761	mpssas_release_simq_reinit(sassc);
762
763	return 0;
764}
765
766/* Wait for the chip to ACK a word that we've put into its FIFO
767 * Wait for <timeout> seconds. In single loop wait for busy loop
768 * for 500 microseconds.
769 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds.
770 * */
771static int
772mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag)
773{
774
775	u32 cntdn, count;
776	u32 int_status;
777	u32 doorbell;
778
779	count = 0;
780	cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
781	do {
782		int_status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
783		if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
784			mps_dprint(sc, MPS_INIT,
785			"%s: successful count(%d), timeout(%d)\n",
786			__func__, count, timeout);
787		return 0;
788		} else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
789			doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET);
790			if ((doorbell & MPI2_IOC_STATE_MASK) ==
791				MPI2_IOC_STATE_FAULT) {
792				mps_dprint(sc, MPS_FAULT,
793					"fault_state(0x%04x)!\n", doorbell);
794				return (EFAULT);
795			}
796		} else if (int_status == 0xFFFFFFFF)
797			goto out;
798
799		/* If it can sleep, sleep for 1 milisecond, else busy loop for
800		* 0.5 milisecond */
801		if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
802			msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
803			"mpsdba", hz/1000);
804		else if (sleep_flag == CAN_SLEEP)
805			pause("mpsdba", hz/1000);
806		else
807			DELAY(500);
808		count++;
809	} while (--cntdn);
810
811	out:
812	mps_dprint(sc, MPS_FAULT, "%s: failed due to timeout count(%d), "
813		"int_status(%x)!\n", __func__, count, int_status);
814	return (ETIMEDOUT);
815
816}
817
818/* Wait for the chip to signal that the next word in its FIFO can be fetched */
819static int
820mps_wait_db_int(struct mps_softc *sc)
821{
822	int retry;
823
824	for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) {
825		if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) &
826		    MPI2_HIS_IOC2SYS_DB_STATUS) != 0)
827			return (0);
828		DELAY(2000);
829	}
830	return (ETIMEDOUT);
831}
832
833/* Step through the synchronous command state machine, i.e. "Doorbell mode" */
834static int
835mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply,
836    int req_sz, int reply_sz, int timeout)
837{
838	uint32_t *data32;
839	uint16_t *data16;
840	int i, count, ioc_sz, residual;
841	int sleep_flags = CAN_SLEEP;
842
843	if (curthread->td_no_sleeping != 0)
844		sleep_flags = NO_SLEEP;
845
846	/* Step 1 */
847	mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
848
849	/* Step 2 */
850	if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
851		return (EBUSY);
852
853	/* Step 3
854	 * Announce that a message is coming through the doorbell.  Messages
855	 * are pushed at 32bit words, so round up if needed.
856	 */
857	count = (req_sz + 3) / 4;
858	mps_regwrite(sc, MPI2_DOORBELL_OFFSET,
859	    (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) |
860	    (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT));
861
862	/* Step 4 */
863	if (mps_wait_db_int(sc) ||
864	    (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) {
865		mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n");
866		return (ENXIO);
867	}
868	mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
869	if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) {
870		mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n");
871		return (ENXIO);
872	}
873
874	/* Step 5 */
875	/* Clock out the message data synchronously in 32-bit dwords*/
876	data32 = (uint32_t *)req;
877	for (i = 0; i < count; i++) {
878		mps_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i]));
879		if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) {
880			mps_dprint(sc, MPS_FAULT,
881			    "Timeout while writing doorbell\n");
882			return (ENXIO);
883		}
884	}
885
886	/* Step 6 */
887	/* Clock in the reply in 16-bit words.  The total length of the
888	 * message is always in the 4th byte, so clock out the first 2 words
889	 * manually, then loop the rest.
890	 */
891	data16 = (uint16_t *)reply;
892	if (mps_wait_db_int(sc) != 0) {
893		mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n");
894		return (ENXIO);
895	}
896	data16[0] =
897	    mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
898	mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
899	if (mps_wait_db_int(sc) != 0) {
900		mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n");
901		return (ENXIO);
902	}
903	data16[1] =
904	    mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
905	mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
906
907	/* Number of 32bit words in the message */
908	ioc_sz = reply->MsgLength;
909
910	/*
911	 * Figure out how many 16bit words to clock in without overrunning.
912	 * The precision loss with dividing reply_sz can safely be
913	 * ignored because the messages can only be multiples of 32bits.
914	 */
915	residual = 0;
916	count = MIN((reply_sz / 4), ioc_sz) * 2;
917	if (count < ioc_sz * 2) {
918		residual = ioc_sz * 2 - count;
919		mps_dprint(sc, MPS_ERROR, "Driver error, throwing away %d "
920		    "residual message words\n", residual);
921	}
922
923	for (i = 2; i < count; i++) {
924		if (mps_wait_db_int(sc) != 0) {
925			mps_dprint(sc, MPS_FAULT,
926			    "Timeout reading doorbell %d\n", i);
927			return (ENXIO);
928		}
929		data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) &
930		    MPI2_DOORBELL_DATA_MASK;
931		mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
932	}
933
934	/*
935	 * Pull out residual words that won't fit into the provided buffer.
936	 * This keeps the chip from hanging due to a driver programming
937	 * error.
938	 */
939	while (residual--) {
940		if (mps_wait_db_int(sc) != 0) {
941			mps_dprint(sc, MPS_FAULT,
942			    "Timeout reading doorbell\n");
943			return (ENXIO);
944		}
945		(void)mps_regread(sc, MPI2_DOORBELL_OFFSET);
946		mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
947	}
948
949	/* Step 7 */
950	if (mps_wait_db_int(sc) != 0) {
951		mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n");
952		return (ENXIO);
953	}
954	if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
955		mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n");
956	mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
957
958	return (0);
959}
960
961static void
962mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm)
963{
964	reply_descriptor rd;
965	MPS_FUNCTRACE(sc);
966	mps_dprint(sc, MPS_TRACE, "SMID %u cm %p ccb %p\n",
967	    cm->cm_desc.Default.SMID, cm, cm->cm_ccb);
968
969	if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN))
970		mtx_assert(&sc->mps_mtx, MA_OWNED);
971
972	if (++sc->io_cmds_active > sc->io_cmds_highwater)
973		sc->io_cmds_highwater++;
974	rd.u.low = cm->cm_desc.Words.Low;
975	rd.u.high = cm->cm_desc.Words.High;
976	rd.word = htole64(rd.word);
977	/* TODO-We may need to make below regwrite atomic */
978	mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET,
979	    rd.u.low);
980	mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET,
981	    rd.u.high);
982}
983
984/*
985 * Just the FACTS, ma'am.
986 */
987static int
988mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts)
989{
990	MPI2_DEFAULT_REPLY *reply;
991	MPI2_IOC_FACTS_REQUEST request;
992	int error, req_sz, reply_sz;
993
994	MPS_FUNCTRACE(sc);
995
996	req_sz = sizeof(MPI2_IOC_FACTS_REQUEST);
997	reply_sz = sizeof(MPI2_IOC_FACTS_REPLY);
998	reply = (MPI2_DEFAULT_REPLY *)facts;
999
1000	bzero(&request, req_sz);
1001	request.Function = MPI2_FUNCTION_IOC_FACTS;
1002	error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5);
1003
1004	return (error);
1005}
1006
1007static int
1008mps_send_iocinit(struct mps_softc *sc)
1009{
1010	MPI2_IOC_INIT_REQUEST	init;
1011	MPI2_DEFAULT_REPLY	reply;
1012	int req_sz, reply_sz, error;
1013	struct timeval now;
1014	uint64_t time_in_msec;
1015
1016	MPS_FUNCTRACE(sc);
1017
1018	req_sz = sizeof(MPI2_IOC_INIT_REQUEST);
1019	reply_sz = sizeof(MPI2_IOC_INIT_REPLY);
1020	bzero(&init, req_sz);
1021	bzero(&reply, reply_sz);
1022
1023	/*
1024	 * Fill in the init block.  Note that most addresses are
1025	 * deliberately in the lower 32bits of memory.  This is a micro-
1026	 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe.
1027	 */
1028	init.Function = MPI2_FUNCTION_IOC_INIT;
1029	init.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
1030	init.MsgVersion = htole16(MPI2_VERSION);
1031	init.HeaderVersion = htole16(MPI2_HEADER_VERSION);
1032	init.SystemRequestFrameSize = htole16(sc->facts->IOCRequestFrameSize);
1033	init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth);
1034	init.ReplyFreeQueueDepth = htole16(sc->fqdepth);
1035	init.SenseBufferAddressHigh = 0;
1036	init.SystemReplyAddressHigh = 0;
1037	init.SystemRequestFrameBaseAddress.High = 0;
1038	init.SystemRequestFrameBaseAddress.Low = htole32((uint32_t)sc->req_busaddr);
1039	init.ReplyDescriptorPostQueueAddress.High = 0;
1040	init.ReplyDescriptorPostQueueAddress.Low = htole32((uint32_t)sc->post_busaddr);
1041	init.ReplyFreeQueueAddress.High = 0;
1042	init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr);
1043	getmicrotime(&now);
1044	time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000);
1045	init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF);
1046	init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF);
1047
1048	error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5);
1049	if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
1050		error = ENXIO;
1051
1052	mps_dprint(sc, MPS_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus);
1053	return (error);
1054}
1055
1056void
1057mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1058{
1059	bus_addr_t *addr;
1060
1061	addr = arg;
1062	*addr = segs[0].ds_addr;
1063}
1064
1065static int
1066mps_alloc_queues(struct mps_softc *sc)
1067{
1068	bus_addr_t queues_busaddr;
1069	uint8_t *queues;
1070	int qsize, fqsize, pqsize;
1071
1072	/*
1073	 * The reply free queue contains 4 byte entries in multiples of 16 and
1074	 * aligned on a 16 byte boundary. There must always be an unused entry.
1075	 * This queue supplies fresh reply frames for the firmware to use.
1076	 *
1077	 * The reply descriptor post queue contains 8 byte entries in
1078	 * multiples of 16 and aligned on a 16 byte boundary.  This queue
1079	 * contains filled-in reply frames sent from the firmware to the host.
1080	 *
1081	 * These two queues are allocated together for simplicity.
1082	 */
1083	sc->fqdepth = roundup2(sc->num_replies + 1, 16);
1084	sc->pqdepth = roundup2(sc->num_replies + 1, 16);
1085	fqsize= sc->fqdepth * 4;
1086	pqsize = sc->pqdepth * 8;
1087	qsize = fqsize + pqsize;
1088
1089        if (bus_dma_tag_create( sc->mps_parent_dmat,    /* parent */
1090				16, 0,			/* algnmnt, boundary */
1091				BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1092				BUS_SPACE_MAXADDR,	/* highaddr */
1093				NULL, NULL,		/* filter, filterarg */
1094                                qsize,			/* maxsize */
1095                                1,			/* nsegments */
1096                                qsize,			/* maxsegsize */
1097                                0,			/* flags */
1098                                NULL, NULL,		/* lockfunc, lockarg */
1099                                &sc->queues_dmat)) {
1100		device_printf(sc->mps_dev, "Cannot allocate queues DMA tag\n");
1101		return (ENOMEM);
1102        }
1103        if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT,
1104	    &sc->queues_map)) {
1105		device_printf(sc->mps_dev, "Cannot allocate queues memory\n");
1106		return (ENOMEM);
1107        }
1108        bzero(queues, qsize);
1109        bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize,
1110	    mps_memaddr_cb, &queues_busaddr, 0);
1111
1112	sc->free_queue = (uint32_t *)queues;
1113	sc->free_busaddr = queues_busaddr;
1114	sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize);
1115	sc->post_busaddr = queues_busaddr + fqsize;
1116
1117	return (0);
1118}
1119
1120static int
1121mps_alloc_replies(struct mps_softc *sc)
1122{
1123	int rsize, num_replies;
1124
1125	/*
1126	 * sc->num_replies should be one less than sc->fqdepth.  We need to
1127	 * allocate space for sc->fqdepth replies, but only sc->num_replies
1128	 * replies can be used at once.
1129	 */
1130	num_replies = max(sc->fqdepth, sc->num_replies);
1131
1132	rsize = sc->facts->ReplyFrameSize * num_replies * 4;
1133        if (bus_dma_tag_create( sc->mps_parent_dmat,    /* parent */
1134				4, 0,			/* algnmnt, boundary */
1135				BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1136				BUS_SPACE_MAXADDR,	/* highaddr */
1137				NULL, NULL,		/* filter, filterarg */
1138                                rsize,			/* maxsize */
1139                                1,			/* nsegments */
1140                                rsize,			/* maxsegsize */
1141                                0,			/* flags */
1142                                NULL, NULL,		/* lockfunc, lockarg */
1143                                &sc->reply_dmat)) {
1144		device_printf(sc->mps_dev, "Cannot allocate replies DMA tag\n");
1145		return (ENOMEM);
1146        }
1147        if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames,
1148	    BUS_DMA_NOWAIT, &sc->reply_map)) {
1149		device_printf(sc->mps_dev, "Cannot allocate replies memory\n");
1150		return (ENOMEM);
1151        }
1152        bzero(sc->reply_frames, rsize);
1153        bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize,
1154	    mps_memaddr_cb, &sc->reply_busaddr, 0);
1155
1156	return (0);
1157}
1158
1159static int
1160mps_alloc_requests(struct mps_softc *sc)
1161{
1162	struct mps_command *cm;
1163	struct mps_chain *chain;
1164	int i, rsize, nsegs;
1165
1166	rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4;
1167        if (bus_dma_tag_create( sc->mps_parent_dmat,    /* parent */
1168				16, 0,			/* algnmnt, boundary */
1169				BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1170				BUS_SPACE_MAXADDR,	/* highaddr */
1171				NULL, NULL,		/* filter, filterarg */
1172                                rsize,			/* maxsize */
1173                                1,			/* nsegments */
1174                                rsize,			/* maxsegsize */
1175                                0,			/* flags */
1176                                NULL, NULL,		/* lockfunc, lockarg */
1177                                &sc->req_dmat)) {
1178		device_printf(sc->mps_dev, "Cannot allocate request DMA tag\n");
1179		return (ENOMEM);
1180        }
1181        if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames,
1182	    BUS_DMA_NOWAIT, &sc->req_map)) {
1183		device_printf(sc->mps_dev, "Cannot allocate request memory\n");
1184		return (ENOMEM);
1185        }
1186        bzero(sc->req_frames, rsize);
1187        bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize,
1188	    mps_memaddr_cb, &sc->req_busaddr, 0);
1189
1190	rsize = sc->facts->IOCRequestFrameSize * sc->max_chains * 4;
1191        if (bus_dma_tag_create( sc->mps_parent_dmat,    /* parent */
1192				16, 0,			/* algnmnt, boundary */
1193				BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1194				BUS_SPACE_MAXADDR,	/* highaddr */
1195				NULL, NULL,		/* filter, filterarg */
1196                                rsize,			/* maxsize */
1197                                1,			/* nsegments */
1198                                rsize,			/* maxsegsize */
1199                                0,			/* flags */
1200                                NULL, NULL,		/* lockfunc, lockarg */
1201                                &sc->chain_dmat)) {
1202		device_printf(sc->mps_dev, "Cannot allocate chain DMA tag\n");
1203		return (ENOMEM);
1204        }
1205        if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames,
1206	    BUS_DMA_NOWAIT, &sc->chain_map)) {
1207		device_printf(sc->mps_dev, "Cannot allocate chain memory\n");
1208		return (ENOMEM);
1209        }
1210        bzero(sc->chain_frames, rsize);
1211        bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize,
1212	    mps_memaddr_cb, &sc->chain_busaddr, 0);
1213
1214	rsize = MPS_SENSE_LEN * sc->num_reqs;
1215        if (bus_dma_tag_create( sc->mps_parent_dmat,    /* parent */
1216				1, 0,			/* algnmnt, boundary */
1217				BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1218				BUS_SPACE_MAXADDR,	/* highaddr */
1219				NULL, NULL,		/* filter, filterarg */
1220                                rsize,			/* maxsize */
1221                                1,			/* nsegments */
1222                                rsize,			/* maxsegsize */
1223                                0,			/* flags */
1224                                NULL, NULL,		/* lockfunc, lockarg */
1225                                &sc->sense_dmat)) {
1226		device_printf(sc->mps_dev, "Cannot allocate sense DMA tag\n");
1227		return (ENOMEM);
1228        }
1229        if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames,
1230	    BUS_DMA_NOWAIT, &sc->sense_map)) {
1231		device_printf(sc->mps_dev, "Cannot allocate sense memory\n");
1232		return (ENOMEM);
1233        }
1234        bzero(sc->sense_frames, rsize);
1235        bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize,
1236	    mps_memaddr_cb, &sc->sense_busaddr, 0);
1237
1238	sc->chains = malloc(sizeof(struct mps_chain) * sc->max_chains, M_MPT2,
1239	    M_WAITOK | M_ZERO);
1240	if(!sc->chains) {
1241		device_printf(sc->mps_dev,
1242		"Cannot allocate chains memory %s %d\n",
1243		 __func__, __LINE__);
1244		return (ENOMEM);
1245	}
1246	for (i = 0; i < sc->max_chains; i++) {
1247		chain = &sc->chains[i];
1248		chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames +
1249		    i * sc->facts->IOCRequestFrameSize * 4);
1250		chain->chain_busaddr = sc->chain_busaddr +
1251		    i * sc->facts->IOCRequestFrameSize * 4;
1252		mps_free_chain(sc, chain);
1253		sc->chain_free_lowwater++;
1254	}
1255
1256	/* XXX Need to pick a more precise value */
1257	nsegs = (MAXPHYS / PAGE_SIZE) + 1;
1258        if (bus_dma_tag_create( sc->mps_parent_dmat,    /* parent */
1259				1, 0,			/* algnmnt, boundary */
1260				BUS_SPACE_MAXADDR,	/* lowaddr */
1261				BUS_SPACE_MAXADDR,	/* highaddr */
1262				NULL, NULL,		/* filter, filterarg */
1263                                BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
1264                                nsegs,			/* nsegments */
1265                                BUS_SPACE_MAXSIZE_24BIT,/* maxsegsize */
1266                                BUS_DMA_ALLOCNOW,	/* flags */
1267                                busdma_lock_mutex,	/* lockfunc */
1268				&sc->mps_mtx,		/* lockarg */
1269                                &sc->buffer_dmat)) {
1270		device_printf(sc->mps_dev, "Cannot allocate buffer DMA tag\n");
1271		return (ENOMEM);
1272        }
1273
1274	/*
1275	 * SMID 0 cannot be used as a free command per the firmware spec.
1276	 * Just drop that command instead of risking accounting bugs.
1277	 */
1278	sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs,
1279	    M_MPT2, M_WAITOK | M_ZERO);
1280	if(!sc->commands) {
1281		device_printf(sc->mps_dev, "Cannot allocate memory %s %d\n",
1282		 __func__, __LINE__);
1283		return (ENOMEM);
1284	}
1285	for (i = 1; i < sc->num_reqs; i++) {
1286		cm = &sc->commands[i];
1287		cm->cm_req = sc->req_frames +
1288		    i * sc->facts->IOCRequestFrameSize * 4;
1289		cm->cm_req_busaddr = sc->req_busaddr +
1290		    i * sc->facts->IOCRequestFrameSize * 4;
1291		cm->cm_sense = &sc->sense_frames[i];
1292		cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN;
1293		cm->cm_desc.Default.SMID = i;
1294		cm->cm_sc = sc;
1295		TAILQ_INIT(&cm->cm_chain_list);
1296		callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0);
1297
1298		/* XXX Is a failure here a critical problem? */
1299		if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0)
1300			if (i <= sc->facts->HighPriorityCredit)
1301				mps_free_high_priority_command(sc, cm);
1302			else
1303				mps_free_command(sc, cm);
1304		else {
1305			panic("failed to allocate command %d\n", i);
1306			sc->num_reqs = i;
1307			break;
1308		}
1309	}
1310
1311	return (0);
1312}
1313
1314static int
1315mps_init_queues(struct mps_softc *sc)
1316{
1317	int i;
1318
1319	memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8);
1320
1321	/*
1322	 * According to the spec, we need to use one less reply than we
1323	 * have space for on the queue.  So sc->num_replies (the number we
1324	 * use) should be less than sc->fqdepth (allocated size).
1325	 */
1326	if (sc->num_replies >= sc->fqdepth)
1327		return (EINVAL);
1328
1329	/*
1330	 * Initialize all of the free queue entries.
1331	 */
1332	for (i = 0; i < sc->fqdepth; i++)
1333		sc->free_queue[i] = sc->reply_busaddr + (i * sc->facts->ReplyFrameSize * 4);
1334	sc->replyfreeindex = sc->num_replies;
1335
1336	return (0);
1337}
1338
1339/* Get the driver parameter tunables.  Lowest priority are the driver defaults.
1340 * Next are the global settings, if they exist.  Highest are the per-unit
1341 * settings, if they exist.
1342 */
1343static void
1344mps_get_tunables(struct mps_softc *sc)
1345{
1346	char tmpstr[80];
1347
1348	/* XXX default to some debugging for now */
1349	sc->mps_debug = MPS_INFO|MPS_FAULT;
1350	sc->disable_msix = 0;
1351	sc->disable_msi = 0;
1352	sc->max_chains = MPS_CHAIN_FRAMES;
1353	sc->max_io_pages = MPS_MAXIO_PAGES;
1354	sc->enable_ssu = MPS_SSU_ENABLE_SSD_DISABLE_HDD;
1355	sc->spinup_wait_time = DEFAULT_SPINUP_WAIT;
1356
1357	/*
1358	 * Grab the global variables.
1359	 */
1360	TUNABLE_INT_FETCH("hw.mps.debug_level", &sc->mps_debug);
1361	TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix);
1362	TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi);
1363	TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains);
1364	TUNABLE_INT_FETCH("hw.mps.max_io_pages", &sc->max_io_pages);
1365	TUNABLE_INT_FETCH("hw.mps.enable_ssu", &sc->enable_ssu);
1366	TUNABLE_INT_FETCH("hw.mps.spinup_wait_time", &sc->spinup_wait_time);
1367
1368	/* Grab the unit-instance variables */
1369	snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level",
1370	    device_get_unit(sc->mps_dev));
1371	TUNABLE_INT_FETCH(tmpstr, &sc->mps_debug);
1372
1373	snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix",
1374	    device_get_unit(sc->mps_dev));
1375	TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix);
1376
1377	snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi",
1378	    device_get_unit(sc->mps_dev));
1379	TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi);
1380
1381	snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains",
1382	    device_get_unit(sc->mps_dev));
1383	TUNABLE_INT_FETCH(tmpstr, &sc->max_chains);
1384
1385	snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_io_pages",
1386	    device_get_unit(sc->mps_dev));
1387	TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages);
1388
1389	bzero(sc->exclude_ids, sizeof(sc->exclude_ids));
1390	snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.exclude_ids",
1391	    device_get_unit(sc->mps_dev));
1392	TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids));
1393
1394	snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_ssu",
1395	    device_get_unit(sc->mps_dev));
1396	TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu);
1397
1398	snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.spinup_wait_time",
1399	    device_get_unit(sc->mps_dev));
1400	TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time);
1401}
1402
1403static void
1404mps_setup_sysctl(struct mps_softc *sc)
1405{
1406	struct sysctl_ctx_list	*sysctl_ctx = NULL;
1407	struct sysctl_oid	*sysctl_tree = NULL;
1408	char tmpstr[80], tmpstr2[80];
1409
1410	/*
1411	 * Setup the sysctl variable so the user can change the debug level
1412	 * on the fly.
1413	 */
1414	snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d",
1415	    device_get_unit(sc->mps_dev));
1416	snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev));
1417
1418	sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev);
1419	if (sysctl_ctx != NULL)
1420		sysctl_tree = device_get_sysctl_tree(sc->mps_dev);
1421
1422	if (sysctl_tree == NULL) {
1423		sysctl_ctx_init(&sc->sysctl_ctx);
1424		sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
1425		    SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2,
1426		    CTLFLAG_RD, 0, tmpstr);
1427		if (sc->sysctl_tree == NULL)
1428			return;
1429		sysctl_ctx = &sc->sysctl_ctx;
1430		sysctl_tree = sc->sysctl_tree;
1431	}
1432
1433	SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1434	    OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mps_debug, 0,
1435	    "mps debug level");
1436
1437	SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1438	    OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0,
1439	    "Disable the use of MSI-X interrupts");
1440
1441	SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1442	    OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0,
1443	    "Disable the use of MSI interrupts");
1444
1445	SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1446	    OID_AUTO, "firmware_version", CTLFLAG_RW, sc->fw_version,
1447	    strlen(sc->fw_version), "firmware version");
1448
1449	SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1450	    OID_AUTO, "driver_version", CTLFLAG_RW, MPS_DRIVER_VERSION,
1451	    strlen(MPS_DRIVER_VERSION), "driver version");
1452
1453	SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1454	    OID_AUTO, "io_cmds_active", CTLFLAG_RD,
1455	    &sc->io_cmds_active, 0, "number of currently active commands");
1456
1457	SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1458	    OID_AUTO, "io_cmds_highwater", CTLFLAG_RD,
1459	    &sc->io_cmds_highwater, 0, "maximum active commands seen");
1460
1461	SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1462	    OID_AUTO, "chain_free", CTLFLAG_RD,
1463	    &sc->chain_free, 0, "number of free chain elements");
1464
1465	SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1466	    OID_AUTO, "chain_free_lowwater", CTLFLAG_RD,
1467	    &sc->chain_free_lowwater, 0,"lowest number of free chain elements");
1468
1469	SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1470	    OID_AUTO, "max_chains", CTLFLAG_RD,
1471	    &sc->max_chains, 0,"maximum chain frames that will be allocated");
1472
1473	SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1474	    OID_AUTO, "max_io_pages", CTLFLAG_RD,
1475	    &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use "
1476	    "IOCFacts)");
1477
1478	SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1479	    OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0,
1480	    "enable SSU to SATA SSD/HDD at shutdown");
1481
1482	SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1483	    OID_AUTO, "chain_alloc_fail", CTLFLAG_RD,
1484	    &sc->chain_alloc_fail, "chain allocation failures");
1485
1486	SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1487	    OID_AUTO, "spinup_wait_time", CTLFLAG_RD,
1488	    &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for "
1489	    "spinup after SATA ID error");
1490
1491	SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1492	    OID_AUTO, "mapping_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0,
1493	    mps_mapping_dump, "A", "Mapping Table Dump");
1494
1495	SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1496	    OID_AUTO, "encl_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0,
1497	    mps_mapping_encl_dump, "A", "Enclosure Table Dump");
1498}
1499
1500int
1501mps_attach(struct mps_softc *sc)
1502{
1503	int error;
1504
1505	mps_get_tunables(sc);
1506
1507	MPS_FUNCTRACE(sc);
1508
1509	mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF);
1510	callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0);
1511	TAILQ_INIT(&sc->event_list);
1512	timevalclear(&sc->lastfail);
1513
1514	if ((error = mps_transition_ready(sc)) != 0) {
1515		mps_printf(sc, "%s failed to transition ready\n", __func__);
1516		return (error);
1517	}
1518
1519	sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2,
1520	    M_ZERO|M_NOWAIT);
1521	if(!sc->facts) {
1522		device_printf(sc->mps_dev, "Cannot allocate memory %s %d\n",
1523		 __func__, __LINE__);
1524		return (ENOMEM);
1525	}
1526
1527	/*
1528	 * Get IOC Facts and allocate all structures based on this information.
1529	 * A Diag Reset will also call mps_iocfacts_allocate and re-read the IOC
1530	 * Facts. If relevant values have changed in IOC Facts, this function
1531	 * will free all of the memory based on IOC Facts and reallocate that
1532	 * memory.  If this fails, any allocated memory should already be freed.
1533	 */
1534	if ((error = mps_iocfacts_allocate(sc, TRUE)) != 0) {
1535		mps_dprint(sc, MPS_FAULT, "%s IOC Facts based allocation "
1536		    "failed with error %d\n", __func__, error);
1537		return (error);
1538	}
1539
1540	/* Start the periodic watchdog check on the IOC Doorbell */
1541	mps_periodic(sc);
1542
1543	/*
1544	 * The portenable will kick off discovery events that will drive the
1545	 * rest of the initialization process.  The CAM/SAS module will
1546	 * hold up the boot sequence until discovery is complete.
1547	 */
1548	sc->mps_ich.ich_func = mps_startup;
1549	sc->mps_ich.ich_arg = sc;
1550	if (config_intrhook_establish(&sc->mps_ich) != 0) {
1551		mps_dprint(sc, MPS_ERROR, "Cannot establish MPS config hook\n");
1552		error = EINVAL;
1553	}
1554
1555	/*
1556	 * Allow IR to shutdown gracefully when shutdown occurs.
1557	 */
1558	sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final,
1559	    mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT);
1560
1561	if (sc->shutdown_eh == NULL)
1562		mps_dprint(sc, MPS_ERROR, "shutdown event registration "
1563		    "failed\n");
1564
1565	mps_setup_sysctl(sc);
1566
1567	sc->mps_flags |= MPS_FLAGS_ATTACH_DONE;
1568
1569	return (error);
1570}
1571
1572/* Run through any late-start handlers. */
1573static void
1574mps_startup(void *arg)
1575{
1576	struct mps_softc *sc;
1577
1578	sc = (struct mps_softc *)arg;
1579
1580	mps_lock(sc);
1581	mps_unmask_intr(sc);
1582
1583	/* initialize device mapping tables */
1584	mps_base_static_config_pages(sc);
1585	mps_mapping_initialize(sc);
1586	mpssas_startup(sc);
1587	mps_unlock(sc);
1588}
1589
1590/* Periodic watchdog.  Is called with the driver lock already held. */
1591static void
1592mps_periodic(void *arg)
1593{
1594	struct mps_softc *sc;
1595	uint32_t db;
1596
1597	sc = (struct mps_softc *)arg;
1598	if (sc->mps_flags & MPS_FLAGS_SHUTDOWN)
1599		return;
1600
1601	db = mps_regread(sc, MPI2_DOORBELL_OFFSET);
1602	if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
1603		mps_dprint(sc, MPS_FAULT, "IOC Fault 0x%08x, Resetting\n", db);
1604		mps_reinit(sc);
1605	}
1606
1607	callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc);
1608}
1609
1610static void
1611mps_log_evt_handler(struct mps_softc *sc, uintptr_t data,
1612    MPI2_EVENT_NOTIFICATION_REPLY *event)
1613{
1614	MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry;
1615
1616	mps_print_event(sc, event);
1617
1618	switch (event->Event) {
1619	case MPI2_EVENT_LOG_DATA:
1620		mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_DATA:\n");
1621		if (sc->mps_debug & MPS_EVENT)
1622			hexdump(event->EventData, event->EventDataLength, NULL, 0);
1623		break;
1624	case MPI2_EVENT_LOG_ENTRY_ADDED:
1625		entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData;
1626		mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event "
1627		    "0x%x Sequence %d:\n", entry->LogEntryQualifier,
1628		     entry->LogSequence);
1629		break;
1630	default:
1631		break;
1632	}
1633	return;
1634}
1635
1636static int
1637mps_attach_log(struct mps_softc *sc)
1638{
1639	u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1640
1641	bzero(events, 16);
1642	setbit(events, MPI2_EVENT_LOG_DATA);
1643	setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED);
1644
1645	mps_register_events(sc, events, mps_log_evt_handler, NULL,
1646	    &sc->mps_log_eh);
1647
1648	return (0);
1649}
1650
1651static int
1652mps_detach_log(struct mps_softc *sc)
1653{
1654
1655	if (sc->mps_log_eh != NULL)
1656		mps_deregister_events(sc, sc->mps_log_eh);
1657	return (0);
1658}
1659
1660/*
1661 * Free all of the driver resources and detach submodules.  Should be called
1662 * without the lock held.
1663 */
1664int
1665mps_free(struct mps_softc *sc)
1666{
1667	int error;
1668
1669	/* Turn off the watchdog */
1670	mps_lock(sc);
1671	sc->mps_flags |= MPS_FLAGS_SHUTDOWN;
1672	mps_unlock(sc);
1673	/* Lock must not be held for this */
1674	callout_drain(&sc->periodic);
1675
1676	if (((error = mps_detach_log(sc)) != 0) ||
1677	    ((error = mps_detach_sas(sc)) != 0))
1678		return (error);
1679
1680	mps_detach_user(sc);
1681
1682	/* Put the IOC back in the READY state. */
1683	mps_lock(sc);
1684	if ((error = mps_transition_ready(sc)) != 0) {
1685		mps_unlock(sc);
1686		return (error);
1687	}
1688	mps_unlock(sc);
1689
1690	if (sc->facts != NULL)
1691		free(sc->facts, M_MPT2);
1692
1693	/*
1694	 * Free all buffers that are based on IOC Facts.  A Diag Reset may need
1695	 * to free these buffers too.
1696	 */
1697	mps_iocfacts_free(sc);
1698
1699	if (sc->sysctl_tree != NULL)
1700		sysctl_ctx_free(&sc->sysctl_ctx);
1701
1702	/* Deregister the shutdown function */
1703	if (sc->shutdown_eh != NULL)
1704		EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh);
1705
1706	mtx_destroy(&sc->mps_mtx);
1707
1708	return (0);
1709}
1710
1711static __inline void
1712mps_complete_command(struct mps_softc *sc, struct mps_command *cm)
1713{
1714	MPS_FUNCTRACE(sc);
1715
1716	if (cm == NULL) {
1717		mps_dprint(sc, MPS_ERROR, "Completing NULL command\n");
1718		return;
1719	}
1720
1721	if (cm->cm_flags & MPS_CM_FLAGS_POLLED)
1722		cm->cm_flags |= MPS_CM_FLAGS_COMPLETE;
1723
1724	if (cm->cm_complete != NULL) {
1725		mps_dprint(sc, MPS_TRACE,
1726			   "%s cm %p calling cm_complete %p data %p reply %p\n",
1727			   __func__, cm, cm->cm_complete, cm->cm_complete_data,
1728			   cm->cm_reply);
1729		cm->cm_complete(sc, cm);
1730	}
1731
1732	if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) {
1733		mps_dprint(sc, MPS_TRACE, "waking up %p\n", cm);
1734		wakeup(cm);
1735	}
1736
1737	if (cm->cm_sc->io_cmds_active != 0) {
1738		cm->cm_sc->io_cmds_active--;
1739	} else {
1740		mps_dprint(sc, MPS_ERROR, "Warning: io_cmds_active is "
1741		    "out of sync - resynching to 0\n");
1742	}
1743}
1744
1745
1746static void
1747mps_sas_log_info(struct mps_softc *sc , u32 log_info)
1748{
1749	union loginfo_type {
1750		u32     loginfo;
1751		struct {
1752			u32     subcode:16;
1753			u32     code:8;
1754			u32     originator:4;
1755			u32     bus_type:4;
1756		} dw;
1757	};
1758	union loginfo_type sas_loginfo;
1759	char *originator_str = NULL;
1760
1761	sas_loginfo.loginfo = log_info;
1762	if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
1763		return;
1764
1765	/* each nexus loss loginfo */
1766	if (log_info == 0x31170000)
1767		return;
1768
1769	/* eat the loginfos associated with task aborts */
1770	if ((log_info == 30050000 || log_info ==
1771	    0x31140000 || log_info == 0x31130000))
1772		return;
1773
1774	switch (sas_loginfo.dw.originator) {
1775	case 0:
1776		originator_str = "IOP";
1777		break;
1778	case 1:
1779		originator_str = "PL";
1780		break;
1781	case 2:
1782		originator_str = "IR";
1783		break;
1784}
1785
1786	mps_dprint(sc, MPS_LOG, "log_info(0x%08x): originator(%s), "
1787	"code(0x%02x), sub_code(0x%04x)\n", log_info,
1788	originator_str, sas_loginfo.dw.code,
1789	sas_loginfo.dw.subcode);
1790}
1791
1792static void
1793mps_display_reply_info(struct mps_softc *sc, uint8_t *reply)
1794{
1795	MPI2DefaultReply_t *mpi_reply;
1796	u16 sc_status;
1797
1798	mpi_reply = (MPI2DefaultReply_t*)reply;
1799	sc_status = le16toh(mpi_reply->IOCStatus);
1800	if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
1801		mps_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo));
1802}
1803void
1804mps_intr(void *data)
1805{
1806	struct mps_softc *sc;
1807	uint32_t status;
1808
1809	sc = (struct mps_softc *)data;
1810	mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1811
1812	/*
1813	 * Check interrupt status register to flush the bus.  This is
1814	 * needed for both INTx interrupts and driver-driven polling
1815	 */
1816	status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
1817	if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0)
1818		return;
1819
1820	mps_lock(sc);
1821	mps_intr_locked(data);
1822	mps_unlock(sc);
1823	return;
1824}
1825
1826/*
1827 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the
1828 * chip.  Hopefully this theory is correct.
1829 */
1830void
1831mps_intr_msi(void *data)
1832{
1833	struct mps_softc *sc;
1834
1835	sc = (struct mps_softc *)data;
1836	mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1837	mps_lock(sc);
1838	mps_intr_locked(data);
1839	mps_unlock(sc);
1840	return;
1841}
1842
1843/*
1844 * The locking is overly broad and simplistic, but easy to deal with for now.
1845 */
1846void
1847mps_intr_locked(void *data)
1848{
1849	MPI2_REPLY_DESCRIPTORS_UNION *desc;
1850	struct mps_softc *sc;
1851	struct mps_command *cm = NULL;
1852	uint8_t flags;
1853	u_int pq;
1854	MPI2_DIAG_RELEASE_REPLY *rel_rep;
1855	mps_fw_diagnostic_buffer_t *pBuffer;
1856
1857	sc = (struct mps_softc *)data;
1858
1859	pq = sc->replypostindex;
1860	mps_dprint(sc, MPS_TRACE,
1861	    "%s sc %p starting with replypostindex %u\n",
1862	    __func__, sc, sc->replypostindex);
1863
1864	for ( ;; ) {
1865		cm = NULL;
1866		desc = &sc->post_queue[sc->replypostindex];
1867		flags = desc->Default.ReplyFlags &
1868		    MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
1869		if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
1870		 || (le32toh(desc->Words.High) == 0xffffffff))
1871			break;
1872
1873		/* increment the replypostindex now, so that event handlers
1874		 * and cm completion handlers which decide to do a diag
1875		 * reset can zero it without it getting incremented again
1876		 * afterwards, and we break out of this loop on the next
1877		 * iteration since the reply post queue has been cleared to
1878		 * 0xFF and all descriptors look unused (which they are).
1879		 */
1880		if (++sc->replypostindex >= sc->pqdepth)
1881			sc->replypostindex = 0;
1882
1883		switch (flags) {
1884		case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS:
1885			cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)];
1886			cm->cm_reply = NULL;
1887			break;
1888		case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY:
1889		{
1890			uint32_t baddr;
1891			uint8_t *reply;
1892
1893			/*
1894			 * Re-compose the reply address from the address
1895			 * sent back from the chip.  The ReplyFrameAddress
1896			 * is the lower 32 bits of the physical address of
1897			 * particular reply frame.  Convert that address to
1898			 * host format, and then use that to provide the
1899			 * offset against the virtual address base
1900			 * (sc->reply_frames).
1901			 */
1902			baddr = le32toh(desc->AddressReply.ReplyFrameAddress);
1903			reply = sc->reply_frames +
1904				(baddr - ((uint32_t)sc->reply_busaddr));
1905			/*
1906			 * Make sure the reply we got back is in a valid
1907			 * range.  If not, go ahead and panic here, since
1908			 * we'll probably panic as soon as we deference the
1909			 * reply pointer anyway.
1910			 */
1911			if ((reply < sc->reply_frames)
1912			 || (reply > (sc->reply_frames +
1913			     (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) {
1914				printf("%s: WARNING: reply %p out of range!\n",
1915				       __func__, reply);
1916				printf("%s: reply_frames %p, fqdepth %d, "
1917				       "frame size %d\n", __func__,
1918				       sc->reply_frames, sc->fqdepth,
1919				       sc->facts->ReplyFrameSize * 4);
1920				printf("%s: baddr %#x,\n", __func__, baddr);
1921				/* LSI-TODO. See Linux Code. Need Graceful exit*/
1922				panic("Reply address out of range");
1923			}
1924			if (le16toh(desc->AddressReply.SMID) == 0) {
1925				if (((MPI2_DEFAULT_REPLY *)reply)->Function ==
1926				    MPI2_FUNCTION_DIAG_BUFFER_POST) {
1927					/*
1928					 * If SMID is 0 for Diag Buffer Post,
1929					 * this implies that the reply is due to
1930					 * a release function with a status that
1931					 * the buffer has been released.  Set
1932					 * the buffer flags accordingly.
1933					 */
1934					rel_rep =
1935					    (MPI2_DIAG_RELEASE_REPLY *)reply;
1936					if ((le16toh(rel_rep->IOCStatus) &
1937					    MPI2_IOCSTATUS_MASK) ==
1938					    MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED)
1939					{
1940						pBuffer =
1941						    &sc->fw_diag_buffer_list[
1942						    rel_rep->BufferType];
1943						pBuffer->valid_data = TRUE;
1944						pBuffer->owned_by_firmware =
1945						    FALSE;
1946						pBuffer->immediate = FALSE;
1947					}
1948				} else
1949					mps_dispatch_event(sc, baddr,
1950					    (MPI2_EVENT_NOTIFICATION_REPLY *)
1951					    reply);
1952			} else {
1953				cm = &sc->commands[le16toh(desc->AddressReply.SMID)];
1954				cm->cm_reply = reply;
1955				cm->cm_reply_data =
1956				    le32toh(desc->AddressReply.ReplyFrameAddress);
1957			}
1958			break;
1959		}
1960		case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS:
1961		case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER:
1962		case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS:
1963		default:
1964			/* Unhandled */
1965			mps_dprint(sc, MPS_ERROR, "Unhandled reply 0x%x\n",
1966			    desc->Default.ReplyFlags);
1967			cm = NULL;
1968			break;
1969		}
1970
1971
1972		if (cm != NULL) {
1973			// Print Error reply frame
1974			if (cm->cm_reply)
1975				mps_display_reply_info(sc,cm->cm_reply);
1976			mps_complete_command(sc, cm);
1977		}
1978
1979		desc->Words.Low = 0xffffffff;
1980		desc->Words.High = 0xffffffff;
1981	}
1982
1983	if (pq != sc->replypostindex) {
1984		mps_dprint(sc, MPS_TRACE,
1985		    "%s sc %p writing postindex %d\n",
1986		    __func__, sc, sc->replypostindex);
1987		mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, sc->replypostindex);
1988	}
1989
1990	return;
1991}
1992
1993static void
1994mps_dispatch_event(struct mps_softc *sc, uintptr_t data,
1995    MPI2_EVENT_NOTIFICATION_REPLY *reply)
1996{
1997	struct mps_event_handle *eh;
1998	int event, handled = 0;
1999
2000	event = le16toh(reply->Event);
2001	TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2002		if (isset(eh->mask, event)) {
2003			eh->callback(sc, data, reply);
2004			handled++;
2005		}
2006	}
2007
2008	if (handled == 0)
2009		mps_dprint(sc, MPS_EVENT, "Unhandled event 0x%x\n", le16toh(event));
2010
2011	/*
2012	 * This is the only place that the event/reply should be freed.
2013	 * Anything wanting to hold onto the event data should have
2014	 * already copied it into their own storage.
2015	 */
2016	mps_free_reply(sc, data);
2017}
2018
2019static void
2020mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm)
2021{
2022	mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2023
2024	if (cm->cm_reply)
2025		mps_print_event(sc,
2026			(MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply);
2027
2028	mps_free_command(sc, cm);
2029
2030	/* next, send a port enable */
2031	mpssas_startup(sc);
2032}
2033
2034/*
2035 * For both register_events and update_events, the caller supplies a bitmap
2036 * of events that it _wants_.  These functions then turn that into a bitmask
2037 * suitable for the controller.
2038 */
2039int
2040mps_register_events(struct mps_softc *sc, u32 *mask,
2041    mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle)
2042{
2043	struct mps_event_handle *eh;
2044	int error = 0;
2045
2046	eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO);
2047	if(!eh) {
2048		device_printf(sc->mps_dev, "Cannot allocate memory %s %d\n",
2049		 __func__, __LINE__);
2050		return (ENOMEM);
2051	}
2052	eh->callback = cb;
2053	eh->data = data;
2054	TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list);
2055	if (mask != NULL)
2056		error = mps_update_events(sc, eh, mask);
2057	*handle = eh;
2058
2059	return (error);
2060}
2061
2062int
2063mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle,
2064    u32 *mask)
2065{
2066	MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2067	MPI2_EVENT_NOTIFICATION_REPLY *reply;
2068	struct mps_command *cm;
2069	int error, i;
2070
2071	mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2072
2073	if ((mask != NULL) && (handle != NULL))
2074		bcopy(mask, &handle->mask[0], sizeof(u32) *
2075				MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2076
2077	for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2078		sc->event_mask[i] = -1;
2079
2080	for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2081		sc->event_mask[i] &= ~handle->mask[i];
2082
2083
2084	if ((cm = mps_alloc_command(sc)) == NULL)
2085		return (EBUSY);
2086	evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2087	evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2088	evtreq->MsgFlags = 0;
2089	evtreq->SASBroadcastPrimitiveMasks = 0;
2090#ifdef MPS_DEBUG_ALL_EVENTS
2091	{
2092		u_char fullmask[16];
2093		memset(fullmask, 0x00, 16);
2094		bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) *
2095				MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2096	}
2097#else
2098        for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2099                evtreq->EventMasks[i] =
2100                    htole32(sc->event_mask[i]);
2101#endif
2102	cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2103	cm->cm_data = NULL;
2104
2105	error = mps_wait_command(sc, cm, 60, 0);
2106	reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply;
2107	if ((reply == NULL) ||
2108	    (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
2109		error = ENXIO;
2110	mps_print_event(sc, reply);
2111	mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error);
2112
2113	mps_free_command(sc, cm);
2114	return (error);
2115}
2116
2117static int
2118mps_reregister_events(struct mps_softc *sc)
2119{
2120	MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2121	struct mps_command *cm;
2122	struct mps_event_handle *eh;
2123	int error, i;
2124
2125	mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2126
2127	/* first, reregister events */
2128
2129	for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2130		sc->event_mask[i] = -1;
2131
2132	TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2133		for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2134			sc->event_mask[i] &= ~eh->mask[i];
2135	}
2136
2137	if ((cm = mps_alloc_command(sc)) == NULL)
2138		return (EBUSY);
2139	evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2140	evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2141	evtreq->MsgFlags = 0;
2142	evtreq->SASBroadcastPrimitiveMasks = 0;
2143#ifdef MPS_DEBUG_ALL_EVENTS
2144	{
2145		u_char fullmask[16];
2146		memset(fullmask, 0x00, 16);
2147		bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) *
2148			MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2149	}
2150#else
2151        for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2152                evtreq->EventMasks[i] =
2153                    htole32(sc->event_mask[i]);
2154#endif
2155	cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2156	cm->cm_data = NULL;
2157	cm->cm_complete = mps_reregister_events_complete;
2158
2159	error = mps_map_command(sc, cm);
2160
2161	mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__,
2162	    error);
2163	return (error);
2164}
2165
2166void
2167mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle)
2168{
2169
2170	TAILQ_REMOVE(&sc->event_list, handle, eh_list);
2171	free(handle, M_MPT2);
2172}
2173
2174/*
2175 * Add a chain element as the next SGE for the specified command.
2176 * Reset cm_sge and cm_sgesize to indicate all the available space.
2177 */
2178static int
2179mps_add_chain(struct mps_command *cm)
2180{
2181	MPI2_SGE_CHAIN32 *sgc;
2182	struct mps_chain *chain;
2183	int space;
2184
2185	if (cm->cm_sglsize < MPS_SGC_SIZE)
2186		panic("MPS: Need SGE Error Code\n");
2187
2188	chain = mps_alloc_chain(cm->cm_sc);
2189	if (chain == NULL)
2190		return (ENOBUFS);
2191
2192	space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4;
2193
2194	/*
2195	 * Note: a double-linked list is used to make it easier to
2196	 * walk for debugging.
2197	 */
2198	TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link);
2199
2200	sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain;
2201	sgc->Length = htole16(space);
2202	sgc->NextChainOffset = 0;
2203	/* TODO Looks like bug in Setting sgc->Flags.
2204	 *	sgc->Flags = ( MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
2205	 *	            MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT
2206	 *	This is fine.. because we are not using simple element. In case of
2207	 *	MPI2_SGE_CHAIN32, we have separate Length and Flags feild.
2208 	 */
2209	sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT;
2210	sgc->Address = htole32(chain->chain_busaddr);
2211
2212	cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple;
2213	cm->cm_sglsize = space;
2214	return (0);
2215}
2216
2217/*
2218 * Add one scatter-gather element (chain, simple, transaction context)
2219 * to the scatter-gather list for a command.  Maintain cm_sglsize and
2220 * cm_sge as the remaining size and pointer to the next SGE to fill
2221 * in, respectively.
2222 */
2223int
2224mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft)
2225{
2226	MPI2_SGE_TRANSACTION_UNION *tc = sgep;
2227	MPI2_SGE_SIMPLE64 *sge = sgep;
2228	int error, type;
2229	uint32_t saved_buf_len, saved_address_low, saved_address_high;
2230
2231	type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK);
2232
2233#ifdef INVARIANTS
2234	switch (type) {
2235	case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: {
2236		if (len != tc->DetailsLength + 4)
2237			panic("TC %p length %u or %zu?", tc,
2238			    tc->DetailsLength + 4, len);
2239		}
2240		break;
2241	case MPI2_SGE_FLAGS_CHAIN_ELEMENT:
2242		/* Driver only uses 32-bit chain elements */
2243		if (len != MPS_SGC_SIZE)
2244			panic("CHAIN %p length %u or %zu?", sgep,
2245			    MPS_SGC_SIZE, len);
2246		break;
2247	case MPI2_SGE_FLAGS_SIMPLE_ELEMENT:
2248		/* Driver only uses 64-bit SGE simple elements */
2249		if (len != MPS_SGE64_SIZE)
2250			panic("SGE simple %p length %u or %zu?", sge,
2251			    MPS_SGE64_SIZE, len);
2252		if (((le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT) &
2253		    MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0)
2254			panic("SGE simple %p not marked 64-bit?", sge);
2255
2256		break;
2257	default:
2258		panic("Unexpected SGE %p, flags %02x", tc, tc->Flags);
2259	}
2260#endif
2261
2262	/*
2263	 * case 1: 1 more segment, enough room for it
2264	 * case 2: 2 more segments, enough room for both
2265	 * case 3: >=2 more segments, only enough room for 1 and a chain
2266	 * case 4: >=1 more segment, enough room for only a chain
2267	 * case 5: >=1 more segment, no room for anything (error)
2268         */
2269
2270	/*
2271	 * There should be room for at least a chain element, or this
2272	 * code is buggy.  Case (5).
2273	 */
2274	if (cm->cm_sglsize < MPS_SGC_SIZE)
2275		panic("MPS: Need SGE Error Code\n");
2276
2277	if (segsleft >= 2 &&
2278	    cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) {
2279		/*
2280		 * There are 2 or more segments left to add, and only
2281		 * enough room for 1 and a chain.  Case (3).
2282		 *
2283		 * Mark as last element in this chain if necessary.
2284		 */
2285		if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) {
2286			sge->FlagsLength |= htole32(
2287			    MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT);
2288		}
2289
2290		/*
2291		 * Add the item then a chain.  Do the chain now,
2292		 * rather than on the next iteration, to simplify
2293		 * understanding the code.
2294		 */
2295		cm->cm_sglsize -= len;
2296		bcopy(sgep, cm->cm_sge, len);
2297		cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2298		return (mps_add_chain(cm));
2299	}
2300
2301	if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) {
2302		/*
2303		 * 1 or more segment, enough room for only a chain.
2304		 * Hope the previous element wasn't a Simple entry
2305		 * that needed to be marked with
2306		 * MPI2_SGE_FLAGS_LAST_ELEMENT.  Case (4).
2307		 */
2308		if ((error = mps_add_chain(cm)) != 0)
2309			return (error);
2310	}
2311
2312#ifdef INVARIANTS
2313	/* Case 1: 1 more segment, enough room for it. */
2314	if (segsleft == 1 && cm->cm_sglsize < len)
2315		panic("1 seg left and no room? %u versus %zu",
2316		    cm->cm_sglsize, len);
2317
2318	/* Case 2: 2 more segments, enough room for both */
2319	if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE)
2320		panic("2 segs left and no room? %u versus %zu",
2321		    cm->cm_sglsize, len);
2322#endif
2323
2324	if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) {
2325		/*
2326		 * If this is a bi-directional request, need to account for that
2327		 * here.  Save the pre-filled sge values.  These will be used
2328		 * either for the 2nd SGL or for a single direction SGL.  If
2329		 * cm_out_len is non-zero, this is a bi-directional request, so
2330		 * fill in the OUT SGL first, then the IN SGL, otherwise just
2331		 * fill in the IN SGL.  Note that at this time, when filling in
2332		 * 2 SGL's for a bi-directional request, they both use the same
2333		 * DMA buffer (same cm command).
2334		 */
2335		saved_buf_len = le32toh(sge->FlagsLength) & 0x00FFFFFF;
2336		saved_address_low = sge->Address.Low;
2337		saved_address_high = sge->Address.High;
2338		if (cm->cm_out_len) {
2339			sge->FlagsLength = htole32(cm->cm_out_len |
2340			    ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2341			    MPI2_SGE_FLAGS_END_OF_BUFFER |
2342			    MPI2_SGE_FLAGS_HOST_TO_IOC |
2343			    MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2344			    MPI2_SGE_FLAGS_SHIFT));
2345			cm->cm_sglsize -= len;
2346			bcopy(sgep, cm->cm_sge, len);
2347			cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge
2348			    + len);
2349		}
2350		saved_buf_len |=
2351		    ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2352		    MPI2_SGE_FLAGS_END_OF_BUFFER |
2353		    MPI2_SGE_FLAGS_LAST_ELEMENT |
2354		    MPI2_SGE_FLAGS_END_OF_LIST |
2355		    MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2356		    MPI2_SGE_FLAGS_SHIFT);
2357		if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) {
2358			saved_buf_len |=
2359			    ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) <<
2360			    MPI2_SGE_FLAGS_SHIFT);
2361		} else {
2362			saved_buf_len |=
2363			    ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) <<
2364			    MPI2_SGE_FLAGS_SHIFT);
2365		}
2366		sge->FlagsLength = htole32(saved_buf_len);
2367		sge->Address.Low = saved_address_low;
2368		sge->Address.High = saved_address_high;
2369	}
2370
2371	cm->cm_sglsize -= len;
2372	bcopy(sgep, cm->cm_sge, len);
2373	cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2374	return (0);
2375}
2376
2377/*
2378 * Add one dma segment to the scatter-gather list for a command.
2379 */
2380int
2381mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags,
2382    int segsleft)
2383{
2384	MPI2_SGE_SIMPLE64 sge;
2385
2386	/*
2387	 * This driver always uses 64-bit address elements for simplicity.
2388	 */
2389	bzero(&sge, sizeof(sge));
2390	flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2391	    MPI2_SGE_FLAGS_64_BIT_ADDRESSING;
2392	sge.FlagsLength = htole32(len | (flags << MPI2_SGE_FLAGS_SHIFT));
2393	mps_from_u64(pa, &sge.Address);
2394
2395	return (mps_push_sge(cm, &sge, sizeof sge, segsleft));
2396}
2397
2398static void
2399mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
2400{
2401	struct mps_softc *sc;
2402	struct mps_command *cm;
2403	u_int i, dir, sflags;
2404
2405	cm = (struct mps_command *)arg;
2406	sc = cm->cm_sc;
2407
2408	/*
2409	 * In this case, just print out a warning and let the chip tell the
2410	 * user they did the wrong thing.
2411	 */
2412	if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) {
2413		mps_dprint(sc, MPS_ERROR,
2414			   "%s: warning: busdma returned %d segments, "
2415			   "more than the %d allowed\n", __func__, nsegs,
2416			   cm->cm_max_segs);
2417	}
2418
2419	/*
2420	 * Set up DMA direction flags.  Bi-directional requests are also handled
2421	 * here.  In that case, both direction flags will be set.
2422	 */
2423	sflags = 0;
2424	if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) {
2425		/*
2426		 * We have to add a special case for SMP passthrough, there
2427		 * is no easy way to generically handle it.  The first
2428		 * S/G element is used for the command (therefore the
2429		 * direction bit needs to be set).  The second one is used
2430		 * for the reply.  We'll leave it to the caller to make
2431		 * sure we only have two buffers.
2432		 */
2433		/*
2434		 * Even though the busdma man page says it doesn't make
2435		 * sense to have both direction flags, it does in this case.
2436		 * We have one s/g element being accessed in each direction.
2437		 */
2438		dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD;
2439
2440		/*
2441		 * Set the direction flag on the first buffer in the SMP
2442		 * passthrough request.  We'll clear it for the second one.
2443		 */
2444		sflags |= MPI2_SGE_FLAGS_DIRECTION |
2445			  MPI2_SGE_FLAGS_END_OF_BUFFER;
2446	} else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) {
2447		sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
2448		dir = BUS_DMASYNC_PREWRITE;
2449	} else
2450		dir = BUS_DMASYNC_PREREAD;
2451
2452	for (i = 0; i < nsegs; i++) {
2453		if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) {
2454			sflags &= ~MPI2_SGE_FLAGS_DIRECTION;
2455		}
2456		error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len,
2457		    sflags, nsegs - i);
2458		if (error != 0) {
2459			/* Resource shortage, roll back! */
2460			if (ratecheck(&sc->lastfail, &mps_chainfail_interval))
2461				mps_dprint(sc, MPS_INFO, "Out of chain frames, "
2462				    "consider increasing hw.mps.max_chains.\n");
2463			cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED;
2464			mps_complete_command(sc, cm);
2465			return;
2466		}
2467	}
2468
2469	bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir);
2470	mps_enqueue_request(sc, cm);
2471
2472	return;
2473}
2474
2475static void
2476mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize,
2477	     int error)
2478{
2479	mps_data_cb(arg, segs, nsegs, error);
2480}
2481
2482/*
2483 * This is the routine to enqueue commands ansynchronously.
2484 * Note that the only error path here is from bus_dmamap_load(), which can
2485 * return EINPROGRESS if it is waiting for resources.  Other than this, it's
2486 * assumed that if you have a command in-hand, then you have enough credits
2487 * to use it.
2488 */
2489int
2490mps_map_command(struct mps_softc *sc, struct mps_command *cm)
2491{
2492	int error = 0;
2493
2494	if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) {
2495		error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap,
2496		    &cm->cm_uio, mps_data_cb2, cm, 0);
2497	} else if (cm->cm_flags & MPS_CM_FLAGS_USE_CCB) {
2498		error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap,
2499		    cm->cm_data, mps_data_cb, cm, 0);
2500	} else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) {
2501		error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap,
2502		    cm->cm_data, cm->cm_length, mps_data_cb, cm, 0);
2503	} else {
2504		/* Add a zero-length element as needed */
2505		if (cm->cm_sge != NULL)
2506			mps_add_dmaseg(cm, 0, 0, 0, 1);
2507		mps_enqueue_request(sc, cm);
2508	}
2509
2510	return (error);
2511}
2512
2513/*
2514 * This is the routine to enqueue commands synchronously.  An error of
2515 * EINPROGRESS from mps_map_command() is ignored since the command will
2516 * be executed and enqueued automatically.  Other errors come from msleep().
2517 */
2518int
2519mps_wait_command(struct mps_softc *sc, struct mps_command *cm, int timeout,
2520    int sleep_flag)
2521{
2522	int error, rc;
2523	struct timeval cur_time, start_time;
2524
2525	if (sc->mps_flags & MPS_FLAGS_DIAGRESET)
2526		return  EBUSY;
2527
2528	cm->cm_complete = NULL;
2529	cm->cm_flags |= MPS_CM_FLAGS_POLLED;
2530	error = mps_map_command(sc, cm);
2531	if ((error != 0) && (error != EINPROGRESS))
2532		return (error);
2533
2534	/*
2535	 * Check for context and wait for 50 mSec at a time until time has
2536	 * expired or the command has finished.  If msleep can't be used, need
2537	 * to poll.
2538	 */
2539	if (curthread->td_no_sleeping != 0)
2540		sleep_flag = NO_SLEEP;
2541	getmicrotime(&start_time);
2542	if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) {
2543		cm->cm_flags |= MPS_CM_FLAGS_WAKEUP;
2544		error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz);
2545	} else {
2546		while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) {
2547			mps_intr_locked(sc);
2548			if (sleep_flag == CAN_SLEEP)
2549				pause("mpswait", hz/20);
2550			else
2551				DELAY(50000);
2552
2553			getmicrotime(&cur_time);
2554			if ((cur_time.tv_sec - start_time.tv_sec) > timeout) {
2555				error = EWOULDBLOCK;
2556				break;
2557			}
2558		}
2559	}
2560
2561	if (error == EWOULDBLOCK) {
2562		mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s\n", __func__);
2563		rc = mps_reinit(sc);
2564		mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" :
2565		    "failed");
2566		error = ETIMEDOUT;
2567	}
2568	return (error);
2569}
2570
2571/*
2572 * The MPT driver had a verbose interface for config pages.  In this driver,
2573 * reduce it to much simpler terms, similar to the Linux driver.
2574 */
2575int
2576mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params)
2577{
2578	MPI2_CONFIG_REQUEST *req;
2579	struct mps_command *cm;
2580	int error;
2581
2582	if (sc->mps_flags & MPS_FLAGS_BUSY) {
2583		return (EBUSY);
2584	}
2585
2586	cm = mps_alloc_command(sc);
2587	if (cm == NULL) {
2588		return (EBUSY);
2589	}
2590
2591	req = (MPI2_CONFIG_REQUEST *)cm->cm_req;
2592	req->Function = MPI2_FUNCTION_CONFIG;
2593	req->Action = params->action;
2594	req->SGLFlags = 0;
2595	req->ChainOffset = 0;
2596	req->PageAddress = params->page_address;
2597	if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) {
2598		MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr;
2599
2600		hdr = &params->hdr.Ext;
2601		req->ExtPageType = hdr->ExtPageType;
2602		req->ExtPageLength = hdr->ExtPageLength;
2603		req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
2604		req->Header.PageLength = 0; /* Must be set to zero */
2605		req->Header.PageNumber = hdr->PageNumber;
2606		req->Header.PageVersion = hdr->PageVersion;
2607	} else {
2608		MPI2_CONFIG_PAGE_HEADER *hdr;
2609
2610		hdr = &params->hdr.Struct;
2611		req->Header.PageType = hdr->PageType;
2612		req->Header.PageNumber = hdr->PageNumber;
2613		req->Header.PageLength = hdr->PageLength;
2614		req->Header.PageVersion = hdr->PageVersion;
2615	}
2616
2617	cm->cm_data = params->buffer;
2618	cm->cm_length = params->length;
2619	if (cm->cm_data != NULL) {
2620		cm->cm_sge = &req->PageBufferSGE;
2621		cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION);
2622		cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN;
2623	} else
2624		cm->cm_sge = NULL;
2625	cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2626
2627	cm->cm_complete_data = params;
2628	if (params->callback != NULL) {
2629		cm->cm_complete = mps_config_complete;
2630		return (mps_map_command(sc, cm));
2631	} else {
2632		error = mps_wait_command(sc, cm, 0, CAN_SLEEP);
2633		if (error) {
2634			mps_dprint(sc, MPS_FAULT,
2635			    "Error %d reading config page\n", error);
2636			mps_free_command(sc, cm);
2637			return (error);
2638		}
2639		mps_config_complete(sc, cm);
2640	}
2641
2642	return (0);
2643}
2644
2645int
2646mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params)
2647{
2648	return (EINVAL);
2649}
2650
2651static void
2652mps_config_complete(struct mps_softc *sc, struct mps_command *cm)
2653{
2654	MPI2_CONFIG_REPLY *reply;
2655	struct mps_config_params *params;
2656
2657	MPS_FUNCTRACE(sc);
2658	params = cm->cm_complete_data;
2659
2660	if (cm->cm_data != NULL) {
2661		bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap,
2662		    BUS_DMASYNC_POSTREAD);
2663		bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap);
2664	}
2665
2666	/*
2667	 * XXX KDM need to do more error recovery?  This results in the
2668	 * device in question not getting probed.
2669	 */
2670	if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) {
2671		params->status = MPI2_IOCSTATUS_BUSY;
2672		goto done;
2673	}
2674
2675	reply = (MPI2_CONFIG_REPLY *)cm->cm_reply;
2676	if (reply == NULL) {
2677		params->status = MPI2_IOCSTATUS_BUSY;
2678		goto done;
2679	}
2680	params->status = reply->IOCStatus;
2681	if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) {
2682		params->hdr.Ext.ExtPageType = reply->ExtPageType;
2683		params->hdr.Ext.ExtPageLength = reply->ExtPageLength;
2684		params->hdr.Ext.PageType = reply->Header.PageType;
2685		params->hdr.Ext.PageNumber = reply->Header.PageNumber;
2686		params->hdr.Ext.PageVersion = reply->Header.PageVersion;
2687	} else {
2688		params->hdr.Struct.PageType = reply->Header.PageType;
2689		params->hdr.Struct.PageNumber = reply->Header.PageNumber;
2690		params->hdr.Struct.PageLength = reply->Header.PageLength;
2691		params->hdr.Struct.PageVersion = reply->Header.PageVersion;
2692	}
2693
2694done:
2695	mps_free_command(sc, cm);
2696	if (params->callback != NULL)
2697		params->callback(sc, params);
2698
2699	return;
2700}
2701