mpr_pci.c revision 302408
1/*-
2 * Copyright (c) 2009 Yahoo! Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: stable/11/sys/dev/mpr/mpr_pci.c 299266 2016-05-09 16:19:13Z slm $");
29
30/* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT3 controllers */
31
32/* TODO Move headers to mprvar */
33#include <sys/types.h>
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/kernel.h>
37#include <sys/module.h>
38#include <sys/bus.h>
39#include <sys/conf.h>
40#include <sys/malloc.h>
41#include <sys/sysctl.h>
42#include <sys/uio.h>
43
44#include <machine/bus.h>
45#include <machine/resource.h>
46#include <sys/rman.h>
47
48#include <dev/pci/pcireg.h>
49#include <dev/pci/pcivar.h>
50#include <dev/pci/pci_private.h>
51
52#include <dev/mpr/mpi/mpi2_type.h>
53#include <dev/mpr/mpi/mpi2.h>
54#include <dev/mpr/mpi/mpi2_ioc.h>
55#include <dev/mpr/mpi/mpi2_cnfg.h>
56#include <dev/mpr/mpi/mpi2_tool.h>
57
58#include <sys/queue.h>
59#include <sys/kthread.h>
60#include <dev/mpr/mpr_ioctl.h>
61#include <dev/mpr/mprvar.h>
62
63static int	mpr_pci_probe(device_t);
64static int	mpr_pci_attach(device_t);
65static int	mpr_pci_detach(device_t);
66static int	mpr_pci_suspend(device_t);
67static int	mpr_pci_resume(device_t);
68static void	mpr_pci_free(struct mpr_softc *);
69static int	mpr_alloc_msix(struct mpr_softc *sc, int msgs);
70static int	mpr_alloc_msi(struct mpr_softc *sc, int msgs);
71
72static device_method_t mpr_methods[] = {
73	DEVMETHOD(device_probe,		mpr_pci_probe),
74	DEVMETHOD(device_attach,	mpr_pci_attach),
75	DEVMETHOD(device_detach,	mpr_pci_detach),
76	DEVMETHOD(device_suspend,	mpr_pci_suspend),
77	DEVMETHOD(device_resume,	mpr_pci_resume),
78	DEVMETHOD(bus_print_child,	bus_generic_print_child),
79	DEVMETHOD(bus_driver_added,	bus_generic_driver_added),
80	{ 0, 0 }
81};
82
83static driver_t mpr_pci_driver = {
84	"mpr",
85	mpr_methods,
86	sizeof(struct mpr_softc)
87};
88
89static devclass_t	mpr_devclass;
90DRIVER_MODULE(mpr, pci, mpr_pci_driver, mpr_devclass, 0, 0);
91MODULE_DEPEND(mpr, cam, 1, 1, 1);
92
93struct mpr_ident {
94	uint16_t	vendor;
95	uint16_t	device;
96	uint16_t	subvendor;
97	uint16_t	subdevice;
98	u_int		flags;
99	const char	*desc;
100} mpr_identifiers[] = {
101	{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3004,
102	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3004" },
103	{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3008,
104	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3008" },
105	{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_1,
106	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_1" },
107	{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_2,
108	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_2" },
109	{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_5,
110	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_5" },
111	{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6,
112	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_6" },
113	{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_1,
114	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_1" },
115	{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_2,
116	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_2" },
117	{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_1,
118	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_1" },
119	{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_2,
120	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_2" },
121	{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3216,
122	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3216" },
123	{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3224,
124	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3224" },
125	{ 0, 0, 0, 0, 0, NULL }
126};
127
128static struct mpr_ident *
129mpr_find_ident(device_t dev)
130{
131	struct mpr_ident *m;
132
133	for (m = mpr_identifiers; m->vendor != 0; m++) {
134		if (m->vendor != pci_get_vendor(dev))
135			continue;
136		if (m->device != pci_get_device(dev))
137			continue;
138		if ((m->subvendor != 0xffff) &&
139		    (m->subvendor != pci_get_subvendor(dev)))
140			continue;
141		if ((m->subdevice != 0xffff) &&
142		    (m->subdevice != pci_get_subdevice(dev)))
143			continue;
144		return (m);
145	}
146
147	return (NULL);
148}
149
150static int
151mpr_pci_probe(device_t dev)
152{
153	struct mpr_ident *id;
154
155	if ((id = mpr_find_ident(dev)) != NULL) {
156		device_set_desc(dev, id->desc);
157		return (BUS_PROBE_DEFAULT);
158	}
159	return (ENXIO);
160}
161
162static int
163mpr_pci_attach(device_t dev)
164{
165	struct mpr_softc *sc;
166	struct mpr_ident *m;
167	int error;
168
169	sc = device_get_softc(dev);
170	bzero(sc, sizeof(*sc));
171	sc->mpr_dev = dev;
172	m = mpr_find_ident(dev);
173	sc->mpr_flags = m->flags;
174
175	/* Twiddle basic PCI config bits for a sanity check */
176	pci_enable_busmaster(dev);
177
178	/* Allocate the System Interface Register Set */
179	sc->mpr_regs_rid = PCIR_BAR(1);
180	if ((sc->mpr_regs_resource = bus_alloc_resource_any(dev,
181	    SYS_RES_MEMORY, &sc->mpr_regs_rid, RF_ACTIVE)) == NULL) {
182		mpr_printf(sc, "Cannot allocate PCI registers\n");
183		return (ENXIO);
184	}
185	sc->mpr_btag = rman_get_bustag(sc->mpr_regs_resource);
186	sc->mpr_bhandle = rman_get_bushandle(sc->mpr_regs_resource);
187
188	/* Allocate the parent DMA tag */
189	if (bus_dma_tag_create( bus_get_dma_tag(dev),	/* parent */
190				1, 0,			/* algnmnt, boundary */
191				BUS_SPACE_MAXADDR,	/* lowaddr */
192				BUS_SPACE_MAXADDR,	/* highaddr */
193				NULL, NULL,		/* filter, filterarg */
194				BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
195				BUS_SPACE_UNRESTRICTED,	/* nsegments */
196				BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
197				0,			/* flags */
198				NULL, NULL,		/* lockfunc, lockarg */
199				&sc->mpr_parent_dmat)) {
200		mpr_printf(sc, "Cannot allocate parent DMA tag\n");
201		mpr_pci_free(sc);
202		return (ENOMEM);
203	}
204
205	if ((error = mpr_attach(sc)) != 0)
206		mpr_pci_free(sc);
207
208	return (error);
209}
210
211int
212mpr_pci_setup_interrupts(struct mpr_softc *sc)
213{
214	device_t dev;
215	int i, error, msgs;
216
217	dev = sc->mpr_dev;
218	error = ENXIO;
219	if ((sc->disable_msix == 0) &&
220	    ((msgs = pci_msix_count(dev)) >= MPR_MSI_COUNT))
221		error = mpr_alloc_msix(sc, MPR_MSI_COUNT);
222	if ((error != 0) && (sc->disable_msi == 0) &&
223	    ((msgs = pci_msi_count(dev)) >= MPR_MSI_COUNT))
224		error = mpr_alloc_msi(sc, MPR_MSI_COUNT);
225
226	if (error != 0) {
227		sc->mpr_flags |= MPR_FLAGS_INTX;
228		sc->mpr_irq_rid[0] = 0;
229		sc->mpr_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ,
230		    &sc->mpr_irq_rid[0],  RF_SHAREABLE | RF_ACTIVE);
231		if (sc->mpr_irq[0] == NULL) {
232			mpr_printf(sc, "Cannot allocate INTx interrupt\n");
233			return (ENXIO);
234		}
235		error = bus_setup_intr(dev, sc->mpr_irq[0],
236		    INTR_TYPE_BIO | INTR_MPSAFE, NULL, mpr_intr, sc,
237		    &sc->mpr_intrhand[0]);
238		if (error)
239			mpr_printf(sc, "Cannot setup INTx interrupt\n");
240	} else {
241		sc->mpr_flags |= MPR_FLAGS_MSI;
242		for (i = 0; i < MPR_MSI_COUNT; i++) {
243			sc->mpr_irq_rid[i] = i + 1;
244			sc->mpr_irq[i] = bus_alloc_resource_any(dev,
245			    SYS_RES_IRQ, &sc->mpr_irq_rid[i], RF_ACTIVE);
246			if (sc->mpr_irq[i] == NULL) {
247				mpr_printf(sc,
248				    "Cannot allocate MSI interrupt\n");
249				return (ENXIO);
250			}
251			error = bus_setup_intr(dev, sc->mpr_irq[i],
252			    INTR_TYPE_BIO | INTR_MPSAFE, NULL, mpr_intr_msi,
253			    sc, &sc->mpr_intrhand[i]);
254			if (error) {
255				mpr_printf(sc,
256				    "Cannot setup MSI interrupt %d\n", i);
257				break;
258			}
259		}
260	}
261
262	return (error);
263}
264
265static int
266mpr_pci_detach(device_t dev)
267{
268	struct mpr_softc *sc;
269	int error;
270
271	sc = device_get_softc(dev);
272
273	if ((error = mpr_free(sc)) != 0)
274		return (error);
275
276	mpr_pci_free(sc);
277	return (0);
278}
279
280static void
281mpr_pci_free(struct mpr_softc *sc)
282{
283	int i;
284
285	if (sc->mpr_parent_dmat != NULL) {
286		bus_dma_tag_destroy(sc->mpr_parent_dmat);
287	}
288
289	if (sc->mpr_flags & MPR_FLAGS_MSI) {
290		for (i = 0; i < MPR_MSI_COUNT; i++) {
291			if (sc->mpr_irq[i] != NULL) {
292				bus_teardown_intr(sc->mpr_dev, sc->mpr_irq[i],
293				    sc->mpr_intrhand[i]);
294				bus_release_resource(sc->mpr_dev, SYS_RES_IRQ,
295				    sc->mpr_irq_rid[i], sc->mpr_irq[i]);
296			}
297		}
298		pci_release_msi(sc->mpr_dev);
299	}
300
301	if (sc->mpr_flags & MPR_FLAGS_INTX) {
302		bus_teardown_intr(sc->mpr_dev, sc->mpr_irq[0],
303		    sc->mpr_intrhand[0]);
304		bus_release_resource(sc->mpr_dev, SYS_RES_IRQ,
305		    sc->mpr_irq_rid[0], sc->mpr_irq[0]);
306	}
307
308	if (sc->mpr_regs_resource != NULL) {
309		bus_release_resource(sc->mpr_dev, SYS_RES_MEMORY,
310		    sc->mpr_regs_rid, sc->mpr_regs_resource);
311	}
312
313	return;
314}
315
316static int
317mpr_pci_suspend(device_t dev)
318{
319	return (EINVAL);
320}
321
322static int
323mpr_pci_resume(device_t dev)
324{
325	return (EINVAL);
326}
327
328static int
329mpr_alloc_msix(struct mpr_softc *sc, int msgs)
330{
331	int error;
332
333	error = pci_alloc_msix(sc->mpr_dev, &msgs);
334	return (error);
335}
336
337static int
338mpr_alloc_msi(struct mpr_softc *sc, int msgs)
339{
340	int error;
341
342	error = pci_alloc_msi(sc->mpr_dev, &msgs);
343	return (error);
344}
345
346int
347mpr_pci_restore(struct mpr_softc *sc)
348{
349	struct pci_devinfo *dinfo;
350
351	mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
352
353	dinfo = device_get_ivars(sc->mpr_dev);
354	if (dinfo == NULL) {
355		mpr_dprint(sc, MPR_FAULT, "%s: NULL dinfo\n", __func__);
356		return (EINVAL);
357	}
358
359	pci_cfg_restore(sc->mpr_dev, dinfo);
360	return (0);
361}
362
363