mpr.c revision 319446
1265236Sken/*- 2265236Sken * Copyright (c) 2009 Yahoo! Inc. 3283661Sslm * Copyright (c) 2011-2015 LSI Corp. 4299265Sslm * Copyright (c) 2013-2016 Avago Technologies 5265236Sken * All rights reserved. 6265236Sken * 7265236Sken * Redistribution and use in source and binary forms, with or without 8265236Sken * modification, are permitted provided that the following conditions 9265236Sken * are met: 10265236Sken * 1. Redistributions of source code must retain the above copyright 11265236Sken * notice, this list of conditions and the following disclaimer. 12265236Sken * 2. Redistributions in binary form must reproduce the above copyright 13265236Sken * notice, this list of conditions and the following disclaimer in the 14265236Sken * documentation and/or other materials provided with the distribution. 15265236Sken * 16265236Sken * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17265236Sken * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18265236Sken * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19265236Sken * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20265236Sken * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21265236Sken * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22265236Sken * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23265236Sken * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24265236Sken * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25265236Sken * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26265236Sken * SUCH DAMAGE. 27265236Sken * 28283661Sslm * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 29283661Sslm * 30265236Sken */ 31265236Sken 32265236Sken#include <sys/cdefs.h> 33265236Sken__FBSDID("$FreeBSD: stable/11/sys/dev/mpr/mpr.c 319446 2017-06-01 16:55:03Z slm $"); 34265236Sken 35283661Sslm/* Communications core for Avago Technologies (LSI) MPT3 */ 36265236Sken 37265236Sken/* TODO Move headers to mprvar */ 38265236Sken#include <sys/types.h> 39265236Sken#include <sys/param.h> 40265236Sken#include <sys/systm.h> 41265236Sken#include <sys/kernel.h> 42265236Sken#include <sys/selinfo.h> 43265236Sken#include <sys/lock.h> 44265236Sken#include <sys/mutex.h> 45265236Sken#include <sys/module.h> 46265236Sken#include <sys/bus.h> 47265236Sken#include <sys/conf.h> 48265236Sken#include <sys/bio.h> 49265236Sken#include <sys/malloc.h> 50265236Sken#include <sys/uio.h> 51265236Sken#include <sys/sysctl.h> 52265236Sken#include <sys/queue.h> 53265236Sken#include <sys/kthread.h> 54265236Sken#include <sys/taskqueue.h> 55265236Sken#include <sys/endian.h> 56265236Sken#include <sys/eventhandler.h> 57265236Sken 58265236Sken#include <machine/bus.h> 59265236Sken#include <machine/resource.h> 60265236Sken#include <sys/rman.h> 61265236Sken#include <sys/proc.h> 62265236Sken 63265236Sken#include <dev/pci/pcivar.h> 64265236Sken 65265236Sken#include <cam/cam.h> 66319435Sslm#include <cam/cam_ccb.h> 67265236Sken#include <cam/scsi/scsi_all.h> 68265236Sken 69265236Sken#include <dev/mpr/mpi/mpi2_type.h> 70265236Sken#include <dev/mpr/mpi/mpi2.h> 71265236Sken#include <dev/mpr/mpi/mpi2_ioc.h> 72265236Sken#include <dev/mpr/mpi/mpi2_sas.h> 73319435Sslm#include <dev/mpr/mpi/mpi2_pci.h> 74265236Sken#include <dev/mpr/mpi/mpi2_cnfg.h> 75265236Sken#include <dev/mpr/mpi/mpi2_init.h> 76265236Sken#include <dev/mpr/mpi/mpi2_tool.h> 77265236Sken#include <dev/mpr/mpr_ioctl.h> 78265236Sken#include <dev/mpr/mprvar.h> 79265236Sken#include <dev/mpr/mpr_table.h> 80319435Sslm#include <dev/mpr/mpr_sas.h> 81265236Sken 82265236Skenstatic int mpr_diag_reset(struct mpr_softc *sc, int sleep_flag); 83265236Skenstatic int mpr_init_queues(struct mpr_softc *sc); 84265236Skenstatic int mpr_message_unit_reset(struct mpr_softc *sc, int sleep_flag); 85265236Skenstatic int mpr_transition_operational(struct mpr_softc *sc); 86265236Skenstatic int mpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching); 87265236Skenstatic void mpr_iocfacts_free(struct mpr_softc *sc); 88265236Skenstatic void mpr_startup(void *arg); 89265236Skenstatic int mpr_send_iocinit(struct mpr_softc *sc); 90265236Skenstatic int mpr_alloc_queues(struct mpr_softc *sc); 91265236Skenstatic int mpr_alloc_replies(struct mpr_softc *sc); 92265236Skenstatic int mpr_alloc_requests(struct mpr_softc *sc); 93319435Sslmstatic int mpr_alloc_nvme_prp_pages(struct mpr_softc *sc); 94265236Skenstatic int mpr_attach_log(struct mpr_softc *sc); 95265236Skenstatic __inline void mpr_complete_command(struct mpr_softc *sc, 96265236Sken struct mpr_command *cm); 97265236Skenstatic void mpr_dispatch_event(struct mpr_softc *sc, uintptr_t data, 98265236Sken MPI2_EVENT_NOTIFICATION_REPLY *reply); 99299265Sslmstatic void mpr_config_complete(struct mpr_softc *sc, struct mpr_command *cm); 100265236Skenstatic void mpr_periodic(void *); 101265236Skenstatic int mpr_reregister_events(struct mpr_softc *sc); 102299265Sslmstatic void mpr_enqueue_request(struct mpr_softc *sc, struct mpr_command *cm); 103299265Sslmstatic int mpr_get_iocfacts(struct mpr_softc *sc, MPI2_IOC_FACTS_REPLY *facts); 104265236Skenstatic int mpr_wait_db_ack(struct mpr_softc *sc, int timeout, int sleep_flag); 105265236SkenSYSCTL_NODE(_hw, OID_AUTO, mpr, CTLFLAG_RD, 0, "MPR Driver Parameters"); 106265236Sken 107265236SkenMALLOC_DEFINE(M_MPR, "mpr", "mpr driver memory"); 108265236Sken 109265236Sken/* 110265236Sken * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of 111265236Sken * any state and back to its initialization state machine. 112265236Sken */ 113265236Skenstatic char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d }; 114265236Sken 115265236Sken/* 116265236Sken * Added this union to smoothly convert le64toh cm->cm_desc.Words. 117319435Sslm * Compiler only supports uint64_t to be passed as an argument. 118265236Sken * Otherwise it will through this error: 119265236Sken * "aggregate value used where an integer was expected" 120265236Sken */ 121265236Skentypedef union _reply_descriptor { 122265236Sken u64 word; 123265236Sken struct { 124265236Sken u32 low; 125265236Sken u32 high; 126265236Sken } u; 127319435Sslm} reply_descriptor, request_descriptor; 128265236Sken 129265236Sken/* Rate limit chain-fail messages to 1 per minute */ 130265236Skenstatic struct timeval mpr_chainfail_interval = { 60, 0 }; 131265236Sken 132265236Sken/* 133265236Sken * sleep_flag can be either CAN_SLEEP or NO_SLEEP. 134265236Sken * If this function is called from process context, it can sleep 135265236Sken * and there is no harm to sleep, in case if this fuction is called 136265236Sken * from Interrupt handler, we can not sleep and need NO_SLEEP flag set. 137265236Sken * based on sleep flags driver will call either msleep, pause or DELAY. 138265236Sken * msleep and pause are of same variant, but pause is used when mpr_mtx 139265236Sken * is not hold by driver. 140265236Sken */ 141265236Skenstatic int 142265236Skenmpr_diag_reset(struct mpr_softc *sc,int sleep_flag) 143265236Sken{ 144265236Sken uint32_t reg; 145265236Sken int i, error, tries = 0; 146265236Sken uint8_t first_wait_done = FALSE; 147265236Sken 148265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 149265236Sken 150265236Sken /* Clear any pending interrupts */ 151265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 152265236Sken 153265236Sken /* 154265236Sken * Force NO_SLEEP for threads prohibited to sleep 155265236Sken * e.a Thread from interrupt handler are prohibited to sleep. 156265236Sken */ 157265236Sken#if __FreeBSD_version >= 1000029 158265236Sken if (curthread->td_no_sleeping) 159265236Sken#else //__FreeBSD_version < 1000029 160265236Sken if (curthread->td_pflags & TDP_NOSLEEPING) 161265236Sken#endif //__FreeBSD_version >= 1000029 162265236Sken sleep_flag = NO_SLEEP; 163265236Sken 164265236Sken /* Push the magic sequence */ 165265236Sken error = ETIMEDOUT; 166265236Sken while (tries++ < 20) { 167265236Sken for (i = 0; i < sizeof(mpt2_reset_magic); i++) 168265236Sken mpr_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 169265236Sken mpt2_reset_magic[i]); 170265236Sken 171265236Sken /* wait 100 msec */ 172265236Sken if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) 173265236Sken msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, 174265236Sken "mprdiag", hz/10); 175265236Sken else if (sleep_flag == CAN_SLEEP) 176265236Sken pause("mprdiag", hz/10); 177265236Sken else 178265236Sken DELAY(100 * 1000); 179265236Sken 180265236Sken reg = mpr_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 181265236Sken if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) { 182265236Sken error = 0; 183265236Sken break; 184265236Sken } 185265236Sken } 186265236Sken if (error) 187265236Sken return (error); 188265236Sken 189265236Sken /* Send the actual reset. XXX need to refresh the reg? */ 190265236Sken mpr_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, 191265236Sken reg | MPI2_DIAG_RESET_ADAPTER); 192265236Sken 193265236Sken /* Wait up to 300 seconds in 50ms intervals */ 194265236Sken error = ETIMEDOUT; 195265236Sken for (i = 0; i < 6000; i++) { 196265236Sken /* 197265236Sken * Wait 50 msec. If this is the first time through, wait 256 198265236Sken * msec to satisfy Diag Reset timing requirements. 199265236Sken */ 200265236Sken if (first_wait_done) { 201265236Sken if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) 202265236Sken msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, 203265236Sken "mprdiag", hz/20); 204265236Sken else if (sleep_flag == CAN_SLEEP) 205265236Sken pause("mprdiag", hz/20); 206265236Sken else 207265236Sken DELAY(50 * 1000); 208265236Sken } else { 209265236Sken DELAY(256 * 1000); 210265236Sken first_wait_done = TRUE; 211265236Sken } 212265236Sken /* 213265236Sken * Check for the RESET_ADAPTER bit to be cleared first, then 214265236Sken * wait for the RESET state to be cleared, which takes a little 215265236Sken * longer. 216265236Sken */ 217265236Sken reg = mpr_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 218265236Sken if (reg & MPI2_DIAG_RESET_ADAPTER) { 219265236Sken continue; 220265236Sken } 221265236Sken reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 222265236Sken if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) { 223265236Sken error = 0; 224265236Sken break; 225265236Sken } 226265236Sken } 227265236Sken if (error) 228265236Sken return (error); 229265236Sken 230265236Sken mpr_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0); 231265236Sken 232265236Sken return (0); 233265236Sken} 234265236Sken 235265236Skenstatic int 236265236Skenmpr_message_unit_reset(struct mpr_softc *sc, int sleep_flag) 237265236Sken{ 238265236Sken 239265236Sken MPR_FUNCTRACE(sc); 240265236Sken 241265236Sken mpr_regwrite(sc, MPI2_DOORBELL_OFFSET, 242265236Sken MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET << 243265236Sken MPI2_DOORBELL_FUNCTION_SHIFT); 244265236Sken 245265236Sken if (mpr_wait_db_ack(sc, 5, sleep_flag) != 0) { 246265236Sken mpr_dprint(sc, MPR_FAULT, "Doorbell handshake failed : <%s>\n", 247265236Sken __func__); 248265236Sken return (ETIMEDOUT); 249265236Sken } 250265236Sken 251265236Sken return (0); 252265236Sken} 253265236Sken 254265236Skenstatic int 255265236Skenmpr_transition_ready(struct mpr_softc *sc) 256265236Sken{ 257265236Sken uint32_t reg, state; 258265236Sken int error, tries = 0; 259265236Sken int sleep_flags; 260265236Sken 261265236Sken MPR_FUNCTRACE(sc); 262265236Sken /* If we are in attach call, do not sleep */ 263265236Sken sleep_flags = (sc->mpr_flags & MPR_FLAGS_ATTACH_DONE) 264265236Sken ? CAN_SLEEP : NO_SLEEP; 265265236Sken 266265236Sken error = 0; 267265236Sken while (tries++ < 1200) { 268265236Sken reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 269265236Sken mpr_dprint(sc, MPR_INIT, "Doorbell= 0x%x\n", reg); 270265236Sken 271265236Sken /* 272265236Sken * Ensure the IOC is ready to talk. If it's not, try 273265236Sken * resetting it. 274265236Sken */ 275265236Sken if (reg & MPI2_DOORBELL_USED) { 276265236Sken mpr_diag_reset(sc, sleep_flags); 277265236Sken DELAY(50000); 278265236Sken continue; 279265236Sken } 280265236Sken 281265236Sken /* Is the adapter owned by another peer? */ 282265236Sken if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) == 283265236Sken (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) { 284265236Sken device_printf(sc->mpr_dev, "IOC is under the control " 285265236Sken "of another peer host, aborting initialization.\n"); 286265236Sken return (ENXIO); 287265236Sken } 288265236Sken 289265236Sken state = reg & MPI2_IOC_STATE_MASK; 290265236Sken if (state == MPI2_IOC_STATE_READY) { 291265236Sken /* Ready to go! */ 292265236Sken error = 0; 293265236Sken break; 294265236Sken } else if (state == MPI2_IOC_STATE_FAULT) { 295265236Sken mpr_dprint(sc, MPR_FAULT, "IOC in fault state 0x%x\n", 296265236Sken state & MPI2_DOORBELL_FAULT_CODE_MASK); 297265236Sken mpr_diag_reset(sc, sleep_flags); 298265236Sken } else if (state == MPI2_IOC_STATE_OPERATIONAL) { 299265236Sken /* Need to take ownership */ 300265236Sken mpr_message_unit_reset(sc, sleep_flags); 301265236Sken } else if (state == MPI2_IOC_STATE_RESET) { 302265236Sken /* Wait a bit, IOC might be in transition */ 303265236Sken mpr_dprint(sc, MPR_FAULT, 304265236Sken "IOC in unexpected reset state\n"); 305265236Sken } else { 306265236Sken mpr_dprint(sc, MPR_FAULT, 307265236Sken "IOC in unknown state 0x%x\n", state); 308265236Sken error = EINVAL; 309265236Sken break; 310265236Sken } 311265236Sken 312265236Sken /* Wait 50ms for things to settle down. */ 313265236Sken DELAY(50000); 314265236Sken } 315265236Sken 316265236Sken if (error) 317265236Sken device_printf(sc->mpr_dev, "Cannot transition IOC to ready\n"); 318265236Sken return (error); 319265236Sken} 320265236Sken 321265236Skenstatic int 322265236Skenmpr_transition_operational(struct mpr_softc *sc) 323265236Sken{ 324265236Sken uint32_t reg, state; 325265236Sken int error; 326265236Sken 327265236Sken MPR_FUNCTRACE(sc); 328265236Sken 329265236Sken error = 0; 330265236Sken reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 331265236Sken mpr_dprint(sc, MPR_INIT, "Doorbell= 0x%x\n", reg); 332265236Sken 333265236Sken state = reg & MPI2_IOC_STATE_MASK; 334265236Sken if (state != MPI2_IOC_STATE_READY) { 335265236Sken if ((error = mpr_transition_ready(sc)) != 0) { 336265236Sken mpr_dprint(sc, MPR_FAULT, 337265236Sken "%s failed to transition ready\n", __func__); 338265236Sken return (error); 339265236Sken } 340265236Sken } 341265236Sken 342265236Sken error = mpr_send_iocinit(sc); 343265236Sken return (error); 344265236Sken} 345265236Sken 346265236Sken/* 347265236Sken * This is called during attach and when re-initializing due to a Diag Reset. 348265236Sken * IOC Facts is used to allocate many of the structures needed by the driver. 349265236Sken * If called from attach, de-allocation is not required because the driver has 350265236Sken * not allocated any structures yet, but if called from a Diag Reset, previously 351265236Sken * allocated structures based on IOC Facts will need to be freed and re- 352265236Sken * allocated bases on the latest IOC Facts. 353265236Sken */ 354265236Skenstatic int 355265236Skenmpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching) 356265236Sken{ 357283661Sslm int error; 358265236Sken Mpi2IOCFactsReply_t saved_facts; 359265236Sken uint8_t saved_mode, reallocating; 360265236Sken 361265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 362265236Sken 363265236Sken /* Save old IOC Facts and then only reallocate if Facts have changed */ 364265236Sken if (!attaching) { 365265236Sken bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY)); 366265236Sken } 367265236Sken 368265236Sken /* 369265236Sken * Get IOC Facts. In all cases throughout this function, panic if doing 370265236Sken * a re-initialization and only return the error if attaching so the OS 371265236Sken * can handle it. 372265236Sken */ 373265236Sken if ((error = mpr_get_iocfacts(sc, sc->facts)) != 0) { 374265236Sken if (attaching) { 375265236Sken mpr_dprint(sc, MPR_FAULT, "%s failed to get IOC Facts " 376265236Sken "with error %d\n", __func__, error); 377265236Sken return (error); 378265236Sken } else { 379265236Sken panic("%s failed to get IOC Facts with error %d\n", 380265236Sken __func__, error); 381265236Sken } 382265236Sken } 383265236Sken 384265236Sken mpr_print_iocfacts(sc, sc->facts); 385265236Sken 386265236Sken snprintf(sc->fw_version, sizeof(sc->fw_version), 387265236Sken "%02d.%02d.%02d.%02d", 388265236Sken sc->facts->FWVersion.Struct.Major, 389265236Sken sc->facts->FWVersion.Struct.Minor, 390265236Sken sc->facts->FWVersion.Struct.Unit, 391265236Sken sc->facts->FWVersion.Struct.Dev); 392265236Sken 393265236Sken mpr_printf(sc, "Firmware: %s, Driver: %s\n", sc->fw_version, 394265236Sken MPR_DRIVER_VERSION); 395265236Sken mpr_printf(sc, "IOCCapabilities: %b\n", sc->facts->IOCCapabilities, 396265236Sken "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf" 397265236Sken "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR" 398319435Sslm "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc" 399319435Sslm "\22FastPath" "\23RDPQArray" "\24AtomicReqDesc" "\25PCIeSRIOV"); 400265236Sken 401265236Sken /* 402265236Sken * If the chip doesn't support event replay then a hard reset will be 403265236Sken * required to trigger a full discovery. Do the reset here then 404265236Sken * retransition to Ready. A hard reset might have already been done, 405265236Sken * but it doesn't hurt to do it again. Only do this if attaching, not 406265236Sken * for a Diag Reset. 407265236Sken */ 408265236Sken if (attaching) { 409265236Sken if ((sc->facts->IOCCapabilities & 410265236Sken MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0) { 411265236Sken mpr_diag_reset(sc, NO_SLEEP); 412265236Sken if ((error = mpr_transition_ready(sc)) != 0) { 413265236Sken mpr_dprint(sc, MPR_FAULT, "%s failed to " 414265236Sken "transition to ready with error %d\n", 415265236Sken __func__, error); 416265236Sken return (error); 417265236Sken } 418265236Sken } 419265236Sken } 420265236Sken 421265236Sken /* 422265236Sken * Set flag if IR Firmware is loaded. If the RAID Capability has 423265236Sken * changed from the previous IOC Facts, log a warning, but only if 424265236Sken * checking this after a Diag Reset and not during attach. 425265236Sken */ 426265236Sken saved_mode = sc->ir_firmware; 427265236Sken if (sc->facts->IOCCapabilities & 428265236Sken MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) 429265236Sken sc->ir_firmware = 1; 430265236Sken if (!attaching) { 431265236Sken if (sc->ir_firmware != saved_mode) { 432265236Sken mpr_dprint(sc, MPR_FAULT, "%s new IR/IT mode in IOC " 433265236Sken "Facts does not match previous mode\n", __func__); 434265236Sken } 435265236Sken } 436265236Sken 437265236Sken /* Only deallocate and reallocate if relevant IOC Facts have changed */ 438265236Sken reallocating = FALSE; 439265236Sken if ((!attaching) && 440265236Sken ((saved_facts.MsgVersion != sc->facts->MsgVersion) || 441265236Sken (saved_facts.HeaderVersion != sc->facts->HeaderVersion) || 442265236Sken (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) || 443265236Sken (saved_facts.RequestCredit != sc->facts->RequestCredit) || 444265236Sken (saved_facts.ProductID != sc->facts->ProductID) || 445265236Sken (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) || 446265236Sken (saved_facts.IOCRequestFrameSize != 447265236Sken sc->facts->IOCRequestFrameSize) || 448299266Sslm (saved_facts.IOCMaxChainSegmentSize != 449299266Sslm sc->facts->IOCMaxChainSegmentSize) || 450265236Sken (saved_facts.MaxTargets != sc->facts->MaxTargets) || 451265236Sken (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) || 452265236Sken (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) || 453265236Sken (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) || 454265236Sken (saved_facts.MaxReplyDescriptorPostQueueDepth != 455265236Sken sc->facts->MaxReplyDescriptorPostQueueDepth) || 456265236Sken (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) || 457265236Sken (saved_facts.MaxVolumes != sc->facts->MaxVolumes) || 458265236Sken (saved_facts.MaxPersistentEntries != 459265236Sken sc->facts->MaxPersistentEntries))) { 460265236Sken reallocating = TRUE; 461265236Sken } 462265236Sken 463265236Sken /* 464265236Sken * Some things should be done if attaching or re-allocating after a Diag 465265236Sken * Reset, but are not needed after a Diag Reset if the FW has not 466265236Sken * changed. 467265236Sken */ 468265236Sken if (attaching || reallocating) { 469265236Sken /* 470265236Sken * Check if controller supports FW diag buffers and set flag to 471265236Sken * enable each type. 472265236Sken */ 473265236Sken if (sc->facts->IOCCapabilities & 474265236Sken MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) 475265236Sken sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE]. 476265236Sken enabled = TRUE; 477265236Sken if (sc->facts->IOCCapabilities & 478265236Sken MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) 479265236Sken sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT]. 480265236Sken enabled = TRUE; 481265236Sken if (sc->facts->IOCCapabilities & 482265236Sken MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) 483265236Sken sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED]. 484265236Sken enabled = TRUE; 485265236Sken 486265236Sken /* 487319435Sslm * Set flags for some supported items. 488265236Sken */ 489265236Sken if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) 490265236Sken sc->eedp_enabled = TRUE; 491265236Sken if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) 492265236Sken sc->control_TLR = TRUE; 493319435Sslm if (sc->facts->IOCCapabilities & 494319435Sslm MPI26_IOCFACTS_CAPABILITY_ATOMIC_REQ) 495319435Sslm sc->atomic_desc_capable = TRUE; 496265236Sken 497265236Sken /* 498265236Sken * Size the queues. Since the reply queues always need one free 499265236Sken * entry, we'll just deduct one reply message here. 500265236Sken */ 501265236Sken sc->num_reqs = MIN(MPR_REQ_FRAMES, sc->facts->RequestCredit); 502265236Sken sc->num_replies = MIN(MPR_REPLY_FRAMES + MPR_EVT_REPLY_FRAMES, 503265236Sken sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; 504265236Sken 505265236Sken /* 506265236Sken * Initialize all Tail Queues 507265236Sken */ 508265236Sken TAILQ_INIT(&sc->req_list); 509265236Sken TAILQ_INIT(&sc->high_priority_req_list); 510265236Sken TAILQ_INIT(&sc->chain_list); 511319435Sslm TAILQ_INIT(&sc->prp_page_list); 512265236Sken TAILQ_INIT(&sc->tm_list); 513265236Sken } 514265236Sken 515265236Sken /* 516265236Sken * If doing a Diag Reset and the FW is significantly different 517265236Sken * (reallocating will be set above in IOC Facts comparison), then all 518265236Sken * buffers based on the IOC Facts will need to be freed before they are 519265236Sken * reallocated. 520265236Sken */ 521265236Sken if (reallocating) { 522265236Sken mpr_iocfacts_free(sc); 523319446Sslm mprsas_realloc_targets(sc, saved_facts.MaxTargets + 524319446Sslm saved_facts.MaxVolumes); 525265236Sken } 526265236Sken 527265236Sken /* 528265236Sken * Any deallocation has been completed. Now start reallocating 529265236Sken * if needed. Will only need to reallocate if attaching or if the new 530265236Sken * IOC Facts are different from the previous IOC Facts after a Diag 531265236Sken * Reset. Targets have already been allocated above if needed. 532265236Sken */ 533265236Sken if (attaching || reallocating) { 534265236Sken if (((error = mpr_alloc_queues(sc)) != 0) || 535265236Sken ((error = mpr_alloc_replies(sc)) != 0) || 536265236Sken ((error = mpr_alloc_requests(sc)) != 0)) { 537265236Sken if (attaching ) { 538265236Sken mpr_dprint(sc, MPR_FAULT, "%s failed to alloc " 539265236Sken "queues with error %d\n", __func__, error); 540265236Sken mpr_free(sc); 541265236Sken return (error); 542265236Sken } else { 543265236Sken panic("%s failed to alloc queues with error " 544265236Sken "%d\n", __func__, error); 545265236Sken } 546265236Sken } 547265236Sken } 548265236Sken 549265236Sken /* Always initialize the queues */ 550265236Sken bzero(sc->free_queue, sc->fqdepth * 4); 551265236Sken mpr_init_queues(sc); 552265236Sken 553265236Sken /* 554265236Sken * Always get the chip out of the reset state, but only panic if not 555265236Sken * attaching. If attaching and there is an error, that is handled by 556265236Sken * the OS. 557265236Sken */ 558265236Sken error = mpr_transition_operational(sc); 559265236Sken if (error != 0) { 560265236Sken if (attaching) { 561299265Sslm mpr_printf(sc, "%s failed to transition to operational " 562299265Sslm "with error %d\n", __func__, error); 563265236Sken mpr_free(sc); 564265236Sken return (error); 565265236Sken } else { 566265236Sken panic("%s failed to transition to operational with " 567265236Sken "error %d\n", __func__, error); 568265236Sken } 569265236Sken } 570265236Sken 571265236Sken /* 572265236Sken * Finish the queue initialization. 573265236Sken * These are set here instead of in mpr_init_queues() because the 574265236Sken * IOC resets these values during the state transition in 575265236Sken * mpr_transition_operational(). The free index is set to 1 576265236Sken * because the corresponding index in the IOC is set to 0, and the 577265236Sken * IOC treats the queues as full if both are set to the same value. 578265236Sken * Hence the reason that the queue can't hold all of the possible 579265236Sken * replies. 580265236Sken */ 581265236Sken sc->replypostindex = 0; 582265236Sken mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 583265236Sken mpr_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); 584265236Sken 585265236Sken /* 586265236Sken * Attach the subsystems so they can prepare their event masks. 587265236Sken */ 588265236Sken /* XXX Should be dynamic so that IM/IR and user modules can attach */ 589265236Sken if (attaching) { 590265236Sken if (((error = mpr_attach_log(sc)) != 0) || 591265236Sken ((error = mpr_attach_sas(sc)) != 0) || 592265236Sken ((error = mpr_attach_user(sc)) != 0)) { 593265236Sken mpr_printf(sc, "%s failed to attach all subsystems: " 594265236Sken "error %d\n", __func__, error); 595265236Sken mpr_free(sc); 596265236Sken return (error); 597265236Sken } 598265236Sken 599265236Sken if ((error = mpr_pci_setup_interrupts(sc)) != 0) { 600265236Sken mpr_printf(sc, "%s failed to setup interrupts\n", 601265236Sken __func__); 602265236Sken mpr_free(sc); 603265236Sken return (error); 604265236Sken } 605265236Sken } 606265236Sken 607265236Sken return (error); 608265236Sken} 609265236Sken 610265236Sken/* 611265236Sken * This is called if memory is being free (during detach for example) and when 612265236Sken * buffers need to be reallocated due to a Diag Reset. 613265236Sken */ 614265236Skenstatic void 615265236Skenmpr_iocfacts_free(struct mpr_softc *sc) 616265236Sken{ 617265236Sken struct mpr_command *cm; 618265236Sken int i; 619265236Sken 620265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 621265236Sken 622265236Sken if (sc->free_busaddr != 0) 623265236Sken bus_dmamap_unload(sc->queues_dmat, sc->queues_map); 624265236Sken if (sc->free_queue != NULL) 625265236Sken bus_dmamem_free(sc->queues_dmat, sc->free_queue, 626265236Sken sc->queues_map); 627265236Sken if (sc->queues_dmat != NULL) 628265236Sken bus_dma_tag_destroy(sc->queues_dmat); 629265236Sken 630265236Sken if (sc->chain_busaddr != 0) 631265236Sken bus_dmamap_unload(sc->chain_dmat, sc->chain_map); 632265236Sken if (sc->chain_frames != NULL) 633265236Sken bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 634265236Sken sc->chain_map); 635265236Sken if (sc->chain_dmat != NULL) 636265236Sken bus_dma_tag_destroy(sc->chain_dmat); 637265236Sken 638265236Sken if (sc->sense_busaddr != 0) 639265236Sken bus_dmamap_unload(sc->sense_dmat, sc->sense_map); 640265236Sken if (sc->sense_frames != NULL) 641265236Sken bus_dmamem_free(sc->sense_dmat, sc->sense_frames, 642265236Sken sc->sense_map); 643265236Sken if (sc->sense_dmat != NULL) 644265236Sken bus_dma_tag_destroy(sc->sense_dmat); 645265236Sken 646319435Sslm if (sc->prp_page_busaddr != 0) 647319435Sslm bus_dmamap_unload(sc->prp_page_dmat, sc->prp_page_map); 648319435Sslm if (sc->prp_pages != NULL) 649319435Sslm bus_dmamem_free(sc->prp_page_dmat, sc->prp_pages, 650319435Sslm sc->prp_page_map); 651319435Sslm if (sc->prp_page_dmat != NULL) 652319435Sslm bus_dma_tag_destroy(sc->prp_page_dmat); 653319435Sslm 654265236Sken if (sc->reply_busaddr != 0) 655265236Sken bus_dmamap_unload(sc->reply_dmat, sc->reply_map); 656265236Sken if (sc->reply_frames != NULL) 657265236Sken bus_dmamem_free(sc->reply_dmat, sc->reply_frames, 658265236Sken sc->reply_map); 659265236Sken if (sc->reply_dmat != NULL) 660265236Sken bus_dma_tag_destroy(sc->reply_dmat); 661265236Sken 662265236Sken if (sc->req_busaddr != 0) 663265236Sken bus_dmamap_unload(sc->req_dmat, sc->req_map); 664265236Sken if (sc->req_frames != NULL) 665265236Sken bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map); 666265236Sken if (sc->req_dmat != NULL) 667265236Sken bus_dma_tag_destroy(sc->req_dmat); 668265236Sken 669265236Sken if (sc->chains != NULL) 670265236Sken free(sc->chains, M_MPR); 671319435Sslm if (sc->prps != NULL) 672319435Sslm free(sc->prps, M_MPR); 673265236Sken if (sc->commands != NULL) { 674265236Sken for (i = 1; i < sc->num_reqs; i++) { 675265236Sken cm = &sc->commands[i]; 676265236Sken bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap); 677265236Sken } 678265236Sken free(sc->commands, M_MPR); 679265236Sken } 680265236Sken if (sc->buffer_dmat != NULL) 681265236Sken bus_dma_tag_destroy(sc->buffer_dmat); 682265236Sken} 683265236Sken 684265236Sken/* 685265236Sken * The terms diag reset and hard reset are used interchangeably in the MPI 686265236Sken * docs to mean resetting the controller chip. In this code diag reset 687265236Sken * cleans everything up, and the hard reset function just sends the reset 688265236Sken * sequence to the chip. This should probably be refactored so that every 689265236Sken * subsystem gets a reset notification of some sort, and can clean up 690265236Sken * appropriately. 691265236Sken */ 692265236Skenint 693265236Skenmpr_reinit(struct mpr_softc *sc) 694265236Sken{ 695265236Sken int error; 696265236Sken struct mprsas_softc *sassc; 697265236Sken 698265236Sken sassc = sc->sassc; 699265236Sken 700265236Sken MPR_FUNCTRACE(sc); 701265236Sken 702265236Sken mtx_assert(&sc->mpr_mtx, MA_OWNED); 703265236Sken 704265236Sken if (sc->mpr_flags & MPR_FLAGS_DIAGRESET) { 705265236Sken mpr_dprint(sc, MPR_INIT, "%s reset already in progress\n", 706299265Sslm __func__); 707265236Sken return 0; 708265236Sken } 709265236Sken 710265236Sken mpr_dprint(sc, MPR_INFO, "Reinitializing controller,\n"); 711265236Sken /* make sure the completion callbacks can recognize they're getting 712265236Sken * a NULL cm_reply due to a reset. 713265236Sken */ 714265236Sken sc->mpr_flags |= MPR_FLAGS_DIAGRESET; 715265236Sken 716265236Sken /* 717265236Sken * Mask interrupts here. 718265236Sken */ 719265236Sken mpr_dprint(sc, MPR_INIT, "%s mask interrupts\n", __func__); 720265236Sken mpr_mask_intr(sc); 721265236Sken 722265236Sken error = mpr_diag_reset(sc, CAN_SLEEP); 723265236Sken if (error != 0) { 724265236Sken panic("%s hard reset failed with error %d\n", __func__, error); 725265236Sken } 726265236Sken 727265236Sken /* Restore the PCI state, including the MSI-X registers */ 728265236Sken mpr_pci_restore(sc); 729265236Sken 730265236Sken /* Give the I/O subsystem special priority to get itself prepared */ 731265236Sken mprsas_handle_reinit(sc); 732265236Sken 733265236Sken /* 734265236Sken * Get IOC Facts and allocate all structures based on this information. 735265236Sken * The attach function will also call mpr_iocfacts_allocate at startup. 736265236Sken * If relevant values have changed in IOC Facts, this function will free 737265236Sken * all of the memory based on IOC Facts and reallocate that memory. 738265236Sken */ 739265236Sken if ((error = mpr_iocfacts_allocate(sc, FALSE)) != 0) { 740265236Sken panic("%s IOC Facts based allocation failed with error %d\n", 741265236Sken __func__, error); 742265236Sken } 743265236Sken 744265236Sken /* 745265236Sken * Mapping structures will be re-allocated after getting IOC Page8, so 746265236Sken * free these structures here. 747265236Sken */ 748265236Sken mpr_mapping_exit(sc); 749265236Sken 750265236Sken /* 751265236Sken * The static page function currently read is IOC Page8. Others can be 752265236Sken * added in future. It's possible that the values in IOC Page8 have 753265236Sken * changed after a Diag Reset due to user modification, so always read 754265236Sken * these. Interrupts are masked, so unmask them before getting config 755265236Sken * pages. 756265236Sken */ 757265236Sken mpr_unmask_intr(sc); 758265236Sken sc->mpr_flags &= ~MPR_FLAGS_DIAGRESET; 759265236Sken mpr_base_static_config_pages(sc); 760265236Sken 761265236Sken /* 762265236Sken * Some mapping info is based in IOC Page8 data, so re-initialize the 763265236Sken * mapping tables. 764265236Sken */ 765265236Sken mpr_mapping_initialize(sc); 766265236Sken 767265236Sken /* 768265236Sken * Restart will reload the event masks clobbered by the reset, and 769265236Sken * then enable the port. 770265236Sken */ 771265236Sken mpr_reregister_events(sc); 772265236Sken 773265236Sken /* the end of discovery will release the simq, so we're done. */ 774265236Sken mpr_dprint(sc, MPR_INFO, "%s finished sc %p post %u free %u\n", 775265236Sken __func__, sc, sc->replypostindex, sc->replyfreeindex); 776283661Sslm mprsas_release_simq_reinit(sassc); 777265236Sken 778265236Sken return 0; 779265236Sken} 780265236Sken 781265236Sken/* Wait for the chip to ACK a word that we've put into its FIFO 782265236Sken * Wait for <timeout> seconds. In single loop wait for busy loop 783265236Sken * for 500 microseconds. 784265236Sken * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds. 785265236Sken * */ 786265236Skenstatic int 787265236Skenmpr_wait_db_ack(struct mpr_softc *sc, int timeout, int sleep_flag) 788265236Sken{ 789265236Sken u32 cntdn, count; 790265236Sken u32 int_status; 791265236Sken u32 doorbell; 792265236Sken 793265236Sken count = 0; 794265236Sken cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 795265236Sken do { 796265236Sken int_status = mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 797265236Sken if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 798265236Sken mpr_dprint(sc, MPR_INIT, "%s: successful count(%d), " 799265236Sken "timeout(%d)\n", __func__, count, timeout); 800265236Sken return 0; 801265236Sken } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 802265236Sken doorbell = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 803265236Sken if ((doorbell & MPI2_IOC_STATE_MASK) == 804265236Sken MPI2_IOC_STATE_FAULT) { 805265236Sken mpr_dprint(sc, MPR_FAULT, 806265236Sken "fault_state(0x%04x)!\n", doorbell); 807265236Sken return (EFAULT); 808265236Sken } 809265236Sken } else if (int_status == 0xFFFFFFFF) 810265236Sken goto out; 811265236Sken 812265236Sken /* 813265236Sken * If it can sleep, sleep for 1 milisecond, else busy loop for 814265236Sken * 0.5 milisecond 815265236Sken */ 816265236Sken if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) 817283661Sslm msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, "mprdba", 818283661Sslm hz/1000); 819265236Sken else if (sleep_flag == CAN_SLEEP) 820265236Sken pause("mprdba", hz/1000); 821265236Sken else 822265236Sken DELAY(500); 823265236Sken count++; 824265236Sken } while (--cntdn); 825265236Sken 826319435Sslmout: 827265236Sken mpr_dprint(sc, MPR_FAULT, "%s: failed due to timeout count(%d), " 828265236Sken "int_status(%x)!\n", __func__, count, int_status); 829265236Sken return (ETIMEDOUT); 830265236Sken} 831265236Sken 832265236Sken/* Wait for the chip to signal that the next word in its FIFO can be fetched */ 833265236Skenstatic int 834265236Skenmpr_wait_db_int(struct mpr_softc *sc) 835265236Sken{ 836265236Sken int retry; 837265236Sken 838265236Sken for (retry = 0; retry < MPR_DB_MAX_WAIT; retry++) { 839265236Sken if ((mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & 840265236Sken MPI2_HIS_IOC2SYS_DB_STATUS) != 0) 841265236Sken return (0); 842265236Sken DELAY(2000); 843265236Sken } 844265236Sken return (ETIMEDOUT); 845265236Sken} 846265236Sken 847265236Sken/* Step through the synchronous command state machine, i.e. "Doorbell mode" */ 848265236Skenstatic int 849265236Skenmpr_request_sync(struct mpr_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply, 850265236Sken int req_sz, int reply_sz, int timeout) 851265236Sken{ 852265236Sken uint32_t *data32; 853265236Sken uint16_t *data16; 854265236Sken int i, count, ioc_sz, residual; 855265236Sken int sleep_flags = CAN_SLEEP; 856265236Sken 857265236Sken#if __FreeBSD_version >= 1000029 858265236Sken if (curthread->td_no_sleeping) 859265236Sken#else //__FreeBSD_version < 1000029 860265236Sken if (curthread->td_pflags & TDP_NOSLEEPING) 861265236Sken#endif //__FreeBSD_version >= 1000029 862265236Sken sleep_flags = NO_SLEEP; 863265236Sken 864265236Sken /* Step 1 */ 865265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 866265236Sken 867265236Sken /* Step 2 */ 868265236Sken if (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 869265236Sken return (EBUSY); 870265236Sken 871265236Sken /* Step 3 872265236Sken * Announce that a message is coming through the doorbell. Messages 873265236Sken * are pushed at 32bit words, so round up if needed. 874265236Sken */ 875265236Sken count = (req_sz + 3) / 4; 876265236Sken mpr_regwrite(sc, MPI2_DOORBELL_OFFSET, 877265236Sken (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | 878265236Sken (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT)); 879265236Sken 880265236Sken /* Step 4 */ 881265236Sken if (mpr_wait_db_int(sc) || 882265236Sken (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) { 883265236Sken mpr_dprint(sc, MPR_FAULT, "Doorbell failed to activate\n"); 884265236Sken return (ENXIO); 885265236Sken } 886265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 887265236Sken if (mpr_wait_db_ack(sc, 5, sleep_flags) != 0) { 888265236Sken mpr_dprint(sc, MPR_FAULT, "Doorbell handshake failed\n"); 889265236Sken return (ENXIO); 890265236Sken } 891265236Sken 892265236Sken /* Step 5 */ 893265236Sken /* Clock out the message data synchronously in 32-bit dwords*/ 894265236Sken data32 = (uint32_t *)req; 895265236Sken for (i = 0; i < count; i++) { 896265236Sken mpr_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i])); 897265236Sken if (mpr_wait_db_ack(sc, 5, sleep_flags) != 0) { 898265236Sken mpr_dprint(sc, MPR_FAULT, 899265236Sken "Timeout while writing doorbell\n"); 900265236Sken return (ENXIO); 901265236Sken } 902265236Sken } 903265236Sken 904265236Sken /* Step 6 */ 905265236Sken /* Clock in the reply in 16-bit words. The total length of the 906265236Sken * message is always in the 4th byte, so clock out the first 2 words 907265236Sken * manually, then loop the rest. 908265236Sken */ 909265236Sken data16 = (uint16_t *)reply; 910265236Sken if (mpr_wait_db_int(sc) != 0) { 911265236Sken mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell 0\n"); 912265236Sken return (ENXIO); 913265236Sken } 914265236Sken data16[0] = 915265236Sken mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 916265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 917265236Sken if (mpr_wait_db_int(sc) != 0) { 918265236Sken mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell 1\n"); 919265236Sken return (ENXIO); 920265236Sken } 921265236Sken data16[1] = 922265236Sken mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 923265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 924265236Sken 925265236Sken /* Number of 32bit words in the message */ 926265236Sken ioc_sz = reply->MsgLength; 927265236Sken 928265236Sken /* 929265236Sken * Figure out how many 16bit words to clock in without overrunning. 930265236Sken * The precision loss with dividing reply_sz can safely be 931265236Sken * ignored because the messages can only be multiples of 32bits. 932265236Sken */ 933265236Sken residual = 0; 934265236Sken count = MIN((reply_sz / 4), ioc_sz) * 2; 935265236Sken if (count < ioc_sz * 2) { 936265236Sken residual = ioc_sz * 2 - count; 937265236Sken mpr_dprint(sc, MPR_ERROR, "Driver error, throwing away %d " 938265236Sken "residual message words\n", residual); 939265236Sken } 940265236Sken 941265236Sken for (i = 2; i < count; i++) { 942265236Sken if (mpr_wait_db_int(sc) != 0) { 943265236Sken mpr_dprint(sc, MPR_FAULT, 944265236Sken "Timeout reading doorbell %d\n", i); 945265236Sken return (ENXIO); 946265236Sken } 947265236Sken data16[i] = mpr_regread(sc, MPI2_DOORBELL_OFFSET) & 948265236Sken MPI2_DOORBELL_DATA_MASK; 949265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 950265236Sken } 951265236Sken 952265236Sken /* 953265236Sken * Pull out residual words that won't fit into the provided buffer. 954265236Sken * This keeps the chip from hanging due to a driver programming 955265236Sken * error. 956265236Sken */ 957265236Sken while (residual--) { 958265236Sken if (mpr_wait_db_int(sc) != 0) { 959265236Sken mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell\n"); 960265236Sken return (ENXIO); 961265236Sken } 962265236Sken (void)mpr_regread(sc, MPI2_DOORBELL_OFFSET); 963265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 964265236Sken } 965265236Sken 966265236Sken /* Step 7 */ 967265236Sken if (mpr_wait_db_int(sc) != 0) { 968265236Sken mpr_dprint(sc, MPR_FAULT, "Timeout waiting to exit doorbell\n"); 969265236Sken return (ENXIO); 970265236Sken } 971265236Sken if (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 972265236Sken mpr_dprint(sc, MPR_FAULT, "Warning, doorbell still active\n"); 973265236Sken mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 974265236Sken 975265236Sken return (0); 976265236Sken} 977265236Sken 978265236Skenstatic void 979265236Skenmpr_enqueue_request(struct mpr_softc *sc, struct mpr_command *cm) 980265236Sken{ 981319435Sslm request_descriptor rd; 982265236Sken 983265236Sken MPR_FUNCTRACE(sc); 984283661Sslm mpr_dprint(sc, MPR_TRACE, "SMID %u cm %p ccb %p\n", 985265236Sken cm->cm_desc.Default.SMID, cm, cm->cm_ccb); 986265236Sken 987265236Sken if (sc->mpr_flags & MPR_FLAGS_ATTACH_DONE && !(sc->mpr_flags & 988265236Sken MPR_FLAGS_SHUTDOWN)) 989265236Sken mtx_assert(&sc->mpr_mtx, MA_OWNED); 990265236Sken 991265236Sken if (++sc->io_cmds_active > sc->io_cmds_highwater) 992265236Sken sc->io_cmds_highwater++; 993265236Sken 994319435Sslm if (sc->atomic_desc_capable) { 995319435Sslm rd.u.low = cm->cm_desc.Words.Low; 996319435Sslm mpr_regwrite(sc, MPI26_ATOMIC_REQUEST_DESCRIPTOR_POST_OFFSET, 997319435Sslm rd.u.low); 998319435Sslm } else { 999319435Sslm rd.u.low = cm->cm_desc.Words.Low; 1000319435Sslm rd.u.high = cm->cm_desc.Words.High; 1001319435Sslm rd.word = htole64(rd.word); 1002319435Sslm mpr_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET, 1003319435Sslm rd.u.low); 1004319435Sslm mpr_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET, 1005319435Sslm rd.u.high); 1006319435Sslm } 1007265236Sken} 1008265236Sken 1009265236Sken/* 1010265236Sken * Just the FACTS, ma'am. 1011265236Sken */ 1012265236Skenstatic int 1013265236Skenmpr_get_iocfacts(struct mpr_softc *sc, MPI2_IOC_FACTS_REPLY *facts) 1014265236Sken{ 1015265236Sken MPI2_DEFAULT_REPLY *reply; 1016265236Sken MPI2_IOC_FACTS_REQUEST request; 1017265236Sken int error, req_sz, reply_sz; 1018265236Sken 1019265236Sken MPR_FUNCTRACE(sc); 1020265236Sken 1021265236Sken req_sz = sizeof(MPI2_IOC_FACTS_REQUEST); 1022265236Sken reply_sz = sizeof(MPI2_IOC_FACTS_REPLY); 1023265236Sken reply = (MPI2_DEFAULT_REPLY *)facts; 1024265236Sken 1025265236Sken bzero(&request, req_sz); 1026265236Sken request.Function = MPI2_FUNCTION_IOC_FACTS; 1027265236Sken error = mpr_request_sync(sc, &request, reply, req_sz, reply_sz, 5); 1028265236Sken 1029265236Sken return (error); 1030265236Sken} 1031265236Sken 1032265236Skenstatic int 1033265236Skenmpr_send_iocinit(struct mpr_softc *sc) 1034265236Sken{ 1035265236Sken MPI2_IOC_INIT_REQUEST init; 1036265236Sken MPI2_DEFAULT_REPLY reply; 1037265236Sken int req_sz, reply_sz, error; 1038265236Sken struct timeval now; 1039265236Sken uint64_t time_in_msec; 1040265236Sken 1041265236Sken MPR_FUNCTRACE(sc); 1042265236Sken 1043265236Sken req_sz = sizeof(MPI2_IOC_INIT_REQUEST); 1044265236Sken reply_sz = sizeof(MPI2_IOC_INIT_REPLY); 1045265236Sken bzero(&init, req_sz); 1046265236Sken bzero(&reply, reply_sz); 1047265236Sken 1048265236Sken /* 1049265236Sken * Fill in the init block. Note that most addresses are 1050265236Sken * deliberately in the lower 32bits of memory. This is a micro- 1051265236Sken * optimzation for PCI/PCIX, though it's not clear if it helps PCIe. 1052265236Sken */ 1053265236Sken init.Function = MPI2_FUNCTION_IOC_INIT; 1054265236Sken init.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 1055265236Sken init.MsgVersion = htole16(MPI2_VERSION); 1056265236Sken init.HeaderVersion = htole16(MPI2_HEADER_VERSION); 1057265236Sken init.SystemRequestFrameSize = htole16(sc->facts->IOCRequestFrameSize); 1058265236Sken init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth); 1059265236Sken init.ReplyFreeQueueDepth = htole16(sc->fqdepth); 1060265236Sken init.SenseBufferAddressHigh = 0; 1061265236Sken init.SystemReplyAddressHigh = 0; 1062265236Sken init.SystemRequestFrameBaseAddress.High = 0; 1063265236Sken init.SystemRequestFrameBaseAddress.Low = 1064265236Sken htole32((uint32_t)sc->req_busaddr); 1065265236Sken init.ReplyDescriptorPostQueueAddress.High = 0; 1066265236Sken init.ReplyDescriptorPostQueueAddress.Low = 1067265236Sken htole32((uint32_t)sc->post_busaddr); 1068265236Sken init.ReplyFreeQueueAddress.High = 0; 1069265236Sken init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr); 1070265236Sken getmicrotime(&now); 1071265236Sken time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000); 1072265236Sken init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF); 1073265236Sken init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF); 1074319435Sslm init.HostPageSize = HOST_PAGE_SIZE_4K; 1075265236Sken 1076265236Sken error = mpr_request_sync(sc, &init, &reply, req_sz, reply_sz, 5); 1077265236Sken if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 1078265236Sken error = ENXIO; 1079265236Sken 1080265236Sken mpr_dprint(sc, MPR_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus); 1081265236Sken return (error); 1082265236Sken} 1083265236Sken 1084265236Skenvoid 1085265236Skenmpr_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1086265236Sken{ 1087265236Sken bus_addr_t *addr; 1088265236Sken 1089265236Sken addr = arg; 1090265236Sken *addr = segs[0].ds_addr; 1091265236Sken} 1092265236Sken 1093265236Skenstatic int 1094265236Skenmpr_alloc_queues(struct mpr_softc *sc) 1095265236Sken{ 1096265236Sken bus_addr_t queues_busaddr; 1097265236Sken uint8_t *queues; 1098265236Sken int qsize, fqsize, pqsize; 1099265236Sken 1100265236Sken /* 1101265236Sken * The reply free queue contains 4 byte entries in multiples of 16 and 1102265236Sken * aligned on a 16 byte boundary. There must always be an unused entry. 1103265236Sken * This queue supplies fresh reply frames for the firmware to use. 1104265236Sken * 1105265236Sken * The reply descriptor post queue contains 8 byte entries in 1106265236Sken * multiples of 16 and aligned on a 16 byte boundary. This queue 1107265236Sken * contains filled-in reply frames sent from the firmware to the host. 1108265236Sken * 1109265236Sken * These two queues are allocated together for simplicity. 1110265236Sken */ 1111298433Spfg sc->fqdepth = roundup2(sc->num_replies + 1, 16); 1112298433Spfg sc->pqdepth = roundup2(sc->num_replies + 1, 16); 1113265236Sken fqsize= sc->fqdepth * 4; 1114265236Sken pqsize = sc->pqdepth * 8; 1115265236Sken qsize = fqsize + pqsize; 1116265236Sken 1117265236Sken if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1118265236Sken 16, 0, /* algnmnt, boundary */ 1119265236Sken BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1120265236Sken BUS_SPACE_MAXADDR, /* highaddr */ 1121265236Sken NULL, NULL, /* filter, filterarg */ 1122265236Sken qsize, /* maxsize */ 1123265236Sken 1, /* nsegments */ 1124265236Sken qsize, /* maxsegsize */ 1125265236Sken 0, /* flags */ 1126265236Sken NULL, NULL, /* lockfunc, lockarg */ 1127265236Sken &sc->queues_dmat)) { 1128265236Sken device_printf(sc->mpr_dev, "Cannot allocate queues DMA tag\n"); 1129265236Sken return (ENOMEM); 1130265236Sken } 1131265236Sken if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT, 1132265236Sken &sc->queues_map)) { 1133265236Sken device_printf(sc->mpr_dev, "Cannot allocate queues memory\n"); 1134265236Sken return (ENOMEM); 1135265236Sken } 1136265236Sken bzero(queues, qsize); 1137265236Sken bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize, 1138265236Sken mpr_memaddr_cb, &queues_busaddr, 0); 1139265236Sken 1140265236Sken sc->free_queue = (uint32_t *)queues; 1141265236Sken sc->free_busaddr = queues_busaddr; 1142265236Sken sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize); 1143265236Sken sc->post_busaddr = queues_busaddr + fqsize; 1144265236Sken 1145265236Sken return (0); 1146265236Sken} 1147265236Sken 1148265236Skenstatic int 1149265236Skenmpr_alloc_replies(struct mpr_softc *sc) 1150265236Sken{ 1151265236Sken int rsize, num_replies; 1152265236Sken 1153265236Sken /* 1154265236Sken * sc->num_replies should be one less than sc->fqdepth. We need to 1155265236Sken * allocate space for sc->fqdepth replies, but only sc->num_replies 1156265236Sken * replies can be used at once. 1157265236Sken */ 1158265236Sken num_replies = max(sc->fqdepth, sc->num_replies); 1159265236Sken 1160265236Sken rsize = sc->facts->ReplyFrameSize * num_replies * 4; 1161265236Sken if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1162265236Sken 4, 0, /* algnmnt, boundary */ 1163265236Sken BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1164265236Sken BUS_SPACE_MAXADDR, /* highaddr */ 1165265236Sken NULL, NULL, /* filter, filterarg */ 1166265236Sken rsize, /* maxsize */ 1167265236Sken 1, /* nsegments */ 1168265236Sken rsize, /* maxsegsize */ 1169265236Sken 0, /* flags */ 1170265236Sken NULL, NULL, /* lockfunc, lockarg */ 1171265236Sken &sc->reply_dmat)) { 1172265236Sken device_printf(sc->mpr_dev, "Cannot allocate replies DMA tag\n"); 1173265236Sken return (ENOMEM); 1174265236Sken } 1175265236Sken if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames, 1176265236Sken BUS_DMA_NOWAIT, &sc->reply_map)) { 1177265236Sken device_printf(sc->mpr_dev, "Cannot allocate replies memory\n"); 1178265236Sken return (ENOMEM); 1179265236Sken } 1180265236Sken bzero(sc->reply_frames, rsize); 1181265236Sken bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize, 1182265236Sken mpr_memaddr_cb, &sc->reply_busaddr, 0); 1183265236Sken 1184265236Sken return (0); 1185265236Sken} 1186265236Sken 1187265236Skenstatic int 1188265236Skenmpr_alloc_requests(struct mpr_softc *sc) 1189265236Sken{ 1190265236Sken struct mpr_command *cm; 1191265236Sken struct mpr_chain *chain; 1192265236Sken int i, rsize, nsegs; 1193265236Sken 1194265236Sken rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4; 1195265236Sken if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1196265236Sken 16, 0, /* algnmnt, boundary */ 1197265236Sken BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1198265236Sken BUS_SPACE_MAXADDR, /* highaddr */ 1199265236Sken NULL, NULL, /* filter, filterarg */ 1200265236Sken rsize, /* maxsize */ 1201265236Sken 1, /* nsegments */ 1202265236Sken rsize, /* maxsegsize */ 1203265236Sken 0, /* flags */ 1204265236Sken NULL, NULL, /* lockfunc, lockarg */ 1205265236Sken &sc->req_dmat)) { 1206265236Sken device_printf(sc->mpr_dev, "Cannot allocate request DMA tag\n"); 1207265236Sken return (ENOMEM); 1208265236Sken } 1209265236Sken if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames, 1210265236Sken BUS_DMA_NOWAIT, &sc->req_map)) { 1211265236Sken device_printf(sc->mpr_dev, "Cannot allocate request memory\n"); 1212265236Sken return (ENOMEM); 1213265236Sken } 1214265236Sken bzero(sc->req_frames, rsize); 1215265236Sken bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize, 1216265236Sken mpr_memaddr_cb, &sc->req_busaddr, 0); 1217265236Sken 1218299266Sslm /* 1219299266Sslm * Gen3 and beyond uses the IOCMaxChainSegmentSize from IOC Facts to 1220299266Sslm * get the size of a Chain Frame. Previous versions use the size as a 1221299266Sslm * Request Frame for the Chain Frame size. If IOCMaxChainSegmentSize 1222299266Sslm * is 0, use the default value. The IOCMaxChainSegmentSize is the 1223299266Sslm * number of 16-byte elelements that can fit in a Chain Frame, which is 1224299266Sslm * the size of an IEEE Simple SGE. 1225299266Sslm */ 1226299266Sslm if (sc->facts->MsgVersion >= MPI2_VERSION_02_05) { 1227299266Sslm sc->chain_seg_size = 1228299266Sslm htole16(sc->facts->IOCMaxChainSegmentSize); 1229299266Sslm if (sc->chain_seg_size == 0) { 1230299266Sslm sc->chain_frame_size = MPR_DEFAULT_CHAIN_SEG_SIZE * 1231299266Sslm MPR_MAX_CHAIN_ELEMENT_SIZE; 1232299266Sslm } else { 1233299266Sslm sc->chain_frame_size = sc->chain_seg_size * 1234299266Sslm MPR_MAX_CHAIN_ELEMENT_SIZE; 1235299266Sslm } 1236299266Sslm } else { 1237299266Sslm sc->chain_frame_size = sc->facts->IOCRequestFrameSize * 4; 1238299266Sslm } 1239299266Sslm rsize = sc->chain_frame_size * sc->max_chains; 1240265236Sken if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1241265236Sken 16, 0, /* algnmnt, boundary */ 1242265236Sken BUS_SPACE_MAXADDR, /* lowaddr */ 1243265236Sken BUS_SPACE_MAXADDR, /* highaddr */ 1244265236Sken NULL, NULL, /* filter, filterarg */ 1245265236Sken rsize, /* maxsize */ 1246265236Sken 1, /* nsegments */ 1247265236Sken rsize, /* maxsegsize */ 1248265236Sken 0, /* flags */ 1249265236Sken NULL, NULL, /* lockfunc, lockarg */ 1250265236Sken &sc->chain_dmat)) { 1251265236Sken device_printf(sc->mpr_dev, "Cannot allocate chain DMA tag\n"); 1252265236Sken return (ENOMEM); 1253265236Sken } 1254265236Sken if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames, 1255265236Sken BUS_DMA_NOWAIT, &sc->chain_map)) { 1256265236Sken device_printf(sc->mpr_dev, "Cannot allocate chain memory\n"); 1257265236Sken return (ENOMEM); 1258265236Sken } 1259265236Sken bzero(sc->chain_frames, rsize); 1260265236Sken bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize, 1261265236Sken mpr_memaddr_cb, &sc->chain_busaddr, 0); 1262265236Sken 1263265236Sken rsize = MPR_SENSE_LEN * sc->num_reqs; 1264265236Sken if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1265265236Sken 1, 0, /* algnmnt, boundary */ 1266265236Sken BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1267265236Sken BUS_SPACE_MAXADDR, /* highaddr */ 1268265236Sken NULL, NULL, /* filter, filterarg */ 1269265236Sken rsize, /* maxsize */ 1270265236Sken 1, /* nsegments */ 1271265236Sken rsize, /* maxsegsize */ 1272265236Sken 0, /* flags */ 1273265236Sken NULL, NULL, /* lockfunc, lockarg */ 1274265236Sken &sc->sense_dmat)) { 1275265236Sken device_printf(sc->mpr_dev, "Cannot allocate sense DMA tag\n"); 1276265236Sken return (ENOMEM); 1277265236Sken } 1278265236Sken if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames, 1279265236Sken BUS_DMA_NOWAIT, &sc->sense_map)) { 1280265236Sken device_printf(sc->mpr_dev, "Cannot allocate sense memory\n"); 1281265236Sken return (ENOMEM); 1282265236Sken } 1283265236Sken bzero(sc->sense_frames, rsize); 1284265236Sken bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize, 1285265236Sken mpr_memaddr_cb, &sc->sense_busaddr, 0); 1286265236Sken 1287265236Sken sc->chains = malloc(sizeof(struct mpr_chain) * sc->max_chains, M_MPR, 1288265236Sken M_WAITOK | M_ZERO); 1289265236Sken if (!sc->chains) { 1290265236Sken device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n", 1291265236Sken __func__, __LINE__); 1292265236Sken return (ENOMEM); 1293265236Sken } 1294265236Sken for (i = 0; i < sc->max_chains; i++) { 1295265236Sken chain = &sc->chains[i]; 1296265236Sken chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames + 1297299266Sslm i * sc->chain_frame_size); 1298265236Sken chain->chain_busaddr = sc->chain_busaddr + 1299299266Sslm i * sc->chain_frame_size; 1300265236Sken mpr_free_chain(sc, chain); 1301265236Sken sc->chain_free_lowwater++; 1302265236Sken } 1303265236Sken 1304319435Sslm /* 1305319435Sslm * Allocate NVMe PRP Pages for NVMe SGL support only if the FW supports 1306319435Sslm * these devices. 1307319435Sslm */ 1308319435Sslm if ((sc->facts->MsgVersion >= MPI2_VERSION_02_06) && 1309319435Sslm (sc->facts->ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_NVME_DEVICES)) { 1310319435Sslm if (mpr_alloc_nvme_prp_pages(sc) == ENOMEM) 1311319435Sslm return (ENOMEM); 1312319435Sslm } 1313319435Sslm 1314265236Sken /* XXX Need to pick a more precise value */ 1315265236Sken nsegs = (MAXPHYS / PAGE_SIZE) + 1; 1316265236Sken if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1317265236Sken 1, 0, /* algnmnt, boundary */ 1318265236Sken BUS_SPACE_MAXADDR, /* lowaddr */ 1319265236Sken BUS_SPACE_MAXADDR, /* highaddr */ 1320265236Sken NULL, NULL, /* filter, filterarg */ 1321265236Sken BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 1322265236Sken nsegs, /* nsegments */ 1323265236Sken BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 1324265236Sken BUS_DMA_ALLOCNOW, /* flags */ 1325265236Sken busdma_lock_mutex, /* lockfunc */ 1326265236Sken &sc->mpr_mtx, /* lockarg */ 1327265236Sken &sc->buffer_dmat)) { 1328265236Sken device_printf(sc->mpr_dev, "Cannot allocate buffer DMA tag\n"); 1329265236Sken return (ENOMEM); 1330265236Sken } 1331265236Sken 1332265236Sken /* 1333265236Sken * SMID 0 cannot be used as a free command per the firmware spec. 1334265236Sken * Just drop that command instead of risking accounting bugs. 1335265236Sken */ 1336265236Sken sc->commands = malloc(sizeof(struct mpr_command) * sc->num_reqs, 1337265236Sken M_MPR, M_WAITOK | M_ZERO); 1338265236Sken if (!sc->commands) { 1339265236Sken device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n", 1340265236Sken __func__, __LINE__); 1341265236Sken return (ENOMEM); 1342265236Sken } 1343265236Sken for (i = 1; i < sc->num_reqs; i++) { 1344265236Sken cm = &sc->commands[i]; 1345265236Sken cm->cm_req = sc->req_frames + 1346265236Sken i * sc->facts->IOCRequestFrameSize * 4; 1347265236Sken cm->cm_req_busaddr = sc->req_busaddr + 1348265236Sken i * sc->facts->IOCRequestFrameSize * 4; 1349265236Sken cm->cm_sense = &sc->sense_frames[i]; 1350265236Sken cm->cm_sense_busaddr = sc->sense_busaddr + i * MPR_SENSE_LEN; 1351265236Sken cm->cm_desc.Default.SMID = i; 1352265236Sken cm->cm_sc = sc; 1353265236Sken TAILQ_INIT(&cm->cm_chain_list); 1354319435Sslm TAILQ_INIT(&cm->cm_prp_page_list); 1355265236Sken callout_init_mtx(&cm->cm_callout, &sc->mpr_mtx, 0); 1356265236Sken 1357265236Sken /* XXX Is a failure here a critical problem? */ 1358319435Sslm if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) 1359319435Sslm == 0) { 1360265236Sken if (i <= sc->facts->HighPriorityCredit) 1361265236Sken mpr_free_high_priority_command(sc, cm); 1362265236Sken else 1363265236Sken mpr_free_command(sc, cm); 1364319435Sslm } else { 1365265236Sken panic("failed to allocate command %d\n", i); 1366265236Sken sc->num_reqs = i; 1367265236Sken break; 1368265236Sken } 1369265236Sken } 1370265236Sken 1371265236Sken return (0); 1372265236Sken} 1373265236Sken 1374319435Sslm/* 1375319435Sslm * Allocate contiguous buffers for PCIe NVMe devices for building native PRPs, 1376319435Sslm * which are scatter/gather lists for NVMe devices. 1377319435Sslm * 1378319435Sslm * This buffer must be contiguous due to the nature of how NVMe PRPs are built 1379319435Sslm * and translated by FW. 1380319435Sslm * 1381319435Sslm * returns ENOMEM if memory could not be allocated, otherwise returns 0. 1382319435Sslm */ 1383265236Skenstatic int 1384319435Sslmmpr_alloc_nvme_prp_pages(struct mpr_softc *sc) 1385319435Sslm{ 1386319435Sslm int PRPs_per_page, PRPs_required, pages_required; 1387319435Sslm int rsize, i; 1388319435Sslm struct mpr_prp_page *prp_page; 1389319435Sslm 1390319435Sslm /* 1391319435Sslm * Assuming a MAX_IO_SIZE of 1MB and a PAGE_SIZE of 4k, the max number 1392319435Sslm * of PRPs (NVMe's Scatter/Gather Element) needed per I/O is: 1393319435Sslm * MAX_IO_SIZE / PAGE_SIZE = 256 1394319435Sslm * 1395319435Sslm * 1 PRP entry in main frame for PRP list pointer still leaves 255 PRPs 1396319435Sslm * required for the remainder of the 1MB I/O. 512 PRPs can fit into one 1397319435Sslm * page (4096 / 8 = 512), so only one page is required for each I/O. 1398319435Sslm * 1399319435Sslm * Each of these buffers will need to be contiguous. For simplicity, 1400319435Sslm * only one buffer is allocated here, which has all of the space 1401319435Sslm * required for the NVMe Queue Depth. If there are problems allocating 1402319435Sslm * this one buffer, this function will need to change to allocate 1403319435Sslm * individual, contiguous NVME_QDEPTH buffers. 1404319435Sslm * 1405319435Sslm * The real calculation will use the real max io size. Above is just an 1406319435Sslm * example. 1407319435Sslm * 1408319435Sslm */ 1409319435Sslm PRPs_required = sc->maxio / PAGE_SIZE; 1410319435Sslm PRPs_per_page = (PAGE_SIZE / PRP_ENTRY_SIZE) - 1; 1411319435Sslm pages_required = (PRPs_required / PRPs_per_page) + 1; 1412319435Sslm 1413319435Sslm sc->prp_buffer_size = PAGE_SIZE * pages_required; 1414319435Sslm rsize = sc->prp_buffer_size * NVME_QDEPTH; 1415319435Sslm if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1416319435Sslm 4, 0, /* algnmnt, boundary */ 1417319435Sslm BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1418319435Sslm BUS_SPACE_MAXADDR, /* highaddr */ 1419319435Sslm NULL, NULL, /* filter, filterarg */ 1420319435Sslm rsize, /* maxsize */ 1421319435Sslm 1, /* nsegments */ 1422319435Sslm rsize, /* maxsegsize */ 1423319435Sslm 0, /* flags */ 1424319435Sslm NULL, NULL, /* lockfunc, lockarg */ 1425319435Sslm &sc->prp_page_dmat)) { 1426319435Sslm device_printf(sc->mpr_dev, "Cannot allocate NVMe PRP DMA " 1427319435Sslm "tag\n"); 1428319435Sslm return (ENOMEM); 1429319435Sslm } 1430319435Sslm if (bus_dmamem_alloc(sc->prp_page_dmat, (void **)&sc->prp_pages, 1431319435Sslm BUS_DMA_NOWAIT, &sc->prp_page_map)) { 1432319435Sslm device_printf(sc->mpr_dev, "Cannot allocate NVMe PRP memory\n"); 1433319435Sslm return (ENOMEM); 1434319435Sslm } 1435319435Sslm bzero(sc->prp_pages, rsize); 1436319435Sslm bus_dmamap_load(sc->prp_page_dmat, sc->prp_page_map, sc->prp_pages, 1437319435Sslm rsize, mpr_memaddr_cb, &sc->prp_page_busaddr, 0); 1438319435Sslm 1439319435Sslm sc->prps = malloc(sizeof(struct mpr_prp_page) * NVME_QDEPTH, M_MPR, 1440319435Sslm M_WAITOK | M_ZERO); 1441319435Sslm for (i = 0; i < NVME_QDEPTH; i++) { 1442319435Sslm prp_page = &sc->prps[i]; 1443319435Sslm prp_page->prp_page = (uint64_t *)(sc->prp_pages + 1444319435Sslm i * sc->prp_buffer_size); 1445319435Sslm prp_page->prp_page_busaddr = (uint64_t)(sc->prp_page_busaddr + 1446319435Sslm i * sc->prp_buffer_size); 1447319435Sslm mpr_free_prp_page(sc, prp_page); 1448319435Sslm sc->prp_pages_free_lowwater++; 1449319435Sslm } 1450319435Sslm 1451319435Sslm return (0); 1452319435Sslm} 1453319435Sslm 1454319435Sslmstatic int 1455265236Skenmpr_init_queues(struct mpr_softc *sc) 1456265236Sken{ 1457265236Sken int i; 1458265236Sken 1459265236Sken memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); 1460265236Sken 1461265236Sken /* 1462265236Sken * According to the spec, we need to use one less reply than we 1463265236Sken * have space for on the queue. So sc->num_replies (the number we 1464265236Sken * use) should be less than sc->fqdepth (allocated size). 1465265236Sken */ 1466265236Sken if (sc->num_replies >= sc->fqdepth) 1467265236Sken return (EINVAL); 1468265236Sken 1469265236Sken /* 1470265236Sken * Initialize all of the free queue entries. 1471265236Sken */ 1472319435Sslm for (i = 0; i < sc->fqdepth; i++) { 1473319435Sslm sc->free_queue[i] = sc->reply_busaddr + 1474319435Sslm (i * sc->facts->ReplyFrameSize * 4); 1475319435Sslm } 1476265236Sken sc->replyfreeindex = sc->num_replies; 1477265236Sken 1478265236Sken return (0); 1479265236Sken} 1480265236Sken 1481265236Sken/* Get the driver parameter tunables. Lowest priority are the driver defaults. 1482265236Sken * Next are the global settings, if they exist. Highest are the per-unit 1483265236Sken * settings, if they exist. 1484265236Sken */ 1485265236Skenstatic void 1486265236Skenmpr_get_tunables(struct mpr_softc *sc) 1487265236Sken{ 1488265236Sken char tmpstr[80]; 1489265236Sken 1490265236Sken /* XXX default to some debugging for now */ 1491265236Sken sc->mpr_debug = MPR_INFO | MPR_FAULT; 1492265236Sken sc->disable_msix = 0; 1493265236Sken sc->disable_msi = 0; 1494265236Sken sc->max_chains = MPR_CHAIN_FRAMES; 1495303029Sslm sc->max_io_pages = MPR_MAXIO_PAGES; 1496283661Sslm sc->enable_ssu = MPR_SSU_ENABLE_SSD_DISABLE_HDD; 1497283661Sslm sc->spinup_wait_time = DEFAULT_SPINUP_WAIT; 1498319435Sslm sc->use_phynum = 1; 1499265236Sken 1500265236Sken /* 1501265236Sken * Grab the global variables. 1502265236Sken */ 1503265236Sken TUNABLE_INT_FETCH("hw.mpr.debug_level", &sc->mpr_debug); 1504265236Sken TUNABLE_INT_FETCH("hw.mpr.disable_msix", &sc->disable_msix); 1505265236Sken TUNABLE_INT_FETCH("hw.mpr.disable_msi", &sc->disable_msi); 1506265236Sken TUNABLE_INT_FETCH("hw.mpr.max_chains", &sc->max_chains); 1507303029Sslm TUNABLE_INT_FETCH("hw.mpr.max_io_pages", &sc->max_io_pages); 1508283661Sslm TUNABLE_INT_FETCH("hw.mpr.enable_ssu", &sc->enable_ssu); 1509283661Sslm TUNABLE_INT_FETCH("hw.mpr.spinup_wait_time", &sc->spinup_wait_time); 1510319435Sslm TUNABLE_INT_FETCH("hw.mpr.use_phy_num", &sc->use_phynum); 1511265236Sken 1512265236Sken /* Grab the unit-instance variables */ 1513265236Sken snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.debug_level", 1514265236Sken device_get_unit(sc->mpr_dev)); 1515265236Sken TUNABLE_INT_FETCH(tmpstr, &sc->mpr_debug); 1516265236Sken 1517265236Sken snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.disable_msix", 1518265236Sken device_get_unit(sc->mpr_dev)); 1519265236Sken TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix); 1520265236Sken 1521265236Sken snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.disable_msi", 1522265236Sken device_get_unit(sc->mpr_dev)); 1523265236Sken TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi); 1524265236Sken 1525265236Sken snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.max_chains", 1526265236Sken device_get_unit(sc->mpr_dev)); 1527265236Sken TUNABLE_INT_FETCH(tmpstr, &sc->max_chains); 1528265236Sken 1529303029Sslm snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.max_io_pages", 1530303029Sslm device_get_unit(sc->mpr_dev)); 1531303029Sslm TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages); 1532303029Sslm 1533265236Sken bzero(sc->exclude_ids, sizeof(sc->exclude_ids)); 1534265236Sken snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.exclude_ids", 1535265236Sken device_get_unit(sc->mpr_dev)); 1536265236Sken TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids)); 1537283661Sslm 1538283661Sslm snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.enable_ssu", 1539283661Sslm device_get_unit(sc->mpr_dev)); 1540283661Sslm TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu); 1541283661Sslm 1542283661Sslm snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.spinup_wait_time", 1543283661Sslm device_get_unit(sc->mpr_dev)); 1544283661Sslm TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time); 1545319435Sslm 1546319435Sslm snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.use_phy_num", 1547319435Sslm device_get_unit(sc->mpr_dev)); 1548319435Sslm TUNABLE_INT_FETCH(tmpstr, &sc->use_phynum); 1549265236Sken} 1550265236Sken 1551265236Skenstatic void 1552265236Skenmpr_setup_sysctl(struct mpr_softc *sc) 1553265236Sken{ 1554265236Sken struct sysctl_ctx_list *sysctl_ctx = NULL; 1555265236Sken struct sysctl_oid *sysctl_tree = NULL; 1556265236Sken char tmpstr[80], tmpstr2[80]; 1557265236Sken 1558265236Sken /* 1559265236Sken * Setup the sysctl variable so the user can change the debug level 1560265236Sken * on the fly. 1561265236Sken */ 1562265236Sken snprintf(tmpstr, sizeof(tmpstr), "MPR controller %d", 1563265236Sken device_get_unit(sc->mpr_dev)); 1564265236Sken snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mpr_dev)); 1565265236Sken 1566265236Sken sysctl_ctx = device_get_sysctl_ctx(sc->mpr_dev); 1567265236Sken if (sysctl_ctx != NULL) 1568265236Sken sysctl_tree = device_get_sysctl_tree(sc->mpr_dev); 1569265236Sken 1570265236Sken if (sysctl_tree == NULL) { 1571265236Sken sysctl_ctx_init(&sc->sysctl_ctx); 1572265236Sken sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 1573265236Sken SYSCTL_STATIC_CHILDREN(_hw_mpr), OID_AUTO, tmpstr2, 1574265236Sken CTLFLAG_RD, 0, tmpstr); 1575265236Sken if (sc->sysctl_tree == NULL) 1576265236Sken return; 1577265236Sken sysctl_ctx = &sc->sysctl_ctx; 1578265236Sken sysctl_tree = sc->sysctl_tree; 1579265236Sken } 1580265236Sken 1581265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1582265236Sken OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mpr_debug, 0, 1583265236Sken "mpr debug level"); 1584265236Sken 1585265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1586265236Sken OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0, 1587265236Sken "Disable the use of MSI-X interrupts"); 1588265236Sken 1589265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1590265236Sken OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0, 1591265236Sken "Disable the use of MSI interrupts"); 1592265236Sken 1593265236Sken SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1594273377Shselasky OID_AUTO, "firmware_version", CTLFLAG_RW, sc->fw_version, 1595265236Sken strlen(sc->fw_version), "firmware version"); 1596265236Sken 1597265236Sken SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1598265236Sken OID_AUTO, "driver_version", CTLFLAG_RW, MPR_DRIVER_VERSION, 1599265236Sken strlen(MPR_DRIVER_VERSION), "driver version"); 1600265236Sken 1601265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1602265236Sken OID_AUTO, "io_cmds_active", CTLFLAG_RD, 1603265236Sken &sc->io_cmds_active, 0, "number of currently active commands"); 1604265236Sken 1605265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1606265236Sken OID_AUTO, "io_cmds_highwater", CTLFLAG_RD, 1607265236Sken &sc->io_cmds_highwater, 0, "maximum active commands seen"); 1608265236Sken 1609265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1610265236Sken OID_AUTO, "chain_free", CTLFLAG_RD, 1611265236Sken &sc->chain_free, 0, "number of free chain elements"); 1612265236Sken 1613265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1614265236Sken OID_AUTO, "chain_free_lowwater", CTLFLAG_RD, 1615265236Sken &sc->chain_free_lowwater, 0,"lowest number of free chain elements"); 1616265236Sken 1617265236Sken SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1618265236Sken OID_AUTO, "max_chains", CTLFLAG_RD, 1619265236Sken &sc->max_chains, 0,"maximum chain frames that will be allocated"); 1620265236Sken 1621283661Sslm SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1622303029Sslm OID_AUTO, "max_io_pages", CTLFLAG_RD, 1623303029Sslm &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use " 1624303029Sslm "IOCFacts)"); 1625303029Sslm 1626303029Sslm SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1627283661Sslm OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0, 1628283661Sslm "enable SSU to SATA SSD/HDD at shutdown"); 1629283661Sslm 1630265236Sken SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1631265236Sken OID_AUTO, "chain_alloc_fail", CTLFLAG_RD, 1632265236Sken &sc->chain_alloc_fail, "chain allocation failures"); 1633283661Sslm 1634283661Sslm SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1635283661Sslm OID_AUTO, "spinup_wait_time", CTLFLAG_RD, 1636283661Sslm &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for " 1637283661Sslm "spinup after SATA ID error"); 1638319435Sslm 1639319435Sslm SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1640319435Sslm OID_AUTO, "use_phy_num", CTLFLAG_RD, &sc->use_phynum, 0, 1641319435Sslm "Use the phy number for enumeration"); 1642319435Sslm 1643319435Sslm SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1644319435Sslm OID_AUTO, "prp_pages_free", CTLFLAG_RD, 1645319435Sslm &sc->prp_pages_free, 0, "number of free PRP pages"); 1646319435Sslm 1647319435Sslm SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1648319435Sslm OID_AUTO, "prp_pages_free_lowwater", CTLFLAG_RD, 1649319435Sslm &sc->prp_pages_free_lowwater, 0,"lowest number of free PRP pages"); 1650319435Sslm 1651319435Sslm SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1652319435Sslm OID_AUTO, "prp_page_alloc_fail", CTLFLAG_RD, 1653319435Sslm &sc->prp_page_alloc_fail, "PRP page allocation failures"); 1654265236Sken} 1655265236Sken 1656265236Skenint 1657265236Skenmpr_attach(struct mpr_softc *sc) 1658265236Sken{ 1659265236Sken int error; 1660265236Sken 1661265236Sken mpr_get_tunables(sc); 1662265236Sken 1663265236Sken MPR_FUNCTRACE(sc); 1664265236Sken 1665265236Sken mtx_init(&sc->mpr_mtx, "MPR lock", NULL, MTX_DEF); 1666265236Sken callout_init_mtx(&sc->periodic, &sc->mpr_mtx, 0); 1667319446Sslm callout_init_mtx(&sc->device_check_callout, &sc->mpr_mtx, 0); 1668265236Sken TAILQ_INIT(&sc->event_list); 1669265236Sken timevalclear(&sc->lastfail); 1670265236Sken 1671265236Sken if ((error = mpr_transition_ready(sc)) != 0) { 1672265236Sken mpr_printf(sc, "%s failed to transition ready\n", __func__); 1673265236Sken return (error); 1674265236Sken } 1675265236Sken 1676265236Sken sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPR, 1677265236Sken M_ZERO|M_NOWAIT); 1678265236Sken if (!sc->facts) { 1679265236Sken device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n", 1680265236Sken __func__, __LINE__); 1681265236Sken return (ENOMEM); 1682265236Sken } 1683265236Sken 1684265236Sken /* 1685265236Sken * Get IOC Facts and allocate all structures based on this information. 1686265236Sken * A Diag Reset will also call mpr_iocfacts_allocate and re-read the IOC 1687265236Sken * Facts. If relevant values have changed in IOC Facts, this function 1688265236Sken * will free all of the memory based on IOC Facts and reallocate that 1689265236Sken * memory. If this fails, any allocated memory should already be freed. 1690265236Sken */ 1691265236Sken if ((error = mpr_iocfacts_allocate(sc, TRUE)) != 0) { 1692265236Sken mpr_dprint(sc, MPR_FAULT, "%s IOC Facts based allocation " 1693265236Sken "failed with error %d\n", __func__, error); 1694265236Sken return (error); 1695265236Sken } 1696265236Sken 1697265236Sken /* Start the periodic watchdog check on the IOC Doorbell */ 1698265236Sken mpr_periodic(sc); 1699265236Sken 1700265236Sken /* 1701265236Sken * The portenable will kick off discovery events that will drive the 1702265236Sken * rest of the initialization process. The CAM/SAS module will 1703265236Sken * hold up the boot sequence until discovery is complete. 1704265236Sken */ 1705265236Sken sc->mpr_ich.ich_func = mpr_startup; 1706265236Sken sc->mpr_ich.ich_arg = sc; 1707265236Sken if (config_intrhook_establish(&sc->mpr_ich) != 0) { 1708265236Sken mpr_dprint(sc, MPR_ERROR, "Cannot establish MPR config hook\n"); 1709265236Sken error = EINVAL; 1710265236Sken } 1711265236Sken 1712265236Sken /* 1713265236Sken * Allow IR to shutdown gracefully when shutdown occurs. 1714265236Sken */ 1715265236Sken sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, 1716265236Sken mprsas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT); 1717265236Sken 1718265236Sken if (sc->shutdown_eh == NULL) 1719265236Sken mpr_dprint(sc, MPR_ERROR, "shutdown event registration " 1720265236Sken "failed\n"); 1721265236Sken 1722265236Sken mpr_setup_sysctl(sc); 1723265236Sken 1724265236Sken sc->mpr_flags |= MPR_FLAGS_ATTACH_DONE; 1725265236Sken 1726265236Sken return (error); 1727265236Sken} 1728265236Sken 1729265236Sken/* Run through any late-start handlers. */ 1730265236Skenstatic void 1731265236Skenmpr_startup(void *arg) 1732265236Sken{ 1733265236Sken struct mpr_softc *sc; 1734265236Sken 1735265236Sken sc = (struct mpr_softc *)arg; 1736265236Sken 1737265236Sken mpr_lock(sc); 1738265236Sken mpr_unmask_intr(sc); 1739265236Sken 1740265236Sken /* initialize device mapping tables */ 1741265236Sken mpr_base_static_config_pages(sc); 1742265236Sken mpr_mapping_initialize(sc); 1743265236Sken mprsas_startup(sc); 1744265236Sken mpr_unlock(sc); 1745265236Sken} 1746265236Sken 1747265236Sken/* Periodic watchdog. Is called with the driver lock already held. */ 1748265236Skenstatic void 1749265236Skenmpr_periodic(void *arg) 1750265236Sken{ 1751265236Sken struct mpr_softc *sc; 1752265236Sken uint32_t db; 1753265236Sken 1754265236Sken sc = (struct mpr_softc *)arg; 1755265236Sken if (sc->mpr_flags & MPR_FLAGS_SHUTDOWN) 1756265236Sken return; 1757265236Sken 1758265236Sken db = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 1759265236Sken if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 1760265236Sken if ((db & MPI2_DOORBELL_FAULT_CODE_MASK) == 1761265236Sken IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED) { 1762265236Sken panic("TEMPERATURE FAULT: STOPPING."); 1763265236Sken } 1764265236Sken mpr_dprint(sc, MPR_FAULT, "IOC Fault 0x%08x, Resetting\n", db); 1765265236Sken mpr_reinit(sc); 1766265236Sken } 1767265236Sken 1768265236Sken callout_reset(&sc->periodic, MPR_PERIODIC_DELAY * hz, mpr_periodic, sc); 1769265236Sken} 1770265236Sken 1771265236Skenstatic void 1772265236Skenmpr_log_evt_handler(struct mpr_softc *sc, uintptr_t data, 1773265236Sken MPI2_EVENT_NOTIFICATION_REPLY *event) 1774265236Sken{ 1775265236Sken MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry; 1776265236Sken 1777265236Sken mpr_print_event(sc, event); 1778265236Sken 1779265236Sken switch (event->Event) { 1780265236Sken case MPI2_EVENT_LOG_DATA: 1781265236Sken mpr_dprint(sc, MPR_EVENT, "MPI2_EVENT_LOG_DATA:\n"); 1782265236Sken if (sc->mpr_debug & MPR_EVENT) 1783265236Sken hexdump(event->EventData, event->EventDataLength, NULL, 1784265236Sken 0); 1785265236Sken break; 1786265236Sken case MPI2_EVENT_LOG_ENTRY_ADDED: 1787265236Sken entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData; 1788265236Sken mpr_dprint(sc, MPR_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event " 1789265236Sken "0x%x Sequence %d:\n", entry->LogEntryQualifier, 1790265236Sken entry->LogSequence); 1791265236Sken break; 1792265236Sken default: 1793265236Sken break; 1794265236Sken } 1795265236Sken return; 1796265236Sken} 1797265236Sken 1798265236Skenstatic int 1799265236Skenmpr_attach_log(struct mpr_softc *sc) 1800265236Sken{ 1801265236Sken uint8_t events[16]; 1802265236Sken 1803265236Sken bzero(events, 16); 1804265236Sken setbit(events, MPI2_EVENT_LOG_DATA); 1805265236Sken setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED); 1806265236Sken 1807265236Sken mpr_register_events(sc, events, mpr_log_evt_handler, NULL, 1808265236Sken &sc->mpr_log_eh); 1809265236Sken 1810265236Sken return (0); 1811265236Sken} 1812265236Sken 1813265236Skenstatic int 1814265236Skenmpr_detach_log(struct mpr_softc *sc) 1815265236Sken{ 1816265236Sken 1817265236Sken if (sc->mpr_log_eh != NULL) 1818265236Sken mpr_deregister_events(sc, sc->mpr_log_eh); 1819265236Sken return (0); 1820265236Sken} 1821265236Sken 1822265236Sken/* 1823265236Sken * Free all of the driver resources and detach submodules. Should be called 1824265236Sken * without the lock held. 1825265236Sken */ 1826265236Skenint 1827265236Skenmpr_free(struct mpr_softc *sc) 1828265236Sken{ 1829265236Sken int error; 1830265236Sken 1831265236Sken /* Turn off the watchdog */ 1832265236Sken mpr_lock(sc); 1833265236Sken sc->mpr_flags |= MPR_FLAGS_SHUTDOWN; 1834265236Sken mpr_unlock(sc); 1835265236Sken /* Lock must not be held for this */ 1836265236Sken callout_drain(&sc->periodic); 1837319446Sslm callout_drain(&sc->device_check_callout); 1838265236Sken 1839265236Sken if (((error = mpr_detach_log(sc)) != 0) || 1840265236Sken ((error = mpr_detach_sas(sc)) != 0)) 1841265236Sken return (error); 1842265236Sken 1843265236Sken mpr_detach_user(sc); 1844265236Sken 1845265236Sken /* Put the IOC back in the READY state. */ 1846265236Sken mpr_lock(sc); 1847265236Sken if ((error = mpr_transition_ready(sc)) != 0) { 1848265236Sken mpr_unlock(sc); 1849265236Sken return (error); 1850265236Sken } 1851265236Sken mpr_unlock(sc); 1852265236Sken 1853265236Sken if (sc->facts != NULL) 1854265236Sken free(sc->facts, M_MPR); 1855265236Sken 1856265236Sken /* 1857265236Sken * Free all buffers that are based on IOC Facts. A Diag Reset may need 1858265236Sken * to free these buffers too. 1859265236Sken */ 1860265236Sken mpr_iocfacts_free(sc); 1861265236Sken 1862265236Sken if (sc->sysctl_tree != NULL) 1863265236Sken sysctl_ctx_free(&sc->sysctl_ctx); 1864265236Sken 1865265236Sken /* Deregister the shutdown function */ 1866265236Sken if (sc->shutdown_eh != NULL) 1867265236Sken EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh); 1868265236Sken 1869265236Sken mtx_destroy(&sc->mpr_mtx); 1870265236Sken 1871265236Sken return (0); 1872265236Sken} 1873265236Sken 1874265236Skenstatic __inline void 1875265236Skenmpr_complete_command(struct mpr_softc *sc, struct mpr_command *cm) 1876265236Sken{ 1877265236Sken MPR_FUNCTRACE(sc); 1878265236Sken 1879265236Sken if (cm == NULL) { 1880265236Sken mpr_dprint(sc, MPR_ERROR, "Completing NULL command\n"); 1881265236Sken return; 1882265236Sken } 1883265236Sken 1884265236Sken if (cm->cm_flags & MPR_CM_FLAGS_POLLED) 1885265236Sken cm->cm_flags |= MPR_CM_FLAGS_COMPLETE; 1886265236Sken 1887265236Sken if (cm->cm_complete != NULL) { 1888265236Sken mpr_dprint(sc, MPR_TRACE, 1889299265Sslm "%s cm %p calling cm_complete %p data %p reply %p\n", 1890299265Sslm __func__, cm, cm->cm_complete, cm->cm_complete_data, 1891299265Sslm cm->cm_reply); 1892265236Sken cm->cm_complete(sc, cm); 1893265236Sken } 1894265236Sken 1895265236Sken if (cm->cm_flags & MPR_CM_FLAGS_WAKEUP) { 1896265236Sken mpr_dprint(sc, MPR_TRACE, "waking up %p\n", cm); 1897265236Sken wakeup(cm); 1898265236Sken } 1899265236Sken 1900265236Sken if (sc->io_cmds_active != 0) { 1901265236Sken sc->io_cmds_active--; 1902265236Sken } else { 1903265236Sken mpr_dprint(sc, MPR_ERROR, "Warning: io_cmds_active is " 1904265236Sken "out of sync - resynching to 0\n"); 1905265236Sken } 1906265236Sken} 1907265236Sken 1908265236Skenstatic void 1909265236Skenmpr_sas_log_info(struct mpr_softc *sc , u32 log_info) 1910265236Sken{ 1911265236Sken union loginfo_type { 1912265236Sken u32 loginfo; 1913265236Sken struct { 1914265236Sken u32 subcode:16; 1915265236Sken u32 code:8; 1916265236Sken u32 originator:4; 1917265236Sken u32 bus_type:4; 1918265236Sken } dw; 1919265236Sken }; 1920265236Sken union loginfo_type sas_loginfo; 1921265236Sken char *originator_str = NULL; 1922265236Sken 1923265236Sken sas_loginfo.loginfo = log_info; 1924265236Sken if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 1925265236Sken return; 1926265236Sken 1927265236Sken /* each nexus loss loginfo */ 1928265236Sken if (log_info == 0x31170000) 1929265236Sken return; 1930265236Sken 1931265236Sken /* eat the loginfos associated with task aborts */ 1932265236Sken if ((log_info == 30050000) || (log_info == 0x31140000) || 1933265236Sken (log_info == 0x31130000)) 1934265236Sken return; 1935265236Sken 1936265236Sken switch (sas_loginfo.dw.originator) { 1937265236Sken case 0: 1938265236Sken originator_str = "IOP"; 1939265236Sken break; 1940265236Sken case 1: 1941265236Sken originator_str = "PL"; 1942265236Sken break; 1943265236Sken case 2: 1944265236Sken originator_str = "IR"; 1945265236Sken break; 1946265236Sken } 1947265236Sken 1948299268Sslm mpr_dprint(sc, MPR_LOG, "log_info(0x%08x): originator(%s), " 1949299265Sslm "code(0x%02x), sub_code(0x%04x)\n", log_info, originator_str, 1950299265Sslm sas_loginfo.dw.code, sas_loginfo.dw.subcode); 1951265236Sken} 1952265236Sken 1953265236Skenstatic void 1954265236Skenmpr_display_reply_info(struct mpr_softc *sc, uint8_t *reply) 1955265236Sken{ 1956265236Sken MPI2DefaultReply_t *mpi_reply; 1957265236Sken u16 sc_status; 1958265236Sken 1959265236Sken mpi_reply = (MPI2DefaultReply_t*)reply; 1960265236Sken sc_status = le16toh(mpi_reply->IOCStatus); 1961265236Sken if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 1962265236Sken mpr_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo)); 1963265236Sken} 1964265236Sken 1965265236Skenvoid 1966265236Skenmpr_intr(void *data) 1967265236Sken{ 1968265236Sken struct mpr_softc *sc; 1969265236Sken uint32_t status; 1970265236Sken 1971265236Sken sc = (struct mpr_softc *)data; 1972265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 1973265236Sken 1974265236Sken /* 1975265236Sken * Check interrupt status register to flush the bus. This is 1976265236Sken * needed for both INTx interrupts and driver-driven polling 1977265236Sken */ 1978265236Sken status = mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 1979265236Sken if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0) 1980265236Sken return; 1981265236Sken 1982265236Sken mpr_lock(sc); 1983265236Sken mpr_intr_locked(data); 1984265236Sken mpr_unlock(sc); 1985265236Sken return; 1986265236Sken} 1987265236Sken 1988265236Sken/* 1989265236Sken * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the 1990265236Sken * chip. Hopefully this theory is correct. 1991265236Sken */ 1992265236Skenvoid 1993265236Skenmpr_intr_msi(void *data) 1994265236Sken{ 1995265236Sken struct mpr_softc *sc; 1996265236Sken 1997265236Sken sc = (struct mpr_softc *)data; 1998265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 1999265236Sken mpr_lock(sc); 2000265236Sken mpr_intr_locked(data); 2001265236Sken mpr_unlock(sc); 2002265236Sken return; 2003265236Sken} 2004265236Sken 2005265236Sken/* 2006265236Sken * The locking is overly broad and simplistic, but easy to deal with for now. 2007265236Sken */ 2008265236Skenvoid 2009265236Skenmpr_intr_locked(void *data) 2010265236Sken{ 2011265236Sken MPI2_REPLY_DESCRIPTORS_UNION *desc; 2012265236Sken struct mpr_softc *sc; 2013265236Sken struct mpr_command *cm = NULL; 2014265236Sken uint8_t flags; 2015265236Sken u_int pq; 2016265236Sken MPI2_DIAG_RELEASE_REPLY *rel_rep; 2017265236Sken mpr_fw_diagnostic_buffer_t *pBuffer; 2018265236Sken 2019265236Sken sc = (struct mpr_softc *)data; 2020265236Sken 2021265236Sken pq = sc->replypostindex; 2022265236Sken mpr_dprint(sc, MPR_TRACE, 2023265236Sken "%s sc %p starting with replypostindex %u\n", 2024265236Sken __func__, sc, sc->replypostindex); 2025265236Sken 2026265236Sken for ( ;; ) { 2027265236Sken cm = NULL; 2028265236Sken desc = &sc->post_queue[sc->replypostindex]; 2029265236Sken flags = desc->Default.ReplyFlags & 2030265236Sken MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 2031265236Sken if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) || 2032265236Sken (le32toh(desc->Words.High) == 0xffffffff)) 2033265236Sken break; 2034265236Sken 2035265236Sken /* increment the replypostindex now, so that event handlers 2036265236Sken * and cm completion handlers which decide to do a diag 2037265236Sken * reset can zero it without it getting incremented again 2038265236Sken * afterwards, and we break out of this loop on the next 2039265236Sken * iteration since the reply post queue has been cleared to 2040265236Sken * 0xFF and all descriptors look unused (which they are). 2041265236Sken */ 2042265236Sken if (++sc->replypostindex >= sc->pqdepth) 2043265236Sken sc->replypostindex = 0; 2044265236Sken 2045265236Sken switch (flags) { 2046265236Sken case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS: 2047265236Sken case MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS: 2048319435Sslm case MPI26_RPY_DESCRIPT_FLAGS_PCIE_ENCAPSULATED_SUCCESS: 2049265236Sken cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)]; 2050265236Sken cm->cm_reply = NULL; 2051265236Sken break; 2052265236Sken case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY: 2053265236Sken { 2054265236Sken uint32_t baddr; 2055265236Sken uint8_t *reply; 2056265236Sken 2057265236Sken /* 2058265236Sken * Re-compose the reply address from the address 2059265236Sken * sent back from the chip. The ReplyFrameAddress 2060265236Sken * is the lower 32 bits of the physical address of 2061265236Sken * particular reply frame. Convert that address to 2062265236Sken * host format, and then use that to provide the 2063265236Sken * offset against the virtual address base 2064265236Sken * (sc->reply_frames). 2065265236Sken */ 2066265236Sken baddr = le32toh(desc->AddressReply.ReplyFrameAddress); 2067265236Sken reply = sc->reply_frames + 2068265236Sken (baddr - ((uint32_t)sc->reply_busaddr)); 2069265236Sken /* 2070265236Sken * Make sure the reply we got back is in a valid 2071265236Sken * range. If not, go ahead and panic here, since 2072265236Sken * we'll probably panic as soon as we deference the 2073265236Sken * reply pointer anyway. 2074265236Sken */ 2075265236Sken if ((reply < sc->reply_frames) 2076265236Sken || (reply > (sc->reply_frames + 2077265236Sken (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) { 2078265236Sken printf("%s: WARNING: reply %p out of range!\n", 2079265236Sken __func__, reply); 2080265236Sken printf("%s: reply_frames %p, fqdepth %d, " 2081265236Sken "frame size %d\n", __func__, 2082265236Sken sc->reply_frames, sc->fqdepth, 2083265236Sken sc->facts->ReplyFrameSize * 4); 2084265236Sken printf("%s: baddr %#x,\n", __func__, baddr); 2085265236Sken /* LSI-TODO. See Linux Code for Graceful exit */ 2086265236Sken panic("Reply address out of range"); 2087265236Sken } 2088265236Sken if (le16toh(desc->AddressReply.SMID) == 0) { 2089265236Sken if (((MPI2_DEFAULT_REPLY *)reply)->Function == 2090265236Sken MPI2_FUNCTION_DIAG_BUFFER_POST) { 2091265236Sken /* 2092265236Sken * If SMID is 0 for Diag Buffer Post, 2093265236Sken * this implies that the reply is due to 2094265236Sken * a release function with a status that 2095265236Sken * the buffer has been released. Set 2096265236Sken * the buffer flags accordingly. 2097265236Sken */ 2098265236Sken rel_rep = 2099265236Sken (MPI2_DIAG_RELEASE_REPLY *)reply; 2100299267Sslm if ((le16toh(rel_rep->IOCStatus) & 2101299267Sslm MPI2_IOCSTATUS_MASK) == 2102265236Sken MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED) 2103299267Sslm { 2104265236Sken pBuffer = 2105265236Sken &sc->fw_diag_buffer_list[ 2106265236Sken rel_rep->BufferType]; 2107265236Sken pBuffer->valid_data = TRUE; 2108265236Sken pBuffer->owned_by_firmware = 2109265236Sken FALSE; 2110265236Sken pBuffer->immediate = FALSE; 2111265236Sken } 2112265236Sken } else 2113265236Sken mpr_dispatch_event(sc, baddr, 2114265236Sken (MPI2_EVENT_NOTIFICATION_REPLY *) 2115265236Sken reply); 2116265236Sken } else { 2117265236Sken cm = &sc->commands[ 2118265236Sken le16toh(desc->AddressReply.SMID)]; 2119265236Sken cm->cm_reply = reply; 2120265236Sken cm->cm_reply_data = 2121265236Sken le32toh(desc->AddressReply. 2122265236Sken ReplyFrameAddress); 2123265236Sken } 2124265236Sken break; 2125265236Sken } 2126265236Sken case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: 2127265236Sken case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER: 2128265236Sken case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS: 2129265236Sken default: 2130265236Sken /* Unhandled */ 2131265236Sken mpr_dprint(sc, MPR_ERROR, "Unhandled reply 0x%x\n", 2132265236Sken desc->Default.ReplyFlags); 2133265236Sken cm = NULL; 2134265236Sken break; 2135265236Sken } 2136265236Sken 2137265236Sken if (cm != NULL) { 2138265236Sken // Print Error reply frame 2139265236Sken if (cm->cm_reply) 2140265236Sken mpr_display_reply_info(sc,cm->cm_reply); 2141265236Sken mpr_complete_command(sc, cm); 2142265236Sken } 2143265236Sken 2144265236Sken desc->Words.Low = 0xffffffff; 2145265236Sken desc->Words.High = 0xffffffff; 2146265236Sken } 2147265236Sken 2148265236Sken if (pq != sc->replypostindex) { 2149265236Sken mpr_dprint(sc, MPR_TRACE, 2150265236Sken "%s sc %p writing postindex %d\n", 2151265236Sken __func__, sc, sc->replypostindex); 2152265236Sken mpr_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 2153265236Sken sc->replypostindex); 2154265236Sken } 2155265236Sken 2156265236Sken return; 2157265236Sken} 2158265236Sken 2159265236Skenstatic void 2160265236Skenmpr_dispatch_event(struct mpr_softc *sc, uintptr_t data, 2161265236Sken MPI2_EVENT_NOTIFICATION_REPLY *reply) 2162265236Sken{ 2163265236Sken struct mpr_event_handle *eh; 2164265236Sken int event, handled = 0; 2165265236Sken 2166265236Sken event = le16toh(reply->Event); 2167265236Sken TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2168265236Sken if (isset(eh->mask, event)) { 2169265236Sken eh->callback(sc, data, reply); 2170265236Sken handled++; 2171265236Sken } 2172265236Sken } 2173265236Sken 2174265236Sken if (handled == 0) 2175265236Sken mpr_dprint(sc, MPR_EVENT, "Unhandled event 0x%x\n", 2176265236Sken le16toh(event)); 2177265236Sken 2178265236Sken /* 2179265236Sken * This is the only place that the event/reply should be freed. 2180265236Sken * Anything wanting to hold onto the event data should have 2181265236Sken * already copied it into their own storage. 2182265236Sken */ 2183265236Sken mpr_free_reply(sc, data); 2184265236Sken} 2185265236Sken 2186265236Skenstatic void 2187265236Skenmpr_reregister_events_complete(struct mpr_softc *sc, struct mpr_command *cm) 2188265236Sken{ 2189265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 2190265236Sken 2191265236Sken if (cm->cm_reply) 2192265236Sken mpr_print_event(sc, 2193265236Sken (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply); 2194265236Sken 2195265236Sken mpr_free_command(sc, cm); 2196265236Sken 2197265236Sken /* next, send a port enable */ 2198265236Sken mprsas_startup(sc); 2199265236Sken} 2200265236Sken 2201265236Sken/* 2202265236Sken * For both register_events and update_events, the caller supplies a bitmap 2203265236Sken * of events that it _wants_. These functions then turn that into a bitmask 2204265236Sken * suitable for the controller. 2205265236Sken */ 2206265236Skenint 2207265236Skenmpr_register_events(struct mpr_softc *sc, uint8_t *mask, 2208265236Sken mpr_evt_callback_t *cb, void *data, struct mpr_event_handle **handle) 2209265236Sken{ 2210265236Sken struct mpr_event_handle *eh; 2211265236Sken int error = 0; 2212265236Sken 2213265236Sken eh = malloc(sizeof(struct mpr_event_handle), M_MPR, M_WAITOK|M_ZERO); 2214265236Sken if (!eh) { 2215265236Sken device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n", 2216265236Sken __func__, __LINE__); 2217265236Sken return (ENOMEM); 2218265236Sken } 2219265236Sken eh->callback = cb; 2220265236Sken eh->data = data; 2221265236Sken TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list); 2222265236Sken if (mask != NULL) 2223265236Sken error = mpr_update_events(sc, eh, mask); 2224265236Sken *handle = eh; 2225265236Sken 2226265236Sken return (error); 2227265236Sken} 2228265236Sken 2229265236Skenint 2230265236Skenmpr_update_events(struct mpr_softc *sc, struct mpr_event_handle *handle, 2231265236Sken uint8_t *mask) 2232265236Sken{ 2233265236Sken MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2234265236Sken MPI2_EVENT_NOTIFICATION_REPLY *reply; 2235265236Sken struct mpr_command *cm; 2236265236Sken struct mpr_event_handle *eh; 2237265236Sken int error, i; 2238265236Sken 2239265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 2240265236Sken 2241265236Sken if ((mask != NULL) && (handle != NULL)) 2242265236Sken bcopy(mask, &handle->mask[0], 16); 2243265236Sken memset(sc->event_mask, 0xff, 16); 2244265236Sken 2245265236Sken TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2246265236Sken for (i = 0; i < 16; i++) 2247265236Sken sc->event_mask[i] &= ~eh->mask[i]; 2248265236Sken } 2249265236Sken 2250265236Sken if ((cm = mpr_alloc_command(sc)) == NULL) 2251265236Sken return (EBUSY); 2252265236Sken evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2253265236Sken evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2254265236Sken evtreq->MsgFlags = 0; 2255265236Sken evtreq->SASBroadcastPrimitiveMasks = 0; 2256265236Sken#ifdef MPR_DEBUG_ALL_EVENTS 2257265236Sken { 2258265236Sken u_char fullmask[16]; 2259265236Sken memset(fullmask, 0x00, 16); 2260265236Sken bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16); 2261265236Sken } 2262265236Sken#else 2263265236Sken bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16); 2264265236Sken#endif 2265265236Sken cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2266265236Sken cm->cm_data = NULL; 2267265236Sken 2268265236Sken error = mpr_request_polled(sc, cm); 2269265236Sken reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply; 2270265236Sken if ((reply == NULL) || 2271265236Sken (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 2272265236Sken error = ENXIO; 2273265236Sken 2274283661Sslm if (reply) 2275265236Sken mpr_print_event(sc, reply); 2276265236Sken 2277265236Sken mpr_dprint(sc, MPR_TRACE, "%s finished error %d\n", __func__, error); 2278265236Sken 2279265236Sken mpr_free_command(sc, cm); 2280265236Sken return (error); 2281265236Sken} 2282265236Sken 2283265236Skenstatic int 2284265236Skenmpr_reregister_events(struct mpr_softc *sc) 2285265236Sken{ 2286265236Sken MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2287265236Sken struct mpr_command *cm; 2288265236Sken struct mpr_event_handle *eh; 2289265236Sken int error, i; 2290265236Sken 2291265236Sken mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 2292265236Sken 2293265236Sken /* first, reregister events */ 2294265236Sken 2295265236Sken memset(sc->event_mask, 0xff, 16); 2296265236Sken 2297265236Sken TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2298265236Sken for (i = 0; i < 16; i++) 2299265236Sken sc->event_mask[i] &= ~eh->mask[i]; 2300265236Sken } 2301265236Sken 2302265236Sken if ((cm = mpr_alloc_command(sc)) == NULL) 2303265236Sken return (EBUSY); 2304265236Sken evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2305265236Sken evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2306265236Sken evtreq->MsgFlags = 0; 2307265236Sken evtreq->SASBroadcastPrimitiveMasks = 0; 2308265236Sken#ifdef MPR_DEBUG_ALL_EVENTS 2309265236Sken { 2310265236Sken u_char fullmask[16]; 2311265236Sken memset(fullmask, 0x00, 16); 2312265236Sken bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16); 2313265236Sken } 2314265236Sken#else 2315265236Sken bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16); 2316265236Sken#endif 2317265236Sken cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2318265236Sken cm->cm_data = NULL; 2319265236Sken cm->cm_complete = mpr_reregister_events_complete; 2320265236Sken 2321265236Sken error = mpr_map_command(sc, cm); 2322265236Sken 2323265236Sken mpr_dprint(sc, MPR_TRACE, "%s finished with error %d\n", __func__, 2324265236Sken error); 2325265236Sken return (error); 2326265236Sken} 2327265236Sken 2328265236Skenint 2329265236Skenmpr_deregister_events(struct mpr_softc *sc, struct mpr_event_handle *handle) 2330265236Sken{ 2331265236Sken 2332265236Sken TAILQ_REMOVE(&sc->event_list, handle, eh_list); 2333265236Sken free(handle, M_MPR); 2334265236Sken return (mpr_update_events(sc, NULL, NULL)); 2335265236Sken} 2336265236Sken 2337319435Sslm/** 2338319435Sslm* mpr_build_nvme_prp - This function is called for NVMe end devices to build a 2339319435Sslm* native SGL (NVMe PRP). The native SGL is built starting in the first PRP entry 2340319435Sslm* of the NVMe message (PRP1). If the data buffer is small enough to be described 2341319435Sslm* entirely using PRP1, then PRP2 is not used. If needed, PRP2 is used to 2342319435Sslm* describe a larger data buffer. If the data buffer is too large to describe 2343319435Sslm* using the two PRP entriess inside the NVMe message, then PRP1 describes the 2344319435Sslm* first data memory segment, and PRP2 contains a pointer to a PRP list located 2345319435Sslm* elsewhere in memory to describe the remaining data memory segments. The PRP 2346319435Sslm* list will be contiguous. 2347319435Sslm 2348319435Sslm* The native SGL for NVMe devices is a Physical Region Page (PRP). A PRP 2349319435Sslm* consists of a list of PRP entries to describe a number of noncontigous 2350319435Sslm* physical memory segments as a single memory buffer, just as a SGL does. Note 2351319435Sslm* however, that this function is only used by the IOCTL call, so the memory 2352319435Sslm* given will be guaranteed to be contiguous. There is no need to translate 2353319435Sslm* non-contiguous SGL into a PRP in this case. All PRPs will describe contiguous 2354319435Sslm* space that is one page size each. 2355319435Sslm* 2356319435Sslm* Each NVMe message contains two PRP entries. The first (PRP1) either contains 2357319435Sslm* a PRP list pointer or a PRP element, depending upon the command. PRP2 contains 2358319435Sslm* the second PRP element if the memory being described fits within 2 PRP 2359319435Sslm* entries, or a PRP list pointer if the PRP spans more than two entries. 2360319435Sslm* 2361319435Sslm* A PRP list pointer contains the address of a PRP list, structured as a linear 2362319435Sslm* array of PRP entries. Each PRP entry in this list describes a segment of 2363319435Sslm* physical memory. 2364319435Sslm* 2365319435Sslm* Each 64-bit PRP entry comprises an address and an offset field. The address 2366319435Sslm* always points to the beginning of a PAGE_SIZE physical memory page, and the 2367319435Sslm* offset describes where within that page the memory segment begins. Only the 2368319435Sslm* first element in a PRP list may contain a non-zero offest, implying that all 2369319435Sslm* memory segments following the first begin at the start of a PAGE_SIZE page. 2370319435Sslm* 2371319435Sslm* Each PRP element normally describes a chunck of PAGE_SIZE physical memory, 2372319435Sslm* with exceptions for the first and last elements in the list. If the memory 2373319435Sslm* being described by the list begins at a non-zero offset within the first page, 2374319435Sslm* then the first PRP element will contain a non-zero offset indicating where the 2375319435Sslm* region begins within the page. The last memory segment may end before the end 2376319435Sslm* of the PAGE_SIZE segment, depending upon the overall size of the memory being 2377319435Sslm* described by the PRP list. 2378319435Sslm* 2379319435Sslm* Since PRP entries lack any indication of size, the overall data buffer length 2380319435Sslm* is used to determine where the end of the data memory buffer is located, and 2381319435Sslm* how many PRP entries are required to describe it. 2382319435Sslm* 2383319435Sslm* Returns nothing. 2384319435Sslm*/ 2385319435Sslmvoid 2386319435Sslmmpr_build_nvme_prp(struct mpr_softc *sc, struct mpr_command *cm, 2387319435Sslm Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, void *data, 2388319435Sslm uint32_t data_in_sz, uint32_t data_out_sz) 2389319435Sslm{ 2390319435Sslm int prp_size = PRP_ENTRY_SIZE; 2391319435Sslm uint64_t *prp_entry, *prp1_entry, *prp2_entry; 2392319435Sslm uint64_t *prp_entry_phys, *prp_page, *prp_page_phys; 2393319435Sslm uint32_t offset, entry_len, page_mask_result, page_mask; 2394319435Sslm bus_addr_t paddr; 2395319435Sslm size_t length; 2396319435Sslm struct mpr_prp_page *prp_page_info = NULL; 2397319435Sslm 2398319435Sslm /* 2399319435Sslm * Not all commands require a data transfer. If no data, just return 2400319435Sslm * without constructing any PRP. 2401319435Sslm */ 2402319435Sslm if (!data_in_sz && !data_out_sz) 2403319435Sslm return; 2404319435Sslm 2405319435Sslm /* 2406319435Sslm * Set pointers to PRP1 and PRP2, which are in the NVMe command. PRP1 is 2407319435Sslm * located at a 24 byte offset from the start of the NVMe command. Then 2408319435Sslm * set the current PRP entry pointer to PRP1. 2409319435Sslm */ 2410319435Sslm prp1_entry = (uint64_t *)(nvme_encap_request->NVMe_Command + 2411319435Sslm NVME_CMD_PRP1_OFFSET); 2412319435Sslm prp2_entry = (uint64_t *)(nvme_encap_request->NVMe_Command + 2413319435Sslm NVME_CMD_PRP2_OFFSET); 2414319435Sslm prp_entry = prp1_entry; 2415319435Sslm 2416319435Sslm /* 2417319435Sslm * For the PRP entries, use the specially allocated buffer of 2418319435Sslm * contiguous memory. PRP Page allocation failures should not happen 2419319435Sslm * because there should be enough PRP page buffers to account for the 2420319435Sslm * possible NVMe QDepth. 2421319435Sslm */ 2422319435Sslm prp_page_info = mpr_alloc_prp_page(sc); 2423319435Sslm KASSERT(prp_page_info != NULL, ("%s: There are no PRP Pages left to be " 2424319435Sslm "used for building a native NVMe SGL.\n", __func__)); 2425319435Sslm prp_page = (uint64_t *)prp_page_info->prp_page; 2426319435Sslm prp_page_phys = (uint64_t *)(uintptr_t)prp_page_info->prp_page_busaddr; 2427319435Sslm 2428319435Sslm /* 2429319435Sslm * Insert the allocated PRP page into the command's PRP page list. This 2430319435Sslm * will be freed when the command is freed. 2431319435Sslm */ 2432319435Sslm TAILQ_INSERT_TAIL(&cm->cm_prp_page_list, prp_page_info, prp_page_link); 2433319435Sslm 2434319435Sslm /* 2435319435Sslm * Check if we are within 1 entry of a page boundary we don't want our 2436319435Sslm * first entry to be a PRP List entry. 2437319435Sslm */ 2438319435Sslm page_mask = PAGE_SIZE - 1; 2439319435Sslm page_mask_result = (uintptr_t)((uint8_t *)prp_page + prp_size) & 2440319435Sslm page_mask; 2441319435Sslm if (!page_mask_result) 2442319435Sslm { 2443319435Sslm /* Bump up to next page boundary. */ 2444319435Sslm prp_page = (uint64_t *)((uint8_t *)prp_page + prp_size); 2445319435Sslm prp_page_phys = (uint64_t *)((uint8_t *)prp_page_phys + 2446319435Sslm prp_size); 2447319435Sslm } 2448319435Sslm 2449319435Sslm /* 2450319435Sslm * Set PRP physical pointer, which initially points to the current PRP 2451319435Sslm * DMA memory page. 2452319435Sslm */ 2453319435Sslm prp_entry_phys = prp_page_phys; 2454319435Sslm 2455319435Sslm /* Get physical address and length of the data buffer. */ 2456319435Sslm paddr = (bus_addr_t)data; 2457319435Sslm if (data_in_sz) 2458319435Sslm length = data_in_sz; 2459319435Sslm else 2460319435Sslm length = data_out_sz; 2461319435Sslm 2462319435Sslm /* Loop while the length is not zero. */ 2463319435Sslm while (length) 2464319435Sslm { 2465319435Sslm /* 2466319435Sslm * Check if we need to put a list pointer here if we are at page 2467319435Sslm * boundary - prp_size (8 bytes). 2468319435Sslm */ 2469319435Sslm page_mask_result = (uintptr_t)((uint8_t *)prp_entry_phys + 2470319435Sslm prp_size) & page_mask; 2471319435Sslm if (!page_mask_result) 2472319435Sslm { 2473319435Sslm /* 2474319435Sslm * This is the last entry in a PRP List, so we need to 2475319435Sslm * put a PRP list pointer here. What this does is: 2476319435Sslm * - bump the current memory pointer to the next 2477319435Sslm * address, which will be the next full page. 2478319435Sslm * - set the PRP Entry to point to that page. This is 2479319435Sslm * now the PRP List pointer. 2480319435Sslm * - bump the PRP Entry pointer the start of the next 2481319435Sslm * page. Since all of this PRP memory is contiguous, 2482319435Sslm * no need to get a new page - it's just the next 2483319435Sslm * address. 2484319435Sslm */ 2485319435Sslm prp_entry_phys++; 2486319435Sslm *prp_entry = 2487319435Sslm htole64((uint64_t)(uintptr_t)prp_entry_phys); 2488319435Sslm prp_entry++; 2489319435Sslm } 2490319435Sslm 2491319435Sslm /* Need to handle if entry will be part of a page. */ 2492319435Sslm offset = (uint32_t)paddr & page_mask; 2493319435Sslm entry_len = PAGE_SIZE - offset; 2494319435Sslm 2495319435Sslm if (prp_entry == prp1_entry) 2496319435Sslm { 2497319435Sslm /* 2498319435Sslm * Must fill in the first PRP pointer (PRP1) before 2499319435Sslm * moving on. 2500319435Sslm */ 2501319435Sslm *prp1_entry = htole64((uint64_t)paddr); 2502319435Sslm 2503319435Sslm /* 2504319435Sslm * Now point to the second PRP entry within the 2505319435Sslm * command (PRP2). 2506319435Sslm */ 2507319435Sslm prp_entry = prp2_entry; 2508319435Sslm } 2509319435Sslm else if (prp_entry == prp2_entry) 2510319435Sslm { 2511319435Sslm /* 2512319435Sslm * Should the PRP2 entry be a PRP List pointer or just a 2513319435Sslm * regular PRP pointer? If there is more than one more 2514319435Sslm * page of data, must use a PRP List pointer. 2515319435Sslm */ 2516319435Sslm if (length > PAGE_SIZE) 2517319435Sslm { 2518319435Sslm /* 2519319435Sslm * PRP2 will contain a PRP List pointer because 2520319435Sslm * more PRP's are needed with this command. The 2521319435Sslm * list will start at the beginning of the 2522319435Sslm * contiguous buffer. 2523319435Sslm */ 2524319435Sslm *prp2_entry = 2525319435Sslm htole64( 2526319435Sslm (uint64_t)(uintptr_t)prp_entry_phys); 2527319435Sslm 2528319435Sslm /* 2529319435Sslm * The next PRP Entry will be the start of the 2530319435Sslm * first PRP List. 2531319435Sslm */ 2532319435Sslm prp_entry = prp_page; 2533319435Sslm } 2534319435Sslm else 2535319435Sslm { 2536319435Sslm /* 2537319435Sslm * After this, the PRP Entries are complete. 2538319435Sslm * This command uses 2 PRP's and no PRP list. 2539319435Sslm */ 2540319435Sslm *prp2_entry = htole64((uint64_t)paddr); 2541319435Sslm } 2542319435Sslm } 2543319435Sslm else 2544319435Sslm { 2545319435Sslm /* 2546319435Sslm * Put entry in list and bump the addresses. 2547319435Sslm * 2548319435Sslm * After PRP1 and PRP2 are filled in, this will fill in 2549319435Sslm * all remaining PRP entries in a PRP List, one per each 2550319435Sslm * time through the loop. 2551319435Sslm */ 2552319435Sslm *prp_entry = htole64((uint64_t)paddr); 2553319435Sslm prp_entry++; 2554319435Sslm prp_entry_phys++; 2555319435Sslm } 2556319435Sslm 2557319435Sslm /* 2558319435Sslm * Bump the phys address of the command's data buffer by the 2559319435Sslm * entry_len. 2560319435Sslm */ 2561319435Sslm paddr += entry_len; 2562319435Sslm 2563319435Sslm /* Decrement length accounting for last partial page. */ 2564319435Sslm if (entry_len > length) 2565319435Sslm length = 0; 2566319435Sslm else 2567319435Sslm length -= entry_len; 2568319435Sslm } 2569319435Sslm} 2570319435Sslm 2571265236Sken/* 2572319435Sslm * mpr_check_pcie_native_sgl - This function is called for PCIe end devices to 2573319435Sslm * determine if the driver needs to build a native SGL. If so, that native SGL 2574319435Sslm * is built in the contiguous buffers allocated especially for PCIe SGL 2575319435Sslm * creation. If the driver will not build a native SGL, return TRUE and a 2576319435Sslm * normal IEEE SGL will be built. Currently this routine supports NVMe devices 2577319435Sslm * only. 2578319435Sslm * 2579319435Sslm * Returns FALSE (0) if native SGL was built, TRUE (1) if no SGL was built. 2580319435Sslm */ 2581319435Sslmstatic int 2582319435Sslmmpr_check_pcie_native_sgl(struct mpr_softc *sc, struct mpr_command *cm, 2583319435Sslm bus_dma_segment_t *segs, int segs_left) 2584319435Sslm{ 2585319435Sslm uint32_t i, sge_dwords, length, offset, entry_len; 2586319435Sslm uint32_t num_entries, buff_len = 0, sges_in_segment; 2587319435Sslm uint32_t page_mask, page_mask_result, *curr_buff; 2588319435Sslm uint32_t *ptr_sgl, *ptr_first_sgl, first_page_offset; 2589319435Sslm uint32_t first_page_data_size, end_residual; 2590319435Sslm uint64_t *msg_phys; 2591319435Sslm bus_addr_t paddr; 2592319435Sslm int build_native_sgl = 0, first_prp_entry; 2593319435Sslm int prp_size = PRP_ENTRY_SIZE; 2594319435Sslm Mpi25IeeeSgeChain64_t *main_chain_element = NULL; 2595319435Sslm struct mpr_prp_page *prp_page_info = NULL; 2596319435Sslm 2597319435Sslm mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 2598319435Sslm 2599319435Sslm /* 2600319435Sslm * Add up the sizes of each segment length to get the total transfer 2601319435Sslm * size, which will be checked against the Maximum Data Transfer Size. 2602319435Sslm * If the data transfer length exceeds the MDTS for this device, just 2603319435Sslm * return 1 so a normal IEEE SGL will be built. F/W will break the I/O 2604319435Sslm * up into multiple I/O's. [nvme_mdts = 0 means unlimited] 2605319435Sslm */ 2606319435Sslm for (i = 0; i < segs_left; i++) 2607319435Sslm buff_len += htole32(segs[i].ds_len); 2608319435Sslm if ((cm->cm_targ->MDTS > 0) && (buff_len > cm->cm_targ->MDTS)) 2609319435Sslm return 1; 2610319435Sslm 2611319435Sslm /* Create page_mask (to get offset within page) */ 2612319435Sslm page_mask = PAGE_SIZE - 1; 2613319435Sslm 2614319435Sslm /* 2615319435Sslm * Check if the number of elements exceeds the max number that can be 2616319435Sslm * put in the main message frame (H/W can only translate an SGL that 2617319435Sslm * is contained entirely in the main message frame). 2618319435Sslm */ 2619319435Sslm sges_in_segment = (sc->facts->IOCRequestFrameSize - 2620319435Sslm offsetof(Mpi25SCSIIORequest_t, SGL)) / sizeof(MPI25_SGE_IO_UNION); 2621319435Sslm if (segs_left > sges_in_segment) 2622319435Sslm build_native_sgl = 1; 2623319435Sslm else 2624319435Sslm { 2625319435Sslm /* 2626319435Sslm * NVMe uses one PRP for each physical page (or part of physical 2627319435Sslm * page). 2628319435Sslm * if 4 pages or less then IEEE is OK 2629319435Sslm * if > 5 pages then we need to build a native SGL 2630319435Sslm * if > 4 and <= 5 pages, then check the physical address of 2631319435Sslm * the first SG entry, then if this first size in the page 2632319435Sslm * is >= the residual beyond 4 pages then use IEEE, 2633319435Sslm * otherwise use native SGL 2634319435Sslm */ 2635319435Sslm if (buff_len > (PAGE_SIZE * 5)) 2636319435Sslm build_native_sgl = 1; 2637319435Sslm else if ((buff_len > (PAGE_SIZE * 4)) && 2638319435Sslm (buff_len <= (PAGE_SIZE * 5)) ) 2639319435Sslm { 2640319435Sslm msg_phys = (uint64_t *)segs[0].ds_addr; 2641319435Sslm first_page_offset = 2642319435Sslm ((uint32_t)(uint64_t)(uintptr_t)msg_phys & 2643319435Sslm page_mask); 2644319435Sslm first_page_data_size = PAGE_SIZE - first_page_offset; 2645319435Sslm end_residual = buff_len % PAGE_SIZE; 2646319435Sslm 2647319435Sslm /* 2648319435Sslm * If offset into first page pushes the end of the data 2649319435Sslm * beyond end of the 5th page, we need the extra PRP 2650319435Sslm * list. 2651319435Sslm */ 2652319435Sslm if (first_page_data_size < end_residual) 2653319435Sslm build_native_sgl = 1; 2654319435Sslm 2655319435Sslm /* 2656319435Sslm * Check if first SG entry size is < residual beyond 4 2657319435Sslm * pages. 2658319435Sslm */ 2659319435Sslm if (htole32(segs[0].ds_len) < 2660319435Sslm (buff_len - (PAGE_SIZE * 4))) 2661319435Sslm build_native_sgl = 1; 2662319435Sslm } 2663319435Sslm } 2664319435Sslm 2665319435Sslm /* check if native SGL is needed */ 2666319435Sslm if (!build_native_sgl) 2667319435Sslm return 1; 2668319435Sslm 2669319435Sslm /* 2670319435Sslm * Native SGL is needed. 2671319435Sslm * Put a chain element in main message frame that points to the first 2672319435Sslm * chain buffer. 2673319435Sslm * 2674319435Sslm * NOTE: The ChainOffset field must be 0 when using a chain pointer to 2675319435Sslm * a native SGL. 2676319435Sslm */ 2677319435Sslm 2678319435Sslm /* Set main message chain element pointer */ 2679319435Sslm main_chain_element = (pMpi25IeeeSgeChain64_t)cm->cm_sge; 2680319435Sslm 2681319435Sslm /* 2682319435Sslm * For NVMe the chain element needs to be the 2nd SGL entry in the main 2683319435Sslm * message. 2684319435Sslm */ 2685319435Sslm main_chain_element = (Mpi25IeeeSgeChain64_t *) 2686319435Sslm ((uint8_t *)main_chain_element + sizeof(MPI25_IEEE_SGE_CHAIN64)); 2687319435Sslm 2688319435Sslm /* 2689319435Sslm * For the PRP entries, use the specially allocated buffer of 2690319435Sslm * contiguous memory. PRP Page allocation failures should not happen 2691319435Sslm * because there should be enough PRP page buffers to account for the 2692319435Sslm * possible NVMe QDepth. 2693319435Sslm */ 2694319435Sslm prp_page_info = mpr_alloc_prp_page(sc); 2695319435Sslm KASSERT(prp_page_info != NULL, ("%s: There are no PRP Pages left to be " 2696319435Sslm "used for building a native NVMe SGL.\n", __func__)); 2697319435Sslm curr_buff = (uint32_t *)prp_page_info->prp_page; 2698319435Sslm msg_phys = (uint64_t *)(uintptr_t)prp_page_info->prp_page_busaddr; 2699319435Sslm 2700319435Sslm /* 2701319435Sslm * Insert the allocated PRP page into the command's PRP page list. This 2702319435Sslm * will be freed when the command is freed. 2703319435Sslm */ 2704319435Sslm TAILQ_INSERT_TAIL(&cm->cm_prp_page_list, prp_page_info, prp_page_link); 2705319435Sslm 2706319435Sslm /* 2707319435Sslm * Check if we are within 1 entry of a page boundary we don't want our 2708319435Sslm * first entry to be a PRP List entry. 2709319435Sslm */ 2710319435Sslm page_mask_result = (uintptr_t)((uint8_t *)curr_buff + prp_size) & 2711319435Sslm page_mask; 2712319435Sslm if (!page_mask_result) { 2713319435Sslm /* Bump up to next page boundary. */ 2714319435Sslm curr_buff = (uint32_t *)((uint8_t *)curr_buff + prp_size); 2715319435Sslm msg_phys = (uint64_t *)((uint8_t *)msg_phys + prp_size); 2716319435Sslm } 2717319435Sslm 2718319435Sslm /* Fill in the chain element and make it an NVMe segment type. */ 2719319435Sslm main_chain_element->Address.High = 2720319435Sslm htole32((uint32_t)((uint64_t)(uintptr_t)msg_phys >> 32)); 2721319435Sslm main_chain_element->Address.Low = 2722319435Sslm htole32((uint32_t)(uintptr_t)msg_phys); 2723319435Sslm main_chain_element->NextChainOffset = 0; 2724319435Sslm main_chain_element->Flags = MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT | 2725319435Sslm MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR | 2726319435Sslm MPI26_IEEE_SGE_FLAGS_NSF_NVME_PRP; 2727319435Sslm 2728319435Sslm /* Set SGL pointer to start of contiguous PCIe buffer. */ 2729319435Sslm ptr_sgl = curr_buff; 2730319435Sslm sge_dwords = 2; 2731319435Sslm num_entries = 0; 2732319435Sslm 2733319435Sslm /* 2734319435Sslm * NVMe has a very convoluted PRP format. One PRP is required for each 2735319435Sslm * page or partial page. We need to split up OS SG entries if they are 2736319435Sslm * longer than one page or cross a page boundary. We also have to insert 2737319435Sslm * a PRP list pointer entry as the last entry in each physical page of 2738319435Sslm * the PRP list. 2739319435Sslm * 2740319435Sslm * NOTE: The first PRP "entry" is actually placed in the first SGL entry 2741319435Sslm * in the main message in IEEE 64 format. The 2nd entry in the main 2742319435Sslm * message is the chain element, and the rest of the PRP entries are 2743319435Sslm * built in the contiguous PCIe buffer. 2744319435Sslm */ 2745319435Sslm first_prp_entry = 1; 2746319435Sslm ptr_first_sgl = (uint32_t *)cm->cm_sge; 2747319435Sslm 2748319435Sslm for (i = 0; i < segs_left; i++) { 2749319435Sslm /* Get physical address and length of this SG entry. */ 2750319435Sslm paddr = segs[i].ds_addr; 2751319435Sslm length = segs[i].ds_len; 2752319435Sslm 2753319435Sslm /* 2754319435Sslm * Check whether a given SGE buffer lies on a non-PAGED 2755319435Sslm * boundary if this is not the first page. If so, this is not 2756319435Sslm * expected so have FW build the SGL. 2757319435Sslm */ 2758319435Sslm if (i) { 2759319435Sslm if ((uint32_t)paddr & page_mask) { 2760319435Sslm mpr_dprint(sc, MPR_ERROR, "Unaligned SGE while " 2761319435Sslm "building NVMe PRPs, low address is 0x%x\n", 2762319435Sslm (uint32_t)paddr); 2763319435Sslm return 1; 2764319435Sslm } 2765319435Sslm } 2766319435Sslm 2767319435Sslm /* Apart from last SGE, if any other SGE boundary is not page 2768319435Sslm * aligned then it means that hole exists. Existence of hole 2769319435Sslm * leads to data corruption. So fallback to IEEE SGEs. 2770319435Sslm */ 2771319435Sslm if (i != (segs_left - 1)) { 2772319435Sslm if (((uint32_t)paddr + length) & page_mask) { 2773319435Sslm mpr_dprint(sc, MPR_ERROR, "Unaligned SGE " 2774319435Sslm "boundary while building NVMe PRPs, low " 2775319435Sslm "address: 0x%x and length: %u\n", 2776319435Sslm (uint32_t)paddr, length); 2777319435Sslm return 1; 2778319435Sslm } 2779319435Sslm } 2780319435Sslm 2781319435Sslm /* Loop while the length is not zero. */ 2782319435Sslm while (length) { 2783319435Sslm /* 2784319435Sslm * Check if we need to put a list pointer here if we are 2785319435Sslm * at page boundary - prp_size. 2786319435Sslm */ 2787319435Sslm page_mask_result = (uintptr_t)((uint8_t *)ptr_sgl + 2788319435Sslm prp_size) & page_mask; 2789319435Sslm if (!page_mask_result) { 2790319435Sslm /* 2791319435Sslm * Need to put a PRP list pointer here. 2792319435Sslm */ 2793319435Sslm msg_phys = (uint64_t *)((uint8_t *)msg_phys + 2794319435Sslm prp_size); 2795319435Sslm *ptr_sgl = htole32((uintptr_t)msg_phys); 2796319435Sslm *(ptr_sgl+1) = htole32((uint64_t)(uintptr_t) 2797319435Sslm msg_phys >> 32); 2798319435Sslm ptr_sgl += sge_dwords; 2799319435Sslm num_entries++; 2800319435Sslm } 2801319435Sslm 2802319435Sslm /* Need to handle if entry will be part of a page. */ 2803319435Sslm offset = (uint32_t)paddr & page_mask; 2804319435Sslm entry_len = PAGE_SIZE - offset; 2805319435Sslm if (first_prp_entry) { 2806319435Sslm /* 2807319435Sslm * Put IEEE entry in first SGE in main message. 2808319435Sslm * (Simple element, System addr, not end of 2809319435Sslm * list.) 2810319435Sslm */ 2811319435Sslm *ptr_first_sgl = htole32((uint32_t)paddr); 2812319435Sslm *(ptr_first_sgl + 1) = 2813319435Sslm htole32((uint32_t)((uint64_t)paddr >> 32)); 2814319435Sslm *(ptr_first_sgl + 2) = htole32(entry_len); 2815319435Sslm *(ptr_first_sgl + 3) = 0; 2816319435Sslm 2817319435Sslm /* No longer the first PRP entry. */ 2818319435Sslm first_prp_entry = 0; 2819319435Sslm } else { 2820319435Sslm /* Put entry in list. */ 2821319435Sslm *ptr_sgl = htole32((uint32_t)paddr); 2822319435Sslm *(ptr_sgl + 1) = 2823319435Sslm htole32((uint32_t)((uint64_t)paddr >> 32)); 2824319435Sslm 2825319435Sslm /* Bump ptr_sgl, msg_phys, and num_entries. */ 2826319435Sslm ptr_sgl += sge_dwords; 2827319435Sslm msg_phys = (uint64_t *)((uint8_t *)msg_phys + 2828319435Sslm prp_size); 2829319435Sslm num_entries++; 2830319435Sslm } 2831319435Sslm 2832319435Sslm /* Bump the phys address by the entry_len. */ 2833319435Sslm paddr += entry_len; 2834319435Sslm 2835319435Sslm /* Decrement length accounting for last partial page. */ 2836319435Sslm if (entry_len > length) 2837319435Sslm length = 0; 2838319435Sslm else 2839319435Sslm length -= entry_len; 2840319435Sslm } 2841319435Sslm } 2842319435Sslm 2843319435Sslm /* Set chain element Length. */ 2844319435Sslm main_chain_element->Length = htole32(num_entries * prp_size); 2845319435Sslm 2846319435Sslm /* Return 0, indicating we built a native SGL. */ 2847319435Sslm return 0; 2848319435Sslm} 2849319435Sslm 2850319435Sslm/* 2851265236Sken * Add a chain element as the next SGE for the specified command. 2852265236Sken * Reset cm_sge and cm_sgesize to indicate all the available space. Chains are 2853265236Sken * only required for IEEE commands. Therefore there is no code for commands 2854283661Sslm * that have the MPR_CM_FLAGS_SGE_SIMPLE flag set (and those commands 2855283661Sslm * shouldn't be requesting chains). 2856265236Sken */ 2857265236Skenstatic int 2858265236Skenmpr_add_chain(struct mpr_command *cm, int segsleft) 2859265236Sken{ 2860265236Sken struct mpr_softc *sc = cm->cm_sc; 2861265236Sken MPI2_REQUEST_HEADER *req; 2862265236Sken MPI25_IEEE_SGE_CHAIN64 *ieee_sgc; 2863265236Sken struct mpr_chain *chain; 2864299266Sslm int sgc_size, current_segs, rem_segs, segs_per_frame; 2865265236Sken uint8_t next_chain_offset = 0; 2866265236Sken 2867265236Sken /* 2868265236Sken * Fail if a command is requesting a chain for SIMPLE SGE's. For SAS3 2869265236Sken * only IEEE commands should be requesting chains. Return some error 2870265236Sken * code other than 0. 2871265236Sken */ 2872265236Sken if (cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE) { 2873265236Sken mpr_dprint(sc, MPR_ERROR, "A chain element cannot be added to " 2874265236Sken "an MPI SGL.\n"); 2875265236Sken return(ENOBUFS); 2876265236Sken } 2877265236Sken 2878265236Sken sgc_size = sizeof(MPI25_IEEE_SGE_CHAIN64); 2879265236Sken if (cm->cm_sglsize < sgc_size) 2880265236Sken panic("MPR: Need SGE Error Code\n"); 2881265236Sken 2882265236Sken chain = mpr_alloc_chain(cm->cm_sc); 2883265236Sken if (chain == NULL) 2884265236Sken return (ENOBUFS); 2885265236Sken 2886265236Sken /* 2887265236Sken * Note: a double-linked list is used to make it easier to walk for 2888265236Sken * debugging. 2889265236Sken */ 2890265236Sken TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); 2891265236Sken 2892265236Sken /* 2893265236Sken * Need to know if the number of frames left is more than 1 or not. If 2894265236Sken * more than 1 frame is required, NextChainOffset will need to be set, 2895265236Sken * which will just be the last segment of the frame. 2896265236Sken */ 2897265236Sken rem_segs = 0; 2898265236Sken if (cm->cm_sglsize < (sgc_size * segsleft)) { 2899265236Sken /* 2900265236Sken * rem_segs is the number of segements remaining after the 2901265236Sken * segments that will go into the current frame. Since it is 2902265236Sken * known that at least one more frame is required, account for 2903265236Sken * the chain element. To know if more than one more frame is 2904265236Sken * required, just check if there will be a remainder after using 2905265236Sken * the current frame (with this chain) and the next frame. If 2906265236Sken * so the NextChainOffset must be the last element of the next 2907265236Sken * frame. 2908265236Sken */ 2909265236Sken current_segs = (cm->cm_sglsize / sgc_size) - 1; 2910265236Sken rem_segs = segsleft - current_segs; 2911299266Sslm segs_per_frame = sc->chain_frame_size / sgc_size; 2912265236Sken if (rem_segs > segs_per_frame) { 2913265236Sken next_chain_offset = segs_per_frame - 1; 2914265236Sken } 2915265236Sken } 2916265236Sken ieee_sgc = &((MPI25_SGE_IO_UNION *)cm->cm_sge)->IeeeChain; 2917299266Sslm ieee_sgc->Length = next_chain_offset ? 2918299266Sslm htole32((uint32_t)sc->chain_frame_size) : 2919265236Sken htole32((uint32_t)rem_segs * (uint32_t)sgc_size); 2920265236Sken ieee_sgc->NextChainOffset = next_chain_offset; 2921265236Sken ieee_sgc->Flags = (MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT | 2922265236Sken MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR); 2923265236Sken ieee_sgc->Address.Low = htole32(chain->chain_busaddr); 2924265236Sken ieee_sgc->Address.High = htole32(chain->chain_busaddr >> 32); 2925265236Sken cm->cm_sge = &((MPI25_SGE_IO_UNION *)chain->chain)->IeeeSimple; 2926265236Sken req = (MPI2_REQUEST_HEADER *)cm->cm_req; 2927299266Sslm req->ChainOffset = (sc->chain_frame_size - sgc_size) >> 4; 2928265236Sken 2929299266Sslm cm->cm_sglsize = sc->chain_frame_size; 2930265236Sken return (0); 2931265236Sken} 2932265236Sken 2933265236Sken/* 2934265236Sken * Add one scatter-gather element to the scatter-gather list for a command. 2935283661Sslm * Maintain cm_sglsize and cm_sge as the remaining size and pointer to the 2936283661Sslm * next SGE to fill in, respectively. In Gen3, the MPI SGL does not have a 2937283661Sslm * chain, so don't consider any chain additions. 2938265236Sken */ 2939265236Skenint 2940265236Skenmpr_push_sge(struct mpr_command *cm, MPI2_SGE_SIMPLE64 *sge, size_t len, 2941265236Sken int segsleft) 2942265236Sken{ 2943265236Sken uint32_t saved_buf_len, saved_address_low, saved_address_high; 2944265236Sken u32 sge_flags; 2945265236Sken 2946265236Sken /* 2947265236Sken * case 1: >=1 more segment, no room for anything (error) 2948265236Sken * case 2: 1 more segment and enough room for it 2949265236Sken */ 2950265236Sken 2951265236Sken if (cm->cm_sglsize < (segsleft * sizeof(MPI2_SGE_SIMPLE64))) { 2952265236Sken mpr_dprint(cm->cm_sc, MPR_ERROR, 2953265236Sken "%s: warning: Not enough room for MPI SGL in frame.\n", 2954265236Sken __func__); 2955265236Sken return(ENOBUFS); 2956265236Sken } 2957265236Sken 2958265236Sken KASSERT(segsleft == 1, 2959265236Sken ("segsleft cannot be more than 1 for an MPI SGL; segsleft = %d\n", 2960265236Sken segsleft)); 2961265236Sken 2962265236Sken /* 2963265236Sken * There is one more segment left to add for the MPI SGL and there is 2964265236Sken * enough room in the frame to add it. This is the normal case because 2965265236Sken * MPI SGL's don't have chains, otherwise something is wrong. 2966265236Sken * 2967265236Sken * If this is a bi-directional request, need to account for that 2968265236Sken * here. Save the pre-filled sge values. These will be used 2969265236Sken * either for the 2nd SGL or for a single direction SGL. If 2970265236Sken * cm_out_len is non-zero, this is a bi-directional request, so 2971265236Sken * fill in the OUT SGL first, then the IN SGL, otherwise just 2972265236Sken * fill in the IN SGL. Note that at this time, when filling in 2973265236Sken * 2 SGL's for a bi-directional request, they both use the same 2974265236Sken * DMA buffer (same cm command). 2975265236Sken */ 2976265236Sken saved_buf_len = sge->FlagsLength & 0x00FFFFFF; 2977265236Sken saved_address_low = sge->Address.Low; 2978265236Sken saved_address_high = sge->Address.High; 2979265236Sken if (cm->cm_out_len) { 2980265236Sken sge->FlagsLength = cm->cm_out_len | 2981265236Sken ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2982265236Sken MPI2_SGE_FLAGS_END_OF_BUFFER | 2983265236Sken MPI2_SGE_FLAGS_HOST_TO_IOC | 2984265236Sken MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2985265236Sken MPI2_SGE_FLAGS_SHIFT); 2986265236Sken cm->cm_sglsize -= len; 2987265236Sken /* Endian Safe code */ 2988265236Sken sge_flags = sge->FlagsLength; 2989265236Sken sge->FlagsLength = htole32(sge_flags); 2990265236Sken sge->Address.High = htole32(sge->Address.High); 2991265236Sken sge->Address.Low = htole32(sge->Address.Low); 2992265236Sken bcopy(sge, cm->cm_sge, len); 2993265236Sken cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2994265236Sken } 2995265236Sken sge->FlagsLength = saved_buf_len | 2996265236Sken ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2997265236Sken MPI2_SGE_FLAGS_END_OF_BUFFER | 2998265236Sken MPI2_SGE_FLAGS_LAST_ELEMENT | 2999265236Sken MPI2_SGE_FLAGS_END_OF_LIST | 3000265236Sken MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 3001265236Sken MPI2_SGE_FLAGS_SHIFT); 3002265236Sken if (cm->cm_flags & MPR_CM_FLAGS_DATAIN) { 3003265236Sken sge->FlagsLength |= 3004265236Sken ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) << 3005265236Sken MPI2_SGE_FLAGS_SHIFT); 3006265236Sken } else { 3007265236Sken sge->FlagsLength |= 3008265236Sken ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) << 3009265236Sken MPI2_SGE_FLAGS_SHIFT); 3010265236Sken } 3011265236Sken sge->Address.Low = saved_address_low; 3012265236Sken sge->Address.High = saved_address_high; 3013265236Sken 3014265236Sken cm->cm_sglsize -= len; 3015265236Sken /* Endian Safe code */ 3016265236Sken sge_flags = sge->FlagsLength; 3017265236Sken sge->FlagsLength = htole32(sge_flags); 3018265236Sken sge->Address.High = htole32(sge->Address.High); 3019265236Sken sge->Address.Low = htole32(sge->Address.Low); 3020265236Sken bcopy(sge, cm->cm_sge, len); 3021265236Sken cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 3022265236Sken return (0); 3023265236Sken} 3024265236Sken 3025265236Sken/* 3026265236Sken * Add one IEEE scatter-gather element (chain or simple) to the IEEE scatter- 3027265236Sken * gather list for a command. Maintain cm_sglsize and cm_sge as the 3028265236Sken * remaining size and pointer to the next SGE to fill in, respectively. 3029265236Sken */ 3030265236Skenint 3031265236Skenmpr_push_ieee_sge(struct mpr_command *cm, void *sgep, int segsleft) 3032265236Sken{ 3033265236Sken MPI2_IEEE_SGE_SIMPLE64 *sge = sgep; 3034265236Sken int error, ieee_sge_size = sizeof(MPI25_SGE_IO_UNION); 3035265236Sken uint32_t saved_buf_len, saved_address_low, saved_address_high; 3036265236Sken uint32_t sge_length; 3037265236Sken 3038265236Sken /* 3039265236Sken * case 1: No room for chain or segment (error). 3040265236Sken * case 2: Two or more segments left but only room for chain. 3041265236Sken * case 3: Last segment and room for it, so set flags. 3042265236Sken */ 3043265236Sken 3044265236Sken /* 3045265236Sken * There should be room for at least one element, or there is a big 3046265236Sken * problem. 3047265236Sken */ 3048265236Sken if (cm->cm_sglsize < ieee_sge_size) 3049265236Sken panic("MPR: Need SGE Error Code\n"); 3050265236Sken 3051265236Sken if ((segsleft >= 2) && (cm->cm_sglsize < (ieee_sge_size * 2))) { 3052265236Sken if ((error = mpr_add_chain(cm, segsleft)) != 0) 3053265236Sken return (error); 3054265236Sken } 3055265236Sken 3056265236Sken if (segsleft == 1) { 3057265236Sken /* 3058265236Sken * If this is a bi-directional request, need to account for that 3059265236Sken * here. Save the pre-filled sge values. These will be used 3060265236Sken * either for the 2nd SGL or for a single direction SGL. If 3061265236Sken * cm_out_len is non-zero, this is a bi-directional request, so 3062265236Sken * fill in the OUT SGL first, then the IN SGL, otherwise just 3063265236Sken * fill in the IN SGL. Note that at this time, when filling in 3064265236Sken * 2 SGL's for a bi-directional request, they both use the same 3065265236Sken * DMA buffer (same cm command). 3066265236Sken */ 3067265236Sken saved_buf_len = sge->Length; 3068265236Sken saved_address_low = sge->Address.Low; 3069265236Sken saved_address_high = sge->Address.High; 3070265236Sken if (cm->cm_out_len) { 3071265236Sken sge->Length = cm->cm_out_len; 3072265236Sken sge->Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT | 3073265236Sken MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR); 3074265236Sken cm->cm_sglsize -= ieee_sge_size; 3075265236Sken /* Endian Safe code */ 3076265236Sken sge_length = sge->Length; 3077265236Sken sge->Length = htole32(sge_length); 3078265236Sken sge->Address.High = htole32(sge->Address.High); 3079265236Sken sge->Address.Low = htole32(sge->Address.Low); 3080265236Sken bcopy(sgep, cm->cm_sge, ieee_sge_size); 3081265236Sken cm->cm_sge = 3082265236Sken (MPI25_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + 3083265236Sken ieee_sge_size); 3084265236Sken } 3085265236Sken sge->Length = saved_buf_len; 3086265236Sken sge->Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT | 3087265236Sken MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR | 3088265236Sken MPI25_IEEE_SGE_FLAGS_END_OF_LIST); 3089265236Sken sge->Address.Low = saved_address_low; 3090265236Sken sge->Address.High = saved_address_high; 3091265236Sken } 3092265236Sken 3093265236Sken cm->cm_sglsize -= ieee_sge_size; 3094265236Sken /* Endian Safe code */ 3095265236Sken sge_length = sge->Length; 3096265236Sken sge->Length = htole32(sge_length); 3097265236Sken sge->Address.High = htole32(sge->Address.High); 3098265236Sken sge->Address.Low = htole32(sge->Address.Low); 3099265236Sken bcopy(sgep, cm->cm_sge, ieee_sge_size); 3100265236Sken cm->cm_sge = (MPI25_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + 3101265236Sken ieee_sge_size); 3102265236Sken return (0); 3103265236Sken} 3104265236Sken 3105265236Sken/* 3106265236Sken * Add one dma segment to the scatter-gather list for a command. 3107265236Sken */ 3108265236Skenint 3109265236Skenmpr_add_dmaseg(struct mpr_command *cm, vm_paddr_t pa, size_t len, u_int flags, 3110265236Sken int segsleft) 3111265236Sken{ 3112265236Sken MPI2_SGE_SIMPLE64 sge; 3113265236Sken MPI2_IEEE_SGE_SIMPLE64 ieee_sge; 3114265236Sken 3115265236Sken if (!(cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE)) { 3116265236Sken ieee_sge.Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT | 3117265236Sken MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR); 3118265236Sken ieee_sge.Length = len; 3119265236Sken mpr_from_u64(pa, &ieee_sge.Address); 3120265236Sken 3121265236Sken return (mpr_push_ieee_sge(cm, &ieee_sge, segsleft)); 3122265236Sken } else { 3123265236Sken /* 3124265236Sken * This driver always uses 64-bit address elements for 3125265236Sken * simplicity. 3126265236Sken */ 3127265236Sken flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 3128265236Sken MPI2_SGE_FLAGS_64_BIT_ADDRESSING; 3129265236Sken /* Set Endian safe macro in mpr_push_sge */ 3130265236Sken sge.FlagsLength = len | (flags << MPI2_SGE_FLAGS_SHIFT); 3131265236Sken mpr_from_u64(pa, &sge.Address); 3132265236Sken 3133265236Sken return (mpr_push_sge(cm, &sge, sizeof sge, segsleft)); 3134265236Sken } 3135265236Sken} 3136265236Sken 3137265236Skenstatic void 3138265236Skenmpr_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 3139265236Sken{ 3140265236Sken struct mpr_softc *sc; 3141265236Sken struct mpr_command *cm; 3142265236Sken u_int i, dir, sflags; 3143265236Sken 3144265236Sken cm = (struct mpr_command *)arg; 3145265236Sken sc = cm->cm_sc; 3146265236Sken 3147265236Sken /* 3148265236Sken * In this case, just print out a warning and let the chip tell the 3149265236Sken * user they did the wrong thing. 3150265236Sken */ 3151265236Sken if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { 3152299265Sslm mpr_dprint(sc, MPR_ERROR, "%s: warning: busdma returned %d " 3153299265Sslm "segments, more than the %d allowed\n", __func__, nsegs, 3154299265Sslm cm->cm_max_segs); 3155265236Sken } 3156265236Sken 3157265236Sken /* 3158265236Sken * Set up DMA direction flags. Bi-directional requests are also handled 3159265236Sken * here. In that case, both direction flags will be set. 3160265236Sken */ 3161265236Sken sflags = 0; 3162265236Sken if (cm->cm_flags & MPR_CM_FLAGS_SMP_PASS) { 3163265236Sken /* 3164265236Sken * We have to add a special case for SMP passthrough, there 3165265236Sken * is no easy way to generically handle it. The first 3166265236Sken * S/G element is used for the command (therefore the 3167265236Sken * direction bit needs to be set). The second one is used 3168265236Sken * for the reply. We'll leave it to the caller to make 3169265236Sken * sure we only have two buffers. 3170265236Sken */ 3171265236Sken /* 3172265236Sken * Even though the busdma man page says it doesn't make 3173265236Sken * sense to have both direction flags, it does in this case. 3174265236Sken * We have one s/g element being accessed in each direction. 3175265236Sken */ 3176265236Sken dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; 3177265236Sken 3178265236Sken /* 3179265236Sken * Set the direction flag on the first buffer in the SMP 3180265236Sken * passthrough request. We'll clear it for the second one. 3181265236Sken */ 3182265236Sken sflags |= MPI2_SGE_FLAGS_DIRECTION | 3183265236Sken MPI2_SGE_FLAGS_END_OF_BUFFER; 3184265236Sken } else if (cm->cm_flags & MPR_CM_FLAGS_DATAOUT) { 3185265236Sken sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC; 3186265236Sken dir = BUS_DMASYNC_PREWRITE; 3187265236Sken } else 3188265236Sken dir = BUS_DMASYNC_PREREAD; 3189265236Sken 3190319435Sslm /* Check if a native SG list is needed for an NVMe PCIe device. */ 3191319435Sslm if (cm->cm_targ && cm->cm_targ->is_nvme && 3192319435Sslm mpr_check_pcie_native_sgl(sc, cm, segs, nsegs) == 0) { 3193319435Sslm /* A native SG list was built, skip to end. */ 3194319435Sslm goto out; 3195319435Sslm } 3196319435Sslm 3197265236Sken for (i = 0; i < nsegs; i++) { 3198265236Sken if ((cm->cm_flags & MPR_CM_FLAGS_SMP_PASS) && (i != 0)) { 3199265236Sken sflags &= ~MPI2_SGE_FLAGS_DIRECTION; 3200265236Sken } 3201265236Sken error = mpr_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, 3202265236Sken sflags, nsegs - i); 3203265236Sken if (error != 0) { 3204265236Sken /* Resource shortage, roll back! */ 3205265236Sken if (ratecheck(&sc->lastfail, &mpr_chainfail_interval)) 3206265236Sken mpr_dprint(sc, MPR_INFO, "Out of chain frames, " 3207265236Sken "consider increasing hw.mpr.max_chains.\n"); 3208265236Sken cm->cm_flags |= MPR_CM_FLAGS_CHAIN_FAILED; 3209265236Sken mpr_complete_command(sc, cm); 3210265236Sken return; 3211265236Sken } 3212265236Sken } 3213265236Sken 3214319435Sslmout: 3215265236Sken bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); 3216265236Sken mpr_enqueue_request(sc, cm); 3217265236Sken 3218265236Sken return; 3219265236Sken} 3220265236Sken 3221265236Skenstatic void 3222265236Skenmpr_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, 3223265236Sken int error) 3224265236Sken{ 3225265236Sken mpr_data_cb(arg, segs, nsegs, error); 3226265236Sken} 3227265236Sken 3228265236Sken/* 3229265236Sken * This is the routine to enqueue commands ansynchronously. 3230265236Sken * Note that the only error path here is from bus_dmamap_load(), which can 3231265236Sken * return EINPROGRESS if it is waiting for resources. Other than this, it's 3232265236Sken * assumed that if you have a command in-hand, then you have enough credits 3233265236Sken * to use it. 3234265236Sken */ 3235265236Skenint 3236265236Skenmpr_map_command(struct mpr_softc *sc, struct mpr_command *cm) 3237265236Sken{ 3238265236Sken int error = 0; 3239265236Sken 3240265236Sken if (cm->cm_flags & MPR_CM_FLAGS_USE_UIO) { 3241265236Sken error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, 3242265236Sken &cm->cm_uio, mpr_data_cb2, cm, 0); 3243265236Sken } else if (cm->cm_flags & MPR_CM_FLAGS_USE_CCB) { 3244265236Sken error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap, 3245265236Sken cm->cm_data, mpr_data_cb, cm, 0); 3246265236Sken } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { 3247265236Sken error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, 3248265236Sken cm->cm_data, cm->cm_length, mpr_data_cb, cm, 0); 3249265236Sken } else { 3250265236Sken /* Add a zero-length element as needed */ 3251265236Sken if (cm->cm_sge != NULL) 3252265236Sken mpr_add_dmaseg(cm, 0, 0, 0, 1); 3253265236Sken mpr_enqueue_request(sc, cm); 3254265236Sken } 3255265236Sken 3256265236Sken return (error); 3257265236Sken} 3258265236Sken 3259265236Sken/* 3260265236Sken * This is the routine to enqueue commands synchronously. An error of 3261265236Sken * EINPROGRESS from mpr_map_command() is ignored since the command will 3262265236Sken * be executed and enqueued automatically. Other errors come from msleep(). 3263265236Sken */ 3264265236Skenint 3265265236Skenmpr_wait_command(struct mpr_softc *sc, struct mpr_command *cm, int timeout, 3266265236Sken int sleep_flag) 3267265236Sken{ 3268265236Sken int error, rc; 3269265236Sken struct timeval cur_time, start_time; 3270265236Sken 3271265236Sken if (sc->mpr_flags & MPR_FLAGS_DIAGRESET) 3272265236Sken return EBUSY; 3273265236Sken 3274265236Sken cm->cm_complete = NULL; 3275265236Sken cm->cm_flags |= (MPR_CM_FLAGS_WAKEUP + MPR_CM_FLAGS_POLLED); 3276265236Sken error = mpr_map_command(sc, cm); 3277265236Sken if ((error != 0) && (error != EINPROGRESS)) 3278265236Sken return (error); 3279265236Sken 3280265236Sken // Check for context and wait for 50 mSec at a time until time has 3281265236Sken // expired or the command has finished. If msleep can't be used, need 3282265236Sken // to poll. 3283265236Sken#if __FreeBSD_version >= 1000029 3284265236Sken if (curthread->td_no_sleeping) 3285265236Sken#else //__FreeBSD_version < 1000029 3286265236Sken if (curthread->td_pflags & TDP_NOSLEEPING) 3287265236Sken#endif //__FreeBSD_version >= 1000029 3288265236Sken sleep_flag = NO_SLEEP; 3289265236Sken getmicrotime(&start_time); 3290265236Sken if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) { 3291265236Sken error = msleep(cm, &sc->mpr_mtx, 0, "mprwait", timeout*hz); 3292265236Sken } else { 3293265236Sken while ((cm->cm_flags & MPR_CM_FLAGS_COMPLETE) == 0) { 3294265236Sken mpr_intr_locked(sc); 3295265236Sken if (sleep_flag == CAN_SLEEP) 3296265236Sken pause("mprwait", hz/20); 3297265236Sken else 3298265236Sken DELAY(50000); 3299265236Sken 3300265236Sken getmicrotime(&cur_time); 3301265236Sken if ((cur_time.tv_sec - start_time.tv_sec) > timeout) { 3302265236Sken error = EWOULDBLOCK; 3303265236Sken break; 3304265236Sken } 3305265236Sken } 3306265236Sken } 3307265236Sken 3308265236Sken if (error == EWOULDBLOCK) { 3309265236Sken mpr_dprint(sc, MPR_FAULT, "Calling Reinit from %s\n", __func__); 3310265236Sken rc = mpr_reinit(sc); 3311265236Sken mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ? "success" : 3312265236Sken "failed"); 3313265236Sken error = ETIMEDOUT; 3314265236Sken } 3315265236Sken return (error); 3316265236Sken} 3317265236Sken 3318265236Sken/* 3319265236Sken * This is the routine to enqueue a command synchonously and poll for 3320265236Sken * completion. Its use should be rare. 3321265236Sken */ 3322265236Skenint 3323265236Skenmpr_request_polled(struct mpr_softc *sc, struct mpr_command *cm) 3324265236Sken{ 3325265236Sken int error, timeout = 0, rc; 3326265236Sken struct timeval cur_time, start_time; 3327265236Sken 3328265236Sken error = 0; 3329265236Sken 3330265236Sken cm->cm_flags |= MPR_CM_FLAGS_POLLED; 3331265236Sken cm->cm_complete = NULL; 3332265236Sken mpr_map_command(sc, cm); 3333265236Sken 3334265236Sken getmicrotime(&start_time); 3335265236Sken while ((cm->cm_flags & MPR_CM_FLAGS_COMPLETE) == 0) { 3336265236Sken mpr_intr_locked(sc); 3337265236Sken 3338265236Sken if (mtx_owned(&sc->mpr_mtx)) 3339265236Sken msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, 3340265236Sken "mprpoll", hz/20); 3341265236Sken else 3342265236Sken pause("mprpoll", hz/20); 3343265236Sken 3344265236Sken /* 3345265236Sken * Check for real-time timeout and fail if more than 60 seconds. 3346265236Sken */ 3347265236Sken getmicrotime(&cur_time); 3348265236Sken timeout = cur_time.tv_sec - start_time.tv_sec; 3349265236Sken if (timeout > 60) { 3350265236Sken mpr_dprint(sc, MPR_FAULT, "polling failed\n"); 3351265236Sken error = ETIMEDOUT; 3352265236Sken break; 3353265236Sken } 3354265236Sken } 3355265236Sken 3356283661Sslm if (error) { 3357265236Sken mpr_dprint(sc, MPR_FAULT, "Calling Reinit from %s\n", __func__); 3358265236Sken rc = mpr_reinit(sc); 3359299265Sslm mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ? "success" : 3360299265Sslm "failed"); 3361265236Sken } 3362265236Sken return (error); 3363265236Sken} 3364265236Sken 3365265236Sken/* 3366265236Sken * The MPT driver had a verbose interface for config pages. In this driver, 3367298955Spfg * reduce it to much simpler terms, similar to the Linux driver. 3368265236Sken */ 3369265236Skenint 3370265236Skenmpr_read_config_page(struct mpr_softc *sc, struct mpr_config_params *params) 3371265236Sken{ 3372265236Sken MPI2_CONFIG_REQUEST *req; 3373265236Sken struct mpr_command *cm; 3374265236Sken int error; 3375265236Sken 3376265236Sken if (sc->mpr_flags & MPR_FLAGS_BUSY) { 3377265236Sken return (EBUSY); 3378265236Sken } 3379265236Sken 3380265236Sken cm = mpr_alloc_command(sc); 3381265236Sken if (cm == NULL) { 3382265236Sken return (EBUSY); 3383265236Sken } 3384265236Sken 3385265236Sken req = (MPI2_CONFIG_REQUEST *)cm->cm_req; 3386265236Sken req->Function = MPI2_FUNCTION_CONFIG; 3387265236Sken req->Action = params->action; 3388265236Sken req->SGLFlags = 0; 3389265236Sken req->ChainOffset = 0; 3390265236Sken req->PageAddress = params->page_address; 3391265236Sken if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3392265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; 3393265236Sken 3394265236Sken hdr = ¶ms->hdr.Ext; 3395265236Sken req->ExtPageType = hdr->ExtPageType; 3396265236Sken req->ExtPageLength = hdr->ExtPageLength; 3397265236Sken req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; 3398265236Sken req->Header.PageLength = 0; /* Must be set to zero */ 3399265236Sken req->Header.PageNumber = hdr->PageNumber; 3400265236Sken req->Header.PageVersion = hdr->PageVersion; 3401265236Sken } else { 3402265236Sken MPI2_CONFIG_PAGE_HEADER *hdr; 3403265236Sken 3404265236Sken hdr = ¶ms->hdr.Struct; 3405265236Sken req->Header.PageType = hdr->PageType; 3406265236Sken req->Header.PageNumber = hdr->PageNumber; 3407265236Sken req->Header.PageLength = hdr->PageLength; 3408265236Sken req->Header.PageVersion = hdr->PageVersion; 3409265236Sken } 3410265236Sken 3411265236Sken cm->cm_data = params->buffer; 3412265236Sken cm->cm_length = params->length; 3413283661Sslm if (cm->cm_data != NULL) { 3414283661Sslm cm->cm_sge = &req->PageBufferSGE; 3415283661Sslm cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); 3416283661Sslm cm->cm_flags = MPR_CM_FLAGS_SGE_SIMPLE | MPR_CM_FLAGS_DATAIN; 3417283661Sslm } else 3418283661Sslm cm->cm_sge = NULL; 3419265236Sken cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 3420265236Sken 3421265236Sken cm->cm_complete_data = params; 3422265236Sken if (params->callback != NULL) { 3423265236Sken cm->cm_complete = mpr_config_complete; 3424265236Sken return (mpr_map_command(sc, cm)); 3425265236Sken } else { 3426265236Sken error = mpr_wait_command(sc, cm, 0, CAN_SLEEP); 3427265236Sken if (error) { 3428265236Sken mpr_dprint(sc, MPR_FAULT, 3429265236Sken "Error %d reading config page\n", error); 3430265236Sken mpr_free_command(sc, cm); 3431265236Sken return (error); 3432265236Sken } 3433265236Sken mpr_config_complete(sc, cm); 3434265236Sken } 3435265236Sken 3436265236Sken return (0); 3437265236Sken} 3438265236Sken 3439265236Skenint 3440265236Skenmpr_write_config_page(struct mpr_softc *sc, struct mpr_config_params *params) 3441265236Sken{ 3442265236Sken return (EINVAL); 3443265236Sken} 3444265236Sken 3445265236Skenstatic void 3446265236Skenmpr_config_complete(struct mpr_softc *sc, struct mpr_command *cm) 3447265236Sken{ 3448265236Sken MPI2_CONFIG_REPLY *reply; 3449265236Sken struct mpr_config_params *params; 3450265236Sken 3451265236Sken MPR_FUNCTRACE(sc); 3452265236Sken params = cm->cm_complete_data; 3453265236Sken 3454265236Sken if (cm->cm_data != NULL) { 3455265236Sken bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, 3456265236Sken BUS_DMASYNC_POSTREAD); 3457265236Sken bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); 3458265236Sken } 3459265236Sken 3460265236Sken /* 3461265236Sken * XXX KDM need to do more error recovery? This results in the 3462265236Sken * device in question not getting probed. 3463265236Sken */ 3464265236Sken if ((cm->cm_flags & MPR_CM_FLAGS_ERROR_MASK) != 0) { 3465265236Sken params->status = MPI2_IOCSTATUS_BUSY; 3466265236Sken goto done; 3467265236Sken } 3468265236Sken 3469265236Sken reply = (MPI2_CONFIG_REPLY *)cm->cm_reply; 3470265236Sken if (reply == NULL) { 3471265236Sken params->status = MPI2_IOCSTATUS_BUSY; 3472265236Sken goto done; 3473265236Sken } 3474265236Sken params->status = reply->IOCStatus; 3475283661Sslm if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3476265236Sken params->hdr.Ext.ExtPageType = reply->ExtPageType; 3477265236Sken params->hdr.Ext.ExtPageLength = reply->ExtPageLength; 3478283661Sslm params->hdr.Ext.PageType = reply->Header.PageType; 3479283661Sslm params->hdr.Ext.PageNumber = reply->Header.PageNumber; 3480283661Sslm params->hdr.Ext.PageVersion = reply->Header.PageVersion; 3481265236Sken } else { 3482265236Sken params->hdr.Struct.PageType = reply->Header.PageType; 3483265236Sken params->hdr.Struct.PageNumber = reply->Header.PageNumber; 3484265236Sken params->hdr.Struct.PageLength = reply->Header.PageLength; 3485265236Sken params->hdr.Struct.PageVersion = reply->Header.PageVersion; 3486265236Sken } 3487265236Sken 3488265236Skendone: 3489265236Sken mpr_free_command(sc, cm); 3490265236Sken if (params->callback != NULL) 3491265236Sken params->callback(sc, params); 3492265236Sken 3493265236Sken return; 3494265236Sken} 3495