1265236Sken/*- 2283661Sslm * Copyright (c) 2012-2015 LSI Corp. 3299263Sslm * Copyright (c) 2013-2016 Avago Technologies 4265236Sken * All rights reserved. 5265236Sken * 6265236Sken * Redistribution and use in source and binary forms, with or without 7265236Sken * modification, are permitted provided that the following conditions 8265236Sken * are met: 9265236Sken * 1. Redistributions of source code must retain the above copyright 10265236Sken * notice, this list of conditions and the following disclaimer. 11265236Sken * 2. Redistributions in binary form must reproduce the above copyright 12265236Sken * notice, this list of conditions and the following disclaimer in the 13265236Sken * documentation and/or other materials provided with the distribution. 14265236Sken * 3. Neither the name of the author nor the names of any co-contributors 15265236Sken * may be used to endorse or promote products derived from this software 16265236Sken * without specific prior written permission. 17265236Sken * 18265236Sken * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19265236Sken * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20265236Sken * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21265236Sken * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22265236Sken * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23265236Sken * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24265236Sken * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25265236Sken * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26265236Sken * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27265236Sken * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28265236Sken * SUCH DAMAGE. 29265236Sken * 30283661Sslm * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 31265236Sken * 32265236Sken * $FreeBSD: stable/11/sys/dev/mpr/mpi/mpi2_ioc.h 331903 2018-04-03 02:29:17Z mav $ 33265236Sken */ 34265236Sken 35265236Sken/* 36283661Sslm * Copyright (c) 2000-2015 LSI Corporation. 37299263Sslm * Copyright (c) 2013-2016 Avago Technologies 38299263Sslm * All rights reserved. 39265236Sken * 40265236Sken * 41265236Sken * Name: mpi2_ioc.h 42265236Sken * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages 43265236Sken * Creation Date: October 11, 2006 44265236Sken * 45331903Smav * mpi2_ioc.h Version: 02.00.32 46265236Sken * 47265236Sken * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 48265236Sken * prefix are for use only on MPI v2.5 products, and must not be used 49265236Sken * with MPI v2.0 products. Unless otherwise noted, names beginning with 50265236Sken * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products. 51265236Sken * 52265236Sken * Version History 53265236Sken * --------------- 54265236Sken * 55265236Sken * Date Version Description 56265236Sken * -------- -------- ------------------------------------------------------ 57265236Sken * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. 58265236Sken * 06-04-07 02.00.01 In IOCFacts Reply structure, renamed MaxDevices to 59265236Sken * MaxTargets. 60265236Sken * Added TotalImageSize field to FWDownload Request. 61265236Sken * Added reserved words to FWUpload Request. 62265236Sken * 06-26-07 02.00.02 Added IR Configuration Change List Event. 63265236Sken * 08-31-07 02.00.03 Removed SystemReplyQueueDepth field from the IOCInit 64265236Sken * request and replaced it with 65265236Sken * ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth. 66265236Sken * Replaced the MinReplyQueueDepth field of the IOCFacts 67265236Sken * reply with MaxReplyDescriptorPostQueueDepth. 68265236Sken * Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum 69265236Sken * depth for the Reply Descriptor Post Queue. 70265236Sken * Added SASAddress field to Initiator Device Table 71265236Sken * Overflow Event data. 72265236Sken * 10-31-07 02.00.04 Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING 73265236Sken * for SAS Initiator Device Status Change Event data. 74265236Sken * Modified Reason Code defines for SAS Topology Change 75265236Sken * List Event data, including adding a bit for PHY Vacant 76265236Sken * status, and adding a mask for the Reason Code. 77265236Sken * Added define for 78265236Sken * MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING. 79265236Sken * Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID. 80265236Sken * 12-18-07 02.00.05 Added Boot Status defines for the IOCExceptions field of 81265236Sken * the IOCFacts Reply. 82265236Sken * Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define. 83265236Sken * Moved MPI2_VERSION_UNION to mpi2.h. 84265236Sken * Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks 85265236Sken * instead of enables, and added SASBroadcastPrimitiveMasks 86265236Sken * field. 87265236Sken * Added Log Entry Added Event and related structure. 88265236Sken * 02-29-08 02.00.06 Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID. 89265236Sken * Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET. 90265236Sken * Added MaxVolumes and MaxPersistentEntries fields to 91265236Sken * IOCFacts reply. 92265236Sken * Added ProtocalFlags and IOCCapabilities fields to 93265236Sken * MPI2_FW_IMAGE_HEADER. 94265236Sken * Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT. 95265236Sken * 03-03-08 02.00.07 Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to 96265236Sken * a U16 (from a U32). 97265236Sken * Removed extra 's' from EventMasks name. 98265236Sken * 06-27-08 02.00.08 Fixed an offset in a comment. 99265236Sken * 10-02-08 02.00.09 Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST. 100265236Sken * Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and 101265236Sken * renamed MinReplyFrameSize to ReplyFrameSize. 102265236Sken * Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX. 103265236Sken * Added two new RAIDOperation values for Integrated RAID 104265236Sken * Operations Status Event data. 105265236Sken * Added four new IR Configuration Change List Event data 106265236Sken * ReasonCode values. 107265236Sken * Added two new ReasonCode defines for SAS Device Status 108265236Sken * Change Event data. 109265236Sken * Added three new DiscoveryStatus bits for the SAS 110265236Sken * Discovery event data. 111265236Sken * Added Multiplexing Status Change bit to the PhyStatus 112265236Sken * field of the SAS Topology Change List event data. 113265236Sken * Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY. 114265236Sken * BootFlags are now product-specific. 115265236Sken * Added defines for the indivdual signature bytes 116265236Sken * for MPI2_INIT_IMAGE_FOOTER. 117265236Sken * 01-19-09 02.00.10 Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define. 118265236Sken * Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR 119265236Sken * define. 120265236Sken * Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE 121265236Sken * define. 122265236Sken * Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define. 123265236Sken * 05-06-09 02.00.11 Added MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR define. 124265236Sken * Added MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX define. 125265236Sken * Added two new reason codes for SAS Device Status Change 126265236Sken * Event. 127265236Sken * Added new event: SAS PHY Counter. 128265236Sken * 07-30-09 02.00.12 Added GPIO Interrupt event define and structure. 129265236Sken * Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define. 130265236Sken * Added new product id family for 2208. 131265236Sken * 10-28-09 02.00.13 Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST. 132265236Sken * Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY. 133265236Sken * Added MinDevHandle field to MPI2_IOC_FACTS_REPLY. 134265236Sken * Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY. 135265236Sken * Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define. 136265236Sken * Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define. 137265236Sken * Added Host Based Discovery Phy Event data. 138265236Sken * Added defines for ProductID Product field 139265236Sken * (MPI2_FW_HEADER_PID_). 140265236Sken * Modified values for SAS ProductID Family 141265236Sken * (MPI2_FW_HEADER_PID_FAMILY_). 142265236Sken * 02-10-10 02.00.14 Added SAS Quiesce Event structure and defines. 143265236Sken * Added PowerManagementControl Request structures and 144265236Sken * defines. 145265236Sken * 05-12-10 02.00.15 Marked Task Set Full Event as obsolete. 146265236Sken * Added MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY define. 147265236Sken * 11-10-10 02.00.16 Added MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC. 148265236Sken * 02-23-11 02.00.17 Added SAS NOTIFY Primitive event, and added 149265236Sken * SASNotifyPrimitiveMasks field to 150265236Sken * MPI2_EVENT_NOTIFICATION_REQUEST. 151265236Sken * Added Temperature Threshold Event. 152265236Sken * Added Host Message Event. 153265236Sken * Added Send Host Message request and reply. 154265236Sken * 05-25-11 02.00.18 For Extended Image Header, added 155265236Sken * MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC and 156265236Sken * MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC defines. 157265236Sken * Deprecated MPI2_EXT_IMAGE_TYPE_MAX define. 158265236Sken * 08-24-11 02.00.19 Added PhysicalPort field to 159265236Sken * MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE structure. 160265236Sken * Marked MPI2_PM_CONTROL_FEATURE_PCIE_LINK as obsolete. 161265236Sken * 11-18-11 02.00.20 Incorporating additions for MPI v2.5. 162265236Sken * 03-29-12 02.00.21 Added a product specific range to event values. 163265236Sken * 07-26-12 02.00.22 Added MPI2_IOCFACTS_EXCEPT_PARTIAL_MEMORY_FAILURE. 164265236Sken * Added ElapsedSeconds field to 165265236Sken * MPI2_EVENT_DATA_IR_OPERATION_STATUS. 166265236Sken * 08-19-13 02.00.23 For IOCInit, added MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE 167265236Sken * and MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY. 168265236Sken * Added MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE. 169265236Sken * Added MPI2_FW_DOWNLOAD_ITYPE_PUBLIC_KEY. 170265236Sken * Added Encrypted Hash Extended Image. 171265236Sken * 12-05-13 02.00.24 Added MPI25_HASH_IMAGE_TYPE_BIOS. 172299263Sslm * 11-18-14 02.00.25 Updated copyright information. 173299263Sslm * 03-16-15 02.00.26 Updated for MPI v2.6. 174299263Sslm * Added MPI2_EVENT_ACTIVE_CABLE_EXCEPTION and 175299263Sslm * MPI26_EVENT_DATA_ACTIVE_CABLE_EXCEPT. 176299263Sslm * Added MPI2_EVENT_PCIE_LINK_COUNTER and 177299263Sslm * MPI26_EVENT_DATA_PCIE_LINK_COUNTER. 178299263Sslm * Added MPI26_CTRL_OP_SHUTDOWN. 179299263Sslm * Added MPI26_CTRL_OP_LINK_CLEAR_ERROR_LOG 180319435Sslm * Added MPI26_FW_HEADER_PID_FAMILY_3324_SAS and 181319435Sslm * MPI26_FW_HEADER_PID_FAMILY_3516_SAS. 182319435Sslm * 08-25-15 02.00.27 Added IC ARCH Class based signature defines. 183319435Sslm * Added MPI26_EVENT_PCIE_ENUM_ES_RESOURCES_EXHAUSTED event. 184319435Sslm * Added ConigurationFlags field to IOCInit message to 185319435Sslm * support NVMe SGL format control. 186319435Sslm * Added PCIe SRIOV support. 187319435Sslm * 02-17-16 02.00.28 Added SAS 4 22.5 gbs speed support. 188319435Sslm * Added PCIe 4 16.0 GT/sec speec support. 189319435Sslm * Removed AHCI support. 190319435Sslm * Removed SOP support. 191319435Sslm * 07-01-16 02.00.29 Added Archclass for 4008 product. 192319435Sslm * Added IOCException MPI2_IOCFACTS_EXCEPT_PCIE_DISABLED 193319435Sslm * 08-23-16 02.00.30 Added new defines for the ImageType field of FWDownload 194319435Sslm * Request Message. 195319435Sslm * Added new defines for the ImageType field of FWUpload 196319435Sslm * Request Message. 197319435Sslm * Added new values for the RegionType field in the Layout 198319435Sslm * Data sections of the FLASH Layout Extended Image Data. 199319435Sslm * Added new defines for the ReasonCode field of 200319435Sslm * Active Cable Exception Event. 201319435Sslm * Added MPI2_EVENT_ENCL_DEVICE_STATUS_CHANGE and 202319435Sslm * MPI26_EVENT_DATA_ENCL_DEV_STATUS_CHANGE. 203331903Smav * 11-23-16 02.00.31 Added MPI2_EVENT_SAS_DEVICE_DISCOVERY_ERROR and 204331903Smav * MPI25_EVENT_DATA_SAS_DEVICE_DISCOVERY_ERROR. 205331903Smav * 02-02-17 02.00.32 Added MPI2_FW_DOWNLOAD_ITYPE_CBB_BACKUP. 206331903Smav * Added MPI25_EVENT_DATA_ACTIVE_CABLE_EXCEPT and related 207331903Smav * defines for the ReasonCode field. 208265236Sken * -------------------------------------------------------------------------- 209265236Sken */ 210265236Sken 211265236Sken#ifndef MPI2_IOC_H 212265236Sken#define MPI2_IOC_H 213265236Sken 214265236Sken/***************************************************************************** 215265236Sken* 216265236Sken* IOC Messages 217265236Sken* 218265236Sken*****************************************************************************/ 219265236Sken 220265236Sken/**************************************************************************** 221265236Sken* IOCInit message 222265236Sken****************************************************************************/ 223265236Sken 224265236Sken/* IOCInit Request message */ 225265236Skentypedef struct _MPI2_IOC_INIT_REQUEST 226265236Sken{ 227265236Sken U8 WhoInit; /* 0x00 */ 228265236Sken U8 Reserved1; /* 0x01 */ 229265236Sken U8 ChainOffset; /* 0x02 */ 230265236Sken U8 Function; /* 0x03 */ 231265236Sken U16 Reserved2; /* 0x04 */ 232265236Sken U8 Reserved3; /* 0x06 */ 233265236Sken U8 MsgFlags; /* 0x07 */ 234265236Sken U8 VP_ID; /* 0x08 */ 235265236Sken U8 VF_ID; /* 0x09 */ 236265236Sken U16 Reserved4; /* 0x0A */ 237265236Sken U16 MsgVersion; /* 0x0C */ 238265236Sken U16 HeaderVersion; /* 0x0E */ 239265236Sken U32 Reserved5; /* 0x10 */ 240299263Sslm U16 ConfigurationFlags; /* 0x14 */ 241299263Sslm U8 HostPageSize; /* 0x16 */ 242265236Sken U8 HostMSIxVectors; /* 0x17 */ 243265236Sken U16 Reserved8; /* 0x18 */ 244265236Sken U16 SystemRequestFrameSize; /* 0x1A */ 245265236Sken U16 ReplyDescriptorPostQueueDepth; /* 0x1C */ 246265236Sken U16 ReplyFreeQueueDepth; /* 0x1E */ 247265236Sken U32 SenseBufferAddressHigh; /* 0x20 */ 248265236Sken U32 SystemReplyAddressHigh; /* 0x24 */ 249265236Sken U64 SystemRequestFrameBaseAddress; /* 0x28 */ 250265236Sken U64 ReplyDescriptorPostQueueAddress;/* 0x30 */ 251265236Sken U64 ReplyFreeQueueAddress; /* 0x38 */ 252265236Sken U64 TimeStamp; /* 0x40 */ 253265236Sken} MPI2_IOC_INIT_REQUEST, MPI2_POINTER PTR_MPI2_IOC_INIT_REQUEST, 254265236Sken Mpi2IOCInitRequest_t, MPI2_POINTER pMpi2IOCInitRequest_t; 255265236Sken 256265236Sken/* WhoInit values */ 257265236Sken#define MPI2_WHOINIT_NOT_INITIALIZED (0x00) 258265236Sken#define MPI2_WHOINIT_SYSTEM_BIOS (0x01) 259265236Sken#define MPI2_WHOINIT_ROM_BIOS (0x02) 260265236Sken#define MPI2_WHOINIT_PCI_PEER (0x03) 261265236Sken#define MPI2_WHOINIT_HOST_DRIVER (0x04) 262265236Sken#define MPI2_WHOINIT_MANUFACTURER (0x05) 263265236Sken 264265236Sken/* MsgFlags */ 265265236Sken#define MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE (0x01) 266265236Sken 267265236Sken/* MsgVersion */ 268265236Sken#define MPI2_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00) 269265236Sken#define MPI2_IOCINIT_MSGVERSION_MAJOR_SHIFT (8) 270265236Sken#define MPI2_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF) 271265236Sken#define MPI2_IOCINIT_MSGVERSION_MINOR_SHIFT (0) 272265236Sken 273265236Sken/* HeaderVersion */ 274265236Sken#define MPI2_IOCINIT_HDRVERSION_UNIT_MASK (0xFF00) 275265236Sken#define MPI2_IOCINIT_HDRVERSION_UNIT_SHIFT (8) 276265236Sken#define MPI2_IOCINIT_HDRVERSION_DEV_MASK (0x00FF) 277265236Sken#define MPI2_IOCINIT_HDRVERSION_DEV_SHIFT (0) 278265236Sken 279319435Sslm/* ConfigurationFlags */ 280319435Sslm#define MPI26_IOCINIT_CFGFLAGS_NVME_SGL_FORMAT (0x0001) 281319435Sslm 282265236Sken/* minimum depth for a Reply Descriptor Post Queue */ 283265236Sken#define MPI2_RDPQ_DEPTH_MIN (16) 284265236Sken 285265236Sken/* Reply Descriptor Post Queue Array Entry */ 286265236Skentypedef struct _MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY 287265236Sken{ 288265236Sken U64 RDPQBaseAddress; /* 0x00 */ 289265236Sken U32 Reserved1; /* 0x08 */ 290265236Sken U32 Reserved2; /* 0x0C */ 291265236Sken} MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY, 292265236Sken MPI2_POINTER PTR_MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY, 293265236Sken Mpi2IOCInitRDPQArrayEntry, MPI2_POINTER pMpi2IOCInitRDPQArrayEntry; 294265236Sken 295265236Sken/* IOCInit Reply message */ 296265236Skentypedef struct _MPI2_IOC_INIT_REPLY 297265236Sken{ 298265236Sken U8 WhoInit; /* 0x00 */ 299265236Sken U8 Reserved1; /* 0x01 */ 300265236Sken U8 MsgLength; /* 0x02 */ 301265236Sken U8 Function; /* 0x03 */ 302265236Sken U16 Reserved2; /* 0x04 */ 303265236Sken U8 Reserved3; /* 0x06 */ 304265236Sken U8 MsgFlags; /* 0x07 */ 305265236Sken U8 VP_ID; /* 0x08 */ 306265236Sken U8 VF_ID; /* 0x09 */ 307265236Sken U16 Reserved4; /* 0x0A */ 308265236Sken U16 Reserved5; /* 0x0C */ 309265236Sken U16 IOCStatus; /* 0x0E */ 310265236Sken U32 IOCLogInfo; /* 0x10 */ 311265236Sken} MPI2_IOC_INIT_REPLY, MPI2_POINTER PTR_MPI2_IOC_INIT_REPLY, 312265236Sken Mpi2IOCInitReply_t, MPI2_POINTER pMpi2IOCInitReply_t; 313265236Sken 314265236Sken 315265236Sken/**************************************************************************** 316265236Sken* IOCFacts message 317265236Sken****************************************************************************/ 318265236Sken 319265236Sken/* IOCFacts Request message */ 320265236Skentypedef struct _MPI2_IOC_FACTS_REQUEST 321265236Sken{ 322265236Sken U16 Reserved1; /* 0x00 */ 323265236Sken U8 ChainOffset; /* 0x02 */ 324265236Sken U8 Function; /* 0x03 */ 325265236Sken U16 Reserved2; /* 0x04 */ 326265236Sken U8 Reserved3; /* 0x06 */ 327265236Sken U8 MsgFlags; /* 0x07 */ 328265236Sken U8 VP_ID; /* 0x08 */ 329265236Sken U8 VF_ID; /* 0x09 */ 330265236Sken U16 Reserved4; /* 0x0A */ 331265236Sken} MPI2_IOC_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_IOC_FACTS_REQUEST, 332265236Sken Mpi2IOCFactsRequest_t, MPI2_POINTER pMpi2IOCFactsRequest_t; 333265236Sken 334265236Sken 335265236Sken/* IOCFacts Reply message */ 336265236Skentypedef struct _MPI2_IOC_FACTS_REPLY 337265236Sken{ 338265236Sken U16 MsgVersion; /* 0x00 */ 339265236Sken U8 MsgLength; /* 0x02 */ 340265236Sken U8 Function; /* 0x03 */ 341265236Sken U16 HeaderVersion; /* 0x04 */ 342265236Sken U8 IOCNumber; /* 0x06 */ 343265236Sken U8 MsgFlags; /* 0x07 */ 344265236Sken U8 VP_ID; /* 0x08 */ 345265236Sken U8 VF_ID; /* 0x09 */ 346265236Sken U16 Reserved1; /* 0x0A */ 347265236Sken U16 IOCExceptions; /* 0x0C */ 348265236Sken U16 IOCStatus; /* 0x0E */ 349265236Sken U32 IOCLogInfo; /* 0x10 */ 350265236Sken U8 MaxChainDepth; /* 0x14 */ 351265236Sken U8 WhoInit; /* 0x15 */ 352265236Sken U8 NumberOfPorts; /* 0x16 */ 353265236Sken U8 MaxMSIxVectors; /* 0x17 */ 354265236Sken U16 RequestCredit; /* 0x18 */ 355265236Sken U16 ProductID; /* 0x1A */ 356265236Sken U32 IOCCapabilities; /* 0x1C */ 357265236Sken MPI2_VERSION_UNION FWVersion; /* 0x20 */ 358265236Sken U16 IOCRequestFrameSize; /* 0x24 */ 359265236Sken U16 IOCMaxChainSegmentSize; /* 0x26 */ /* MPI 2.5 only; Reserved in MPI 2.0 */ 360265236Sken U16 MaxInitiators; /* 0x28 */ 361265236Sken U16 MaxTargets; /* 0x2A */ 362265236Sken U16 MaxSasExpanders; /* 0x2C */ 363265236Sken U16 MaxEnclosures; /* 0x2E */ 364265236Sken U16 ProtocolFlags; /* 0x30 */ 365265236Sken U16 HighPriorityCredit; /* 0x32 */ 366265236Sken U16 MaxReplyDescriptorPostQueueDepth; /* 0x34 */ 367265236Sken U8 ReplyFrameSize; /* 0x36 */ 368265236Sken U8 MaxVolumes; /* 0x37 */ 369265236Sken U16 MaxDevHandle; /* 0x38 */ 370265236Sken U16 MaxPersistentEntries; /* 0x3A */ 371265236Sken U16 MinDevHandle; /* 0x3C */ 372299263Sslm U8 CurrentHostPageSize; /* 0x3E */ 373299263Sslm U8 Reserved4; /* 0x3F */ 374299263Sslm U8 SGEModifierMask; /* 0x40 */ 375299263Sslm U8 SGEModifierValue; /* 0x41 */ 376299263Sslm U8 SGEModifierShift; /* 0x42 */ 377299263Sslm U8 Reserved5; /* 0x43 */ 378265236Sken} MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY, 379265236Sken Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t; 380265236Sken 381265236Sken/* MsgVersion */ 382265236Sken#define MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00) 383265236Sken#define MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8) 384265236Sken#define MPI2_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF) 385265236Sken#define MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT (0) 386265236Sken 387265236Sken/* HeaderVersion */ 388265236Sken#define MPI2_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00) 389265236Sken#define MPI2_IOCFACTS_HDRVERSION_UNIT_SHIFT (8) 390265236Sken#define MPI2_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF) 391265236Sken#define MPI2_IOCFACTS_HDRVERSION_DEV_SHIFT (0) 392265236Sken 393265236Sken/* IOCExceptions */ 394319435Sslm#define MPI2_IOCFACTS_EXCEPT_PCIE_DISABLED (0x0400) 395265236Sken#define MPI2_IOCFACTS_EXCEPT_PARTIAL_MEMORY_FAILURE (0x0200) 396265236Sken#define MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX (0x0100) 397265236Sken 398265236Sken#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_MASK (0x00E0) 399265236Sken#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_GOOD (0x0000) 400265236Sken#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_BACKUP (0x0020) 401265236Sken#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_RESTORED (0x0040) 402265236Sken#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_CORRUPT_BACKUP (0x0060) 403265236Sken 404265236Sken#define MPI2_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010) 405265236Sken#define MPI2_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL (0x0008) 406265236Sken#define MPI2_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004) 407265236Sken#define MPI2_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002) 408265236Sken#define MPI2_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001) 409265236Sken 410265236Sken/* defines for WhoInit field are after the IOCInit Request */ 411265236Sken 412265236Sken/* ProductID field uses MPI2_FW_HEADER_PID_ */ 413265236Sken 414265236Sken/* IOCCapabilities */ 415319435Sslm#define MPI26_IOCFACTS_CAPABILITY_PCIE_SRIOV (0x00100000) 416319435Sslm#define MPI26_IOCFACTS_CAPABILITY_ATOMIC_REQ (0x00080000) 417265236Sken#define MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE (0x00040000) 418265236Sken#define MPI25_IOCFACTS_CAPABILITY_FAST_PATH_CAPABLE (0x00020000) 419265236Sken#define MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY (0x00010000) 420265236Sken#define MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX (0x00008000) 421265236Sken#define MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR (0x00004000) 422265236Sken#define MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY (0x00002000) 423265236Sken#define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID (0x00001000) 424265236Sken#define MPI2_IOCFACTS_CAPABILITY_TLR (0x00000800) 425265236Sken#define MPI2_IOCFACTS_CAPABILITY_MULTICAST (0x00000100) 426265236Sken#define MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET (0x00000080) 427265236Sken#define MPI2_IOCFACTS_CAPABILITY_EEDP (0x00000040) 428265236Sken#define MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020) 429265236Sken#define MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010) 430265236Sken#define MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008) 431265236Sken#define MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING (0x00000004) 432265236Sken 433265236Sken/* ProtocolFlags */ 434319435Sslm#define MPI2_IOCFACTS_PROTOCOL_NVME_DEVICES (0x0008) /* MPI v2.6 and later */ 435299263Sslm#define MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR (0x0002) 436265236Sken#define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET (0x0001) 437265236Sken 438265236Sken 439265236Sken/**************************************************************************** 440265236Sken* PortFacts message 441265236Sken****************************************************************************/ 442265236Sken 443265236Sken/* PortFacts Request message */ 444265236Skentypedef struct _MPI2_PORT_FACTS_REQUEST 445265236Sken{ 446265236Sken U16 Reserved1; /* 0x00 */ 447265236Sken U8 ChainOffset; /* 0x02 */ 448265236Sken U8 Function; /* 0x03 */ 449265236Sken U16 Reserved2; /* 0x04 */ 450265236Sken U8 PortNumber; /* 0x06 */ 451265236Sken U8 MsgFlags; /* 0x07 */ 452265236Sken U8 VP_ID; /* 0x08 */ 453265236Sken U8 VF_ID; /* 0x09 */ 454265236Sken U16 Reserved3; /* 0x0A */ 455265236Sken} MPI2_PORT_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_PORT_FACTS_REQUEST, 456265236Sken Mpi2PortFactsRequest_t, MPI2_POINTER pMpi2PortFactsRequest_t; 457265236Sken 458265236Sken/* PortFacts Reply message */ 459265236Skentypedef struct _MPI2_PORT_FACTS_REPLY 460265236Sken{ 461265236Sken U16 Reserved1; /* 0x00 */ 462265236Sken U8 MsgLength; /* 0x02 */ 463265236Sken U8 Function; /* 0x03 */ 464265236Sken U16 Reserved2; /* 0x04 */ 465265236Sken U8 PortNumber; /* 0x06 */ 466265236Sken U8 MsgFlags; /* 0x07 */ 467265236Sken U8 VP_ID; /* 0x08 */ 468265236Sken U8 VF_ID; /* 0x09 */ 469265236Sken U16 Reserved3; /* 0x0A */ 470265236Sken U16 Reserved4; /* 0x0C */ 471265236Sken U16 IOCStatus; /* 0x0E */ 472265236Sken U32 IOCLogInfo; /* 0x10 */ 473265236Sken U8 Reserved5; /* 0x14 */ 474265236Sken U8 PortType; /* 0x15 */ 475265236Sken U16 Reserved6; /* 0x16 */ 476265236Sken U16 MaxPostedCmdBuffers; /* 0x18 */ 477265236Sken U16 Reserved7; /* 0x1A */ 478265236Sken} MPI2_PORT_FACTS_REPLY, MPI2_POINTER PTR_MPI2_PORT_FACTS_REPLY, 479265236Sken Mpi2PortFactsReply_t, MPI2_POINTER pMpi2PortFactsReply_t; 480265236Sken 481265236Sken/* PortType values */ 482265236Sken#define MPI2_PORTFACTS_PORTTYPE_INACTIVE (0x00) 483265236Sken#define MPI2_PORTFACTS_PORTTYPE_FC (0x10) 484265236Sken#define MPI2_PORTFACTS_PORTTYPE_ISCSI (0x20) 485265236Sken#define MPI2_PORTFACTS_PORTTYPE_SAS_PHYSICAL (0x30) 486265236Sken#define MPI2_PORTFACTS_PORTTYPE_SAS_VIRTUAL (0x31) 487319435Sslm#define MPI2_PORTFACTS_PORTTYPE_TRI_MODE (0x40) /* MPI v2.6 and later */ 488265236Sken 489265236Sken 490265236Sken/**************************************************************************** 491265236Sken* PortEnable message 492265236Sken****************************************************************************/ 493265236Sken 494265236Sken/* PortEnable Request message */ 495265236Skentypedef struct _MPI2_PORT_ENABLE_REQUEST 496265236Sken{ 497265236Sken U16 Reserved1; /* 0x00 */ 498265236Sken U8 ChainOffset; /* 0x02 */ 499265236Sken U8 Function; /* 0x03 */ 500265236Sken U8 Reserved2; /* 0x04 */ 501265236Sken U8 PortFlags; /* 0x05 */ 502265236Sken U8 Reserved3; /* 0x06 */ 503265236Sken U8 MsgFlags; /* 0x07 */ 504265236Sken U8 VP_ID; /* 0x08 */ 505265236Sken U8 VF_ID; /* 0x09 */ 506265236Sken U16 Reserved4; /* 0x0A */ 507265236Sken} MPI2_PORT_ENABLE_REQUEST, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REQUEST, 508265236Sken Mpi2PortEnableRequest_t, MPI2_POINTER pMpi2PortEnableRequest_t; 509265236Sken 510265236Sken 511265236Sken/* PortEnable Reply message */ 512265236Skentypedef struct _MPI2_PORT_ENABLE_REPLY 513265236Sken{ 514265236Sken U16 Reserved1; /* 0x00 */ 515265236Sken U8 MsgLength; /* 0x02 */ 516265236Sken U8 Function; /* 0x03 */ 517265236Sken U8 Reserved2; /* 0x04 */ 518265236Sken U8 PortFlags; /* 0x05 */ 519265236Sken U8 Reserved3; /* 0x06 */ 520265236Sken U8 MsgFlags; /* 0x07 */ 521265236Sken U8 VP_ID; /* 0x08 */ 522265236Sken U8 VF_ID; /* 0x09 */ 523265236Sken U16 Reserved4; /* 0x0A */ 524265236Sken U16 Reserved5; /* 0x0C */ 525265236Sken U16 IOCStatus; /* 0x0E */ 526265236Sken U32 IOCLogInfo; /* 0x10 */ 527265236Sken} MPI2_PORT_ENABLE_REPLY, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REPLY, 528265236Sken Mpi2PortEnableReply_t, MPI2_POINTER pMpi2PortEnableReply_t; 529265236Sken 530265236Sken 531265236Sken/**************************************************************************** 532265236Sken* EventNotification message 533265236Sken****************************************************************************/ 534265236Sken 535265236Sken/* EventNotification Request message */ 536265236Sken#define MPI2_EVENT_NOTIFY_EVENTMASK_WORDS (4) 537265236Sken 538265236Skentypedef struct _MPI2_EVENT_NOTIFICATION_REQUEST 539265236Sken{ 540265236Sken U16 Reserved1; /* 0x00 */ 541265236Sken U8 ChainOffset; /* 0x02 */ 542265236Sken U8 Function; /* 0x03 */ 543265236Sken U16 Reserved2; /* 0x04 */ 544265236Sken U8 Reserved3; /* 0x06 */ 545265236Sken U8 MsgFlags; /* 0x07 */ 546265236Sken U8 VP_ID; /* 0x08 */ 547265236Sken U8 VF_ID; /* 0x09 */ 548265236Sken U16 Reserved4; /* 0x0A */ 549265236Sken U32 Reserved5; /* 0x0C */ 550265236Sken U32 Reserved6; /* 0x10 */ 551265236Sken U32 EventMasks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];/* 0x14 */ 552265236Sken U16 SASBroadcastPrimitiveMasks; /* 0x24 */ 553265236Sken U16 SASNotifyPrimitiveMasks; /* 0x26 */ 554265236Sken U32 Reserved8; /* 0x28 */ 555265236Sken} MPI2_EVENT_NOTIFICATION_REQUEST, 556265236Sken MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REQUEST, 557265236Sken Mpi2EventNotificationRequest_t, MPI2_POINTER pMpi2EventNotificationRequest_t; 558265236Sken 559265236Sken 560265236Sken/* EventNotification Reply message */ 561265236Skentypedef struct _MPI2_EVENT_NOTIFICATION_REPLY 562265236Sken{ 563265236Sken U16 EventDataLength; /* 0x00 */ 564265236Sken U8 MsgLength; /* 0x02 */ 565265236Sken U8 Function; /* 0x03 */ 566265236Sken U16 Reserved1; /* 0x04 */ 567265236Sken U8 AckRequired; /* 0x06 */ 568265236Sken U8 MsgFlags; /* 0x07 */ 569265236Sken U8 VP_ID; /* 0x08 */ 570265236Sken U8 VF_ID; /* 0x09 */ 571265236Sken U16 Reserved2; /* 0x0A */ 572265236Sken U16 Reserved3; /* 0x0C */ 573265236Sken U16 IOCStatus; /* 0x0E */ 574265236Sken U32 IOCLogInfo; /* 0x10 */ 575265236Sken U16 Event; /* 0x14 */ 576265236Sken U16 Reserved4; /* 0x16 */ 577265236Sken U32 EventContext; /* 0x18 */ 578265236Sken U32 EventData[1]; /* 0x1C */ 579265236Sken} MPI2_EVENT_NOTIFICATION_REPLY, MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REPLY, 580265236Sken Mpi2EventNotificationReply_t, MPI2_POINTER pMpi2EventNotificationReply_t; 581265236Sken 582265236Sken/* AckRequired */ 583265236Sken#define MPI2_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00) 584265236Sken#define MPI2_EVENT_NOTIFICATION_ACK_REQUIRED (0x01) 585265236Sken 586265236Sken/* Event */ 587265236Sken#define MPI2_EVENT_LOG_DATA (0x0001) 588265236Sken#define MPI2_EVENT_STATE_CHANGE (0x0002) 589265236Sken#define MPI2_EVENT_HARD_RESET_RECEIVED (0x0005) 590265236Sken#define MPI2_EVENT_EVENT_CHANGE (0x000A) 591265236Sken#define MPI2_EVENT_TASK_SET_FULL (0x000E) /* obsolete */ 592265236Sken#define MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE (0x000F) 593265236Sken#define MPI2_EVENT_IR_OPERATION_STATUS (0x0014) 594265236Sken#define MPI2_EVENT_SAS_DISCOVERY (0x0016) 595265236Sken#define MPI2_EVENT_SAS_BROADCAST_PRIMITIVE (0x0017) 596265236Sken#define MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x0018) 597265236Sken#define MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW (0x0019) 598265236Sken#define MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST (0x001C) 599265236Sken#define MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE (0x001D) 600319435Sslm#define MPI2_EVENT_ENCL_DEVICE_STATUS_CHANGE (0x001D) /* MPI v2.6 and later */ 601265236Sken#define MPI2_EVENT_IR_VOLUME (0x001E) 602265236Sken#define MPI2_EVENT_IR_PHYSICAL_DISK (0x001F) 603265236Sken#define MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST (0x0020) 604265236Sken#define MPI2_EVENT_LOG_ENTRY_ADDED (0x0021) 605265236Sken#define MPI2_EVENT_SAS_PHY_COUNTER (0x0022) 606265236Sken#define MPI2_EVENT_GPIO_INTERRUPT (0x0023) 607265236Sken#define MPI2_EVENT_HOST_BASED_DISCOVERY_PHY (0x0024) 608265236Sken#define MPI2_EVENT_SAS_QUIESCE (0x0025) 609265236Sken#define MPI2_EVENT_SAS_NOTIFY_PRIMITIVE (0x0026) 610265236Sken#define MPI2_EVENT_TEMP_THRESHOLD (0x0027) 611265236Sken#define MPI2_EVENT_HOST_MESSAGE (0x0028) 612265236Sken#define MPI2_EVENT_POWER_PERFORMANCE_CHANGE (0x0029) 613319435Sslm#define MPI2_EVENT_PCIE_DEVICE_STATUS_CHANGE (0x0030) /* MPI v2.6 and later */ 614319435Sslm#define MPI2_EVENT_PCIE_ENUMERATION (0x0031) /* MPI v2.6 and later */ 615319435Sslm#define MPI2_EVENT_PCIE_TOPOLOGY_CHANGE_LIST (0x0032) /* MPI v2.6 and later */ 616319435Sslm#define MPI2_EVENT_PCIE_LINK_COUNTER (0x0033) /* MPI v2.6 and later */ 617299263Sslm#define MPI2_EVENT_ACTIVE_CABLE_EXCEPTION (0x0034) /* MPI v2.6 and later */ 618331903Smav#define MPI2_EVENT_SAS_DEVICE_DISCOVERY_ERROR (0x0035) /* MPI v2.5 and later */ 619265236Sken#define MPI2_EVENT_MIN_PRODUCT_SPECIFIC (0x006E) 620265236Sken#define MPI2_EVENT_MAX_PRODUCT_SPECIFIC (0x007F) 621265236Sken 622265236Sken 623265236Sken/* Log Entry Added Event data */ 624265236Sken 625265236Sken/* the following structure matches MPI2_LOG_0_ENTRY in mpi2_cnfg.h */ 626265236Sken#define MPI2_EVENT_DATA_LOG_DATA_LENGTH (0x1C) 627265236Sken 628265236Skentypedef struct _MPI2_EVENT_DATA_LOG_ENTRY_ADDED 629265236Sken{ 630265236Sken U64 TimeStamp; /* 0x00 */ 631265236Sken U32 Reserved1; /* 0x08 */ 632265236Sken U16 LogSequence; /* 0x0C */ 633265236Sken U16 LogEntryQualifier; /* 0x0E */ 634265236Sken U8 VP_ID; /* 0x10 */ 635265236Sken U8 VF_ID; /* 0x11 */ 636265236Sken U16 Reserved2; /* 0x12 */ 637265236Sken U8 LogData[MPI2_EVENT_DATA_LOG_DATA_LENGTH];/* 0x14 */ 638265236Sken} MPI2_EVENT_DATA_LOG_ENTRY_ADDED, 639265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_LOG_ENTRY_ADDED, 640265236Sken Mpi2EventDataLogEntryAdded_t, MPI2_POINTER pMpi2EventDataLogEntryAdded_t; 641265236Sken 642265236Sken 643265236Sken/* GPIO Interrupt Event data */ 644265236Sken 645265236Skentypedef struct _MPI2_EVENT_DATA_GPIO_INTERRUPT 646265236Sken{ 647265236Sken U8 GPIONum; /* 0x00 */ 648265236Sken U8 Reserved1; /* 0x01 */ 649265236Sken U16 Reserved2; /* 0x02 */ 650265236Sken} MPI2_EVENT_DATA_GPIO_INTERRUPT, 651265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_GPIO_INTERRUPT, 652265236Sken Mpi2EventDataGpioInterrupt_t, MPI2_POINTER pMpi2EventDataGpioInterrupt_t; 653265236Sken 654265236Sken 655265236Sken/* Temperature Threshold Event data */ 656265236Sken 657265236Skentypedef struct _MPI2_EVENT_DATA_TEMPERATURE 658265236Sken{ 659265236Sken U16 Status; /* 0x00 */ 660265236Sken U8 SensorNum; /* 0x02 */ 661265236Sken U8 Reserved1; /* 0x03 */ 662265236Sken U16 CurrentTemperature; /* 0x04 */ 663265236Sken U16 Reserved2; /* 0x06 */ 664265236Sken U32 Reserved3; /* 0x08 */ 665265236Sken U32 Reserved4; /* 0x0C */ 666265236Sken} MPI2_EVENT_DATA_TEMPERATURE, 667265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_TEMPERATURE, 668265236Sken Mpi2EventDataTemperature_t, MPI2_POINTER pMpi2EventDataTemperature_t; 669265236Sken 670265236Sken/* Temperature Threshold Event data Status bits */ 671265236Sken#define MPI2_EVENT_TEMPERATURE3_EXCEEDED (0x0008) 672265236Sken#define MPI2_EVENT_TEMPERATURE2_EXCEEDED (0x0004) 673265236Sken#define MPI2_EVENT_TEMPERATURE1_EXCEEDED (0x0002) 674265236Sken#define MPI2_EVENT_TEMPERATURE0_EXCEEDED (0x0001) 675265236Sken 676265236Sken 677265236Sken/* Host Message Event data */ 678265236Sken 679265236Skentypedef struct _MPI2_EVENT_DATA_HOST_MESSAGE 680265236Sken{ 681265236Sken U8 SourceVF_ID; /* 0x00 */ 682265236Sken U8 Reserved1; /* 0x01 */ 683265236Sken U16 Reserved2; /* 0x02 */ 684265236Sken U32 Reserved3; /* 0x04 */ 685265236Sken U32 HostData[1]; /* 0x08 */ 686265236Sken} MPI2_EVENT_DATA_HOST_MESSAGE, MPI2_POINTER PTR_MPI2_EVENT_DATA_HOST_MESSAGE, 687265236Sken Mpi2EventDataHostMessage_t, MPI2_POINTER pMpi2EventDataHostMessage_t; 688265236Sken 689265236Sken 690299263Sslm/* Power Performance Change Event data */ 691265236Sken 692265236Skentypedef struct _MPI2_EVENT_DATA_POWER_PERF_CHANGE 693265236Sken{ 694265236Sken U8 CurrentPowerMode; /* 0x00 */ 695265236Sken U8 PreviousPowerMode; /* 0x01 */ 696265236Sken U16 Reserved1; /* 0x02 */ 697265236Sken} MPI2_EVENT_DATA_POWER_PERF_CHANGE, 698265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_POWER_PERF_CHANGE, 699265236Sken Mpi2EventDataPowerPerfChange_t, MPI2_POINTER pMpi2EventDataPowerPerfChange_t; 700265236Sken 701265236Sken/* defines for CurrentPowerMode and PreviousPowerMode fields */ 702265236Sken#define MPI2_EVENT_PM_INIT_MASK (0xC0) 703265236Sken#define MPI2_EVENT_PM_INIT_UNAVAILABLE (0x00) 704265236Sken#define MPI2_EVENT_PM_INIT_HOST (0x40) 705265236Sken#define MPI2_EVENT_PM_INIT_IO_UNIT (0x80) 706265236Sken#define MPI2_EVENT_PM_INIT_PCIE_DPA (0xC0) 707265236Sken 708265236Sken#define MPI2_EVENT_PM_MODE_MASK (0x07) 709265236Sken#define MPI2_EVENT_PM_MODE_UNAVAILABLE (0x00) 710265236Sken#define MPI2_EVENT_PM_MODE_UNKNOWN (0x01) 711265236Sken#define MPI2_EVENT_PM_MODE_FULL_POWER (0x04) 712265236Sken#define MPI2_EVENT_PM_MODE_REDUCED_POWER (0x05) 713265236Sken#define MPI2_EVENT_PM_MODE_STANDBY (0x06) 714265236Sken 715265236Sken 716299263Sslm/* Active Cable Exception Event data */ 717299263Sslm 718299263Sslmtypedef struct _MPI26_EVENT_DATA_ACTIVE_CABLE_EXCEPT 719299263Sslm{ 720299263Sslm U32 ActiveCablePowerRequirement; /* 0x00 */ 721299263Sslm U8 ReasonCode; /* 0x04 */ 722299263Sslm U8 ReceptacleID; /* 0x05 */ 723299263Sslm U16 Reserved1; /* 0x06 */ 724331903Smav} MPI25_EVENT_DATA_ACTIVE_CABLE_EXCEPT, 725331903Smav MPI2_POINTER PTR_MPI25_EVENT_DATA_ACTIVE_CABLE_EXCEPT, 726331903Smav Mpi25EventDataActiveCableExcept_t, 727331903Smav MPI2_POINTER pMpi25EventDataActiveCableExcept_t, 728331903Smav MPI26_EVENT_DATA_ACTIVE_CABLE_EXCEPT, 729299263Sslm MPI2_POINTER PTR_MPI26_EVENT_DATA_ACTIVE_CABLE_EXCEPT, 730299263Sslm Mpi26EventDataActiveCableExcept_t, 731299263Sslm MPI2_POINTER pMpi26EventDataActiveCableExcept_t; 732299263Sslm 733331903Smav/* MPI2.5 defines for the ReasonCode field */ 734331903Smav#define MPI25_EVENT_ACTIVE_CABLE_INSUFFICIENT_POWER (0x00) 735331903Smav#define MPI25_EVENT_ACTIVE_CABLE_PRESENT (0x01) 736331903Smav#define MPI25_EVENT_ACTIVE_CABLE_DEGRADED (0x02) 737331903Smav 738331903Smav/* MPI2.6 defines for the ReasonCode field */ 739319435Sslm#define MPI26_EVENT_ACTIVE_CABLE_INSUFFICIENT_POWER (0x00) 740319435Sslm#define MPI26_EVENT_ACTIVE_CABLE_PRESENT (0x01) 741319435Sslm#define MPI26_EVENT_ACTIVE_CABLE_DEGRADED (0x02) 742299263Sslm 743265236Sken/* Hard Reset Received Event data */ 744265236Sken 745265236Skentypedef struct _MPI2_EVENT_DATA_HARD_RESET_RECEIVED 746265236Sken{ 747265236Sken U8 Reserved1; /* 0x00 */ 748265236Sken U8 Port; /* 0x01 */ 749265236Sken U16 Reserved2; /* 0x02 */ 750265236Sken} MPI2_EVENT_DATA_HARD_RESET_RECEIVED, 751265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_HARD_RESET_RECEIVED, 752265236Sken Mpi2EventDataHardResetReceived_t, 753265236Sken MPI2_POINTER pMpi2EventDataHardResetReceived_t; 754265236Sken 755265236Sken 756265236Sken/* Task Set Full Event data */ 757265236Sken/* this event is obsolete */ 758265236Sken 759265236Skentypedef struct _MPI2_EVENT_DATA_TASK_SET_FULL 760265236Sken{ 761265236Sken U16 DevHandle; /* 0x00 */ 762265236Sken U16 CurrentDepth; /* 0x02 */ 763265236Sken} MPI2_EVENT_DATA_TASK_SET_FULL, MPI2_POINTER PTR_MPI2_EVENT_DATA_TASK_SET_FULL, 764265236Sken Mpi2EventDataTaskSetFull_t, MPI2_POINTER pMpi2EventDataTaskSetFull_t; 765265236Sken 766265236Sken 767265236Sken/* SAS Device Status Change Event data */ 768265236Sken 769265236Skentypedef struct _MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE 770265236Sken{ 771265236Sken U16 TaskTag; /* 0x00 */ 772265236Sken U8 ReasonCode; /* 0x02 */ 773265236Sken U8 PhysicalPort; /* 0x03 */ 774265236Sken U8 ASC; /* 0x04 */ 775265236Sken U8 ASCQ; /* 0x05 */ 776265236Sken U16 DevHandle; /* 0x06 */ 777265236Sken U32 Reserved2; /* 0x08 */ 778265236Sken U64 SASAddress; /* 0x0C */ 779265236Sken U8 LUN[8]; /* 0x14 */ 780265236Sken} MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, 781265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, 782265236Sken Mpi2EventDataSasDeviceStatusChange_t, 783265236Sken MPI2_POINTER pMpi2EventDataSasDeviceStatusChange_t; 784265236Sken 785265236Sken/* SAS Device Status Change Event data ReasonCode values */ 786265236Sken#define MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05) 787265236Sken#define MPI2_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07) 788265236Sken#define MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08) 789265236Sken#define MPI2_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09) 790265236Sken#define MPI2_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A) 791265236Sken#define MPI2_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B) 792265236Sken#define MPI2_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C) 793265236Sken#define MPI2_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D) 794265236Sken#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_INTERNAL_DEV_RESET (0x0E) 795265236Sken#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_TASK_ABORT_INTERNAL (0x0F) 796265236Sken#define MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE (0x10) 797265236Sken#define MPI2_EVENT_SAS_DEV_STAT_RC_EXPANDER_REDUCED_FUNCTIONALITY (0x11) 798265236Sken#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_EXPANDER_REDUCED_FUNCTIONALITY (0x12) 799265236Sken 800265236Sken 801265236Sken/* Integrated RAID Operation Status Event data */ 802265236Sken 803265236Skentypedef struct _MPI2_EVENT_DATA_IR_OPERATION_STATUS 804265236Sken{ 805265236Sken U16 VolDevHandle; /* 0x00 */ 806265236Sken U16 Reserved1; /* 0x02 */ 807265236Sken U8 RAIDOperation; /* 0x04 */ 808265236Sken U8 PercentComplete; /* 0x05 */ 809265236Sken U16 Reserved2; /* 0x06 */ 810265236Sken U32 ElapsedSeconds; /* 0x08 */ 811265236Sken} MPI2_EVENT_DATA_IR_OPERATION_STATUS, 812265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_OPERATION_STATUS, 813265236Sken Mpi2EventDataIrOperationStatus_t, 814265236Sken MPI2_POINTER pMpi2EventDataIrOperationStatus_t; 815265236Sken 816265236Sken/* Integrated RAID Operation Status Event data RAIDOperation values */ 817265236Sken#define MPI2_EVENT_IR_RAIDOP_RESYNC (0x00) 818265236Sken#define MPI2_EVENT_IR_RAIDOP_ONLINE_CAP_EXPANSION (0x01) 819265236Sken#define MPI2_EVENT_IR_RAIDOP_CONSISTENCY_CHECK (0x02) 820265236Sken#define MPI2_EVENT_IR_RAIDOP_BACKGROUND_INIT (0x03) 821265236Sken#define MPI2_EVENT_IR_RAIDOP_MAKE_DATA_CONSISTENT (0x04) 822265236Sken 823265236Sken 824265236Sken/* Integrated RAID Volume Event data */ 825265236Sken 826265236Skentypedef struct _MPI2_EVENT_DATA_IR_VOLUME 827265236Sken{ 828265236Sken U16 VolDevHandle; /* 0x00 */ 829265236Sken U8 ReasonCode; /* 0x02 */ 830265236Sken U8 Reserved1; /* 0x03 */ 831265236Sken U32 NewValue; /* 0x04 */ 832265236Sken U32 PreviousValue; /* 0x08 */ 833265236Sken} MPI2_EVENT_DATA_IR_VOLUME, MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_VOLUME, 834265236Sken Mpi2EventDataIrVolume_t, MPI2_POINTER pMpi2EventDataIrVolume_t; 835265236Sken 836265236Sken/* Integrated RAID Volume Event data ReasonCode values */ 837265236Sken#define MPI2_EVENT_IR_VOLUME_RC_SETTINGS_CHANGED (0x01) 838265236Sken#define MPI2_EVENT_IR_VOLUME_RC_STATUS_FLAGS_CHANGED (0x02) 839265236Sken#define MPI2_EVENT_IR_VOLUME_RC_STATE_CHANGED (0x03) 840265236Sken 841265236Sken 842265236Sken/* Integrated RAID Physical Disk Event data */ 843265236Sken 844265236Skentypedef struct _MPI2_EVENT_DATA_IR_PHYSICAL_DISK 845265236Sken{ 846265236Sken U16 Reserved1; /* 0x00 */ 847265236Sken U8 ReasonCode; /* 0x02 */ 848265236Sken U8 PhysDiskNum; /* 0x03 */ 849265236Sken U16 PhysDiskDevHandle; /* 0x04 */ 850265236Sken U16 Reserved2; /* 0x06 */ 851265236Sken U16 Slot; /* 0x08 */ 852265236Sken U16 EnclosureHandle; /* 0x0A */ 853265236Sken U32 NewValue; /* 0x0C */ 854265236Sken U32 PreviousValue; /* 0x10 */ 855265236Sken} MPI2_EVENT_DATA_IR_PHYSICAL_DISK, 856265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_PHYSICAL_DISK, 857265236Sken Mpi2EventDataIrPhysicalDisk_t, MPI2_POINTER pMpi2EventDataIrPhysicalDisk_t; 858265236Sken 859265236Sken/* Integrated RAID Physical Disk Event data ReasonCode values */ 860265236Sken#define MPI2_EVENT_IR_PHYSDISK_RC_SETTINGS_CHANGED (0x01) 861265236Sken#define MPI2_EVENT_IR_PHYSDISK_RC_STATUS_FLAGS_CHANGED (0x02) 862265236Sken#define MPI2_EVENT_IR_PHYSDISK_RC_STATE_CHANGED (0x03) 863265236Sken 864265236Sken 865265236Sken/* Integrated RAID Configuration Change List Event data */ 866265236Sken 867265236Sken/* 868265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 869265236Sken * one and check NumElements at runtime. 870265236Sken */ 871265236Sken#ifndef MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT 872265236Sken#define MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT (1) 873265236Sken#endif 874265236Sken 875265236Skentypedef struct _MPI2_EVENT_IR_CONFIG_ELEMENT 876265236Sken{ 877265236Sken U16 ElementFlags; /* 0x00 */ 878265236Sken U16 VolDevHandle; /* 0x02 */ 879265236Sken U8 ReasonCode; /* 0x04 */ 880265236Sken U8 PhysDiskNum; /* 0x05 */ 881265236Sken U16 PhysDiskDevHandle; /* 0x06 */ 882265236Sken} MPI2_EVENT_IR_CONFIG_ELEMENT, MPI2_POINTER PTR_MPI2_EVENT_IR_CONFIG_ELEMENT, 883265236Sken Mpi2EventIrConfigElement_t, MPI2_POINTER pMpi2EventIrConfigElement_t; 884265236Sken 885265236Sken/* IR Configuration Change List Event data ElementFlags values */ 886265236Sken#define MPI2_EVENT_IR_CHANGE_EFLAGS_ELEMENT_TYPE_MASK (0x000F) 887265236Sken#define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLUME_ELEMENT (0x0000) 888265236Sken#define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLPHYSDISK_ELEMENT (0x0001) 889265236Sken#define MPI2_EVENT_IR_CHANGE_EFLAGS_HOTSPARE_ELEMENT (0x0002) 890265236Sken 891265236Sken/* IR Configuration Change List Event data ReasonCode values */ 892265236Sken#define MPI2_EVENT_IR_CHANGE_RC_ADDED (0x01) 893265236Sken#define MPI2_EVENT_IR_CHANGE_RC_REMOVED (0x02) 894265236Sken#define MPI2_EVENT_IR_CHANGE_RC_NO_CHANGE (0x03) 895265236Sken#define MPI2_EVENT_IR_CHANGE_RC_HIDE (0x04) 896265236Sken#define MPI2_EVENT_IR_CHANGE_RC_UNHIDE (0x05) 897265236Sken#define MPI2_EVENT_IR_CHANGE_RC_VOLUME_CREATED (0x06) 898265236Sken#define MPI2_EVENT_IR_CHANGE_RC_VOLUME_DELETED (0x07) 899265236Sken#define MPI2_EVENT_IR_CHANGE_RC_PD_CREATED (0x08) 900265236Sken#define MPI2_EVENT_IR_CHANGE_RC_PD_DELETED (0x09) 901265236Sken 902265236Skentypedef struct _MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST 903265236Sken{ 904265236Sken U8 NumElements; /* 0x00 */ 905265236Sken U8 Reserved1; /* 0x01 */ 906265236Sken U8 Reserved2; /* 0x02 */ 907265236Sken U8 ConfigNum; /* 0x03 */ 908265236Sken U32 Flags; /* 0x04 */ 909265236Sken MPI2_EVENT_IR_CONFIG_ELEMENT ConfigElement[MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT]; /* 0x08 */ 910265236Sken} MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST, 911265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST, 912265236Sken Mpi2EventDataIrConfigChangeList_t, 913265236Sken MPI2_POINTER pMpi2EventDataIrConfigChangeList_t; 914265236Sken 915265236Sken/* IR Configuration Change List Event data Flags values */ 916265236Sken#define MPI2_EVENT_IR_CHANGE_FLAGS_FOREIGN_CONFIG (0x00000001) 917265236Sken 918265236Sken 919265236Sken/* SAS Discovery Event data */ 920265236Sken 921265236Skentypedef struct _MPI2_EVENT_DATA_SAS_DISCOVERY 922265236Sken{ 923265236Sken U8 Flags; /* 0x00 */ 924265236Sken U8 ReasonCode; /* 0x01 */ 925265236Sken U8 PhysicalPort; /* 0x02 */ 926265236Sken U8 Reserved1; /* 0x03 */ 927265236Sken U32 DiscoveryStatus; /* 0x04 */ 928265236Sken} MPI2_EVENT_DATA_SAS_DISCOVERY, 929265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DISCOVERY, 930265236Sken Mpi2EventDataSasDiscovery_t, MPI2_POINTER pMpi2EventDataSasDiscovery_t; 931265236Sken 932265236Sken/* SAS Discovery Event data Flags values */ 933265236Sken#define MPI2_EVENT_SAS_DISC_DEVICE_CHANGE (0x02) 934265236Sken#define MPI2_EVENT_SAS_DISC_IN_PROGRESS (0x01) 935265236Sken 936265236Sken/* SAS Discovery Event data ReasonCode values */ 937265236Sken#define MPI2_EVENT_SAS_DISC_RC_STARTED (0x01) 938265236Sken#define MPI2_EVENT_SAS_DISC_RC_COMPLETED (0x02) 939265236Sken 940265236Sken/* SAS Discovery Event data DiscoveryStatus values */ 941265236Sken#define MPI2_EVENT_SAS_DISC_DS_MAX_ENCLOSURES_EXCEED (0x80000000) 942265236Sken#define MPI2_EVENT_SAS_DISC_DS_MAX_EXPANDERS_EXCEED (0x40000000) 943265236Sken#define MPI2_EVENT_SAS_DISC_DS_MAX_DEVICES_EXCEED (0x20000000) 944265236Sken#define MPI2_EVENT_SAS_DISC_DS_MAX_TOPO_PHYS_EXCEED (0x10000000) 945265236Sken#define MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR (0x08000000) 946265236Sken#define MPI2_EVENT_SAS_DISC_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000) 947265236Sken#define MPI2_EVENT_SAS_DISC_DS_EXP_MULTI_SUBTRACTIVE (0x00004000) 948265236Sken#define MPI2_EVENT_SAS_DISC_DS_MULTI_PORT_DOMAIN (0x00002000) 949265236Sken#define MPI2_EVENT_SAS_DISC_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000) 950265236Sken#define MPI2_EVENT_SAS_DISC_DS_UNSUPPORTED_DEVICE (0x00000800) 951265236Sken#define MPI2_EVENT_SAS_DISC_DS_TABLE_LINK (0x00000400) 952265236Sken#define MPI2_EVENT_SAS_DISC_DS_SUBTRACTIVE_LINK (0x00000200) 953265236Sken#define MPI2_EVENT_SAS_DISC_DS_SMP_CRC_ERROR (0x00000100) 954265236Sken#define MPI2_EVENT_SAS_DISC_DS_SMP_FUNCTION_FAILED (0x00000080) 955265236Sken#define MPI2_EVENT_SAS_DISC_DS_INDEX_NOT_EXIST (0x00000040) 956265236Sken#define MPI2_EVENT_SAS_DISC_DS_OUT_ROUTE_ENTRIES (0x00000020) 957265236Sken#define MPI2_EVENT_SAS_DISC_DS_SMP_TIMEOUT (0x00000010) 958265236Sken#define MPI2_EVENT_SAS_DISC_DS_MULTIPLE_PORTS (0x00000004) 959265236Sken#define MPI2_EVENT_SAS_DISC_DS_UNADDRESSABLE_DEVICE (0x00000002) 960265236Sken#define MPI2_EVENT_SAS_DISC_DS_LOOP_DETECTED (0x00000001) 961265236Sken 962265236Sken 963265236Sken/* SAS Broadcast Primitive Event data */ 964265236Sken 965265236Skentypedef struct _MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE 966265236Sken{ 967265236Sken U8 PhyNum; /* 0x00 */ 968265236Sken U8 Port; /* 0x01 */ 969265236Sken U8 PortWidth; /* 0x02 */ 970265236Sken U8 Primitive; /* 0x03 */ 971265236Sken} MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, 972265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, 973265236Sken Mpi2EventDataSasBroadcastPrimitive_t, 974265236Sken MPI2_POINTER pMpi2EventDataSasBroadcastPrimitive_t; 975265236Sken 976265236Sken/* defines for the Primitive field */ 977265236Sken#define MPI2_EVENT_PRIMITIVE_CHANGE (0x01) 978265236Sken#define MPI2_EVENT_PRIMITIVE_SES (0x02) 979265236Sken#define MPI2_EVENT_PRIMITIVE_EXPANDER (0x03) 980265236Sken#define MPI2_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04) 981265236Sken#define MPI2_EVENT_PRIMITIVE_RESERVED3 (0x05) 982265236Sken#define MPI2_EVENT_PRIMITIVE_RESERVED4 (0x06) 983265236Sken#define MPI2_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07) 984265236Sken#define MPI2_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08) 985265236Sken 986265236Sken 987265236Sken/* SAS Notify Primitive Event data */ 988265236Sken 989265236Skentypedef struct _MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE 990265236Sken{ 991265236Sken U8 PhyNum; /* 0x00 */ 992265236Sken U8 Port; /* 0x01 */ 993265236Sken U8 Reserved1; /* 0x02 */ 994265236Sken U8 Primitive; /* 0x03 */ 995265236Sken} MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE, 996265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE, 997265236Sken Mpi2EventDataSasNotifyPrimitive_t, 998265236Sken MPI2_POINTER pMpi2EventDataSasNotifyPrimitive_t; 999265236Sken 1000265236Sken/* defines for the Primitive field */ 1001265236Sken#define MPI2_EVENT_NOTIFY_ENABLE_SPINUP (0x01) 1002265236Sken#define MPI2_EVENT_NOTIFY_POWER_LOSS_EXPECTED (0x02) 1003265236Sken#define MPI2_EVENT_NOTIFY_RESERVED1 (0x03) 1004265236Sken#define MPI2_EVENT_NOTIFY_RESERVED2 (0x04) 1005265236Sken 1006265236Sken 1007265236Sken/* SAS Initiator Device Status Change Event data */ 1008265236Sken 1009265236Skentypedef struct _MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE 1010265236Sken{ 1011265236Sken U8 ReasonCode; /* 0x00 */ 1012265236Sken U8 PhysicalPort; /* 0x01 */ 1013265236Sken U16 DevHandle; /* 0x02 */ 1014265236Sken U64 SASAddress; /* 0x04 */ 1015265236Sken} MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, 1016265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, 1017265236Sken Mpi2EventDataSasInitDevStatusChange_t, 1018265236Sken MPI2_POINTER pMpi2EventDataSasInitDevStatusChange_t; 1019265236Sken 1020265236Sken/* SAS Initiator Device Status Change event ReasonCode values */ 1021265236Sken#define MPI2_EVENT_SAS_INIT_RC_ADDED (0x01) 1022265236Sken#define MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING (0x02) 1023265236Sken 1024265236Sken 1025265236Sken/* SAS Initiator Device Table Overflow Event data */ 1026265236Sken 1027265236Skentypedef struct _MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW 1028265236Sken{ 1029265236Sken U16 MaxInit; /* 0x00 */ 1030265236Sken U16 CurrentInit; /* 0x02 */ 1031265236Sken U64 SASAddress; /* 0x04 */ 1032265236Sken} MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, 1033265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, 1034265236Sken Mpi2EventDataSasInitTableOverflow_t, 1035265236Sken MPI2_POINTER pMpi2EventDataSasInitTableOverflow_t; 1036265236Sken 1037265236Sken 1038265236Sken/* SAS Topology Change List Event data */ 1039265236Sken 1040265236Sken/* 1041265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1042265236Sken * one and check NumEntries at runtime. 1043265236Sken */ 1044265236Sken#ifndef MPI2_EVENT_SAS_TOPO_PHY_COUNT 1045265236Sken#define MPI2_EVENT_SAS_TOPO_PHY_COUNT (1) 1046265236Sken#endif 1047265236Sken 1048265236Skentypedef struct _MPI2_EVENT_SAS_TOPO_PHY_ENTRY 1049265236Sken{ 1050265236Sken U16 AttachedDevHandle; /* 0x00 */ 1051265236Sken U8 LinkRate; /* 0x02 */ 1052265236Sken U8 PhyStatus; /* 0x03 */ 1053265236Sken} MPI2_EVENT_SAS_TOPO_PHY_ENTRY, MPI2_POINTER PTR_MPI2_EVENT_SAS_TOPO_PHY_ENTRY, 1054265236Sken Mpi2EventSasTopoPhyEntry_t, MPI2_POINTER pMpi2EventSasTopoPhyEntry_t; 1055265236Sken 1056265236Skentypedef struct _MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST 1057265236Sken{ 1058265236Sken U16 EnclosureHandle; /* 0x00 */ 1059265236Sken U16 ExpanderDevHandle; /* 0x02 */ 1060265236Sken U8 NumPhys; /* 0x04 */ 1061265236Sken U8 Reserved1; /* 0x05 */ 1062265236Sken U16 Reserved2; /* 0x06 */ 1063265236Sken U8 NumEntries; /* 0x08 */ 1064265236Sken U8 StartPhyNum; /* 0x09 */ 1065265236Sken U8 ExpStatus; /* 0x0A */ 1066265236Sken U8 PhysicalPort; /* 0x0B */ 1067265236Sken MPI2_EVENT_SAS_TOPO_PHY_ENTRY PHY[MPI2_EVENT_SAS_TOPO_PHY_COUNT]; /* 0x0C*/ 1068265236Sken} MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, 1069265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, 1070265236Sken Mpi2EventDataSasTopologyChangeList_t, 1071265236Sken MPI2_POINTER pMpi2EventDataSasTopologyChangeList_t; 1072265236Sken 1073265236Sken/* values for the ExpStatus field */ 1074265236Sken#define MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER (0x00) 1075265236Sken#define MPI2_EVENT_SAS_TOPO_ES_ADDED (0x01) 1076265236Sken#define MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING (0x02) 1077265236Sken#define MPI2_EVENT_SAS_TOPO_ES_RESPONDING (0x03) 1078265236Sken#define MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING (0x04) 1079265236Sken 1080265236Sken/* defines for the LinkRate field */ 1081265236Sken#define MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK (0xF0) 1082265236Sken#define MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT (4) 1083265236Sken#define MPI2_EVENT_SAS_TOPO_LR_PREV_MASK (0x0F) 1084265236Sken#define MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT (0) 1085265236Sken 1086265236Sken#define MPI2_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE (0x00) 1087265236Sken#define MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED (0x01) 1088265236Sken#define MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED (0x02) 1089265236Sken#define MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE (0x03) 1090265236Sken#define MPI2_EVENT_SAS_TOPO_LR_PORT_SELECTOR (0x04) 1091265236Sken#define MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS (0x05) 1092265236Sken#define MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY (0x06) 1093265236Sken#define MPI2_EVENT_SAS_TOPO_LR_RATE_1_5 (0x08) 1094265236Sken#define MPI2_EVENT_SAS_TOPO_LR_RATE_3_0 (0x09) 1095265236Sken#define MPI2_EVENT_SAS_TOPO_LR_RATE_6_0 (0x0A) 1096265236Sken#define MPI25_EVENT_SAS_TOPO_LR_RATE_12_0 (0x0B) 1097319435Sslm#define MPI26_EVENT_SAS_TOPO_LR_RATE_22_5 (0x0C) 1098265236Sken 1099265236Sken/* values for the PhyStatus field */ 1100265236Sken#define MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT (0x80) 1101265236Sken#define MPI2_EVENT_SAS_TOPO_PS_MULTIPLEX_CHANGE (0x10) 1102265236Sken/* values for the PhyStatus ReasonCode sub-field */ 1103265236Sken#define MPI2_EVENT_SAS_TOPO_RC_MASK (0x0F) 1104265236Sken#define MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED (0x01) 1105265236Sken#define MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING (0x02) 1106265236Sken#define MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED (0x03) 1107265236Sken#define MPI2_EVENT_SAS_TOPO_RC_NO_CHANGE (0x04) 1108265236Sken#define MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING (0x05) 1109265236Sken 1110265236Sken 1111265236Sken/* SAS Enclosure Device Status Change Event data */ 1112265236Sken 1113265236Skentypedef struct _MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE 1114265236Sken{ 1115265236Sken U16 EnclosureHandle; /* 0x00 */ 1116265236Sken U8 ReasonCode; /* 0x02 */ 1117265236Sken U8 PhysicalPort; /* 0x03 */ 1118265236Sken U64 EnclosureLogicalID; /* 0x04 */ 1119265236Sken U16 NumSlots; /* 0x0C */ 1120265236Sken U16 StartSlot; /* 0x0E */ 1121265236Sken U32 PhyBits; /* 0x10 */ 1122265236Sken} MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE, 1123265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE, 1124265236Sken Mpi2EventDataSasEnclDevStatusChange_t, 1125319435Sslm MPI2_POINTER pMpi2EventDataSasEnclDevStatusChange_t, 1126319435Sslm MPI26_EVENT_DATA_ENCL_DEV_STATUS_CHANGE, 1127319435Sslm MPI2_POINTER PTR_MPI26_EVENT_DATA_ENCL_DEV_STATUS_CHANGE, 1128319435Sslm Mpi26EventDataEnclDevStatusChange_t, 1129319435Sslm MPI2_POINTER pMpi26EventDataEnclDevStatusChange_t; 1130265236Sken 1131265236Sken/* SAS Enclosure Device Status Change event ReasonCode values */ 1132265236Sken#define MPI2_EVENT_SAS_ENCL_RC_ADDED (0x01) 1133265236Sken#define MPI2_EVENT_SAS_ENCL_RC_NOT_RESPONDING (0x02) 1134265236Sken 1135319435Sslm/* Enclosure Device Status Change event ReasonCode values */ 1136319435Sslm#define MPI26_EVENT_ENCL_RC_ADDED (0x01) 1137319435Sslm#define MPI26_EVENT_ENCL_RC_NOT_RESPONDING (0x02) 1138265236Sken 1139265236Sken/* SAS PHY Counter Event data */ 1140265236Sken 1141265236Skentypedef struct _MPI2_EVENT_DATA_SAS_PHY_COUNTER 1142265236Sken{ 1143265236Sken U64 TimeStamp; /* 0x00 */ 1144265236Sken U32 Reserved1; /* 0x08 */ 1145265236Sken U8 PhyEventCode; /* 0x0C */ 1146265236Sken U8 PhyNum; /* 0x0D */ 1147265236Sken U16 Reserved2; /* 0x0E */ 1148265236Sken U32 PhyEventInfo; /* 0x10 */ 1149265236Sken U8 CounterType; /* 0x14 */ 1150265236Sken U8 ThresholdWindow; /* 0x15 */ 1151265236Sken U8 TimeUnits; /* 0x16 */ 1152265236Sken U8 Reserved3; /* 0x17 */ 1153265236Sken U32 EventThreshold; /* 0x18 */ 1154265236Sken U16 ThresholdFlags; /* 0x1C */ 1155265236Sken U16 Reserved4; /* 0x1E */ 1156265236Sken} MPI2_EVENT_DATA_SAS_PHY_COUNTER, 1157265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_PHY_COUNTER, 1158265236Sken Mpi2EventDataSasPhyCounter_t, MPI2_POINTER pMpi2EventDataSasPhyCounter_t; 1159265236Sken 1160265236Sken/* use MPI2_SASPHY3_EVENT_CODE_ values from mpi2_cnfg.h for the PhyEventCode field */ 1161265236Sken 1162265236Sken/* use MPI2_SASPHY3_COUNTER_TYPE_ values from mpi2_cnfg.h for the CounterType field */ 1163265236Sken 1164265236Sken/* use MPI2_SASPHY3_TIME_UNITS_ values from mpi2_cnfg.h for the TimeUnits field */ 1165265236Sken 1166265236Sken/* use MPI2_SASPHY3_TFLAGS_ values from mpi2_cnfg.h for the ThresholdFlags field */ 1167265236Sken 1168265236Sken 1169265236Sken/* SAS Quiesce Event data */ 1170265236Sken 1171265236Skentypedef struct _MPI2_EVENT_DATA_SAS_QUIESCE 1172265236Sken{ 1173265236Sken U8 ReasonCode; /* 0x00 */ 1174265236Sken U8 Reserved1; /* 0x01 */ 1175265236Sken U16 Reserved2; /* 0x02 */ 1176265236Sken U32 Reserved3; /* 0x04 */ 1177265236Sken} MPI2_EVENT_DATA_SAS_QUIESCE, 1178265236Sken MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_QUIESCE, 1179265236Sken Mpi2EventDataSasQuiesce_t, MPI2_POINTER pMpi2EventDataSasQuiesce_t; 1180265236Sken 1181265236Sken/* SAS Quiesce Event data ReasonCode values */ 1182265236Sken#define MPI2_EVENT_SAS_QUIESCE_RC_STARTED (0x01) 1183265236Sken#define MPI2_EVENT_SAS_QUIESCE_RC_COMPLETED (0x02) 1184265236Sken 1185265236Sken 1186331903Smavtypedef struct _MPI25_EVENT_DATA_SAS_DEVICE_DISCOVERY_ERROR 1187331903Smav{ 1188331903Smav U16 DevHandle; /* 0x00 */ 1189331903Smav U8 ReasonCode; /* 0x02 */ 1190331903Smav U8 PhysicalPort; /* 0x03 */ 1191331903Smav U32 Reserved1[2]; /* 0x04 */ 1192331903Smav U64 SASAddress; /* 0x0C */ 1193331903Smav U32 Reserved2[2]; /* 0x14 */ 1194331903Smav} MPI25_EVENT_DATA_SAS_DEVICE_DISCOVERY_ERROR, 1195331903Smav MPI2_POINTER PTR_MPI25_EVENT_DATA_SAS_DEVICE_DISCOVERY_ERROR, 1196331903Smav Mpi25EventDataSasDeviceDiscoveryError_t, 1197331903Smav MPI2_POINTER pMpi25EventDataSasDeviceDiscoveryError_t; 1198331903Smav 1199331903Smav/* SAS Device Discovery Error Event data ReasonCode values */ 1200331903Smav#define MPI25_EVENT_SAS_DISC_ERR_SMP_FAILED (0x01) 1201331903Smav#define MPI25_EVENT_SAS_DISC_ERR_SMP_TIMEOUT (0x02) 1202331903Smav 1203331903Smav 1204265236Sken/* Host Based Discovery Phy Event data */ 1205265236Sken 1206265236Skentypedef struct _MPI2_EVENT_HBD_PHY_SAS 1207265236Sken{ 1208265236Sken U8 Flags; /* 0x00 */ 1209265236Sken U8 NegotiatedLinkRate; /* 0x01 */ 1210265236Sken U8 PhyNum; /* 0x02 */ 1211265236Sken U8 PhysicalPort; /* 0x03 */ 1212265236Sken U32 Reserved1; /* 0x04 */ 1213265236Sken U8 InitialFrame[28]; /* 0x08 */ 1214265236Sken} MPI2_EVENT_HBD_PHY_SAS, MPI2_POINTER PTR_MPI2_EVENT_HBD_PHY_SAS, 1215265236Sken Mpi2EventHbdPhySas_t, MPI2_POINTER pMpi2EventHbdPhySas_t; 1216265236Sken 1217265236Sken/* values for the Flags field */ 1218265236Sken#define MPI2_EVENT_HBD_SAS_FLAGS_FRAME_VALID (0x02) 1219265236Sken#define MPI2_EVENT_HBD_SAS_FLAGS_SATA_FRAME (0x01) 1220265236Sken 1221265236Sken/* use MPI2_SAS_NEG_LINK_RATE_ defines from mpi2_cnfg.h for the NegotiatedLinkRate field */ 1222265236Sken 1223265236Skentypedef union _MPI2_EVENT_HBD_DESCRIPTOR 1224265236Sken{ 1225265236Sken MPI2_EVENT_HBD_PHY_SAS Sas; 1226265236Sken} MPI2_EVENT_HBD_DESCRIPTOR, MPI2_POINTER PTR_MPI2_EVENT_HBD_DESCRIPTOR, 1227265236Sken Mpi2EventHbdDescriptor_t, MPI2_POINTER pMpi2EventHbdDescriptor_t; 1228265236Sken 1229265236Skentypedef struct _MPI2_EVENT_DATA_HBD_PHY 1230265236Sken{ 1231265236Sken U8 DescriptorType; /* 0x00 */ 1232265236Sken U8 Reserved1; /* 0x01 */ 1233265236Sken U16 Reserved2; /* 0x02 */ 1234265236Sken U32 Reserved3; /* 0x04 */ 1235265236Sken MPI2_EVENT_HBD_DESCRIPTOR Descriptor; /* 0x08 */ 1236265236Sken} MPI2_EVENT_DATA_HBD_PHY, MPI2_POINTER PTR_MPI2_EVENT_DATA_HBD_PHY, 1237265236Sken Mpi2EventDataHbdPhy_t, MPI2_POINTER pMpi2EventDataMpi2EventDataHbdPhy_t; 1238265236Sken 1239265236Sken/* values for the DescriptorType field */ 1240265236Sken#define MPI2_EVENT_HBD_DT_SAS (0x01) 1241265236Sken 1242265236Sken 1243319435Sslm/* PCIe Device Status Change Event data (MPI v2.6 and later) */ 1244319435Sslm 1245319435Sslmtypedef struct _MPI26_EVENT_DATA_PCIE_DEVICE_STATUS_CHANGE 1246319435Sslm{ 1247319435Sslm U16 TaskTag; /* 0x00 */ 1248319435Sslm U8 ReasonCode; /* 0x02 */ 1249319435Sslm U8 PhysicalPort; /* 0x03 */ 1250319435Sslm U8 ASC; /* 0x04 */ 1251319435Sslm U8 ASCQ; /* 0x05 */ 1252319435Sslm U16 DevHandle; /* 0x06 */ 1253319435Sslm U32 Reserved2; /* 0x08 */ 1254319435Sslm U64 WWID; /* 0x0C */ 1255319435Sslm U8 LUN[8]; /* 0x14 */ 1256319435Sslm} MPI26_EVENT_DATA_PCIE_DEVICE_STATUS_CHANGE, 1257319435Sslm MPI2_POINTER PTR_MPI26_EVENT_DATA_PCIE_DEVICE_STATUS_CHANGE, 1258319435Sslm Mpi26EventDataPCIeDeviceStatusChange_t, 1259319435Sslm MPI2_POINTER pMpi26EventDataPCIeDeviceStatusChange_t; 1260319435Sslm 1261319435Sslm/* PCIe Device Status Change Event data ReasonCode values */ 1262319435Sslm#define MPI26_EVENT_PCIDEV_STAT_RC_SMART_DATA (0x05) 1263319435Sslm#define MPI26_EVENT_PCIDEV_STAT_RC_UNSUPPORTED (0x07) 1264319435Sslm#define MPI26_EVENT_PCIDEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08) 1265319435Sslm#define MPI26_EVENT_PCIDEV_STAT_RC_TASK_ABORT_INTERNAL (0x09) 1266319435Sslm#define MPI26_EVENT_PCIDEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A) 1267319435Sslm#define MPI26_EVENT_PCIDEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B) 1268319435Sslm#define MPI26_EVENT_PCIDEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C) 1269319435Sslm#define MPI26_EVENT_PCIDEV_STAT_RC_ASYNC_NOTIFICATION (0x0D) 1270319435Sslm#define MPI26_EVENT_PCIDEV_STAT_RC_CMP_INTERNAL_DEV_RESET (0x0E) 1271319435Sslm#define MPI26_EVENT_PCIDEV_STAT_RC_CMP_TASK_ABORT_INTERNAL (0x0F) 1272319435Sslm#define MPI26_EVENT_PCIDEV_STAT_RC_DEV_INIT_FAILURE (0x10) 1273319435Sslm 1274319435Sslm 1275319435Sslm/* PCIe Enumeration Event data (MPI v2.6 and later) */ 1276319435Sslm 1277319435Sslmtypedef struct _MPI26_EVENT_DATA_PCIE_ENUMERATION 1278319435Sslm{ 1279319435Sslm U8 Flags; /* 0x00 */ 1280319435Sslm U8 ReasonCode; /* 0x01 */ 1281319435Sslm U8 PhysicalPort; /* 0x02 */ 1282319435Sslm U8 Reserved1; /* 0x03 */ 1283319435Sslm U32 EnumerationStatus; /* 0x04 */ 1284319435Sslm} MPI26_EVENT_DATA_PCIE_ENUMERATION, 1285319435Sslm MPI2_POINTER PTR_MPI26_EVENT_DATA_PCIE_ENUMERATION, 1286319435Sslm Mpi26EventDataPCIeEnumeration_t, 1287319435Sslm MPI2_POINTER pMpi26EventDataPCIeEnumeration_t; 1288319435Sslm 1289319435Sslm/* PCIe Enumeration Event data Flags values */ 1290319435Sslm#define MPI26_EVENT_PCIE_ENUM_DEVICE_CHANGE (0x02) 1291319435Sslm#define MPI26_EVENT_PCIE_ENUM_IN_PROGRESS (0x01) 1292319435Sslm 1293319435Sslm/* PCIe Enumeration Event data ReasonCode values */ 1294319435Sslm#define MPI26_EVENT_PCIE_ENUM_RC_STARTED (0x01) 1295319435Sslm#define MPI26_EVENT_PCIE_ENUM_RC_COMPLETED (0x02) 1296319435Sslm 1297319435Sslm/* PCIe Enumeration Event data EnumerationStatus values */ 1298319435Sslm#define MPI26_EVENT_PCIE_ENUM_ES_MAX_SWITCHES_EXCEED (0x40000000) 1299319435Sslm#define MPI26_EVENT_PCIE_ENUM_ES_MAX_DEVICES_EXCEED (0x20000000) 1300319435Sslm#define MPI26_EVENT_PCIE_ENUM_ES_RESOURCES_EXHAUSTED (0x10000000) 1301319435Sslm 1302319435Sslm 1303319435Sslm/* PCIe Topology Change List Event data (MPI v2.6 and later) */ 1304319435Sslm 1305319435Sslm/* 1306319435Sslm * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1307319435Sslm * one and check NumEntries at runtime. 1308319435Sslm */ 1309319435Sslm#ifndef MPI26_EVENT_PCIE_TOPO_PORT_COUNT 1310319435Sslm#define MPI26_EVENT_PCIE_TOPO_PORT_COUNT (1) 1311319435Sslm#endif 1312319435Sslm 1313319435Sslmtypedef struct _MPI26_EVENT_PCIE_TOPO_PORT_ENTRY 1314319435Sslm{ 1315319435Sslm U16 AttachedDevHandle; /* 0x00 */ 1316319435Sslm U8 PortStatus; /* 0x02 */ 1317319435Sslm U8 Reserved1; /* 0x03 */ 1318319435Sslm U8 CurrentPortInfo; /* 0x04 */ 1319319435Sslm U8 Reserved2; /* 0x05 */ 1320319435Sslm U8 PreviousPortInfo; /* 0x06 */ 1321319435Sslm U8 Reserved3; /* 0x07 */ 1322319435Sslm} MPI26_EVENT_PCIE_TOPO_PORT_ENTRY, 1323319435Sslm MPI2_POINTER PTR_MPI26_EVENT_PCIE_TOPO_PORT_ENTRY, 1324319435Sslm Mpi26EventPCIeTopoPortEntry_t, 1325319435Sslm MPI2_POINTER pMpi26EventPCIeTopoPortEntry_t; 1326319435Sslm 1327319435Sslm/* PCIe Topology Change List Event data PortStatus values */ 1328319435Sslm#define MPI26_EVENT_PCIE_TOPO_PS_DEV_ADDED (0x01) 1329319435Sslm#define MPI26_EVENT_PCIE_TOPO_PS_NOT_RESPONDING (0x02) 1330319435Sslm#define MPI26_EVENT_PCIE_TOPO_PS_PORT_CHANGED (0x03) 1331319435Sslm#define MPI26_EVENT_PCIE_TOPO_PS_NO_CHANGE (0x04) 1332319435Sslm#define MPI26_EVENT_PCIE_TOPO_PS_DELAY_NOT_RESPONDING (0x05) 1333319435Sslm 1334319435Sslm/* PCIe Topology Change List Event data defines for CurrentPortInfo and PreviousPortInfo */ 1335319435Sslm#define MPI26_EVENT_PCIE_TOPO_PI_LANE_MASK (0xF0) 1336319435Sslm#define MPI26_EVENT_PCIE_TOPO_PI_LANES_UNKNOWN (0x00) 1337319435Sslm#define MPI26_EVENT_PCIE_TOPO_PI_1_LANE (0x10) 1338319435Sslm#define MPI26_EVENT_PCIE_TOPO_PI_2_LANES (0x20) 1339319435Sslm#define MPI26_EVENT_PCIE_TOPO_PI_4_LANES (0x30) 1340319435Sslm#define MPI26_EVENT_PCIE_TOPO_PI_8_LANES (0x40) 1341319435Sslm 1342319435Sslm#define MPI26_EVENT_PCIE_TOPO_PI_RATE_MASK (0x0F) 1343319435Sslm#define MPI26_EVENT_PCIE_TOPO_PI_RATE_UNKNOWN (0x00) 1344319435Sslm#define MPI26_EVENT_PCIE_TOPO_PI_RATE_DISABLED (0x01) 1345319435Sslm#define MPI26_EVENT_PCIE_TOPO_PI_RATE_2_5 (0x02) 1346319435Sslm#define MPI26_EVENT_PCIE_TOPO_PI_RATE_5_0 (0x03) 1347319435Sslm#define MPI26_EVENT_PCIE_TOPO_PI_RATE_8_0 (0x04) 1348319435Sslm#define MPI26_EVENT_PCIE_TOPO_PI_RATE_16_0 (0x05) 1349319435Sslm 1350319435Sslmtypedef struct _MPI26_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST 1351319435Sslm{ 1352319435Sslm U16 EnclosureHandle; /* 0x00 */ 1353319435Sslm U16 SwitchDevHandle; /* 0x02 */ 1354319435Sslm U8 NumPorts; /* 0x04 */ 1355319435Sslm U8 Reserved1; /* 0x05 */ 1356319435Sslm U16 Reserved2; /* 0x06 */ 1357319435Sslm U8 NumEntries; /* 0x08 */ 1358319435Sslm U8 StartPortNum; /* 0x09 */ 1359319435Sslm U8 SwitchStatus; /* 0x0A */ 1360319435Sslm U8 PhysicalPort; /* 0x0B */ 1361319435Sslm MPI26_EVENT_PCIE_TOPO_PORT_ENTRY PortEntry[MPI26_EVENT_PCIE_TOPO_PORT_COUNT]; /* 0x0C */ 1362319435Sslm} MPI26_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST, 1363319435Sslm MPI2_POINTER PTR_MPI26_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST, 1364319435Sslm Mpi26EventDataPCIeTopologyChangeList_t, 1365319435Sslm MPI2_POINTER pMpi26EventDataPCIeTopologyChangeList_t; 1366319435Sslm 1367319435Sslm/* PCIe Topology Change List Event data SwitchStatus values */ 1368319435Sslm#define MPI26_EVENT_PCIE_TOPO_SS_NO_PCIE_SWITCH (0x00) 1369319435Sslm#define MPI26_EVENT_PCIE_TOPO_SS_ADDED (0x01) 1370319435Sslm#define MPI26_EVENT_PCIE_TOPO_SS_NOT_RESPONDING (0x02) 1371319435Sslm#define MPI26_EVENT_PCIE_TOPO_SS_RESPONDING (0x03) 1372319435Sslm#define MPI26_EVENT_PCIE_TOPO_SS_DELAY_NOT_RESPONDING (0x04) 1373319435Sslm 1374319435Sslm/* PCIe Link Counter Event data (MPI v2.6 and later) */ 1375319435Sslm 1376319435Sslmtypedef struct _MPI26_EVENT_DATA_PCIE_LINK_COUNTER 1377319435Sslm{ 1378319435Sslm U64 TimeStamp; /* 0x00 */ 1379319435Sslm U32 Reserved1; /* 0x08 */ 1380319435Sslm U8 LinkEventCode; /* 0x0C */ 1381319435Sslm U8 LinkNum; /* 0x0D */ 1382319435Sslm U16 Reserved2; /* 0x0E */ 1383319435Sslm U32 LinkEventInfo; /* 0x10 */ 1384319435Sslm U8 CounterType; /* 0x14 */ 1385319435Sslm U8 ThresholdWindow; /* 0x15 */ 1386319435Sslm U8 TimeUnits; /* 0x16 */ 1387319435Sslm U8 Reserved3; /* 0x17 */ 1388319435Sslm U32 EventThreshold; /* 0x18 */ 1389319435Sslm U16 ThresholdFlags; /* 0x1C */ 1390319435Sslm U16 Reserved4; /* 0x1E */ 1391319435Sslm} MPI26_EVENT_DATA_PCIE_LINK_COUNTER, 1392319435Sslm MPI2_POINTER PTR_MPI26_EVENT_DATA_PCIE_LINK_COUNTER, 1393319435Sslm Mpi26EventDataPcieLinkCounter_t, MPI2_POINTER pMpi26EventDataPcieLinkCounter_t; 1394319435Sslm 1395319435Sslm 1396319435Sslm/* use MPI26_PCIELINK3_EVTCODE_ values from mpi2_cnfg.h for the LinkEventCode field */ 1397319435Sslm 1398319435Sslm/* use MPI26_PCIELINK3_COUNTER_TYPE_ values from mpi2_cnfg.h for the CounterType field */ 1399319435Sslm 1400319435Sslm/* use MPI26_PCIELINK3_TIME_UNITS_ values from mpi2_cnfg.h for the TimeUnits field */ 1401319435Sslm 1402319435Sslm/* use MPI26_PCIELINK3_TFLAGS_ values from mpi2_cnfg.h for the ThresholdFlags field */ 1403319435Sslm 1404265236Sken/**************************************************************************** 1405265236Sken* EventAck message 1406265236Sken****************************************************************************/ 1407265236Sken 1408265236Sken/* EventAck Request message */ 1409265236Skentypedef struct _MPI2_EVENT_ACK_REQUEST 1410265236Sken{ 1411265236Sken U16 Reserved1; /* 0x00 */ 1412265236Sken U8 ChainOffset; /* 0x02 */ 1413265236Sken U8 Function; /* 0x03 */ 1414265236Sken U16 Reserved2; /* 0x04 */ 1415265236Sken U8 Reserved3; /* 0x06 */ 1416265236Sken U8 MsgFlags; /* 0x07 */ 1417265236Sken U8 VP_ID; /* 0x08 */ 1418265236Sken U8 VF_ID; /* 0x09 */ 1419265236Sken U16 Reserved4; /* 0x0A */ 1420265236Sken U16 Event; /* 0x0C */ 1421265236Sken U16 Reserved5; /* 0x0E */ 1422265236Sken U32 EventContext; /* 0x10 */ 1423265236Sken} MPI2_EVENT_ACK_REQUEST, MPI2_POINTER PTR_MPI2_EVENT_ACK_REQUEST, 1424265236Sken Mpi2EventAckRequest_t, MPI2_POINTER pMpi2EventAckRequest_t; 1425265236Sken 1426265236Sken 1427265236Sken/* EventAck Reply message */ 1428265236Skentypedef struct _MPI2_EVENT_ACK_REPLY 1429265236Sken{ 1430265236Sken U16 Reserved1; /* 0x00 */ 1431265236Sken U8 MsgLength; /* 0x02 */ 1432265236Sken U8 Function; /* 0x03 */ 1433265236Sken U16 Reserved2; /* 0x04 */ 1434265236Sken U8 Reserved3; /* 0x06 */ 1435265236Sken U8 MsgFlags; /* 0x07 */ 1436265236Sken U8 VP_ID; /* 0x08 */ 1437265236Sken U8 VF_ID; /* 0x09 */ 1438265236Sken U16 Reserved4; /* 0x0A */ 1439265236Sken U16 Reserved5; /* 0x0C */ 1440265236Sken U16 IOCStatus; /* 0x0E */ 1441265236Sken U32 IOCLogInfo; /* 0x10 */ 1442265236Sken} MPI2_EVENT_ACK_REPLY, MPI2_POINTER PTR_MPI2_EVENT_ACK_REPLY, 1443265236Sken Mpi2EventAckReply_t, MPI2_POINTER pMpi2EventAckReply_t; 1444265236Sken 1445265236Sken 1446265236Sken/**************************************************************************** 1447265236Sken* SendHostMessage message 1448265236Sken****************************************************************************/ 1449265236Sken 1450265236Sken/* SendHostMessage Request message */ 1451265236Skentypedef struct _MPI2_SEND_HOST_MESSAGE_REQUEST 1452265236Sken{ 1453265236Sken U16 HostDataLength; /* 0x00 */ 1454265236Sken U8 ChainOffset; /* 0x02 */ 1455265236Sken U8 Function; /* 0x03 */ 1456265236Sken U16 Reserved1; /* 0x04 */ 1457265236Sken U8 Reserved2; /* 0x06 */ 1458265236Sken U8 MsgFlags; /* 0x07 */ 1459265236Sken U8 VP_ID; /* 0x08 */ 1460265236Sken U8 VF_ID; /* 0x09 */ 1461265236Sken U16 Reserved3; /* 0x0A */ 1462265236Sken U8 Reserved4; /* 0x0C */ 1463265236Sken U8 DestVF_ID; /* 0x0D */ 1464265236Sken U16 Reserved5; /* 0x0E */ 1465265236Sken U32 Reserved6; /* 0x10 */ 1466265236Sken U32 Reserved7; /* 0x14 */ 1467265236Sken U32 Reserved8; /* 0x18 */ 1468265236Sken U32 Reserved9; /* 0x1C */ 1469265236Sken U32 Reserved10; /* 0x20 */ 1470265236Sken U32 HostData[1]; /* 0x24 */ 1471265236Sken} MPI2_SEND_HOST_MESSAGE_REQUEST, 1472265236Sken MPI2_POINTER PTR_MPI2_SEND_HOST_MESSAGE_REQUEST, 1473265236Sken Mpi2SendHostMessageRequest_t, MPI2_POINTER pMpi2SendHostMessageRequest_t; 1474265236Sken 1475265236Sken 1476265236Sken/* SendHostMessage Reply message */ 1477265236Skentypedef struct _MPI2_SEND_HOST_MESSAGE_REPLY 1478265236Sken{ 1479265236Sken U16 HostDataLength; /* 0x00 */ 1480265236Sken U8 MsgLength; /* 0x02 */ 1481265236Sken U8 Function; /* 0x03 */ 1482265236Sken U16 Reserved1; /* 0x04 */ 1483265236Sken U8 Reserved2; /* 0x06 */ 1484265236Sken U8 MsgFlags; /* 0x07 */ 1485265236Sken U8 VP_ID; /* 0x08 */ 1486265236Sken U8 VF_ID; /* 0x09 */ 1487265236Sken U16 Reserved3; /* 0x0A */ 1488265236Sken U16 Reserved4; /* 0x0C */ 1489265236Sken U16 IOCStatus; /* 0x0E */ 1490265236Sken U32 IOCLogInfo; /* 0x10 */ 1491265236Sken} MPI2_SEND_HOST_MESSAGE_REPLY, MPI2_POINTER PTR_MPI2_SEND_HOST_MESSAGE_REPLY, 1492265236Sken Mpi2SendHostMessageReply_t, MPI2_POINTER pMpi2SendHostMessageReply_t; 1493265236Sken 1494265236Sken 1495265236Sken/**************************************************************************** 1496265236Sken* FWDownload message 1497265236Sken****************************************************************************/ 1498265236Sken 1499265236Sken/* MPI v2.0 FWDownload Request message */ 1500265236Skentypedef struct _MPI2_FW_DOWNLOAD_REQUEST 1501265236Sken{ 1502265236Sken U8 ImageType; /* 0x00 */ 1503265236Sken U8 Reserved1; /* 0x01 */ 1504265236Sken U8 ChainOffset; /* 0x02 */ 1505265236Sken U8 Function; /* 0x03 */ 1506265236Sken U16 Reserved2; /* 0x04 */ 1507265236Sken U8 Reserved3; /* 0x06 */ 1508265236Sken U8 MsgFlags; /* 0x07 */ 1509265236Sken U8 VP_ID; /* 0x08 */ 1510265236Sken U8 VF_ID; /* 0x09 */ 1511265236Sken U16 Reserved4; /* 0x0A */ 1512265236Sken U32 TotalImageSize; /* 0x0C */ 1513265236Sken U32 Reserved5; /* 0x10 */ 1514265236Sken MPI2_MPI_SGE_UNION SGL; /* 0x14 */ 1515265236Sken} MPI2_FW_DOWNLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REQUEST, 1516265236Sken Mpi2FWDownloadRequest, MPI2_POINTER pMpi2FWDownloadRequest; 1517265236Sken 1518265236Sken#define MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01) 1519265236Sken 1520265236Sken#define MPI2_FW_DOWNLOAD_ITYPE_FW (0x01) 1521265236Sken#define MPI2_FW_DOWNLOAD_ITYPE_BIOS (0x02) 1522265236Sken#define MPI2_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06) 1523265236Sken#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07) 1524265236Sken#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08) 1525265236Sken#define MPI2_FW_DOWNLOAD_ITYPE_MEGARAID (0x09) 1526265236Sken#define MPI2_FW_DOWNLOAD_ITYPE_COMPLETE (0x0A) 1527265236Sken#define MPI2_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B) 1528265236Sken#define MPI2_FW_DOWNLOAD_ITYPE_PUBLIC_KEY (0x0C) /* MPI v2.5 and newer */ 1529331903Smav#define MPI2_FW_DOWNLOAD_ITYPE_CBB_BACKUP (0x0D) 1530319435Sslm#define MPI2_FW_DOWNLOAD_ITYPE_SBR (0x0E) 1531319435Sslm#define MPI2_FW_DOWNLOAD_ITYPE_SBR_BACKUP (0x0F) 1532319435Sslm#define MPI2_FW_DOWNLOAD_ITYPE_HIIM (0x10) 1533319435Sslm#define MPI2_FW_DOWNLOAD_ITYPE_HIIA (0x11) 1534319435Sslm#define MPI2_FW_DOWNLOAD_ITYPE_CTLR (0x12) 1535319435Sslm#define MPI2_FW_DOWNLOAD_ITYPE_IMR_FIRMWARE (0x13) 1536319435Sslm#define MPI2_FW_DOWNLOAD_ITYPE_MR_NVDATA (0x14) 1537265236Sken#define MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC (0xF0) 1538265236Sken 1539265236Sken/* MPI v2.0 FWDownload TransactionContext Element */ 1540265236Skentypedef struct _MPI2_FW_DOWNLOAD_TCSGE 1541265236Sken{ 1542265236Sken U8 Reserved1; /* 0x00 */ 1543265236Sken U8 ContextSize; /* 0x01 */ 1544265236Sken U8 DetailsLength; /* 0x02 */ 1545265236Sken U8 Flags; /* 0x03 */ 1546265236Sken U32 Reserved2; /* 0x04 */ 1547265236Sken U32 ImageOffset; /* 0x08 */ 1548265236Sken U32 ImageSize; /* 0x0C */ 1549265236Sken} MPI2_FW_DOWNLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_TCSGE, 1550265236Sken Mpi2FWDownloadTCSGE_t, MPI2_POINTER pMpi2FWDownloadTCSGE_t; 1551265236Sken 1552265236Sken 1553265236Sken/* MPI v2.5 FWDownload Request message */ 1554265236Skentypedef struct _MPI25_FW_DOWNLOAD_REQUEST 1555265236Sken{ 1556265236Sken U8 ImageType; /* 0x00 */ 1557265236Sken U8 Reserved1; /* 0x01 */ 1558265236Sken U8 ChainOffset; /* 0x02 */ 1559265236Sken U8 Function; /* 0x03 */ 1560265236Sken U16 Reserved2; /* 0x04 */ 1561265236Sken U8 Reserved3; /* 0x06 */ 1562265236Sken U8 MsgFlags; /* 0x07 */ 1563265236Sken U8 VP_ID; /* 0x08 */ 1564265236Sken U8 VF_ID; /* 0x09 */ 1565265236Sken U16 Reserved4; /* 0x0A */ 1566265236Sken U32 TotalImageSize; /* 0x0C */ 1567265236Sken U32 Reserved5; /* 0x10 */ 1568265236Sken U32 Reserved6; /* 0x14 */ 1569265236Sken U32 ImageOffset; /* 0x18 */ 1570265236Sken U32 ImageSize; /* 0x1C */ 1571265236Sken MPI25_SGE_IO_UNION SGL; /* 0x20 */ 1572265236Sken} MPI25_FW_DOWNLOAD_REQUEST, MPI2_POINTER PTR_MPI25_FW_DOWNLOAD_REQUEST, 1573265236Sken Mpi25FWDownloadRequest, MPI2_POINTER pMpi25FWDownloadRequest; 1574265236Sken 1575265236Sken 1576265236Sken/* FWDownload Reply message */ 1577265236Skentypedef struct _MPI2_FW_DOWNLOAD_REPLY 1578265236Sken{ 1579265236Sken U8 ImageType; /* 0x00 */ 1580265236Sken U8 Reserved1; /* 0x01 */ 1581265236Sken U8 MsgLength; /* 0x02 */ 1582265236Sken U8 Function; /* 0x03 */ 1583265236Sken U16 Reserved2; /* 0x04 */ 1584265236Sken U8 Reserved3; /* 0x06 */ 1585265236Sken U8 MsgFlags; /* 0x07 */ 1586265236Sken U8 VP_ID; /* 0x08 */ 1587265236Sken U8 VF_ID; /* 0x09 */ 1588265236Sken U16 Reserved4; /* 0x0A */ 1589265236Sken U16 Reserved5; /* 0x0C */ 1590265236Sken U16 IOCStatus; /* 0x0E */ 1591265236Sken U32 IOCLogInfo; /* 0x10 */ 1592265236Sken} MPI2_FW_DOWNLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REPLY, 1593265236Sken Mpi2FWDownloadReply_t, MPI2_POINTER pMpi2FWDownloadReply_t; 1594265236Sken 1595265236Sken 1596265236Sken/**************************************************************************** 1597265236Sken* FWUpload message 1598265236Sken****************************************************************************/ 1599265236Sken 1600265236Sken/* MPI v2.0 FWUpload Request message */ 1601265236Skentypedef struct _MPI2_FW_UPLOAD_REQUEST 1602265236Sken{ 1603265236Sken U8 ImageType; /* 0x00 */ 1604265236Sken U8 Reserved1; /* 0x01 */ 1605265236Sken U8 ChainOffset; /* 0x02 */ 1606265236Sken U8 Function; /* 0x03 */ 1607265236Sken U16 Reserved2; /* 0x04 */ 1608265236Sken U8 Reserved3; /* 0x06 */ 1609265236Sken U8 MsgFlags; /* 0x07 */ 1610265236Sken U8 VP_ID; /* 0x08 */ 1611265236Sken U8 VF_ID; /* 0x09 */ 1612265236Sken U16 Reserved4; /* 0x0A */ 1613265236Sken U32 Reserved5; /* 0x0C */ 1614265236Sken U32 Reserved6; /* 0x10 */ 1615265236Sken MPI2_MPI_SGE_UNION SGL; /* 0x14 */ 1616265236Sken} MPI2_FW_UPLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REQUEST, 1617265236Sken Mpi2FWUploadRequest_t, MPI2_POINTER pMpi2FWUploadRequest_t; 1618265236Sken 1619265236Sken#define MPI2_FW_UPLOAD_ITYPE_FW_CURRENT (0x00) 1620265236Sken#define MPI2_FW_UPLOAD_ITYPE_FW_FLASH (0x01) 1621265236Sken#define MPI2_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02) 1622265236Sken#define MPI2_FW_UPLOAD_ITYPE_FW_BACKUP (0x05) 1623265236Sken#define MPI2_FW_UPLOAD_ITYPE_MANUFACTURING (0x06) 1624265236Sken#define MPI2_FW_UPLOAD_ITYPE_CONFIG_1 (0x07) 1625265236Sken#define MPI2_FW_UPLOAD_ITYPE_CONFIG_2 (0x08) 1626265236Sken#define MPI2_FW_UPLOAD_ITYPE_MEGARAID (0x09) 1627265236Sken#define MPI2_FW_UPLOAD_ITYPE_COMPLETE (0x0A) 1628265236Sken#define MPI2_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B) 1629299263Sslm#define MPI2_FW_UPLOAD_ITYPE_CBB_BACKUP (0x0D) 1630319435Sslm#define MPI2_FW_UPLOAD_ITYPE_SBR (0x0E) 1631319435Sslm#define MPI2_FW_UPLOAD_ITYPE_SBR_BACKUP (0x0F) 1632319435Sslm#define MPI2_FW_UPLOAD_ITYPE_HIIM (0x10) 1633319435Sslm#define MPI2_FW_UPLOAD_ITYPE_HIIA (0x11) 1634319435Sslm#define MPI2_FW_UPLOAD_ITYPE_CTLR (0x12) 1635319435Sslm#define MPI2_FW_UPLOAD_ITYPE_IMR_FIRMWARE (0x13) 1636319435Sslm#define MPI2_FW_UPLOAD_ITYPE_MR_NVDATA (0x14) 1637265236Sken 1638265236Sken/* MPI v2.0 FWUpload TransactionContext Element */ 1639265236Skentypedef struct _MPI2_FW_UPLOAD_TCSGE 1640265236Sken{ 1641265236Sken U8 Reserved1; /* 0x00 */ 1642265236Sken U8 ContextSize; /* 0x01 */ 1643265236Sken U8 DetailsLength; /* 0x02 */ 1644265236Sken U8 Flags; /* 0x03 */ 1645265236Sken U32 Reserved2; /* 0x04 */ 1646265236Sken U32 ImageOffset; /* 0x08 */ 1647265236Sken U32 ImageSize; /* 0x0C */ 1648265236Sken} MPI2_FW_UPLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_UPLOAD_TCSGE, 1649265236Sken Mpi2FWUploadTCSGE_t, MPI2_POINTER pMpi2FWUploadTCSGE_t; 1650265236Sken 1651265236Sken 1652265236Sken/* MPI v2.5 FWUpload Request message */ 1653265236Skentypedef struct _MPI25_FW_UPLOAD_REQUEST 1654265236Sken{ 1655265236Sken U8 ImageType; /* 0x00 */ 1656265236Sken U8 Reserved1; /* 0x01 */ 1657265236Sken U8 ChainOffset; /* 0x02 */ 1658265236Sken U8 Function; /* 0x03 */ 1659265236Sken U16 Reserved2; /* 0x04 */ 1660265236Sken U8 Reserved3; /* 0x06 */ 1661265236Sken U8 MsgFlags; /* 0x07 */ 1662265236Sken U8 VP_ID; /* 0x08 */ 1663265236Sken U8 VF_ID; /* 0x09 */ 1664265236Sken U16 Reserved4; /* 0x0A */ 1665265236Sken U32 Reserved5; /* 0x0C */ 1666265236Sken U32 Reserved6; /* 0x10 */ 1667265236Sken U32 Reserved7; /* 0x14 */ 1668265236Sken U32 ImageOffset; /* 0x18 */ 1669265236Sken U32 ImageSize; /* 0x1C */ 1670265236Sken MPI25_SGE_IO_UNION SGL; /* 0x20 */ 1671265236Sken} MPI25_FW_UPLOAD_REQUEST, MPI2_POINTER PTR_MPI25_FW_UPLOAD_REQUEST, 1672265236Sken Mpi25FWUploadRequest_t, MPI2_POINTER pMpi25FWUploadRequest_t; 1673265236Sken 1674265236Sken 1675265236Sken/* FWUpload Reply message */ 1676265236Skentypedef struct _MPI2_FW_UPLOAD_REPLY 1677265236Sken{ 1678265236Sken U8 ImageType; /* 0x00 */ 1679265236Sken U8 Reserved1; /* 0x01 */ 1680265236Sken U8 MsgLength; /* 0x02 */ 1681265236Sken U8 Function; /* 0x03 */ 1682265236Sken U16 Reserved2; /* 0x04 */ 1683265236Sken U8 Reserved3; /* 0x06 */ 1684265236Sken U8 MsgFlags; /* 0x07 */ 1685265236Sken U8 VP_ID; /* 0x08 */ 1686265236Sken U8 VF_ID; /* 0x09 */ 1687265236Sken U16 Reserved4; /* 0x0A */ 1688265236Sken U16 Reserved5; /* 0x0C */ 1689265236Sken U16 IOCStatus; /* 0x0E */ 1690265236Sken U32 IOCLogInfo; /* 0x10 */ 1691265236Sken U32 ActualImageSize; /* 0x14 */ 1692265236Sken} MPI2_FW_UPLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REPLY, 1693265236Sken Mpi2FWUploadReply_t, MPI2_POINTER pMPi2FWUploadReply_t; 1694265236Sken 1695265236Sken 1696265236Sken/* FW Image Header */ 1697265236Skentypedef struct _MPI2_FW_IMAGE_HEADER 1698265236Sken{ 1699265236Sken U32 Signature; /* 0x00 */ 1700265236Sken U32 Signature0; /* 0x04 */ 1701265236Sken U32 Signature1; /* 0x08 */ 1702265236Sken U32 Signature2; /* 0x0C */ 1703265236Sken MPI2_VERSION_UNION MPIVersion; /* 0x10 */ 1704265236Sken MPI2_VERSION_UNION FWVersion; /* 0x14 */ 1705265236Sken MPI2_VERSION_UNION NVDATAVersion; /* 0x18 */ 1706265236Sken MPI2_VERSION_UNION PackageVersion; /* 0x1C */ 1707265236Sken U16 VendorID; /* 0x20 */ 1708265236Sken U16 ProductID; /* 0x22 */ 1709265236Sken U16 ProtocolFlags; /* 0x24 */ 1710265236Sken U16 Reserved26; /* 0x26 */ 1711265236Sken U32 IOCCapabilities; /* 0x28 */ 1712265236Sken U32 ImageSize; /* 0x2C */ 1713265236Sken U32 NextImageHeaderOffset; /* 0x30 */ 1714265236Sken U32 Checksum; /* 0x34 */ 1715265236Sken U32 Reserved38; /* 0x38 */ 1716265236Sken U32 Reserved3C; /* 0x3C */ 1717265236Sken U32 Reserved40; /* 0x40 */ 1718265236Sken U32 Reserved44; /* 0x44 */ 1719265236Sken U32 Reserved48; /* 0x48 */ 1720265236Sken U32 Reserved4C; /* 0x4C */ 1721265236Sken U32 Reserved50; /* 0x50 */ 1722265236Sken U32 Reserved54; /* 0x54 */ 1723265236Sken U32 Reserved58; /* 0x58 */ 1724265236Sken U32 Reserved5C; /* 0x5C */ 1725299263Sslm U32 BootFlags; /* 0x60 */ /* reserved in MPI v2.5 and earlier */ 1726265236Sken U32 FirmwareVersionNameWhat; /* 0x64 */ 1727265236Sken U8 FirmwareVersionName[32]; /* 0x68 */ 1728265236Sken U32 VendorNameWhat; /* 0x88 */ 1729265236Sken U8 VendorName[32]; /* 0x8C */ 1730265236Sken U32 PackageNameWhat; /* 0x88 */ 1731265236Sken U8 PackageName[32]; /* 0x8C */ 1732265236Sken U32 ReservedD0; /* 0xD0 */ 1733265236Sken U32 ReservedD4; /* 0xD4 */ 1734265236Sken U32 ReservedD8; /* 0xD8 */ 1735265236Sken U32 ReservedDC; /* 0xDC */ 1736265236Sken U32 ReservedE0; /* 0xE0 */ 1737265236Sken U32 ReservedE4; /* 0xE4 */ 1738265236Sken U32 ReservedE8; /* 0xE8 */ 1739265236Sken U32 ReservedEC; /* 0xEC */ 1740265236Sken U32 ReservedF0; /* 0xF0 */ 1741265236Sken U32 ReservedF4; /* 0xF4 */ 1742265236Sken U32 ReservedF8; /* 0xF8 */ 1743265236Sken U32 ReservedFC; /* 0xFC */ 1744265236Sken} MPI2_FW_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_FW_IMAGE_HEADER, 1745265236Sken Mpi2FWImageHeader_t, MPI2_POINTER pMpi2FWImageHeader_t; 1746265236Sken 1747265236Sken/* Signature field */ 1748265236Sken#define MPI2_FW_HEADER_SIGNATURE_OFFSET (0x00) 1749265236Sken#define MPI2_FW_HEADER_SIGNATURE_MASK (0xFF000000) 1750265236Sken#define MPI2_FW_HEADER_SIGNATURE (0xEA000000) 1751299263Sslm#define MPI26_FW_HEADER_SIGNATURE (0xEB000000) 1752265236Sken 1753265236Sken/* Signature0 field */ 1754265236Sken#define MPI2_FW_HEADER_SIGNATURE0_OFFSET (0x04) 1755265236Sken#define MPI2_FW_HEADER_SIGNATURE0 (0x5AFAA55A) 1756299263Sslm#define MPI26_FW_HEADER_SIGNATURE0_BASE (0x5AEAA500) /* Last byte is defined by architecture */ 1757299263Sslm#define MPI26_FW_HEADER_SIGNATURE0_ARC_0 (0x5A) 1758299263Sslm#define MPI26_FW_HEADER_SIGNATURE0_ARC_1 (0x00) 1759299263Sslm#define MPI26_FW_HEADER_SIGNATURE0_ARC_2 (0x01) 1760319435Sslm#define MPI26_FW_HEADER_SIGNATURE0_ARC_3 (0x02) 1761299263Sslm#define MPI26_FW_HEADER_SIGNATURE0 (MPI26_FW_HEADER_SIGNATURE0_BASE+MPI26_FW_HEADER_SIGNATURE0_ARC_0) // legacy (0x5AEAA55A) 1762299263Sslm#define MPI26_FW_HEADER_SIGNATURE0_3516 (MPI26_FW_HEADER_SIGNATURE0_BASE+MPI26_FW_HEADER_SIGNATURE0_ARC_1) 1763319435Sslm#define MPI26_FW_HEADER_SIGNATURE0_4008 (MPI26_FW_HEADER_SIGNATURE0_BASE+MPI26_FW_HEADER_SIGNATURE0_ARC_3) 1764265236Sken 1765265236Sken/* Signature1 field */ 1766265236Sken#define MPI2_FW_HEADER_SIGNATURE1_OFFSET (0x08) 1767265236Sken#define MPI2_FW_HEADER_SIGNATURE1 (0xA55AFAA5) 1768299263Sslm#define MPI26_FW_HEADER_SIGNATURE1 (0xA55AEAA5) 1769265236Sken 1770265236Sken/* Signature2 field */ 1771265236Sken#define MPI2_FW_HEADER_SIGNATURE2_OFFSET (0x0C) 1772265236Sken#define MPI2_FW_HEADER_SIGNATURE2 (0x5AA55AFA) 1773299263Sslm#define MPI26_FW_HEADER_SIGNATURE2 (0x5AA55AEA) 1774265236Sken 1775265236Sken 1776265236Sken/* defines for using the ProductID field */ 1777265236Sken#define MPI2_FW_HEADER_PID_TYPE_MASK (0xF000) 1778265236Sken#define MPI2_FW_HEADER_PID_TYPE_SAS (0x2000) 1779265236Sken 1780265236Sken#define MPI2_FW_HEADER_PID_PROD_MASK (0x0F00) 1781265236Sken#define MPI2_FW_HEADER_PID_PROD_A (0x0000) 1782265236Sken#define MPI2_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200) 1783265236Sken#define MPI2_FW_HEADER_PID_PROD_IR_SCSI (0x0700) 1784265236Sken 1785265236Sken 1786265236Sken#define MPI2_FW_HEADER_PID_FAMILY_MASK (0x00FF) 1787265236Sken/* SAS ProductID Family bits */ 1788265236Sken#define MPI2_FW_HEADER_PID_FAMILY_2108_SAS (0x0013) 1789265236Sken#define MPI2_FW_HEADER_PID_FAMILY_2208_SAS (0x0014) 1790265236Sken#define MPI25_FW_HEADER_PID_FAMILY_3108_SAS (0x0021) 1791299263Sslm#define MPI26_FW_HEADER_PID_FAMILY_3324_SAS (0x0028) 1792299263Sslm#define MPI26_FW_HEADER_PID_FAMILY_3516_SAS (0x0031) 1793265236Sken 1794265236Sken/* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */ 1795265236Sken 1796265236Sken/* use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */ 1797265236Sken 1798265236Sken 1799265236Sken#define MPI2_FW_HEADER_IMAGESIZE_OFFSET (0x2C) 1800265236Sken#define MPI2_FW_HEADER_NEXTIMAGE_OFFSET (0x30) 1801299263Sslm#define MPI26_FW_HEADER_BOOTFLAGS_OFFSET (0x60) 1802265236Sken#define MPI2_FW_HEADER_VERNMHWAT_OFFSET (0x64) 1803265236Sken 1804265236Sken#define MPI2_FW_HEADER_WHAT_SIGNATURE (0x29232840) 1805265236Sken 1806265236Sken#define MPI2_FW_HEADER_SIZE (0x100) 1807265236Sken 1808265236Sken 1809265236Sken/* Extended Image Header */ 1810265236Skentypedef struct _MPI2_EXT_IMAGE_HEADER 1811265236Sken 1812265236Sken{ 1813265236Sken U8 ImageType; /* 0x00 */ 1814265236Sken U8 Reserved1; /* 0x01 */ 1815265236Sken U16 Reserved2; /* 0x02 */ 1816265236Sken U32 Checksum; /* 0x04 */ 1817265236Sken U32 ImageSize; /* 0x08 */ 1818265236Sken U32 NextImageHeaderOffset; /* 0x0C */ 1819265236Sken U32 PackageVersion; /* 0x10 */ 1820265236Sken U32 Reserved3; /* 0x14 */ 1821265236Sken U32 Reserved4; /* 0x18 */ 1822265236Sken U32 Reserved5; /* 0x1C */ 1823265236Sken U8 IdentifyString[32]; /* 0x20 */ 1824265236Sken} MPI2_EXT_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_EXT_IMAGE_HEADER, 1825265236Sken Mpi2ExtImageHeader_t, MPI2_POINTER pMpi2ExtImageHeader_t; 1826265236Sken 1827265236Sken/* useful offsets */ 1828265236Sken#define MPI2_EXT_IMAGE_IMAGETYPE_OFFSET (0x00) 1829265236Sken#define MPI2_EXT_IMAGE_IMAGESIZE_OFFSET (0x08) 1830265236Sken#define MPI2_EXT_IMAGE_NEXTIMAGE_OFFSET (0x0C) 1831265236Sken 1832265236Sken#define MPI2_EXT_IMAGE_HEADER_SIZE (0x40) 1833265236Sken 1834265236Sken/* defines for the ImageType field */ 1835265236Sken#define MPI2_EXT_IMAGE_TYPE_UNSPECIFIED (0x00) 1836265236Sken#define MPI2_EXT_IMAGE_TYPE_FW (0x01) 1837265236Sken#define MPI2_EXT_IMAGE_TYPE_NVDATA (0x03) 1838265236Sken#define MPI2_EXT_IMAGE_TYPE_BOOTLOADER (0x04) 1839265236Sken#define MPI2_EXT_IMAGE_TYPE_INITIALIZATION (0x05) 1840265236Sken#define MPI2_EXT_IMAGE_TYPE_FLASH_LAYOUT (0x06) 1841265236Sken#define MPI2_EXT_IMAGE_TYPE_SUPPORTED_DEVICES (0x07) 1842265236Sken#define MPI2_EXT_IMAGE_TYPE_MEGARAID (0x08) 1843265236Sken#define MPI2_EXT_IMAGE_TYPE_ENCRYPTED_HASH (0x09) /* MPI v2.5 and newer */ 1844265236Sken#define MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC (0x80) 1845265236Sken#define MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC (0xFF) 1846265236Sken 1847265236Sken#define MPI2_EXT_IMAGE_TYPE_MAX (MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC) /* deprecated */ 1848265236Sken 1849265236Sken 1850265236Sken 1851265236Sken/* FLASH Layout Extended Image Data */ 1852265236Sken 1853265236Sken/* 1854265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1855265236Sken * one and check RegionsPerLayout at runtime. 1856265236Sken */ 1857265236Sken#ifndef MPI2_FLASH_NUMBER_OF_REGIONS 1858265236Sken#define MPI2_FLASH_NUMBER_OF_REGIONS (1) 1859265236Sken#endif 1860265236Sken 1861265236Sken/* 1862265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1863265236Sken * one and check NumberOfLayouts at runtime. 1864265236Sken */ 1865265236Sken#ifndef MPI2_FLASH_NUMBER_OF_LAYOUTS 1866265236Sken#define MPI2_FLASH_NUMBER_OF_LAYOUTS (1) 1867265236Sken#endif 1868265236Sken 1869265236Skentypedef struct _MPI2_FLASH_REGION 1870265236Sken{ 1871265236Sken U8 RegionType; /* 0x00 */ 1872265236Sken U8 Reserved1; /* 0x01 */ 1873265236Sken U16 Reserved2; /* 0x02 */ 1874265236Sken U32 RegionOffset; /* 0x04 */ 1875265236Sken U32 RegionSize; /* 0x08 */ 1876265236Sken U32 Reserved3; /* 0x0C */ 1877265236Sken} MPI2_FLASH_REGION, MPI2_POINTER PTR_MPI2_FLASH_REGION, 1878265236Sken Mpi2FlashRegion_t, MPI2_POINTER pMpi2FlashRegion_t; 1879265236Sken 1880265236Skentypedef struct _MPI2_FLASH_LAYOUT 1881265236Sken{ 1882265236Sken U32 FlashSize; /* 0x00 */ 1883265236Sken U32 Reserved1; /* 0x04 */ 1884265236Sken U32 Reserved2; /* 0x08 */ 1885265236Sken U32 Reserved3; /* 0x0C */ 1886265236Sken MPI2_FLASH_REGION Region[MPI2_FLASH_NUMBER_OF_REGIONS];/* 0x10 */ 1887265236Sken} MPI2_FLASH_LAYOUT, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT, 1888265236Sken Mpi2FlashLayout_t, MPI2_POINTER pMpi2FlashLayout_t; 1889265236Sken 1890265236Skentypedef struct _MPI2_FLASH_LAYOUT_DATA 1891265236Sken{ 1892265236Sken U8 ImageRevision; /* 0x00 */ 1893265236Sken U8 Reserved1; /* 0x01 */ 1894265236Sken U8 SizeOfRegion; /* 0x02 */ 1895265236Sken U8 Reserved2; /* 0x03 */ 1896265236Sken U16 NumberOfLayouts; /* 0x04 */ 1897265236Sken U16 RegionsPerLayout; /* 0x06 */ 1898265236Sken U16 MinimumSectorAlignment; /* 0x08 */ 1899265236Sken U16 Reserved3; /* 0x0A */ 1900265236Sken U32 Reserved4; /* 0x0C */ 1901265236Sken MPI2_FLASH_LAYOUT Layout[MPI2_FLASH_NUMBER_OF_LAYOUTS];/* 0x10 */ 1902265236Sken} MPI2_FLASH_LAYOUT_DATA, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT_DATA, 1903265236Sken Mpi2FlashLayoutData_t, MPI2_POINTER pMpi2FlashLayoutData_t; 1904265236Sken 1905265236Sken/* defines for the RegionType field */ 1906265236Sken#define MPI2_FLASH_REGION_UNUSED (0x00) 1907265236Sken#define MPI2_FLASH_REGION_FIRMWARE (0x01) 1908265236Sken#define MPI2_FLASH_REGION_BIOS (0x02) 1909265236Sken#define MPI2_FLASH_REGION_NVDATA (0x03) 1910265236Sken#define MPI2_FLASH_REGION_FIRMWARE_BACKUP (0x05) 1911265236Sken#define MPI2_FLASH_REGION_MFG_INFORMATION (0x06) 1912265236Sken#define MPI2_FLASH_REGION_CONFIG_1 (0x07) 1913265236Sken#define MPI2_FLASH_REGION_CONFIG_2 (0x08) 1914265236Sken#define MPI2_FLASH_REGION_MEGARAID (0x09) 1915299263Sslm#define MPI2_FLASH_REGION_COMMON_BOOT_BLOCK (0x0A) 1916299263Sslm#define MPI2_FLASH_REGION_INIT (MPI2_FLASH_REGION_COMMON_BOOT_BLOCK) /* older name */ 1917299263Sslm#define MPI2_FLASH_REGION_CBB_BACKUP (0x0D) 1918319435Sslm#define MPI2_FLASH_REGION_SBR (0x0E) 1919319435Sslm#define MPI2_FLASH_REGION_SBR_BACKUP (0x0F) 1920319435Sslm#define MPI2_FLASH_REGION_HIIM (0x10) 1921319435Sslm#define MPI2_FLASH_REGION_HIIA (0x11) 1922319435Sslm#define MPI2_FLASH_REGION_CTLR (0x12) 1923319435Sslm#define MPI2_FLASH_REGION_IMR_FIRMWARE (0x13) 1924319435Sslm#define MPI2_FLASH_REGION_MR_NVDATA (0x14) 1925265236Sken 1926265236Sken/* ImageRevision */ 1927265236Sken#define MPI2_FLASH_LAYOUT_IMAGE_REVISION (0x00) 1928265236Sken 1929265236Sken 1930265236Sken 1931265236Sken/* Supported Devices Extended Image Data */ 1932265236Sken 1933265236Sken/* 1934265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1935265236Sken * one and check NumberOfDevices at runtime. 1936265236Sken */ 1937265236Sken#ifndef MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES 1938265236Sken#define MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES (1) 1939265236Sken#endif 1940265236Sken 1941265236Skentypedef struct _MPI2_SUPPORTED_DEVICE 1942265236Sken{ 1943265236Sken U16 DeviceID; /* 0x00 */ 1944265236Sken U16 VendorID; /* 0x02 */ 1945265236Sken U16 DeviceIDMask; /* 0x04 */ 1946265236Sken U16 Reserved1; /* 0x06 */ 1947265236Sken U8 LowPCIRev; /* 0x08 */ 1948265236Sken U8 HighPCIRev; /* 0x09 */ 1949265236Sken U16 Reserved2; /* 0x0A */ 1950265236Sken U32 Reserved3; /* 0x0C */ 1951265236Sken} MPI2_SUPPORTED_DEVICE, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICE, 1952265236Sken Mpi2SupportedDevice_t, MPI2_POINTER pMpi2SupportedDevice_t; 1953265236Sken 1954265236Skentypedef struct _MPI2_SUPPORTED_DEVICES_DATA 1955265236Sken{ 1956265236Sken U8 ImageRevision; /* 0x00 */ 1957265236Sken U8 Reserved1; /* 0x01 */ 1958265236Sken U8 NumberOfDevices; /* 0x02 */ 1959265236Sken U8 Reserved2; /* 0x03 */ 1960265236Sken U32 Reserved3; /* 0x04 */ 1961265236Sken MPI2_SUPPORTED_DEVICE SupportedDevice[MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES]; /* 0x08 */ 1962265236Sken} MPI2_SUPPORTED_DEVICES_DATA, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICES_DATA, 1963265236Sken Mpi2SupportedDevicesData_t, MPI2_POINTER pMpi2SupportedDevicesData_t; 1964265236Sken 1965265236Sken/* ImageRevision */ 1966265236Sken#define MPI2_SUPPORTED_DEVICES_IMAGE_REVISION (0x00) 1967265236Sken 1968265236Sken 1969265236Sken/* Init Extended Image Data */ 1970265236Sken 1971265236Skentypedef struct _MPI2_INIT_IMAGE_FOOTER 1972265236Sken 1973265236Sken{ 1974265236Sken U32 BootFlags; /* 0x00 */ 1975265236Sken U32 ImageSize; /* 0x04 */ 1976265236Sken U32 Signature0; /* 0x08 */ 1977265236Sken U32 Signature1; /* 0x0C */ 1978265236Sken U32 Signature2; /* 0x10 */ 1979265236Sken U32 ResetVector; /* 0x14 */ 1980265236Sken} MPI2_INIT_IMAGE_FOOTER, MPI2_POINTER PTR_MPI2_INIT_IMAGE_FOOTER, 1981265236Sken Mpi2InitImageFooter_t, MPI2_POINTER pMpi2InitImageFooter_t; 1982265236Sken 1983265236Sken/* defines for the BootFlags field */ 1984265236Sken#define MPI2_INIT_IMAGE_BOOTFLAGS_OFFSET (0x00) 1985265236Sken 1986265236Sken/* defines for the ImageSize field */ 1987265236Sken#define MPI2_INIT_IMAGE_IMAGESIZE_OFFSET (0x04) 1988265236Sken 1989265236Sken/* defines for the Signature0 field */ 1990265236Sken#define MPI2_INIT_IMAGE_SIGNATURE0_OFFSET (0x08) 1991265236Sken#define MPI2_INIT_IMAGE_SIGNATURE0 (0x5AA55AEA) 1992265236Sken 1993265236Sken/* defines for the Signature1 field */ 1994265236Sken#define MPI2_INIT_IMAGE_SIGNATURE1_OFFSET (0x0C) 1995265236Sken#define MPI2_INIT_IMAGE_SIGNATURE1 (0xA55AEAA5) 1996265236Sken 1997265236Sken/* defines for the Signature2 field */ 1998265236Sken#define MPI2_INIT_IMAGE_SIGNATURE2_OFFSET (0x10) 1999265236Sken#define MPI2_INIT_IMAGE_SIGNATURE2 (0x5AEAA55A) 2000265236Sken 2001265236Sken/* Signature fields as individual bytes */ 2002265236Sken#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_0 (0xEA) 2003265236Sken#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_1 (0x5A) 2004265236Sken#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_2 (0xA5) 2005265236Sken#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_3 (0x5A) 2006265236Sken 2007265236Sken#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_4 (0xA5) 2008265236Sken#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_5 (0xEA) 2009265236Sken#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_6 (0x5A) 2010265236Sken#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_7 (0xA5) 2011265236Sken 2012265236Sken#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_8 (0x5A) 2013265236Sken#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_9 (0xA5) 2014265236Sken#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_A (0xEA) 2015265236Sken#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_B (0x5A) 2016265236Sken 2017265236Sken/* defines for the ResetVector field */ 2018265236Sken#define MPI2_INIT_IMAGE_RESETVECTOR_OFFSET (0x14) 2019265236Sken 2020265236Sken 2021265236Sken/* Encrypted Hash Extended Image Data */ 2022265236Sken 2023265236Skentypedef struct _MPI25_ENCRYPTED_HASH_ENTRY 2024265236Sken{ 2025265236Sken U8 HashImageType; /* 0x00 */ 2026265236Sken U8 HashAlgorithm; /* 0x01 */ 2027265236Sken U8 EncryptionAlgorithm; /* 0x02 */ 2028265236Sken U8 Reserved1; /* 0x03 */ 2029265236Sken U32 Reserved2; /* 0x04 */ 2030265236Sken U32 EncryptedHash[1]; /* 0x08 */ /* variable length */ 2031265236Sken} MPI25_ENCRYPTED_HASH_ENTRY, MPI2_POINTER PTR_MPI25_ENCRYPTED_HASH_ENTRY, 2032265236Sken Mpi25EncryptedHashEntry_t, MPI2_POINTER pMpi25EncryptedHashEntry_t; 2033265236Sken 2034265236Sken/* values for HashImageType */ 2035265236Sken#define MPI25_HASH_IMAGE_TYPE_UNUSED (0x00) 2036265236Sken#define MPI25_HASH_IMAGE_TYPE_FIRMWARE (0x01) 2037265236Sken#define MPI25_HASH_IMAGE_TYPE_BIOS (0x02) 2038265236Sken 2039265236Sken/* values for HashAlgorithm */ 2040265236Sken#define MPI25_HASH_ALGORITHM_UNUSED (0x00) 2041265236Sken#define MPI25_HASH_ALGORITHM_SHA256 (0x01) 2042265236Sken 2043265236Sken/* values for EncryptionAlgorithm */ 2044265236Sken#define MPI25_ENCRYPTION_ALG_UNUSED (0x00) 2045265236Sken#define MPI25_ENCRYPTION_ALG_RSA256 (0x01) 2046265236Sken 2047265236Skentypedef struct _MPI25_ENCRYPTED_HASH_DATA 2048265236Sken{ 2049265236Sken U8 ImageVersion; /* 0x00 */ 2050265236Sken U8 NumHash; /* 0x01 */ 2051265236Sken U16 Reserved1; /* 0x02 */ 2052265236Sken U32 Reserved2; /* 0x04 */ 2053265236Sken MPI25_ENCRYPTED_HASH_ENTRY EncryptedHashEntry[1]; /* 0x08 */ /* variable number of entries */ 2054265236Sken} MPI25_ENCRYPTED_HASH_DATA, MPI2_POINTER PTR_MPI25_ENCRYPTED_HASH_DATA, 2055265236Sken Mpi25EncryptedHashData_t, MPI2_POINTER pMpi25EncryptedHashData_t; 2056265236Sken 2057265236Sken/**************************************************************************** 2058265236Sken* PowerManagementControl message 2059265236Sken****************************************************************************/ 2060265236Sken 2061265236Sken/* PowerManagementControl Request message */ 2062265236Skentypedef struct _MPI2_PWR_MGMT_CONTROL_REQUEST 2063265236Sken{ 2064265236Sken U8 Feature; /* 0x00 */ 2065265236Sken U8 Reserved1; /* 0x01 */ 2066265236Sken U8 ChainOffset; /* 0x02 */ 2067265236Sken U8 Function; /* 0x03 */ 2068265236Sken U16 Reserved2; /* 0x04 */ 2069265236Sken U8 Reserved3; /* 0x06 */ 2070265236Sken U8 MsgFlags; /* 0x07 */ 2071265236Sken U8 VP_ID; /* 0x08 */ 2072265236Sken U8 VF_ID; /* 0x09 */ 2073265236Sken U16 Reserved4; /* 0x0A */ 2074265236Sken U8 Parameter1; /* 0x0C */ 2075265236Sken U8 Parameter2; /* 0x0D */ 2076265236Sken U8 Parameter3; /* 0x0E */ 2077265236Sken U8 Parameter4; /* 0x0F */ 2078265236Sken U32 Reserved5; /* 0x10 */ 2079265236Sken U32 Reserved6; /* 0x14 */ 2080265236Sken} MPI2_PWR_MGMT_CONTROL_REQUEST, MPI2_POINTER PTR_MPI2_PWR_MGMT_CONTROL_REQUEST, 2081265236Sken Mpi2PwrMgmtControlRequest_t, MPI2_POINTER pMpi2PwrMgmtControlRequest_t; 2082265236Sken 2083265236Sken/* defines for the Feature field */ 2084265236Sken#define MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND (0x01) 2085265236Sken#define MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION (0x02) 2086265236Sken#define MPI2_PM_CONTROL_FEATURE_PCIE_LINK (0x03) /* obsolete */ 2087265236Sken#define MPI2_PM_CONTROL_FEATURE_IOC_SPEED (0x04) 2088265236Sken#define MPI2_PM_CONTROL_FEATURE_GLOBAL_PWR_MGMT_MODE (0x05) /* reserved in MPI 2.0 */ 2089265236Sken#define MPI2_PM_CONTROL_FEATURE_MIN_PRODUCT_SPECIFIC (0x80) 2090265236Sken#define MPI2_PM_CONTROL_FEATURE_MAX_PRODUCT_SPECIFIC (0xFF) 2091265236Sken 2092265236Sken/* parameter usage for the MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND Feature */ 2093265236Sken/* Parameter1 contains a PHY number */ 2094265236Sken/* Parameter2 indicates power condition action using these defines */ 2095265236Sken#define MPI2_PM_CONTROL_PARAM2_PARTIAL (0x01) 2096265236Sken#define MPI2_PM_CONTROL_PARAM2_SLUMBER (0x02) 2097265236Sken#define MPI2_PM_CONTROL_PARAM2_EXIT_PWR_MGMT (0x03) 2098265236Sken/* Parameter3 and Parameter4 are reserved */ 2099265236Sken 2100265236Sken/* parameter usage for the MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION Feature */ 2101265236Sken/* Parameter1 contains SAS port width modulation group number */ 2102265236Sken/* Parameter2 indicates IOC action using these defines */ 2103265236Sken#define MPI2_PM_CONTROL_PARAM2_REQUEST_OWNERSHIP (0x01) 2104265236Sken#define MPI2_PM_CONTROL_PARAM2_CHANGE_MODULATION (0x02) 2105265236Sken#define MPI2_PM_CONTROL_PARAM2_RELINQUISH_OWNERSHIP (0x03) 2106265236Sken/* Parameter3 indicates desired modulation level using these defines */ 2107265236Sken#define MPI2_PM_CONTROL_PARAM3_25_PERCENT (0x00) 2108265236Sken#define MPI2_PM_CONTROL_PARAM3_50_PERCENT (0x01) 2109265236Sken#define MPI2_PM_CONTROL_PARAM3_75_PERCENT (0x02) 2110265236Sken#define MPI2_PM_CONTROL_PARAM3_100_PERCENT (0x03) 2111265236Sken/* Parameter4 is reserved */ 2112265236Sken 2113265236Sken/* this next set (_PCIE_LINK) is obsolete */ 2114265236Sken/* parameter usage for the MPI2_PM_CONTROL_FEATURE_PCIE_LINK Feature */ 2115265236Sken/* Parameter1 indicates desired PCIe link speed using these defines */ 2116265236Sken#define MPI2_PM_CONTROL_PARAM1_PCIE_2_5_GBPS (0x00) /* obsolete */ 2117265236Sken#define MPI2_PM_CONTROL_PARAM1_PCIE_5_0_GBPS (0x01) /* obsolete */ 2118265236Sken#define MPI2_PM_CONTROL_PARAM1_PCIE_8_0_GBPS (0x02) /* obsolete */ 2119265236Sken/* Parameter2 indicates desired PCIe link width using these defines */ 2120265236Sken#define MPI2_PM_CONTROL_PARAM2_WIDTH_X1 (0x01) /* obsolete */ 2121265236Sken#define MPI2_PM_CONTROL_PARAM2_WIDTH_X2 (0x02) /* obsolete */ 2122265236Sken#define MPI2_PM_CONTROL_PARAM2_WIDTH_X4 (0x04) /* obsolete */ 2123265236Sken#define MPI2_PM_CONTROL_PARAM2_WIDTH_X8 (0x08) /* obsolete */ 2124265236Sken/* Parameter3 and Parameter4 are reserved */ 2125265236Sken 2126265236Sken/* parameter usage for the MPI2_PM_CONTROL_FEATURE_IOC_SPEED Feature */ 2127265236Sken/* Parameter1 indicates desired IOC hardware clock speed using these defines */ 2128265236Sken#define MPI2_PM_CONTROL_PARAM1_FULL_IOC_SPEED (0x01) 2129265236Sken#define MPI2_PM_CONTROL_PARAM1_HALF_IOC_SPEED (0x02) 2130265236Sken#define MPI2_PM_CONTROL_PARAM1_QUARTER_IOC_SPEED (0x04) 2131265236Sken#define MPI2_PM_CONTROL_PARAM1_EIGHTH_IOC_SPEED (0x08) 2132265236Sken/* Parameter2, Parameter3, and Parameter4 are reserved */ 2133265236Sken 2134265236Sken/* parameter usage for the MPI2_PM_CONTROL_FEATURE_GLOBAL_PWR_MGMT_MODE Feature */ 2135265236Sken/* Parameter1 indicates host action regarding global power management mode */ 2136265236Sken#define MPI2_PM_CONTROL_PARAM1_TAKE_CONTROL (0x01) 2137265236Sken#define MPI2_PM_CONTROL_PARAM1_CHANGE_GLOBAL_MODE (0x02) 2138265236Sken#define MPI2_PM_CONTROL_PARAM1_RELEASE_CONTROL (0x03) 2139265236Sken/* Parameter2 indicates the requested global power management mode */ 2140265236Sken#define MPI2_PM_CONTROL_PARAM2_FULL_PWR_PERF (0x01) 2141265236Sken#define MPI2_PM_CONTROL_PARAM2_REDUCED_PWR_PERF (0x08) 2142265236Sken#define MPI2_PM_CONTROL_PARAM2_STANDBY (0x40) 2143265236Sken/* Parameter3 and Parameter4 are reserved */ 2144265236Sken 2145265236Sken 2146265236Sken/* PowerManagementControl Reply message */ 2147265236Skentypedef struct _MPI2_PWR_MGMT_CONTROL_REPLY 2148265236Sken{ 2149265236Sken U8 Feature; /* 0x00 */ 2150265236Sken U8 Reserved1; /* 0x01 */ 2151265236Sken U8 MsgLength; /* 0x02 */ 2152265236Sken U8 Function; /* 0x03 */ 2153265236Sken U16 Reserved2; /* 0x04 */ 2154265236Sken U8 Reserved3; /* 0x06 */ 2155265236Sken U8 MsgFlags; /* 0x07 */ 2156265236Sken U8 VP_ID; /* 0x08 */ 2157265236Sken U8 VF_ID; /* 0x09 */ 2158265236Sken U16 Reserved4; /* 0x0A */ 2159265236Sken U16 Reserved5; /* 0x0C */ 2160265236Sken U16 IOCStatus; /* 0x0E */ 2161265236Sken U32 IOCLogInfo; /* 0x10 */ 2162265236Sken} MPI2_PWR_MGMT_CONTROL_REPLY, MPI2_POINTER PTR_MPI2_PWR_MGMT_CONTROL_REPLY, 2163265236Sken Mpi2PwrMgmtControlReply_t, MPI2_POINTER pMpi2PwrMgmtControlReply_t; 2164265236Sken 2165265236Sken 2166299263Sslm/**************************************************************************** 2167299263Sslm* IO Unit Control messages (MPI v2.6 and later only.) 2168299263Sslm****************************************************************************/ 2169299263Sslm 2170299263Sslm/* IO Unit Control Request Message */ 2171299263Sslmtypedef struct _MPI26_IOUNIT_CONTROL_REQUEST 2172299263Sslm{ 2173299263Sslm U8 Operation; /* 0x00 */ 2174299263Sslm U8 Reserved1; /* 0x01 */ 2175299263Sslm U8 ChainOffset; /* 0x02 */ 2176299263Sslm U8 Function; /* 0x03 */ 2177299263Sslm U16 DevHandle; /* 0x04 */ 2178299263Sslm U8 IOCParameter; /* 0x06 */ 2179299263Sslm U8 MsgFlags; /* 0x07 */ 2180299263Sslm U8 VP_ID; /* 0x08 */ 2181299263Sslm U8 VF_ID; /* 0x09 */ 2182299263Sslm U16 Reserved3; /* 0x0A */ 2183299263Sslm U16 Reserved4; /* 0x0C */ 2184299263Sslm U8 PhyNum; /* 0x0E */ 2185299263Sslm U8 PrimFlags; /* 0x0F */ 2186299263Sslm U32 Primitive; /* 0x10 */ 2187299263Sslm U8 LookupMethod; /* 0x14 */ 2188299263Sslm U8 Reserved5; /* 0x15 */ 2189299263Sslm U16 SlotNumber; /* 0x16 */ 2190299263Sslm U64 LookupAddress; /* 0x18 */ 2191299263Sslm U32 IOCParameterValue; /* 0x20 */ 2192299263Sslm U32 Reserved7; /* 0x24 */ 2193299263Sslm U32 Reserved8; /* 0x28 */ 2194299263Sslm} MPI26_IOUNIT_CONTROL_REQUEST, 2195299263Sslm MPI2_POINTER PTR_MPI26_IOUNIT_CONTROL_REQUEST, 2196299263Sslm Mpi26IoUnitControlRequest_t, MPI2_POINTER pMpi26IoUnitControlRequest_t; 2197299263Sslm 2198299263Sslm/* values for the Operation field */ 2199299263Sslm#define MPI26_CTRL_OP_CLEAR_ALL_PERSISTENT (0x02) 2200299263Sslm#define MPI26_CTRL_OP_SAS_PHY_LINK_RESET (0x06) 2201299263Sslm#define MPI26_CTRL_OP_SAS_PHY_HARD_RESET (0x07) 2202299263Sslm#define MPI26_CTRL_OP_PHY_CLEAR_ERROR_LOG (0x08) 2203299263Sslm#define MPI26_CTRL_OP_LINK_CLEAR_ERROR_LOG (0x09) 2204299263Sslm#define MPI26_CTRL_OP_SAS_SEND_PRIMITIVE (0x0A) 2205299263Sslm#define MPI26_CTRL_OP_FORCE_FULL_DISCOVERY (0x0B) 2206299263Sslm#define MPI26_CTRL_OP_REMOVE_DEVICE (0x0D) 2207299263Sslm#define MPI26_CTRL_OP_LOOKUP_MAPPING (0x0E) 2208299263Sslm#define MPI26_CTRL_OP_SET_IOC_PARAMETER (0x0F) 2209299263Sslm#define MPI26_CTRL_OP_ENABLE_FP_DEVICE (0x10) 2210299263Sslm#define MPI26_CTRL_OP_DISABLE_FP_DEVICE (0x11) 2211299263Sslm#define MPI26_CTRL_OP_ENABLE_FP_ALL (0x12) 2212299263Sslm#define MPI26_CTRL_OP_DISABLE_FP_ALL (0x13) 2213299263Sslm#define MPI26_CTRL_OP_DEV_ENABLE_NCQ (0x14) 2214299263Sslm#define MPI26_CTRL_OP_DEV_DISABLE_NCQ (0x15) 2215299263Sslm#define MPI26_CTRL_OP_SHUTDOWN (0x16) 2216299263Sslm#define MPI26_CTRL_OP_DEV_ENABLE_PERSIST_CONNECTION (0x17) 2217299263Sslm#define MPI26_CTRL_OP_DEV_DISABLE_PERSIST_CONNECTION (0x18) 2218299263Sslm#define MPI26_CTRL_OP_DEV_CLOSE_PERSIST_CONNECTION (0x19) 2219319435Sslm#define MPI26_CTRL_OP_ENABLE_NVME_SGL_FORMAT (0x1A) 2220319435Sslm#define MPI26_CTRL_OP_DISABLE_NVME_SGL_FORMAT (0x1B) 2221299263Sslm#define MPI26_CTRL_OP_PRODUCT_SPECIFIC_MIN (0x80) 2222299263Sslm 2223299263Sslm/* values for the PrimFlags field */ 2224299263Sslm#define MPI26_CTRL_PRIMFLAGS_SINGLE (0x08) 2225299263Sslm#define MPI26_CTRL_PRIMFLAGS_TRIPLE (0x02) 2226299263Sslm#define MPI26_CTRL_PRIMFLAGS_REDUNDANT (0x01) 2227299263Sslm 2228299263Sslm/* values for the LookupMethod field */ 2229299263Sslm#define MPI26_CTRL_LOOKUP_METHOD_WWID_ADDRESS (0x01) 2230299263Sslm#define MPI26_CTRL_LOOKUP_METHOD_ENCLOSURE_SLOT (0x02) 2231299263Sslm#define MPI26_CTRL_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03) 2232299263Sslm 2233299263Sslm 2234299263Sslm/* IO Unit Control Reply Message */ 2235299263Sslmtypedef struct _MPI26_IOUNIT_CONTROL_REPLY 2236299263Sslm{ 2237299263Sslm U8 Operation; /* 0x00 */ 2238299263Sslm U8 Reserved1; /* 0x01 */ 2239299263Sslm U8 MsgLength; /* 0x02 */ 2240299263Sslm U8 Function; /* 0x03 */ 2241299263Sslm U16 DevHandle; /* 0x04 */ 2242299263Sslm U8 IOCParameter; /* 0x06 */ 2243299263Sslm U8 MsgFlags; /* 0x07 */ 2244299263Sslm U8 VP_ID; /* 0x08 */ 2245299263Sslm U8 VF_ID; /* 0x09 */ 2246299263Sslm U16 Reserved3; /* 0x0A */ 2247299263Sslm U16 Reserved4; /* 0x0C */ 2248299263Sslm U16 IOCStatus; /* 0x0E */ 2249299263Sslm U32 IOCLogInfo; /* 0x10 */ 2250299263Sslm} MPI26_IOUNIT_CONTROL_REPLY, MPI2_POINTER PTR_MPI26_IOUNIT_CONTROL_REPLY, 2251299263Sslm Mpi26IoUnitControlReply_t, MPI2_POINTER pMpi26IoUnitControlReply_t; 2252299263Sslm 2253299263Sslm 2254265236Sken#endif 2255265236Sken 2256