qp.h revision 329204
1290650Shselasky/*- 2290650Shselasky * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved. 3290650Shselasky * 4290650Shselasky * Redistribution and use in source and binary forms, with or without 5290650Shselasky * modification, are permitted provided that the following conditions 6290650Shselasky * are met: 7290650Shselasky * 1. Redistributions of source code must retain the above copyright 8290650Shselasky * notice, this list of conditions and the following disclaimer. 9290650Shselasky * 2. Redistributions in binary form must reproduce the above copyright 10290650Shselasky * notice, this list of conditions and the following disclaimer in the 11290650Shselasky * documentation and/or other materials provided with the distribution. 12290650Shselasky * 13290650Shselasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14290650Shselasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15290650Shselasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16290650Shselasky * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17290650Shselasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18290650Shselasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19290650Shselasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20290650Shselasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21290650Shselasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22290650Shselasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23290650Shselasky * SUCH DAMAGE. 24290650Shselasky * 25290650Shselasky * $FreeBSD: stable/11/sys/dev/mlx5/qp.h 329204 2018-02-13 14:57:34Z hselasky $ 26290650Shselasky */ 27290650Shselasky 28290650Shselasky#ifndef MLX5_QP_H 29290650Shselasky#define MLX5_QP_H 30290650Shselasky 31290650Shselasky#include <dev/mlx5/driver.h> 32290650Shselasky 33290650Shselasky#define MLX5_INVALID_LKEY 0x100 34290650Shselasky#define MLX5_SIG_WQE_SIZE (MLX5_SEND_WQE_BB * 5) 35290650Shselasky#define MLX5_DIF_SIZE 8 36290650Shselasky#define MLX5_STRIDE_BLOCK_OP 0x400 37290650Shselasky#define MLX5_CPY_GRD_MASK 0xc0 38290650Shselasky#define MLX5_CPY_APP_MASK 0x30 39290650Shselasky#define MLX5_CPY_REF_MASK 0x0f 40290650Shselasky#define MLX5_BSF_INC_REFTAG (1 << 6) 41290650Shselasky#define MLX5_BSF_INL_VALID (1 << 15) 42290650Shselasky#define MLX5_BSF_REFRESH_DIF (1 << 14) 43290650Shselasky#define MLX5_BSF_REPEAT_BLOCK (1 << 7) 44290650Shselasky#define MLX5_BSF_APPTAG_ESCAPE 0x1 45290650Shselasky#define MLX5_BSF_APPREF_ESCAPE 0x2 46329204Shselasky#define MLX5_WQE_DS_UNITS 16 47290650Shselasky 48290650Shselaskyenum mlx5_qp_optpar { 49290650Shselasky MLX5_QP_OPTPAR_ALT_ADDR_PATH = 1 << 0, 50290650Shselasky MLX5_QP_OPTPAR_RRE = 1 << 1, 51290650Shselasky MLX5_QP_OPTPAR_RAE = 1 << 2, 52290650Shselasky MLX5_QP_OPTPAR_RWE = 1 << 3, 53290650Shselasky MLX5_QP_OPTPAR_PKEY_INDEX = 1 << 4, 54290650Shselasky MLX5_QP_OPTPAR_Q_KEY = 1 << 5, 55290650Shselasky MLX5_QP_OPTPAR_RNR_TIMEOUT = 1 << 6, 56290650Shselasky MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH = 1 << 7, 57290650Shselasky MLX5_QP_OPTPAR_SRA_MAX = 1 << 8, 58290650Shselasky MLX5_QP_OPTPAR_RRA_MAX = 1 << 9, 59290650Shselasky MLX5_QP_OPTPAR_PM_STATE = 1 << 10, 60290650Shselasky MLX5_QP_OPTPAR_RETRY_COUNT = 1 << 12, 61290650Shselasky MLX5_QP_OPTPAR_RNR_RETRY = 1 << 13, 62290650Shselasky MLX5_QP_OPTPAR_ACK_TIMEOUT = 1 << 14, 63290650Shselasky MLX5_QP_OPTPAR_PRI_PORT = 1 << 16, 64290650Shselasky MLX5_QP_OPTPAR_SRQN = 1 << 18, 65290650Shselasky MLX5_QP_OPTPAR_CQN_RCV = 1 << 19, 66290650Shselasky MLX5_QP_OPTPAR_DC_HS = 1 << 20, 67290650Shselasky MLX5_QP_OPTPAR_DC_KEY = 1 << 21, 68290650Shselasky}; 69290650Shselasky 70290650Shselaskyenum mlx5_qp_state { 71290650Shselasky MLX5_QP_STATE_RST = 0, 72290650Shselasky MLX5_QP_STATE_INIT = 1, 73290650Shselasky MLX5_QP_STATE_RTR = 2, 74290650Shselasky MLX5_QP_STATE_RTS = 3, 75290650Shselasky MLX5_QP_STATE_SQER = 4, 76290650Shselasky MLX5_QP_STATE_SQD = 5, 77290650Shselasky MLX5_QP_STATE_ERR = 6, 78290650Shselasky MLX5_QP_STATE_SQ_DRAINING = 7, 79290650Shselasky MLX5_QP_STATE_SUSPENDED = 9, 80329204Shselasky MLX5_QP_NUM_STATE, 81329204Shselasky MLX5_QP_STATE, 82329204Shselasky MLX5_QP_STATE_BAD, 83290650Shselasky}; 84290650Shselasky 85290650Shselaskyenum { 86329204Shselasky MLX5_SQ_STATE_NA = MLX5_SQC_STATE_ERR + 1, 87329204Shselasky MLX5_SQ_NUM_STATE = MLX5_SQ_STATE_NA + 1, 88329204Shselasky MLX5_RQ_STATE_NA = MLX5_RQC_STATE_ERR + 1, 89329204Shselasky MLX5_RQ_NUM_STATE = MLX5_RQ_STATE_NA + 1, 90329204Shselasky}; 91329204Shselasky 92329204Shselaskyenum { 93290650Shselasky MLX5_QP_ST_RC = 0x0, 94290650Shselasky MLX5_QP_ST_UC = 0x1, 95290650Shselasky MLX5_QP_ST_UD = 0x2, 96290650Shselasky MLX5_QP_ST_XRC = 0x3, 97290650Shselasky MLX5_QP_ST_MLX = 0x4, 98290650Shselasky MLX5_QP_ST_DCI = 0x5, 99290650Shselasky MLX5_QP_ST_DCT = 0x6, 100290650Shselasky MLX5_QP_ST_QP0 = 0x7, 101290650Shselasky MLX5_QP_ST_QP1 = 0x8, 102290650Shselasky MLX5_QP_ST_RAW_ETHERTYPE = 0x9, 103290650Shselasky MLX5_QP_ST_RAW_IPV6 = 0xa, 104290650Shselasky MLX5_QP_ST_SNIFFER = 0xb, 105290650Shselasky MLX5_QP_ST_SYNC_UMR = 0xe, 106290650Shselasky MLX5_QP_ST_PTP_1588 = 0xd, 107290650Shselasky MLX5_QP_ST_REG_UMR = 0xc, 108306233Shselasky MLX5_QP_ST_SW_CNAK = 0x10, 109290650Shselasky MLX5_QP_ST_MAX 110290650Shselasky}; 111290650Shselasky 112290650Shselaskyenum { 113290650Shselasky MLX5_NON_ZERO_RQ = 0 << 24, 114290650Shselasky MLX5_SRQ_RQ = 1 << 24, 115290650Shselasky MLX5_CRQ_RQ = 2 << 24, 116290650Shselasky MLX5_ZERO_LEN_RQ = 3 << 24 117290650Shselasky}; 118290650Shselasky 119290650Shselaskyenum { 120290650Shselasky /* params1 */ 121290650Shselasky MLX5_QP_BIT_SRE = 1 << 15, 122290650Shselasky MLX5_QP_BIT_SWE = 1 << 14, 123290650Shselasky MLX5_QP_BIT_SAE = 1 << 13, 124290650Shselasky /* params2 */ 125290650Shselasky MLX5_QP_BIT_RRE = 1 << 15, 126290650Shselasky MLX5_QP_BIT_RWE = 1 << 14, 127290650Shselasky MLX5_QP_BIT_RAE = 1 << 13, 128290650Shselasky MLX5_QP_BIT_RIC = 1 << 4, 129306233Shselasky MLX5_QP_BIT_COLL_SYNC_RQ = 1 << 2, 130306233Shselasky MLX5_QP_BIT_COLL_SYNC_SQ = 1 << 1, 131306233Shselasky MLX5_QP_BIT_COLL_MASTER = 1 << 0 132290650Shselasky}; 133290650Shselasky 134290650Shselaskyenum { 135306233Shselasky MLX5_DCT_BIT_RRE = 1 << 19, 136306233Shselasky MLX5_DCT_BIT_RWE = 1 << 18, 137306233Shselasky MLX5_DCT_BIT_RAE = 1 << 17, 138306233Shselasky}; 139306233Shselasky 140306233Shselaskyenum { 141290650Shselasky MLX5_WQE_CTRL_CQ_UPDATE = 2 << 2, 142290650Shselasky MLX5_WQE_CTRL_CQ_UPDATE_AND_EQE = 3 << 2, 143290650Shselasky MLX5_WQE_CTRL_SOLICITED = 1 << 1, 144290650Shselasky}; 145290650Shselasky 146290650Shselaskyenum { 147290650Shselasky MLX5_SEND_WQE_DS = 16, 148290650Shselasky MLX5_SEND_WQE_BB = 64, 149290650Shselasky}; 150290650Shselasky 151290650Shselasky#define MLX5_SEND_WQEBB_NUM_DS (MLX5_SEND_WQE_BB / MLX5_SEND_WQE_DS) 152290650Shselasky 153290650Shselaskyenum { 154290650Shselasky MLX5_SEND_WQE_MAX_WQEBBS = 16, 155290650Shselasky}; 156290650Shselasky 157290650Shselaskyenum { 158290650Shselasky MLX5_WQE_FMR_PERM_LOCAL_READ = 1 << 27, 159290650Shselasky MLX5_WQE_FMR_PERM_LOCAL_WRITE = 1 << 28, 160290650Shselasky MLX5_WQE_FMR_PERM_REMOTE_READ = 1 << 29, 161290650Shselasky MLX5_WQE_FMR_PERM_REMOTE_WRITE = 1 << 30, 162290650Shselasky MLX5_WQE_FMR_PERM_ATOMIC = 1 << 31 163290650Shselasky}; 164290650Shselasky 165290650Shselaskyenum { 166290650Shselasky MLX5_FENCE_MODE_NONE = 0 << 5, 167290650Shselasky MLX5_FENCE_MODE_INITIATOR_SMALL = 1 << 5, 168329204Shselasky MLX5_FENCE_MODE_FENCE = 2 << 5, 169290650Shselasky MLX5_FENCE_MODE_STRONG_ORDERING = 3 << 5, 170290650Shselasky MLX5_FENCE_MODE_SMALL_AND_FENCE = 4 << 5, 171290650Shselasky}; 172290650Shselasky 173290650Shselaskyenum { 174306233Shselasky MLX5_QP_DRAIN_SIGERR = 1 << 26, 175290650Shselasky MLX5_QP_LAT_SENSITIVE = 1 << 28, 176290650Shselasky MLX5_QP_BLOCK_MCAST = 1 << 30, 177290650Shselasky MLX5_QP_ENABLE_SIG = 1 << 31, 178290650Shselasky}; 179290650Shselasky 180290650Shselaskyenum { 181290650Shselasky MLX5_RCV_DBR = 0, 182290650Shselasky MLX5_SND_DBR = 1, 183290650Shselasky}; 184290650Shselasky 185290650Shselaskyenum { 186290650Shselasky MLX5_FLAGS_INLINE = 1<<7, 187290650Shselasky MLX5_FLAGS_CHECK_FREE = 1<<5, 188290650Shselasky}; 189290650Shselasky 190290650Shselaskystruct mlx5_wqe_fmr_seg { 191290650Shselasky __be32 flags; 192290650Shselasky __be32 mem_key; 193290650Shselasky __be64 buf_list; 194290650Shselasky __be64 start_addr; 195290650Shselasky __be64 reg_len; 196290650Shselasky __be32 offset; 197290650Shselasky __be32 page_size; 198290650Shselasky u32 reserved[2]; 199290650Shselasky}; 200290650Shselasky 201290650Shselaskystruct mlx5_wqe_ctrl_seg { 202290650Shselasky __be32 opmod_idx_opcode; 203290650Shselasky __be32 qpn_ds; 204290650Shselasky u8 signature; 205290650Shselasky u8 rsvd[2]; 206290650Shselasky u8 fm_ce_se; 207290650Shselasky __be32 imm; 208290650Shselasky}; 209290650Shselasky 210329204Shselasky#define MLX5_WQE_CTRL_DS_MASK 0x3f 211329204Shselasky 212290650Shselaskyenum { 213306233Shselasky MLX5_MLX_FLAG_MASK_VL15 = 0x40, 214306233Shselasky MLX5_MLX_FLAG_MASK_SLR = 0x20, 215306233Shselasky MLX5_MLX_FLAG_MASK_ICRC = 0x8, 216306233Shselasky MLX5_MLX_FLAG_MASK_FL = 4 217306233Shselasky}; 218306233Shselasky 219306233Shselaskystruct mlx5_mlx_seg { 220306233Shselasky __be32 rsvd0; 221306233Shselasky u8 flags; 222306233Shselasky u8 stat_rate_sl; 223306233Shselasky u8 rsvd1[8]; 224306233Shselasky __be16 dlid; 225306233Shselasky}; 226306233Shselasky 227306233Shselaskyenum { 228290650Shselasky MLX5_ETH_WQE_L3_INNER_CSUM = 1 << 4, 229290650Shselasky MLX5_ETH_WQE_L4_INNER_CSUM = 1 << 5, 230290650Shselasky MLX5_ETH_WQE_L3_CSUM = 1 << 6, 231290650Shselasky MLX5_ETH_WQE_L4_CSUM = 1 << 7, 232290650Shselasky}; 233290650Shselasky 234308678Shselaskyenum { 235329204Shselasky MLX5_ETH_WQE_SWP_INNER_L3_TYPE = 1 << 0, 236329204Shselasky MLX5_ETH_WQE_SWP_INNER_L4_TYPE = 1 << 1, 237329204Shselasky MLX5_ETH_WQE_SWP_OUTER_L3_TYPE = 1 << 4, 238329204Shselasky MLX5_ETH_WQE_SWP_OUTER_L4_TYPE = 1 << 5, 239308678Shselasky}; 240308678Shselasky 241290650Shselaskystruct mlx5_wqe_eth_seg { 242308678Shselasky u8 swp_outer_l4_offset; 243308678Shselasky u8 swp_outer_l3_offset; 244308678Shselasky u8 swp_inner_l4_offset; 245308678Shselasky u8 swp_inner_l3_offset; 246290650Shselasky u8 cs_flags; 247308678Shselasky u8 swp_flags; 248290650Shselasky __be16 mss; 249290650Shselasky __be32 rsvd2; 250290650Shselasky __be16 inline_hdr_sz; 251290650Shselasky u8 inline_hdr_start[2]; 252290650Shselasky}; 253290650Shselasky 254290650Shselaskystruct mlx5_wqe_xrc_seg { 255290650Shselasky __be32 xrc_srqn; 256290650Shselasky u8 rsvd[12]; 257290650Shselasky}; 258290650Shselasky 259290650Shselaskystruct mlx5_wqe_masked_atomic_seg { 260290650Shselasky __be64 swap_add; 261290650Shselasky __be64 compare; 262290650Shselasky __be64 swap_add_mask; 263290650Shselasky __be64 compare_mask; 264290650Shselasky}; 265290650Shselasky 266290650Shselaskystruct mlx5_av { 267290650Shselasky union { 268290650Shselasky struct { 269290650Shselasky __be32 qkey; 270290650Shselasky __be32 reserved; 271290650Shselasky } qkey; 272290650Shselasky __be64 dc_key; 273290650Shselasky } key; 274290650Shselasky __be32 dqp_dct; 275290650Shselasky u8 stat_rate_sl; 276290650Shselasky u8 fl_mlid; 277290650Shselasky union { 278290650Shselasky __be16 rlid; 279290650Shselasky __be16 udp_sport; 280290650Shselasky }; 281290650Shselasky u8 reserved0[4]; 282290650Shselasky u8 rmac[6]; 283290650Shselasky u8 tclass; 284290650Shselasky u8 hop_limit; 285290650Shselasky __be32 grh_gid_fl; 286290650Shselasky u8 rgid[16]; 287290650Shselasky}; 288290650Shselasky 289290650Shselaskystruct mlx5_wqe_datagram_seg { 290290650Shselasky struct mlx5_av av; 291290650Shselasky}; 292290650Shselasky 293290650Shselaskystruct mlx5_wqe_raddr_seg { 294290650Shselasky __be64 raddr; 295290650Shselasky __be32 rkey; 296290650Shselasky u32 reserved; 297290650Shselasky}; 298290650Shselasky 299290650Shselaskystruct mlx5_wqe_atomic_seg { 300290650Shselasky __be64 swap_add; 301290650Shselasky __be64 compare; 302290650Shselasky}; 303290650Shselasky 304290650Shselaskystruct mlx5_wqe_data_seg { 305290650Shselasky __be32 byte_count; 306290650Shselasky __be32 lkey; 307290650Shselasky __be64 addr; 308290650Shselasky}; 309290650Shselasky 310290650Shselaskystruct mlx5_wqe_umr_ctrl_seg { 311290650Shselasky u8 flags; 312290650Shselasky u8 rsvd0[3]; 313290650Shselasky __be16 klm_octowords; 314290650Shselasky __be16 bsf_octowords; 315290650Shselasky __be64 mkey_mask; 316290650Shselasky u8 rsvd1[32]; 317290650Shselasky}; 318290650Shselasky 319290650Shselaskystruct mlx5_seg_set_psv { 320290650Shselasky __be32 psv_num; 321290650Shselasky __be16 syndrome; 322290650Shselasky __be16 status; 323290650Shselasky __be32 transient_sig; 324290650Shselasky __be32 ref_tag; 325290650Shselasky}; 326290650Shselasky 327290650Shselaskystruct mlx5_seg_get_psv { 328290650Shselasky u8 rsvd[19]; 329290650Shselasky u8 num_psv; 330290650Shselasky __be32 l_key; 331290650Shselasky __be64 va; 332290650Shselasky __be32 psv_index[4]; 333290650Shselasky}; 334290650Shselasky 335290650Shselaskystruct mlx5_seg_check_psv { 336290650Shselasky u8 rsvd0[2]; 337290650Shselasky __be16 err_coalescing_op; 338290650Shselasky u8 rsvd1[2]; 339290650Shselasky __be16 xport_err_op; 340290650Shselasky u8 rsvd2[2]; 341290650Shselasky __be16 xport_err_mask; 342290650Shselasky u8 rsvd3[7]; 343290650Shselasky u8 num_psv; 344290650Shselasky __be32 l_key; 345290650Shselasky __be64 va; 346290650Shselasky __be32 psv_index[4]; 347290650Shselasky}; 348290650Shselasky 349290650Shselaskystruct mlx5_rwqe_sig { 350290650Shselasky u8 rsvd0[4]; 351290650Shselasky u8 signature; 352290650Shselasky u8 rsvd1[11]; 353290650Shselasky}; 354290650Shselasky 355290650Shselaskystruct mlx5_wqe_signature_seg { 356290650Shselasky u8 rsvd0[4]; 357290650Shselasky u8 signature; 358290650Shselasky u8 rsvd1[11]; 359290650Shselasky}; 360290650Shselasky 361290650Shselaskystruct mlx5_wqe_inline_seg { 362290650Shselasky __be32 byte_count; 363290650Shselasky}; 364290650Shselasky 365290650Shselaskyenum mlx5_sig_type { 366290650Shselasky MLX5_DIF_CRC = 0x1, 367290650Shselasky MLX5_DIF_IPCS = 0x2, 368290650Shselasky}; 369290650Shselasky 370290650Shselaskystruct mlx5_bsf_inl { 371290650Shselasky __be16 vld_refresh; 372290650Shselasky __be16 dif_apptag; 373290650Shselasky __be32 dif_reftag; 374290650Shselasky u8 sig_type; 375290650Shselasky u8 rp_inv_seed; 376290650Shselasky u8 rsvd[3]; 377290650Shselasky u8 dif_inc_ref_guard_check; 378290650Shselasky __be16 dif_app_bitmask_check; 379290650Shselasky}; 380290650Shselasky 381290650Shselaskystruct mlx5_bsf { 382290650Shselasky struct mlx5_bsf_basic { 383290650Shselasky u8 bsf_size_sbs; 384290650Shselasky u8 check_byte_mask; 385290650Shselasky union { 386290650Shselasky u8 copy_byte_mask; 387290650Shselasky u8 bs_selector; 388290650Shselasky u8 rsvd_wflags; 389290650Shselasky } wire; 390290650Shselasky union { 391290650Shselasky u8 bs_selector; 392290650Shselasky u8 rsvd_mflags; 393290650Shselasky } mem; 394290650Shselasky __be32 raw_data_size; 395290650Shselasky __be32 w_bfs_psv; 396290650Shselasky __be32 m_bfs_psv; 397290650Shselasky } basic; 398290650Shselasky struct mlx5_bsf_ext { 399290650Shselasky __be32 t_init_gen_pro_size; 400290650Shselasky __be32 rsvd_epi_size; 401290650Shselasky __be32 w_tfs_psv; 402290650Shselasky __be32 m_tfs_psv; 403290650Shselasky } ext; 404290650Shselasky struct mlx5_bsf_inl w_inl; 405290650Shselasky struct mlx5_bsf_inl m_inl; 406290650Shselasky}; 407290650Shselasky 408290650Shselaskystruct mlx5_klm { 409290650Shselasky __be32 bcount; 410290650Shselasky __be32 key; 411290650Shselasky __be64 va; 412290650Shselasky}; 413290650Shselasky 414290650Shselaskystruct mlx5_stride_block_entry { 415290650Shselasky __be16 stride; 416290650Shselasky __be16 bcount; 417290650Shselasky __be32 key; 418290650Shselasky __be64 va; 419290650Shselasky}; 420290650Shselasky 421290650Shselaskystruct mlx5_stride_block_ctrl_seg { 422290650Shselasky __be32 bcount_per_cycle; 423290650Shselasky __be32 op; 424290650Shselasky __be32 repeat_count; 425290650Shselasky u16 rsvd; 426290650Shselasky __be16 num_entries; 427290650Shselasky}; 428290650Shselasky 429329204Shselaskyenum mlx5_pagefault_flags { 430329204Shselasky MLX5_PFAULT_REQUESTOR = 1 << 0, 431329204Shselasky MLX5_PFAULT_WRITE = 1 << 1, 432329204Shselasky MLX5_PFAULT_RDMA = 1 << 2, 433329204Shselasky}; 434329204Shselasky 435329204Shselasky/* Contains the details of a pagefault. */ 436329204Shselaskystruct mlx5_pagefault { 437329204Shselasky u32 bytes_committed; 438329204Shselasky u8 event_subtype; 439329204Shselasky enum mlx5_pagefault_flags flags; 440329204Shselasky union { 441329204Shselasky /* Initiator or send message responder pagefault details. */ 442329204Shselasky struct { 443329204Shselasky /* Received packet size, only valid for responders. */ 444329204Shselasky u32 packet_size; 445329204Shselasky /* 446329204Shselasky * WQE index. Refers to either the send queue or 447329204Shselasky * receive queue, according to event_subtype. 448329204Shselasky */ 449329204Shselasky u16 wqe_index; 450329204Shselasky } wqe; 451329204Shselasky /* RDMA responder pagefault details */ 452329204Shselasky struct { 453329204Shselasky u32 r_key; 454329204Shselasky /* 455329204Shselasky * Received packet size, minimal size page fault 456329204Shselasky * resolution required for forward progress. 457329204Shselasky */ 458329204Shselasky u32 packet_size; 459329204Shselasky u32 rdma_op_len; 460329204Shselasky u64 rdma_va; 461329204Shselasky } rdma; 462329204Shselasky }; 463329204Shselasky}; 464329204Shselasky 465290650Shselaskystruct mlx5_core_qp { 466290650Shselasky struct mlx5_core_rsc_common common; /* must be first */ 467290650Shselasky void (*event) (struct mlx5_core_qp *, int); 468290650Shselasky int qpn; 469290650Shselasky struct mlx5_rsc_debug *dbg; 470290650Shselasky int pid; 471290650Shselasky}; 472290650Shselasky 473290650Shselaskystruct mlx5_qp_path { 474290650Shselasky u8 fl_free_ar; 475290650Shselasky u8 rsvd3; 476290650Shselasky __be16 pkey_index; 477290650Shselasky u8 rsvd0; 478290650Shselasky u8 grh_mlid; 479290650Shselasky __be16 rlid; 480290650Shselasky u8 ackto_lt; 481290650Shselasky u8 mgid_index; 482290650Shselasky u8 static_rate; 483290650Shselasky u8 hop_limit; 484290650Shselasky __be32 tclass_flowlabel; 485290650Shselasky union { 486290650Shselasky u8 rgid[16]; 487290650Shselasky u8 rip[16]; 488290650Shselasky }; 489290650Shselasky u8 f_dscp_ecn_prio; 490290650Shselasky u8 ecn_dscp; 491290650Shselasky __be16 udp_sport; 492290650Shselasky u8 dci_cfi_prio_sl; 493290650Shselasky u8 port; 494290650Shselasky u8 rmac[6]; 495290650Shselasky}; 496290650Shselasky 497290650Shselaskystruct mlx5_qp_context { 498290650Shselasky __be32 flags; 499290650Shselasky __be32 flags_pd; 500290650Shselasky u8 mtu_msgmax; 501290650Shselasky u8 rq_size_stride; 502290650Shselasky __be16 sq_crq_size; 503290650Shselasky __be32 qp_counter_set_usr_page; 504290650Shselasky __be32 wire_qpn; 505290650Shselasky __be32 log_pg_sz_remote_qpn; 506290650Shselasky struct mlx5_qp_path pri_path; 507290650Shselasky struct mlx5_qp_path alt_path; 508290650Shselasky __be32 params1; 509290650Shselasky u8 reserved2[4]; 510290650Shselasky __be32 next_send_psn; 511290650Shselasky __be32 cqn_send; 512329204Shselasky __be32 deth_sqpn; 513329204Shselasky u8 reserved3[4]; 514290650Shselasky __be32 last_acked_psn; 515290650Shselasky __be32 ssn; 516290650Shselasky __be32 params2; 517290650Shselasky __be32 rnr_nextrecvpsn; 518290650Shselasky __be32 xrcd; 519290650Shselasky __be32 cqn_recv; 520290650Shselasky __be64 db_rec_addr; 521290650Shselasky __be32 qkey; 522290650Shselasky __be32 rq_type_srqn; 523290650Shselasky __be32 rmsn; 524290650Shselasky __be16 hw_sq_wqe_counter; 525290650Shselasky __be16 sw_sq_wqe_counter; 526290650Shselasky __be16 hw_rcyclic_byte_counter; 527290650Shselasky __be16 hw_rq_counter; 528290650Shselasky __be16 sw_rcyclic_byte_counter; 529290650Shselasky __be16 sw_rq_counter; 530290650Shselasky u8 rsvd0[5]; 531290650Shselasky u8 cgs; 532290650Shselasky u8 cs_req; 533290650Shselasky u8 cs_res; 534290650Shselasky __be64 dc_access_key; 535290650Shselasky u8 rsvd1[24]; 536290650Shselasky}; 537290650Shselasky 538290650Shselaskystruct mlx5_create_qp_mbox_in { 539290650Shselasky struct mlx5_inbox_hdr hdr; 540290650Shselasky __be32 input_qpn; 541290650Shselasky u8 rsvd0[4]; 542290650Shselasky __be32 opt_param_mask; 543290650Shselasky u8 rsvd1[4]; 544290650Shselasky struct mlx5_qp_context ctx; 545290650Shselasky u8 rsvd3[16]; 546290650Shselasky __be64 pas[0]; 547290650Shselasky}; 548290650Shselasky 549306233Shselaskystruct mlx5_dct_context { 550306233Shselasky u8 state; 551306233Shselasky u8 rsvd0[7]; 552306233Shselasky __be32 cqn; 553306233Shselasky __be32 flags; 554306233Shselasky u8 rsvd1; 555306233Shselasky u8 cs_res; 556306233Shselasky u8 min_rnr; 557306233Shselasky u8 rsvd2; 558306233Shselasky __be32 srqn; 559306233Shselasky __be32 pdn; 560306233Shselasky __be32 tclass_flow_label; 561306233Shselasky __be64 access_key; 562306233Shselasky u8 mtu; 563306233Shselasky u8 port; 564306233Shselasky __be16 pkey_index; 565306233Shselasky u8 rsvd4; 566306233Shselasky u8 mgid_index; 567306233Shselasky u8 rsvd5; 568306233Shselasky u8 hop_limit; 569306233Shselasky __be32 access_violations; 570306233Shselasky u8 rsvd[12]; 571306233Shselasky}; 572306233Shselasky 573306233Shselaskystruct mlx5_create_dct_mbox_in { 574306233Shselasky struct mlx5_inbox_hdr hdr; 575306233Shselasky u8 rsvd0[8]; 576306233Shselasky struct mlx5_dct_context context; 577306233Shselasky u8 rsvd[48]; 578306233Shselasky}; 579306233Shselasky 580306233Shselaskystruct mlx5_create_dct_mbox_out { 581306233Shselasky struct mlx5_outbox_hdr hdr; 582306233Shselasky __be32 dctn; 583306233Shselasky u8 rsvd0[4]; 584306233Shselasky}; 585306233Shselasky 586306233Shselaskystruct mlx5_destroy_dct_mbox_in { 587306233Shselasky struct mlx5_inbox_hdr hdr; 588306233Shselasky __be32 dctn; 589306233Shselasky u8 rsvd0[4]; 590306233Shselasky}; 591306233Shselasky 592306233Shselaskystruct mlx5_destroy_dct_mbox_out { 593306233Shselasky struct mlx5_outbox_hdr hdr; 594306233Shselasky u8 rsvd0[8]; 595306233Shselasky}; 596306233Shselasky 597306233Shselaskystruct mlx5_drain_dct_mbox_in { 598306233Shselasky struct mlx5_inbox_hdr hdr; 599306233Shselasky __be32 dctn; 600306233Shselasky u8 rsvd0[4]; 601306233Shselasky}; 602306233Shselasky 603306233Shselaskystruct mlx5_drain_dct_mbox_out { 604306233Shselasky struct mlx5_outbox_hdr hdr; 605306233Shselasky u8 rsvd0[8]; 606306233Shselasky}; 607306233Shselasky 608290650Shselaskystruct mlx5_create_qp_mbox_out { 609290650Shselasky struct mlx5_outbox_hdr hdr; 610290650Shselasky __be32 qpn; 611290650Shselasky u8 rsvd0[4]; 612290650Shselasky}; 613290650Shselasky 614290650Shselaskystruct mlx5_destroy_qp_mbox_in { 615290650Shselasky struct mlx5_inbox_hdr hdr; 616290650Shselasky __be32 qpn; 617290650Shselasky u8 rsvd0[4]; 618290650Shselasky}; 619290650Shselasky 620290650Shselaskystruct mlx5_destroy_qp_mbox_out { 621290650Shselasky struct mlx5_outbox_hdr hdr; 622290650Shselasky u8 rsvd0[8]; 623290650Shselasky}; 624290650Shselasky 625290650Shselaskystruct mlx5_modify_qp_mbox_in { 626290650Shselasky struct mlx5_inbox_hdr hdr; 627290650Shselasky __be32 qpn; 628290650Shselasky u8 rsvd1[4]; 629290650Shselasky __be32 optparam; 630290650Shselasky u8 rsvd0[4]; 631290650Shselasky struct mlx5_qp_context ctx; 632306233Shselasky u8 rsvd2[16]; 633290650Shselasky}; 634290650Shselasky 635290650Shselaskystruct mlx5_modify_qp_mbox_out { 636290650Shselasky struct mlx5_outbox_hdr hdr; 637290650Shselasky u8 rsvd0[8]; 638290650Shselasky}; 639290650Shselasky 640290650Shselaskystruct mlx5_query_qp_mbox_in { 641290650Shselasky struct mlx5_inbox_hdr hdr; 642290650Shselasky __be32 qpn; 643290650Shselasky u8 rsvd[4]; 644290650Shselasky}; 645290650Shselasky 646290650Shselaskystruct mlx5_query_qp_mbox_out { 647290650Shselasky struct mlx5_outbox_hdr hdr; 648290650Shselasky u8 rsvd1[8]; 649290650Shselasky __be32 optparam; 650290650Shselasky u8 rsvd0[4]; 651290650Shselasky struct mlx5_qp_context ctx; 652290650Shselasky u8 rsvd2[16]; 653290650Shselasky __be64 pas[0]; 654290650Shselasky}; 655290650Shselasky 656306233Shselaskystruct mlx5_query_dct_mbox_in { 657306233Shselasky struct mlx5_inbox_hdr hdr; 658306233Shselasky __be32 dctn; 659306233Shselasky u8 rsvd[4]; 660306233Shselasky}; 661306233Shselasky 662306233Shselaskystruct mlx5_query_dct_mbox_out { 663306233Shselasky struct mlx5_outbox_hdr hdr; 664306233Shselasky u8 rsvd0[8]; 665306233Shselasky struct mlx5_dct_context ctx; 666306233Shselasky u8 rsvd1[48]; 667306233Shselasky}; 668306233Shselasky 669306233Shselaskystruct mlx5_arm_dct_mbox_in { 670306233Shselasky struct mlx5_inbox_hdr hdr; 671306233Shselasky __be32 dctn; 672306233Shselasky u8 rsvd[4]; 673306233Shselasky}; 674306233Shselasky 675306233Shselaskystruct mlx5_arm_dct_mbox_out { 676306233Shselasky struct mlx5_outbox_hdr hdr; 677306233Shselasky u8 rsvd0[8]; 678306233Shselasky}; 679306233Shselasky 680290650Shselaskystruct mlx5_conf_sqp_mbox_in { 681290650Shselasky struct mlx5_inbox_hdr hdr; 682290650Shselasky __be32 qpn; 683290650Shselasky u8 rsvd[3]; 684290650Shselasky u8 type; 685290650Shselasky}; 686290650Shselasky 687290650Shselaskystruct mlx5_conf_sqp_mbox_out { 688290650Shselasky struct mlx5_outbox_hdr hdr; 689290650Shselasky u8 rsvd[8]; 690290650Shselasky}; 691290650Shselasky 692290650Shselaskystatic inline struct mlx5_core_qp *__mlx5_qp_lookup(struct mlx5_core_dev *dev, u32 qpn) 693290650Shselasky{ 694290650Shselasky return radix_tree_lookup(&dev->priv.qp_table.tree, qpn); 695290650Shselasky} 696290650Shselasky 697290650Shselaskystatic inline struct mlx5_core_mr *__mlx5_mr_lookup(struct mlx5_core_dev *dev, u32 key) 698290650Shselasky{ 699290650Shselasky return radix_tree_lookup(&dev->priv.mr_table.tree, key); 700290650Shselasky} 701290650Shselasky 702290650Shselaskyint mlx5_core_create_qp(struct mlx5_core_dev *dev, 703290650Shselasky struct mlx5_core_qp *qp, 704290650Shselasky struct mlx5_create_qp_mbox_in *in, 705290650Shselasky int inlen); 706306233Shselaskyint mlx5_core_qp_modify(struct mlx5_core_dev *dev, u16 operation, 707290650Shselasky struct mlx5_modify_qp_mbox_in *in, int sqd_event, 708290650Shselasky struct mlx5_core_qp *qp); 709290650Shselaskyint mlx5_core_destroy_qp(struct mlx5_core_dev *dev, 710290650Shselasky struct mlx5_core_qp *qp); 711290650Shselaskyint mlx5_core_qp_query(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp, 712290650Shselasky struct mlx5_query_qp_mbox_out *out, int outlen); 713306233Shselaskyint mlx5_core_dct_query(struct mlx5_core_dev *dev, struct mlx5_core_dct *dct, 714306233Shselasky struct mlx5_query_dct_mbox_out *out); 715306233Shselaskyint mlx5_core_arm_dct(struct mlx5_core_dev *dev, struct mlx5_core_dct *dct); 716290650Shselasky 717290650Shselaskyint mlx5_core_xrcd_alloc(struct mlx5_core_dev *dev, u32 *xrcdn); 718290650Shselaskyint mlx5_core_xrcd_dealloc(struct mlx5_core_dev *dev, u32 xrcdn); 719306233Shselaskyint mlx5_core_create_dct(struct mlx5_core_dev *dev, 720306233Shselasky struct mlx5_core_dct *dct, 721306233Shselasky struct mlx5_create_dct_mbox_in *in); 722306233Shselaskyint mlx5_core_destroy_dct(struct mlx5_core_dev *dev, 723306233Shselasky struct mlx5_core_dct *dct); 724306233Shselaskyint mlx5_core_create_rq_tracked(struct mlx5_core_dev *dev, u32 *in, int inlen, 725306233Shselasky struct mlx5_core_qp *rq); 726306233Shselaskyvoid mlx5_core_destroy_rq_tracked(struct mlx5_core_dev *dev, 727306233Shselasky struct mlx5_core_qp *rq); 728306233Shselaskyint mlx5_core_create_sq_tracked(struct mlx5_core_dev *dev, u32 *in, int inlen, 729306233Shselasky struct mlx5_core_qp *sq); 730306233Shselaskyvoid mlx5_core_destroy_sq_tracked(struct mlx5_core_dev *dev, 731306233Shselasky struct mlx5_core_qp *sq); 732290650Shselaskyvoid mlx5_init_qp_table(struct mlx5_core_dev *dev); 733290650Shselaskyvoid mlx5_cleanup_qp_table(struct mlx5_core_dev *dev); 734290650Shselaskyint mlx5_debug_qp_add(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp); 735290650Shselaskyvoid mlx5_debug_qp_remove(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp); 736290650Shselasky 737290650Shselaskystatic inline const char *mlx5_qp_type_str(int type) 738290650Shselasky{ 739290650Shselasky switch (type) { 740290650Shselasky case MLX5_QP_ST_RC: return "RC"; 741290650Shselasky case MLX5_QP_ST_UC: return "C"; 742290650Shselasky case MLX5_QP_ST_UD: return "UD"; 743290650Shselasky case MLX5_QP_ST_XRC: return "XRC"; 744290650Shselasky case MLX5_QP_ST_MLX: return "MLX"; 745306233Shselasky case MLX5_QP_ST_DCI: return "DCI"; 746290650Shselasky case MLX5_QP_ST_QP0: return "QP0"; 747290650Shselasky case MLX5_QP_ST_QP1: return "QP1"; 748290650Shselasky case MLX5_QP_ST_RAW_ETHERTYPE: return "RAW_ETHERTYPE"; 749290650Shselasky case MLX5_QP_ST_RAW_IPV6: return "RAW_IPV6"; 750290650Shselasky case MLX5_QP_ST_SNIFFER: return "SNIFFER"; 751290650Shselasky case MLX5_QP_ST_SYNC_UMR: return "SYNC_UMR"; 752290650Shselasky case MLX5_QP_ST_PTP_1588: return "PTP_1588"; 753290650Shselasky case MLX5_QP_ST_REG_UMR: return "REG_UMR"; 754306233Shselasky case MLX5_QP_ST_SW_CNAK: return "DC_CNAK"; 755290650Shselasky default: return "Invalid transport type"; 756290650Shselasky } 757290650Shselasky} 758290650Shselasky 759290650Shselaskystatic inline const char *mlx5_qp_state_str(int state) 760290650Shselasky{ 761290650Shselasky switch (state) { 762290650Shselasky case MLX5_QP_STATE_RST: 763290650Shselasky return "RST"; 764290650Shselasky case MLX5_QP_STATE_INIT: 765290650Shselasky return "INIT"; 766290650Shselasky case MLX5_QP_STATE_RTR: 767290650Shselasky return "RTR"; 768290650Shselasky case MLX5_QP_STATE_RTS: 769290650Shselasky return "RTS"; 770290650Shselasky case MLX5_QP_STATE_SQER: 771290650Shselasky return "SQER"; 772290650Shselasky case MLX5_QP_STATE_SQD: 773290650Shselasky return "SQD"; 774290650Shselasky case MLX5_QP_STATE_ERR: 775290650Shselasky return "ERR"; 776290650Shselasky case MLX5_QP_STATE_SQ_DRAINING: 777290650Shselasky return "SQ_DRAINING"; 778290650Shselasky case MLX5_QP_STATE_SUSPENDED: 779290650Shselasky return "SUSPENDED"; 780290650Shselasky default: return "Invalid QP state"; 781290650Shselasky } 782290650Shselasky} 783290650Shselasky 784290650Shselasky#endif /* MLX5_QP_H */ 785