mlx5_ifc.h revision 308678
1290650Shselasky/*- 2290650Shselasky * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved. 3290650Shselasky * 4290650Shselasky * Redistribution and use in source and binary forms, with or without 5290650Shselasky * modification, are permitted provided that the following conditions 6290650Shselasky * are met: 7290650Shselasky * 1. Redistributions of source code must retain the above copyright 8290650Shselasky * notice, this list of conditions and the following disclaimer. 9290650Shselasky * 2. Redistributions in binary form must reproduce the above copyright 10290650Shselasky * notice, this list of conditions and the following disclaimer in the 11290650Shselasky * documentation and/or other materials provided with the distribution. 12290650Shselasky * 13290650Shselasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14290650Shselasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15290650Shselasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16290650Shselasky * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17290650Shselasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18290650Shselasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19290650Shselasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20290650Shselasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21290650Shselasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22290650Shselasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23290650Shselasky * SUCH DAMAGE. 24290650Shselasky * 25290650Shselasky * $FreeBSD: stable/11/sys/dev/mlx5/mlx5_ifc.h 308678 2016-11-15 08:53:25Z hselasky $ 26290650Shselasky 27290650Shselasky Autogenerated file. 28290650Shselasky Date: 2015-04-13 14:59 29290650Shselasky Source Document Name: Mellanox <Doc Name> 30290650Shselasky Source Document Version: 0.28 31290650Shselasky Generated by adb_to_c.py (EAT.ME Version: 1.0.70) 32290650Shselasky*/ 33290650Shselasky#ifndef MLX5_IFC_H 34290650Shselasky#define MLX5_IFC_H 35290650Shselasky 36290650Shselaskyenum { 37290650Shselasky MLX5_EVENT_TYPE_COMP = 0x0, 38290650Shselasky MLX5_EVENT_TYPE_PATH_MIG = 0x1, 39290650Shselasky MLX5_EVENT_TYPE_COMM_EST = 0x2, 40290650Shselasky MLX5_EVENT_TYPE_SQ_DRAINED = 0x3, 41290650Shselasky MLX5_EVENT_TYPE_SRQ_LAST_WQE = 0x13, 42290650Shselasky MLX5_EVENT_TYPE_SRQ_RQ_LIMIT = 0x14, 43290650Shselasky MLX5_EVENT_TYPE_DCT_DRAINED = 0x1c, 44290650Shselasky MLX5_EVENT_TYPE_DCT_KEY_VIOLATION = 0x1d, 45290650Shselasky MLX5_EVENT_TYPE_CQ_ERROR = 0x4, 46290650Shselasky MLX5_EVENT_TYPE_WQ_CATAS_ERROR = 0x5, 47290650Shselasky MLX5_EVENT_TYPE_PATH_MIG_FAILED = 0x7, 48290650Shselasky MLX5_EVENT_TYPE_PAGE_FAULT = 0xc, 49290650Shselasky MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR = 0x10, 50290650Shselasky MLX5_EVENT_TYPE_WQ_ACCESS_ERROR = 0x11, 51290650Shselasky MLX5_EVENT_TYPE_SRQ_CATAS_ERROR = 0x12, 52290650Shselasky MLX5_EVENT_TYPE_INTERNAL_ERROR = 0x8, 53290650Shselasky MLX5_EVENT_TYPE_PORT_CHANGE = 0x9, 54290650Shselasky MLX5_EVENT_TYPE_GPIO_EVENT = 0x15, 55290650Shselasky MLX5_EVENT_TYPE_CODING_PORT_MODULE_EVENT = 0x16, 56306233Shselasky MLX5_EVENT_TYPE_CODING_TEMP_WARNING_EVENT = 0x17, 57290650Shselasky MLX5_EVENT_TYPE_REMOTE_CONFIG = 0x19, 58306233Shselasky MLX5_EVENT_TYPE_CODING_DCBX_CHANGE_EVENT = 0x1e, 59290650Shselasky MLX5_EVENT_TYPE_DB_BF_CONGESTION = 0x1a, 60290650Shselasky MLX5_EVENT_TYPE_STALL_EVENT = 0x1b, 61290650Shselasky MLX5_EVENT_TYPE_DROPPED_PACKET_LOGGED_EVENT = 0x1f, 62290650Shselasky MLX5_EVENT_TYPE_CMD = 0xa, 63290650Shselasky MLX5_EVENT_TYPE_PAGE_REQUEST = 0xb, 64290650Shselasky MLX5_EVENT_TYPE_NIC_VPORT_CHANGE = 0xd 65290650Shselasky}; 66290650Shselasky 67290650Shselaskyenum { 68306233Shselasky MLX5_MODIFY_TIR_BITMASK_LRO = 0x0, 69306233Shselasky MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1, 70306233Shselasky MLX5_MODIFY_TIR_BITMASK_HASH = 0x2, 71306233Shselasky MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3, 72306233Shselasky MLX5_MODIFY_TIR_BITMASK_SELF_LB_EN = 0x4 73290650Shselasky}; 74290650Shselasky 75290650Shselaskyenum { 76290650Shselasky MLX5_MODIFY_RQT_BITMASK_RQN_LIST = 0x1, 77290650Shselasky}; 78290650Shselasky 79290650Shselaskyenum { 80290650Shselasky MLX5_CMD_OP_QUERY_HCA_CAP = 0x100, 81290650Shselasky MLX5_CMD_OP_QUERY_ADAPTER = 0x101, 82290650Shselasky MLX5_CMD_OP_INIT_HCA = 0x102, 83290650Shselasky MLX5_CMD_OP_TEARDOWN_HCA = 0x103, 84290650Shselasky MLX5_CMD_OP_ENABLE_HCA = 0x104, 85290650Shselasky MLX5_CMD_OP_DISABLE_HCA = 0x105, 86290650Shselasky MLX5_CMD_OP_QUERY_PAGES = 0x107, 87290650Shselasky MLX5_CMD_OP_MANAGE_PAGES = 0x108, 88290650Shselasky MLX5_CMD_OP_SET_HCA_CAP = 0x109, 89290650Shselasky MLX5_CMD_OP_QUERY_ISSI = 0x10a, 90290650Shselasky MLX5_CMD_OP_SET_ISSI = 0x10b, 91290650Shselasky MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d, 92290650Shselasky MLX5_CMD_OP_CREATE_MKEY = 0x200, 93290650Shselasky MLX5_CMD_OP_QUERY_MKEY = 0x201, 94290650Shselasky MLX5_CMD_OP_DESTROY_MKEY = 0x202, 95290650Shselasky MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203, 96290650Shselasky MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204, 97290650Shselasky MLX5_CMD_OP_CREATE_EQ = 0x301, 98290650Shselasky MLX5_CMD_OP_DESTROY_EQ = 0x302, 99290650Shselasky MLX5_CMD_OP_QUERY_EQ = 0x303, 100290650Shselasky MLX5_CMD_OP_GEN_EQE = 0x304, 101290650Shselasky MLX5_CMD_OP_CREATE_CQ = 0x400, 102290650Shselasky MLX5_CMD_OP_DESTROY_CQ = 0x401, 103290650Shselasky MLX5_CMD_OP_QUERY_CQ = 0x402, 104290650Shselasky MLX5_CMD_OP_MODIFY_CQ = 0x403, 105290650Shselasky MLX5_CMD_OP_CREATE_QP = 0x500, 106290650Shselasky MLX5_CMD_OP_DESTROY_QP = 0x501, 107290650Shselasky MLX5_CMD_OP_RST2INIT_QP = 0x502, 108290650Shselasky MLX5_CMD_OP_INIT2RTR_QP = 0x503, 109290650Shselasky MLX5_CMD_OP_RTR2RTS_QP = 0x504, 110290650Shselasky MLX5_CMD_OP_RTS2RTS_QP = 0x505, 111290650Shselasky MLX5_CMD_OP_SQERR2RTS_QP = 0x506, 112290650Shselasky MLX5_CMD_OP_2ERR_QP = 0x507, 113290650Shselasky MLX5_CMD_OP_2RST_QP = 0x50a, 114290650Shselasky MLX5_CMD_OP_QUERY_QP = 0x50b, 115290650Shselasky MLX5_CMD_OP_SQD_RTS_QP = 0x50c, 116290650Shselasky MLX5_CMD_OP_INIT2INIT_QP = 0x50e, 117290650Shselasky MLX5_CMD_OP_CREATE_PSV = 0x600, 118290650Shselasky MLX5_CMD_OP_DESTROY_PSV = 0x601, 119290650Shselasky MLX5_CMD_OP_CREATE_SRQ = 0x700, 120290650Shselasky MLX5_CMD_OP_DESTROY_SRQ = 0x701, 121290650Shselasky MLX5_CMD_OP_QUERY_SRQ = 0x702, 122290650Shselasky MLX5_CMD_OP_ARM_RQ = 0x703, 123290650Shselasky MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705, 124290650Shselasky MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706, 125290650Shselasky MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707, 126290650Shselasky MLX5_CMD_OP_ARM_XRC_SRQ = 0x708, 127290650Shselasky MLX5_CMD_OP_CREATE_DCT = 0x710, 128290650Shselasky MLX5_CMD_OP_DESTROY_DCT = 0x711, 129290650Shselasky MLX5_CMD_OP_DRAIN_DCT = 0x712, 130290650Shselasky MLX5_CMD_OP_QUERY_DCT = 0x713, 131290650Shselasky MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714, 132290650Shselasky MLX5_CMD_OP_SET_DC_CNAK_TRACE = 0x715, 133290650Shselasky MLX5_CMD_OP_QUERY_DC_CNAK_TRACE = 0x716, 134290650Shselasky MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750, 135290650Shselasky MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751, 136290650Shselasky MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752, 137290650Shselasky MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753, 138290650Shselasky MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754, 139290650Shselasky MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755, 140290650Shselasky MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760, 141290650Shselasky MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761, 142290650Shselasky MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762, 143290650Shselasky MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763, 144290650Shselasky MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764, 145290650Shselasky MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765, 146290650Shselasky MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770, 147290650Shselasky MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771, 148290650Shselasky MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772, 149290650Shselasky MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773, 150306233Shselasky MLX5_CMD_OP_SET_RATE_LIMIT = 0x780, 151306233Shselasky MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781, 152308678Shselasky MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782, 153308678Shselasky MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783, 154308678Shselasky MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784, 155308678Shselasky MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785, 156308678Shselasky MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786, 157308678Shselasky MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787, 158290650Shselasky MLX5_CMD_OP_ALLOC_PD = 0x800, 159290650Shselasky MLX5_CMD_OP_DEALLOC_PD = 0x801, 160290650Shselasky MLX5_CMD_OP_ALLOC_UAR = 0x802, 161290650Shselasky MLX5_CMD_OP_DEALLOC_UAR = 0x803, 162290650Shselasky MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804, 163290650Shselasky MLX5_CMD_OP_ACCESS_REG = 0x805, 164290650Shselasky MLX5_CMD_OP_ATTACH_TO_MCG = 0x806, 165290650Shselasky MLX5_CMD_OP_DETACH_FROM_MCG = 0x807, 166290650Shselasky MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a, 167290650Shselasky MLX5_CMD_OP_MAD_IFC = 0x50d, 168290650Shselasky MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b, 169290650Shselasky MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c, 170290650Shselasky MLX5_CMD_OP_NOP = 0x80d, 171290650Shselasky MLX5_CMD_OP_ALLOC_XRCD = 0x80e, 172290650Shselasky MLX5_CMD_OP_DEALLOC_XRCD = 0x80f, 173290650Shselasky MLX5_CMD_OP_SET_BURST_SIZE = 0x812, 174290650Shselasky MLX5_CMD_OP_QUERY_BURST_SIZE = 0x813, 175290650Shselasky MLX5_CMD_OP_ACTIVATE_TRACER = 0x814, 176290650Shselasky MLX5_CMD_OP_DEACTIVATE_TRACER = 0x815, 177290650Shselasky MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816, 178290650Shselasky MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817, 179306233Shselasky MLX5_CMD_OP_SET_DIAGNOSTICS = 0x820, 180306233Shselasky MLX5_CMD_OP_QUERY_DIAGNOSTICS = 0x821, 181290650Shselasky MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822, 182290650Shselasky MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823, 183290650Shselasky MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824, 184290650Shselasky MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825, 185290650Shselasky MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826, 186290650Shselasky MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827, 187290650Shselasky MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828, 188290650Shselasky MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829, 189290650Shselasky MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a, 190290650Shselasky MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b, 191290650Shselasky MLX5_CMD_OP_SET_WOL_ROL = 0x830, 192290650Shselasky MLX5_CMD_OP_QUERY_WOL_ROL = 0x831, 193290650Shselasky MLX5_CMD_OP_CREATE_TIR = 0x900, 194290650Shselasky MLX5_CMD_OP_MODIFY_TIR = 0x901, 195290650Shselasky MLX5_CMD_OP_DESTROY_TIR = 0x902, 196290650Shselasky MLX5_CMD_OP_QUERY_TIR = 0x903, 197290650Shselasky MLX5_CMD_OP_CREATE_SQ = 0x904, 198290650Shselasky MLX5_CMD_OP_MODIFY_SQ = 0x905, 199290650Shselasky MLX5_CMD_OP_DESTROY_SQ = 0x906, 200290650Shselasky MLX5_CMD_OP_QUERY_SQ = 0x907, 201290650Shselasky MLX5_CMD_OP_CREATE_RQ = 0x908, 202290650Shselasky MLX5_CMD_OP_MODIFY_RQ = 0x909, 203290650Shselasky MLX5_CMD_OP_DESTROY_RQ = 0x90a, 204290650Shselasky MLX5_CMD_OP_QUERY_RQ = 0x90b, 205290650Shselasky MLX5_CMD_OP_CREATE_RMP = 0x90c, 206290650Shselasky MLX5_CMD_OP_MODIFY_RMP = 0x90d, 207290650Shselasky MLX5_CMD_OP_DESTROY_RMP = 0x90e, 208290650Shselasky MLX5_CMD_OP_QUERY_RMP = 0x90f, 209290650Shselasky MLX5_CMD_OP_CREATE_TIS = 0x912, 210290650Shselasky MLX5_CMD_OP_MODIFY_TIS = 0x913, 211290650Shselasky MLX5_CMD_OP_DESTROY_TIS = 0x914, 212290650Shselasky MLX5_CMD_OP_QUERY_TIS = 0x915, 213290650Shselasky MLX5_CMD_OP_CREATE_RQT = 0x916, 214290650Shselasky MLX5_CMD_OP_MODIFY_RQT = 0x917, 215290650Shselasky MLX5_CMD_OP_DESTROY_RQT = 0x918, 216290650Shselasky MLX5_CMD_OP_QUERY_RQT = 0x919, 217290650Shselasky MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f, 218290650Shselasky MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930, 219290650Shselasky MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931, 220290650Shselasky MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932, 221290650Shselasky MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933, 222290650Shselasky MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934, 223290650Shselasky MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935, 224290650Shselasky MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936, 225290650Shselasky MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937, 226290650Shselasky MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938, 227290650Shselasky MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939, 228290650Shselasky MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a, 229290650Shselasky MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b 230290650Shselasky}; 231290650Shselasky 232290650Shselaskyenum { 233290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_OPCODE_QUERY_FW_INFO = 0x8007, 234290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_QUERY_CAPABILITY = 0x8400, 235290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_ACCESS_REGISTER = 0x9001, 236290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_QUERY_VIRTUAL_MAC = 0x9003, 237290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_SET_VIRTUAL_MAC = 0x9004, 238290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_QUERY_WOL_ROL = 0x9005, 239290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_SET_WOL_ROL = 0x9006, 240290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_OCBB_INIT = 0x9007, 241290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_OCBB_QUERY_HEADER_STATUS = 0x9008, 242290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_OCBB_QUERY_ETOC_STATUS = 0x9009, 243290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_OCBB_SET_EVENT = 0x900a, 244290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_OPCODE_INIT_OCSD = 0xf004 245290650Shselasky}; 246290650Shselasky 247290650Shselaskystruct mlx5_ifc_flow_table_fields_supported_bits { 248290650Shselasky u8 outer_dmac[0x1]; 249290650Shselasky u8 outer_smac[0x1]; 250290650Shselasky u8 outer_ether_type[0x1]; 251290650Shselasky u8 reserved_0[0x1]; 252290650Shselasky u8 outer_first_prio[0x1]; 253290650Shselasky u8 outer_first_cfi[0x1]; 254290650Shselasky u8 outer_first_vid[0x1]; 255290650Shselasky u8 reserved_1[0x1]; 256290650Shselasky u8 outer_second_prio[0x1]; 257290650Shselasky u8 outer_second_cfi[0x1]; 258290650Shselasky u8 outer_second_vid[0x1]; 259290650Shselasky u8 outer_ipv6_flow_label[0x1]; 260290650Shselasky u8 outer_sip[0x1]; 261290650Shselasky u8 outer_dip[0x1]; 262290650Shselasky u8 outer_frag[0x1]; 263290650Shselasky u8 outer_ip_protocol[0x1]; 264290650Shselasky u8 outer_ip_ecn[0x1]; 265290650Shselasky u8 outer_ip_dscp[0x1]; 266290650Shselasky u8 outer_udp_sport[0x1]; 267290650Shselasky u8 outer_udp_dport[0x1]; 268290650Shselasky u8 outer_tcp_sport[0x1]; 269290650Shselasky u8 outer_tcp_dport[0x1]; 270290650Shselasky u8 outer_tcp_flags[0x1]; 271290650Shselasky u8 outer_gre_protocol[0x1]; 272290650Shselasky u8 outer_gre_key[0x1]; 273290650Shselasky u8 outer_vxlan_vni[0x1]; 274290650Shselasky u8 reserved_2[0x5]; 275290650Shselasky u8 source_eswitch_port[0x1]; 276290650Shselasky 277290650Shselasky u8 inner_dmac[0x1]; 278290650Shselasky u8 inner_smac[0x1]; 279290650Shselasky u8 inner_ether_type[0x1]; 280290650Shselasky u8 reserved_3[0x1]; 281290650Shselasky u8 inner_first_prio[0x1]; 282290650Shselasky u8 inner_first_cfi[0x1]; 283290650Shselasky u8 inner_first_vid[0x1]; 284290650Shselasky u8 reserved_4[0x1]; 285290650Shselasky u8 inner_second_prio[0x1]; 286290650Shselasky u8 inner_second_cfi[0x1]; 287290650Shselasky u8 inner_second_vid[0x1]; 288290650Shselasky u8 inner_ipv6_flow_label[0x1]; 289290650Shselasky u8 inner_sip[0x1]; 290290650Shselasky u8 inner_dip[0x1]; 291290650Shselasky u8 inner_frag[0x1]; 292290650Shselasky u8 inner_ip_protocol[0x1]; 293290650Shselasky u8 inner_ip_ecn[0x1]; 294290650Shselasky u8 inner_ip_dscp[0x1]; 295290650Shselasky u8 inner_udp_sport[0x1]; 296290650Shselasky u8 inner_udp_dport[0x1]; 297290650Shselasky u8 inner_tcp_sport[0x1]; 298290650Shselasky u8 inner_tcp_dport[0x1]; 299290650Shselasky u8 inner_tcp_flags[0x1]; 300290650Shselasky u8 reserved_5[0x9]; 301290650Shselasky 302290650Shselasky u8 reserved_6[0x1f]; 303290650Shselasky u8 source_sqn[0x1]; 304290650Shselasky 305290650Shselasky u8 reserved_7[0x20]; 306290650Shselasky}; 307290650Shselasky 308308678Shselaskystruct mlx5_ifc_eth_discard_cntrs_grp_bits { 309308678Shselasky u8 ingress_general_high[0x20]; 310308678Shselasky 311308678Shselasky u8 ingress_general_low[0x20]; 312308678Shselasky 313308678Shselasky u8 ingress_policy_engine_high[0x20]; 314308678Shselasky 315308678Shselasky u8 ingress_policy_engine_low[0x20]; 316308678Shselasky 317308678Shselasky u8 ingress_vlan_membership_high[0x20]; 318308678Shselasky 319308678Shselasky u8 ingress_vlan_membership_low[0x20]; 320308678Shselasky 321308678Shselasky u8 ingress_tag_frame_type_high[0x20]; 322308678Shselasky 323308678Shselasky u8 ingress_tag_frame_type_low[0x20]; 324308678Shselasky 325308678Shselasky u8 egress_vlan_membership_high[0x20]; 326308678Shselasky 327308678Shselasky u8 egress_vlan_membership_low[0x20]; 328308678Shselasky 329308678Shselasky u8 loopback_filter_high[0x20]; 330308678Shselasky 331308678Shselasky u8 loopback_filter_low[0x20]; 332308678Shselasky 333308678Shselasky u8 egress_general_high[0x20]; 334308678Shselasky 335308678Shselasky u8 egress_general_low[0x20]; 336308678Shselasky 337308678Shselasky u8 reserved_at_1c0[0x40]; 338308678Shselasky 339308678Shselasky u8 egress_hoq_high[0x20]; 340308678Shselasky 341308678Shselasky u8 egress_hoq_low[0x20]; 342308678Shselasky 343308678Shselasky u8 port_isolation_high[0x20]; 344308678Shselasky 345308678Shselasky u8 port_isolation_low[0x20]; 346308678Shselasky 347308678Shselasky u8 egress_policy_engine_high[0x20]; 348308678Shselasky 349308678Shselasky u8 egress_policy_engine_low[0x20]; 350308678Shselasky 351308678Shselasky u8 ingress_tx_link_down_high[0x20]; 352308678Shselasky 353308678Shselasky u8 ingress_tx_link_down_low[0x20]; 354308678Shselasky 355308678Shselasky u8 egress_stp_filter_high[0x20]; 356308678Shselasky 357308678Shselasky u8 egress_stp_filter_low[0x20]; 358308678Shselasky 359308678Shselasky u8 reserved_at_340[0x480]; 360308678Shselasky}; 361290650Shselaskystruct mlx5_ifc_flow_table_prop_layout_bits { 362290650Shselasky u8 ft_support[0x1]; 363290650Shselasky u8 flow_tag[0x1]; 364290650Shselasky u8 flow_counter[0x1]; 365290650Shselasky u8 flow_modify_en[0x1]; 366290650Shselasky u8 modify_root[0x1]; 367290650Shselasky u8 reserved_0[0x1b]; 368290650Shselasky 369290650Shselasky u8 reserved_1[0x2]; 370290650Shselasky u8 log_max_ft_size[0x6]; 371290650Shselasky u8 reserved_2[0x10]; 372290650Shselasky u8 max_ft_level[0x8]; 373290650Shselasky 374290650Shselasky u8 reserved_3[0x20]; 375290650Shselasky 376290650Shselasky u8 reserved_4[0x18]; 377290650Shselasky u8 log_max_ft_num[0x8]; 378290650Shselasky 379290650Shselasky u8 reserved_5[0x10]; 380290650Shselasky u8 log_max_flow_counter[0x8]; 381290650Shselasky u8 log_max_destination[0x8]; 382290650Shselasky 383290650Shselasky u8 reserved_6[0x18]; 384290650Shselasky u8 log_max_flow[0x8]; 385290650Shselasky 386290650Shselasky u8 reserved_7[0x40]; 387290650Shselasky 388290650Shselasky struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support; 389290650Shselasky 390290650Shselasky struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support; 391290650Shselasky}; 392290650Shselasky 393290650Shselaskystruct mlx5_ifc_odp_per_transport_service_cap_bits { 394290650Shselasky u8 send[0x1]; 395290650Shselasky u8 receive[0x1]; 396290650Shselasky u8 write[0x1]; 397290650Shselasky u8 read[0x1]; 398290650Shselasky u8 atomic[0x1]; 399290650Shselasky u8 srq_receive[0x1]; 400290650Shselasky u8 reserved_0[0x1a]; 401290650Shselasky}; 402290650Shselasky 403290650Shselaskystruct mlx5_ifc_flow_counter_list_bits { 404290650Shselasky u8 reserved_0[0x10]; 405290650Shselasky u8 flow_counter_id[0x10]; 406290650Shselasky 407290650Shselasky u8 reserved_1[0x20]; 408290650Shselasky}; 409290650Shselasky 410290650Shselaskyenum { 411290650Shselasky MLX5_FLOW_CONTEXT_DEST_TYPE_VPORT = 0x0, 412290650Shselasky MLX5_FLOW_CONTEXT_DEST_TYPE_FLOW_TABLE = 0x1, 413290650Shselasky MLX5_FLOW_CONTEXT_DEST_TYPE_TIR = 0x2, 414290650Shselasky}; 415290650Shselasky 416290650Shselaskystruct mlx5_ifc_dest_format_struct_bits { 417290650Shselasky u8 destination_type[0x8]; 418290650Shselasky u8 destination_id[0x18]; 419290650Shselasky 420290650Shselasky u8 reserved_0[0x20]; 421290650Shselasky}; 422290650Shselasky 423290650Shselaskystruct mlx5_ifc_fte_match_set_lyr_2_4_bits { 424290650Shselasky u8 smac_47_16[0x20]; 425290650Shselasky 426290650Shselasky u8 smac_15_0[0x10]; 427290650Shselasky u8 ethertype[0x10]; 428290650Shselasky 429290650Shselasky u8 dmac_47_16[0x20]; 430290650Shselasky 431290650Shselasky u8 dmac_15_0[0x10]; 432290650Shselasky u8 first_prio[0x3]; 433290650Shselasky u8 first_cfi[0x1]; 434290650Shselasky u8 first_vid[0xc]; 435290650Shselasky 436290650Shselasky u8 ip_protocol[0x8]; 437290650Shselasky u8 ip_dscp[0x6]; 438290650Shselasky u8 ip_ecn[0x2]; 439306233Shselasky u8 cvlan_tag[0x1]; 440306233Shselasky u8 svlan_tag[0x1]; 441290650Shselasky u8 frag[0x1]; 442290650Shselasky u8 reserved_1[0x4]; 443290650Shselasky u8 tcp_flags[0x9]; 444290650Shselasky 445290650Shselasky u8 tcp_sport[0x10]; 446290650Shselasky u8 tcp_dport[0x10]; 447290650Shselasky 448290650Shselasky u8 reserved_2[0x20]; 449290650Shselasky 450290650Shselasky u8 udp_sport[0x10]; 451290650Shselasky u8 udp_dport[0x10]; 452290650Shselasky 453290650Shselasky u8 src_ip[4][0x20]; 454290650Shselasky 455290650Shselasky u8 dst_ip[4][0x20]; 456290650Shselasky}; 457290650Shselasky 458290650Shselaskystruct mlx5_ifc_fte_match_set_misc_bits { 459290650Shselasky u8 reserved_0[0x8]; 460290650Shselasky u8 source_sqn[0x18]; 461290650Shselasky 462290650Shselasky u8 reserved_1[0x10]; 463290650Shselasky u8 source_port[0x10]; 464290650Shselasky 465290650Shselasky u8 outer_second_prio[0x3]; 466290650Shselasky u8 outer_second_cfi[0x1]; 467290650Shselasky u8 outer_second_vid[0xc]; 468290650Shselasky u8 inner_second_prio[0x3]; 469290650Shselasky u8 inner_second_cfi[0x1]; 470290650Shselasky u8 inner_second_vid[0xc]; 471290650Shselasky 472290650Shselasky u8 outer_second_vlan_tag[0x1]; 473290650Shselasky u8 inner_second_vlan_tag[0x1]; 474290650Shselasky u8 reserved_2[0xe]; 475290650Shselasky u8 gre_protocol[0x10]; 476290650Shselasky 477290650Shselasky u8 gre_key_h[0x18]; 478290650Shselasky u8 gre_key_l[0x8]; 479290650Shselasky 480290650Shselasky u8 vxlan_vni[0x18]; 481290650Shselasky u8 reserved_3[0x8]; 482290650Shselasky 483308678Shselasky u8 geneve_vni[0x18]; 484308678Shselasky u8 reserved4[0x7]; 485308678Shselasky u8 geneve_oam[0x1]; 486290650Shselasky 487290650Shselasky u8 reserved_5[0xc]; 488290650Shselasky u8 outer_ipv6_flow_label[0x14]; 489290650Shselasky 490290650Shselasky u8 reserved_6[0xc]; 491290650Shselasky u8 inner_ipv6_flow_label[0x14]; 492290650Shselasky 493308678Shselasky u8 reserved7[0x10]; 494308678Shselasky u8 geneve_protocol_type[0x10]; 495308678Shselasky u8 reserved8[0xc0]; 496290650Shselasky}; 497290650Shselasky 498290650Shselaskystruct mlx5_ifc_cmd_pas_bits { 499290650Shselasky u8 pa_h[0x20]; 500290650Shselasky 501290650Shselasky u8 pa_l[0x14]; 502290650Shselasky u8 reserved_0[0xc]; 503290650Shselasky}; 504290650Shselasky 505290650Shselaskystruct mlx5_ifc_uint64_bits { 506290650Shselasky u8 hi[0x20]; 507290650Shselasky 508290650Shselasky u8 lo[0x20]; 509290650Shselasky}; 510290650Shselasky 511306233Shselaskystruct mlx5_ifc_application_prio_entry_bits { 512306233Shselasky u8 reserved_0[0x8]; 513306233Shselasky u8 priority[0x3]; 514306233Shselasky u8 reserved_1[0x2]; 515306233Shselasky u8 sel[0x3]; 516306233Shselasky u8 protocol_id[0x10]; 517306233Shselasky}; 518306233Shselasky 519290650Shselaskystruct mlx5_ifc_nodnic_ring_doorbell_bits { 520290650Shselasky u8 reserved_0[0x8]; 521290650Shselasky u8 ring_pi[0x10]; 522290650Shselasky u8 reserved_1[0x8]; 523290650Shselasky}; 524290650Shselasky 525290650Shselaskyenum { 526290650Shselasky MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0, 527290650Shselasky MLX5_ADS_STAT_RATE_2_5GBPS = 0x7, 528290650Shselasky MLX5_ADS_STAT_RATE_10GBPS = 0x8, 529290650Shselasky MLX5_ADS_STAT_RATE_30GBPS = 0x9, 530290650Shselasky MLX5_ADS_STAT_RATE_5GBPS = 0xa, 531290650Shselasky MLX5_ADS_STAT_RATE_20GBPS = 0xb, 532290650Shselasky MLX5_ADS_STAT_RATE_40GBPS = 0xc, 533290650Shselasky MLX5_ADS_STAT_RATE_60GBPS = 0xd, 534290650Shselasky MLX5_ADS_STAT_RATE_80GBPS = 0xe, 535290650Shselasky MLX5_ADS_STAT_RATE_120GBPS = 0xf, 536290650Shselasky}; 537290650Shselasky 538290650Shselaskystruct mlx5_ifc_ads_bits { 539290650Shselasky u8 fl[0x1]; 540290650Shselasky u8 free_ar[0x1]; 541290650Shselasky u8 reserved_0[0xe]; 542290650Shselasky u8 pkey_index[0x10]; 543290650Shselasky 544290650Shselasky u8 reserved_1[0x8]; 545290650Shselasky u8 grh[0x1]; 546290650Shselasky u8 mlid[0x7]; 547290650Shselasky u8 rlid[0x10]; 548290650Shselasky 549290650Shselasky u8 ack_timeout[0x5]; 550290650Shselasky u8 reserved_2[0x3]; 551290650Shselasky u8 src_addr_index[0x8]; 552290650Shselasky u8 log_rtm[0x4]; 553290650Shselasky u8 stat_rate[0x4]; 554290650Shselasky u8 hop_limit[0x8]; 555290650Shselasky 556290650Shselasky u8 reserved_3[0x4]; 557290650Shselasky u8 tclass[0x8]; 558290650Shselasky u8 flow_label[0x14]; 559290650Shselasky 560290650Shselasky u8 rgid_rip[16][0x8]; 561290650Shselasky 562290650Shselasky u8 reserved_4[0x4]; 563290650Shselasky u8 f_dscp[0x1]; 564290650Shselasky u8 f_ecn[0x1]; 565290650Shselasky u8 reserved_5[0x1]; 566290650Shselasky u8 f_eth_prio[0x1]; 567290650Shselasky u8 ecn[0x2]; 568290650Shselasky u8 dscp[0x6]; 569290650Shselasky u8 udp_sport[0x10]; 570290650Shselasky 571290650Shselasky u8 dei_cfi[0x1]; 572290650Shselasky u8 eth_prio[0x3]; 573290650Shselasky u8 sl[0x4]; 574290650Shselasky u8 port[0x8]; 575290650Shselasky u8 rmac_47_32[0x10]; 576290650Shselasky 577290650Shselasky u8 rmac_31_0[0x20]; 578290650Shselasky}; 579290650Shselasky 580306233Shselaskystruct mlx5_ifc_diagnostic_counter_cap_bits { 581306233Shselasky u8 sync[0x1]; 582306233Shselasky u8 reserved_0[0xf]; 583306233Shselasky u8 counter_id[0x10]; 584306233Shselasky}; 585306233Shselasky 586306233Shselaskystruct mlx5_ifc_debug_cap_bits { 587306233Shselasky u8 reserved_0[0x18]; 588306233Shselasky u8 log_max_samples[0x8]; 589306233Shselasky 590306233Shselasky u8 single[0x1]; 591306233Shselasky u8 repetitive[0x1]; 592306233Shselasky u8 health_mon_rx_activity[0x1]; 593306233Shselasky u8 reserved_1[0x15]; 594306233Shselasky u8 log_min_sample_period[0x8]; 595306233Shselasky 596306233Shselasky u8 reserved_2[0x1c0]; 597306233Shselasky 598306233Shselasky struct mlx5_ifc_diagnostic_counter_cap_bits diagnostic_counter[0x1f0]; 599306233Shselasky}; 600306233Shselasky 601308678Shselaskystruct mlx5_ifc_qos_cap_bits { 602308678Shselasky u8 packet_pacing[0x1]; 603308678Shselasky u8 esw_scheduling[0x1]; 604308678Shselasky u8 esw_bw_share[0x1]; 605308678Shselasky u8 esw_rate_limit[0x1]; 606308678Shselasky u8 hll[0x1]; 607308678Shselasky u8 packet_pacing_burst_bound[0x1]; 608308678Shselasky u8 reserved_at_6[0x1a]; 609308678Shselasky 610308678Shselasky u8 reserved_at_20[0x20]; 611308678Shselasky 612308678Shselasky u8 packet_pacing_max_rate[0x20]; 613308678Shselasky 614308678Shselasky u8 packet_pacing_min_rate[0x20]; 615308678Shselasky 616308678Shselasky u8 reserved_at_80[0x10]; 617308678Shselasky u8 packet_pacing_rate_table_size[0x10]; 618308678Shselasky 619308678Shselasky u8 esw_element_type[0x10]; 620308678Shselasky u8 esw_tsar_type[0x10]; 621308678Shselasky 622308678Shselasky u8 reserved_at_c0[0x10]; 623308678Shselasky u8 max_qos_para_vport[0x10]; 624308678Shselasky 625308678Shselasky u8 max_tsar_bw_share[0x20]; 626308678Shselasky 627308678Shselasky u8 reserved_at_100[0x700]; 628308678Shselasky}; 629308678Shselasky 630306233Shselaskystruct mlx5_ifc_snapshot_cap_bits { 631306233Shselasky u8 reserved_0[0x1d]; 632306233Shselasky u8 suspend_qp_uc[0x1]; 633306233Shselasky u8 suspend_qp_ud[0x1]; 634306233Shselasky u8 suspend_qp_rc[0x1]; 635306233Shselasky 636306233Shselasky u8 reserved_1[0x1c]; 637306233Shselasky u8 restore_pd[0x1]; 638306233Shselasky u8 restore_uar[0x1]; 639306233Shselasky u8 restore_mkey[0x1]; 640306233Shselasky u8 restore_qp[0x1]; 641306233Shselasky 642306233Shselasky u8 reserved_2[0x1e]; 643306233Shselasky u8 named_mkey[0x1]; 644306233Shselasky u8 named_qp[0x1]; 645306233Shselasky 646306233Shselasky u8 reserved_3[0x7a0]; 647306233Shselasky}; 648306233Shselasky 649290650Shselaskystruct mlx5_ifc_e_switch_cap_bits { 650290650Shselasky u8 vport_svlan_strip[0x1]; 651290650Shselasky u8 vport_cvlan_strip[0x1]; 652290650Shselasky u8 vport_svlan_insert[0x1]; 653290650Shselasky u8 vport_cvlan_insert_if_not_exist[0x1]; 654290650Shselasky u8 vport_cvlan_insert_overwrite[0x1]; 655290650Shselasky 656306233Shselasky u8 reserved_0[0x19]; 657306233Shselasky 658306233Shselasky u8 nic_vport_node_guid_modify[0x1]; 659306233Shselasky u8 nic_vport_port_guid_modify[0x1]; 660306233Shselasky 661290650Shselasky u8 reserved_1[0x7e0]; 662290650Shselasky}; 663290650Shselasky 664290650Shselaskystruct mlx5_ifc_flow_table_eswitch_cap_bits { 665290650Shselasky u8 reserved_0[0x200]; 666290650Shselasky 667290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb; 668290650Shselasky 669290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress; 670290650Shselasky 671290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress; 672290650Shselasky 673290650Shselasky u8 reserved_1[0x7800]; 674290650Shselasky}; 675290650Shselasky 676290650Shselaskystruct mlx5_ifc_flow_table_nic_cap_bits { 677290650Shselasky u8 reserved_0[0x200]; 678290650Shselasky 679290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive; 680290650Shselasky 681290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_rdma; 682290650Shselasky 683290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer; 684290650Shselasky 685290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit; 686290650Shselasky 687290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_rdma; 688290650Shselasky 689290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer; 690290650Shselasky 691290650Shselasky u8 reserved_1[0x7200]; 692290650Shselasky}; 693290650Shselasky 694290650Shselaskystruct mlx5_ifc_per_protocol_networking_offload_caps_bits { 695290650Shselasky u8 csum_cap[0x1]; 696290650Shselasky u8 vlan_cap[0x1]; 697290650Shselasky u8 lro_cap[0x1]; 698290650Shselasky u8 lro_psh_flag[0x1]; 699290650Shselasky u8 lro_time_stamp[0x1]; 700290650Shselasky u8 lro_max_msg_sz_mode[0x2]; 701290650Shselasky u8 reserved_0[0x2]; 702290650Shselasky u8 self_lb_mc[0x1]; 703290650Shselasky u8 self_lb_uc[0x1]; 704290650Shselasky u8 max_lso_cap[0x5]; 705290650Shselasky u8 multi_pkt_send_wqe[0x2]; 706290650Shselasky u8 wqe_inline_mode[0x2]; 707290650Shselasky u8 rss_ind_tbl_cap[0x4]; 708290650Shselasky u8 reserved_1[0x3]; 709290650Shselasky u8 tunnel_lso_const_out_ip_id[0x1]; 710290650Shselasky u8 tunnel_lro_gre[0x1]; 711290650Shselasky u8 tunnel_lro_vxlan[0x1]; 712290650Shselasky u8 tunnel_statless_gre[0x1]; 713290650Shselasky u8 tunnel_stateless_vxlan[0x1]; 714290650Shselasky 715308678Shselasky u8 swp[0x1]; 716308678Shselasky u8 swp_csum[0x1]; 717308678Shselasky u8 swp_lso[0x1]; 718308678Shselasky u8 reserved_2[0x1c]; 719308678Shselasky u8 tunnel_stateless_geneve_rx[0x1]; 720290650Shselasky 721290650Shselasky u8 reserved_3[0x10]; 722290650Shselasky u8 lro_min_mss_size[0x10]; 723290650Shselasky 724290650Shselasky u8 reserved_4[0x120]; 725290650Shselasky 726290650Shselasky u8 lro_timer_supported_periods[4][0x20]; 727290650Shselasky 728290650Shselasky u8 reserved_5[0x600]; 729290650Shselasky}; 730290650Shselasky 731290650Shselaskyenum { 732290650Shselasky MLX5_ROCE_CAP_L3_TYPE_GRH = 0x1, 733290650Shselasky MLX5_ROCE_CAP_L3_TYPE_IPV4 = 0x2, 734290650Shselasky MLX5_ROCE_CAP_L3_TYPE_IPV6 = 0x4, 735290650Shselasky}; 736290650Shselasky 737290650Shselaskystruct mlx5_ifc_roce_cap_bits { 738290650Shselasky u8 roce_apm[0x1]; 739306233Shselasky u8 rts2rts_primary_eth_prio[0x1]; 740306233Shselasky u8 roce_rx_allow_untagged[0x1]; 741306233Shselasky u8 rts2rts_src_addr_index_for_vlan_valid_vlan_id[0x1]; 742290650Shselasky 743306233Shselasky u8 reserved_0[0x1c]; 744306233Shselasky 745290650Shselasky u8 reserved_1[0x60]; 746290650Shselasky 747290650Shselasky u8 reserved_2[0xc]; 748290650Shselasky u8 l3_type[0x4]; 749290650Shselasky u8 reserved_3[0x8]; 750290650Shselasky u8 roce_version[0x8]; 751290650Shselasky 752290650Shselasky u8 reserved_4[0x10]; 753290650Shselasky u8 r_roce_dest_udp_port[0x10]; 754290650Shselasky 755290650Shselasky u8 r_roce_max_src_udp_port[0x10]; 756290650Shselasky u8 r_roce_min_src_udp_port[0x10]; 757290650Shselasky 758290650Shselasky u8 reserved_5[0x10]; 759290650Shselasky u8 roce_address_table_size[0x10]; 760290650Shselasky 761290650Shselasky u8 reserved_6[0x700]; 762290650Shselasky}; 763290650Shselasky 764290650Shselaskyenum { 765290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x1, 766290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2, 767290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4, 768290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8, 769290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10, 770290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20, 771290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40, 772290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80, 773290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100, 774290650Shselasky}; 775290650Shselasky 776290650Shselaskyenum { 777290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1, 778290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2, 779290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4, 780290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8, 781290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10, 782290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20, 783290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40, 784290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80, 785290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100, 786290650Shselasky}; 787290650Shselasky 788290650Shselaskystruct mlx5_ifc_atomic_caps_bits { 789290650Shselasky u8 reserved_0[0x40]; 790290650Shselasky 791306233Shselasky u8 atomic_req_8B_endianess_mode[0x2]; 792306233Shselasky u8 reserved_1[0x4]; 793306233Shselasky u8 supported_atomic_req_8B_endianess_mode_1[0x1]; 794290650Shselasky 795306233Shselasky u8 reserved_2[0x19]; 796290650Shselasky 797306233Shselasky u8 reserved_3[0x20]; 798306233Shselasky 799306233Shselasky u8 reserved_4[0x10]; 800290650Shselasky u8 atomic_operations[0x10]; 801290650Shselasky 802306233Shselasky u8 reserved_5[0x10]; 803290650Shselasky u8 atomic_size_qp[0x10]; 804290650Shselasky 805306233Shselasky u8 reserved_6[0x10]; 806290650Shselasky u8 atomic_size_dc[0x10]; 807290650Shselasky 808306233Shselasky u8 reserved_7[0x720]; 809290650Shselasky}; 810290650Shselasky 811290650Shselaskystruct mlx5_ifc_odp_cap_bits { 812290650Shselasky u8 reserved_0[0x40]; 813290650Shselasky 814290650Shselasky u8 sig[0x1]; 815290650Shselasky u8 reserved_1[0x1f]; 816290650Shselasky 817290650Shselasky u8 reserved_2[0x20]; 818290650Shselasky 819290650Shselasky struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps; 820290650Shselasky 821290650Shselasky struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps; 822290650Shselasky 823290650Shselasky struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps; 824290650Shselasky 825290650Shselasky struct mlx5_ifc_odp_per_transport_service_cap_bits xrc_odp_caps; 826290650Shselasky 827290650Shselasky struct mlx5_ifc_odp_per_transport_service_cap_bits dc_odp_caps; 828290650Shselasky 829290650Shselasky u8 reserved_3[0x6e0]; 830290650Shselasky}; 831290650Shselasky 832290650Shselaskyenum { 833290650Shselasky MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0, 834290650Shselasky MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1, 835290650Shselasky MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2, 836290650Shselasky MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3, 837290650Shselasky MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4, 838290650Shselasky}; 839290650Shselasky 840290650Shselaskyenum { 841290650Shselasky MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0, 842290650Shselasky MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1, 843290650Shselasky MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2, 844290650Shselasky MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3, 845290650Shselasky MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4, 846290650Shselasky MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5, 847290650Shselasky}; 848290650Shselasky 849290650Shselaskyenum { 850290650Shselasky MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0, 851290650Shselasky MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1, 852290650Shselasky}; 853290650Shselasky 854290650Shselaskyenum { 855290650Shselasky MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0, 856290650Shselasky MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1, 857290650Shselasky MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3, 858290650Shselasky}; 859290650Shselasky 860290650Shselaskystruct mlx5_ifc_cmd_hca_cap_bits { 861290650Shselasky u8 reserved_0[0x80]; 862290650Shselasky 863290650Shselasky u8 log_max_srq_sz[0x8]; 864290650Shselasky u8 log_max_qp_sz[0x8]; 865290650Shselasky u8 reserved_1[0xb]; 866290650Shselasky u8 log_max_qp[0x5]; 867290650Shselasky 868290650Shselasky u8 reserved_2[0xb]; 869290650Shselasky u8 log_max_srq[0x5]; 870290650Shselasky u8 reserved_3[0x10]; 871290650Shselasky 872290650Shselasky u8 reserved_4[0x8]; 873290650Shselasky u8 log_max_cq_sz[0x8]; 874290650Shselasky u8 reserved_5[0xb]; 875290650Shselasky u8 log_max_cq[0x5]; 876290650Shselasky 877290650Shselasky u8 log_max_eq_sz[0x8]; 878290650Shselasky u8 reserved_6[0x2]; 879290650Shselasky u8 log_max_mkey[0x6]; 880290650Shselasky u8 reserved_7[0xc]; 881290650Shselasky u8 log_max_eq[0x4]; 882290650Shselasky 883290650Shselasky u8 max_indirection[0x8]; 884290650Shselasky u8 reserved_8[0x1]; 885290650Shselasky u8 log_max_mrw_sz[0x7]; 886290650Shselasky u8 reserved_9[0x2]; 887290650Shselasky u8 log_max_bsf_list_size[0x6]; 888290650Shselasky u8 reserved_10[0x2]; 889290650Shselasky u8 log_max_klm_list_size[0x6]; 890290650Shselasky 891290650Shselasky u8 reserved_11[0xa]; 892290650Shselasky u8 log_max_ra_req_dc[0x6]; 893290650Shselasky u8 reserved_12[0xa]; 894290650Shselasky u8 log_max_ra_res_dc[0x6]; 895290650Shselasky 896290650Shselasky u8 reserved_13[0xa]; 897290650Shselasky u8 log_max_ra_req_qp[0x6]; 898290650Shselasky u8 reserved_14[0xa]; 899290650Shselasky u8 log_max_ra_res_qp[0x6]; 900290650Shselasky 901290650Shselasky u8 pad_cap[0x1]; 902290650Shselasky u8 cc_query_allowed[0x1]; 903290650Shselasky u8 cc_modify_allowed[0x1]; 904306233Shselasky u8 start_pad[0x1]; 905306233Shselasky u8 cache_line_128byte[0x1]; 906306233Shselasky u8 reserved_15[0xb]; 907290650Shselasky u8 gid_table_size[0x10]; 908290650Shselasky 909290650Shselasky u8 out_of_seq_cnt[0x1]; 910290650Shselasky u8 vport_counters[0x1]; 911306233Shselasky u8 retransmission_q_counters[0x1]; 912306233Shselasky u8 debug[0x1]; 913306233Shselasky u8 reserved_16[0x2]; 914290650Shselasky u8 max_qp_cnt[0xa]; 915290650Shselasky u8 pkey_table_size[0x10]; 916290650Shselasky 917290650Shselasky u8 vport_group_manager[0x1]; 918290650Shselasky u8 vhca_group_manager[0x1]; 919290650Shselasky u8 ib_virt[0x1]; 920290650Shselasky u8 eth_virt[0x1]; 921290650Shselasky u8 reserved_17[0x1]; 922290650Shselasky u8 ets[0x1]; 923290650Shselasky u8 nic_flow_table[0x1]; 924290650Shselasky u8 eswitch_flow_table[0x1]; 925290650Shselasky u8 reserved_18[0x3]; 926290650Shselasky u8 local_ca_ack_delay[0x5]; 927290650Shselasky u8 port_module_event[0x1]; 928290650Shselasky u8 reserved_19[0x5]; 929290650Shselasky u8 port_type[0x2]; 930290650Shselasky u8 num_ports[0x8]; 931290650Shselasky 932290650Shselasky u8 snapshot[0x1]; 933290650Shselasky u8 reserved_20[0x2]; 934290650Shselasky u8 log_max_msg[0x5]; 935290650Shselasky u8 reserved_21[0x4]; 936290650Shselasky u8 max_tc[0x4]; 937306233Shselasky u8 temp_warn_event[0x1]; 938306233Shselasky u8 dcbx[0x1]; 939306233Shselasky u8 reserved_22[0x4]; 940290650Shselasky u8 rol_s[0x1]; 941290650Shselasky u8 rol_g[0x1]; 942290650Shselasky u8 reserved_23[0x1]; 943290650Shselasky u8 wol_s[0x1]; 944290650Shselasky u8 wol_g[0x1]; 945290650Shselasky u8 wol_a[0x1]; 946290650Shselasky u8 wol_b[0x1]; 947290650Shselasky u8 wol_m[0x1]; 948290650Shselasky u8 wol_u[0x1]; 949290650Shselasky u8 wol_p[0x1]; 950290650Shselasky 951290650Shselasky u8 stat_rate_support[0x10]; 952290650Shselasky u8 reserved_24[0xc]; 953290650Shselasky u8 cqe_version[0x4]; 954290650Shselasky 955290650Shselasky u8 compact_address_vector[0x1]; 956290650Shselasky u8 striding_rq[0x1]; 957306233Shselasky u8 reserved_25[0x1]; 958306233Shselasky u8 ipoib_enhanced_offloads[0x1]; 959306233Shselasky u8 ipoib_ipoib_offloads[0x1]; 960306233Shselasky u8 reserved_26[0x8]; 961306233Shselasky u8 dc_connect_qp[0x1]; 962290650Shselasky u8 dc_cnak_trace[0x1]; 963290650Shselasky u8 drain_sigerr[0x1]; 964290650Shselasky u8 cmdif_checksum[0x2]; 965290650Shselasky u8 sigerr_cqe[0x1]; 966306233Shselasky u8 reserved_27[0x1]; 967290650Shselasky u8 wq_signature[0x1]; 968290650Shselasky u8 sctr_data_cqe[0x1]; 969306233Shselasky u8 reserved_28[0x1]; 970290650Shselasky u8 sho[0x1]; 971290650Shselasky u8 tph[0x1]; 972290650Shselasky u8 rf[0x1]; 973290650Shselasky u8 dct[0x1]; 974306233Shselasky u8 qos[0x1]; 975290650Shselasky u8 eth_net_offloads[0x1]; 976290650Shselasky u8 roce[0x1]; 977290650Shselasky u8 atomic[0x1]; 978306233Shselasky u8 reserved_30[0x1]; 979290650Shselasky 980290650Shselasky u8 cq_oi[0x1]; 981290650Shselasky u8 cq_resize[0x1]; 982290650Shselasky u8 cq_moderation[0x1]; 983306233Shselasky u8 reserved_31[0x3]; 984290650Shselasky u8 cq_eq_remap[0x1]; 985290650Shselasky u8 pg[0x1]; 986290650Shselasky u8 block_lb_mc[0x1]; 987290650Shselasky u8 exponential_backoff[0x1]; 988290650Shselasky u8 scqe_break_moderation[0x1]; 989290650Shselasky u8 cq_period_start_from_cqe[0x1]; 990290650Shselasky u8 cd[0x1]; 991290650Shselasky u8 atm[0x1]; 992290650Shselasky u8 apm[0x1]; 993306233Shselasky u8 reserved_32[0x7]; 994290650Shselasky u8 qkv[0x1]; 995290650Shselasky u8 pkv[0x1]; 996306233Shselasky u8 reserved_33[0x4]; 997290650Shselasky u8 xrc[0x1]; 998290650Shselasky u8 ud[0x1]; 999290650Shselasky u8 uc[0x1]; 1000290650Shselasky u8 rc[0x1]; 1001290650Shselasky 1002306233Shselasky u8 reserved_34[0xa]; 1003290650Shselasky u8 uar_sz[0x6]; 1004306233Shselasky u8 reserved_35[0x8]; 1005290650Shselasky u8 log_pg_sz[0x8]; 1006290650Shselasky 1007290650Shselasky u8 bf[0x1]; 1008290650Shselasky u8 driver_version[0x1]; 1009290650Shselasky u8 pad_tx_eth_packet[0x1]; 1010306233Shselasky u8 reserved_36[0x8]; 1011290650Shselasky u8 log_bf_reg_size[0x5]; 1012306233Shselasky u8 reserved_37[0x10]; 1013290650Shselasky 1014306233Shselasky u8 num_of_diagnostic_counters[0x10]; 1015290650Shselasky u8 max_wqe_sz_sq[0x10]; 1016290650Shselasky 1017290650Shselasky u8 reserved_38[0x10]; 1018290650Shselasky u8 max_wqe_sz_rq[0x10]; 1019290650Shselasky 1020290650Shselasky u8 reserved_39[0x10]; 1021290650Shselasky u8 max_wqe_sz_sq_dc[0x10]; 1022290650Shselasky 1023290650Shselasky u8 reserved_40[0x7]; 1024290650Shselasky u8 max_qp_mcg[0x19]; 1025290650Shselasky 1026290650Shselasky u8 reserved_41[0x18]; 1027290650Shselasky u8 log_max_mcg[0x8]; 1028290650Shselasky 1029290650Shselasky u8 reserved_42[0x3]; 1030290650Shselasky u8 log_max_transport_domain[0x5]; 1031290650Shselasky u8 reserved_43[0x3]; 1032290650Shselasky u8 log_max_pd[0x5]; 1033290650Shselasky u8 reserved_44[0xb]; 1034290650Shselasky u8 log_max_xrcd[0x5]; 1035290650Shselasky 1036290650Shselasky u8 reserved_45[0x10]; 1037290650Shselasky u8 max_flow_counter[0x10]; 1038290650Shselasky 1039290650Shselasky u8 reserved_46[0x3]; 1040290650Shselasky u8 log_max_rq[0x5]; 1041290650Shselasky u8 reserved_47[0x3]; 1042290650Shselasky u8 log_max_sq[0x5]; 1043290650Shselasky u8 reserved_48[0x3]; 1044290650Shselasky u8 log_max_tir[0x5]; 1045290650Shselasky u8 reserved_49[0x3]; 1046290650Shselasky u8 log_max_tis[0x5]; 1047290650Shselasky 1048290650Shselasky u8 basic_cyclic_rcv_wqe[0x1]; 1049290650Shselasky u8 reserved_50[0x2]; 1050290650Shselasky u8 log_max_rmp[0x5]; 1051290650Shselasky u8 reserved_51[0x3]; 1052290650Shselasky u8 log_max_rqt[0x5]; 1053290650Shselasky u8 reserved_52[0x3]; 1054290650Shselasky u8 log_max_rqt_size[0x5]; 1055290650Shselasky u8 reserved_53[0x3]; 1056290650Shselasky u8 log_max_tis_per_sq[0x5]; 1057290650Shselasky 1058290650Shselasky u8 reserved_54[0x3]; 1059290650Shselasky u8 log_max_stride_sz_rq[0x5]; 1060290650Shselasky u8 reserved_55[0x3]; 1061290650Shselasky u8 log_min_stride_sz_rq[0x5]; 1062290650Shselasky u8 reserved_56[0x3]; 1063290650Shselasky u8 log_max_stride_sz_sq[0x5]; 1064290650Shselasky u8 reserved_57[0x3]; 1065290650Shselasky u8 log_min_stride_sz_sq[0x5]; 1066290650Shselasky 1067290650Shselasky u8 reserved_58[0x1b]; 1068290650Shselasky u8 log_max_wq_sz[0x5]; 1069290650Shselasky 1070290650Shselasky u8 nic_vport_change_event[0x1]; 1071290650Shselasky u8 reserved_59[0xa]; 1072290650Shselasky u8 log_max_vlan_list[0x5]; 1073290650Shselasky u8 reserved_60[0x3]; 1074290650Shselasky u8 log_max_current_mc_list[0x5]; 1075290650Shselasky u8 reserved_61[0x3]; 1076290650Shselasky u8 log_max_current_uc_list[0x5]; 1077290650Shselasky 1078290650Shselasky u8 reserved_62[0x80]; 1079290650Shselasky 1080290650Shselasky u8 reserved_63[0x3]; 1081290650Shselasky u8 log_max_l2_table[0x5]; 1082290650Shselasky u8 reserved_64[0x8]; 1083290650Shselasky u8 log_uar_page_sz[0x10]; 1084290650Shselasky 1085290650Shselasky u8 reserved_65[0x20]; 1086290650Shselasky 1087306233Shselasky u8 device_frequency_mhz[0x20]; 1088290650Shselasky 1089306233Shselasky u8 device_frequency_khz[0x20]; 1090290650Shselasky 1091306233Shselasky u8 reserved_66[0x80]; 1092306233Shselasky 1093290650Shselasky u8 log_max_atomic_size_qp[0x8]; 1094290650Shselasky u8 reserved_67[0x10]; 1095290650Shselasky u8 log_max_atomic_size_dc[0x8]; 1096290650Shselasky 1097290650Shselasky u8 reserved_68[0x1f]; 1098290650Shselasky u8 cqe_compression[0x1]; 1099290650Shselasky 1100290650Shselasky u8 cqe_compression_timeout[0x10]; 1101290650Shselasky u8 cqe_compression_max_num[0x10]; 1102290650Shselasky 1103290650Shselasky u8 reserved_69[0x220]; 1104290650Shselasky}; 1105290650Shselasky 1106306233Shselaskyenum mlx5_flow_destination_type { 1107306233Shselasky MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0, 1108306233Shselasky MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1, 1109306233Shselasky MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2, 1110306233Shselasky}; 1111306233Shselasky 1112290650Shselaskyunion mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits { 1113290650Shselasky struct mlx5_ifc_dest_format_struct_bits dest_format_struct; 1114290650Shselasky struct mlx5_ifc_flow_counter_list_bits flow_counter_list; 1115290650Shselasky u8 reserved_0[0x40]; 1116290650Shselasky}; 1117290650Shselasky 1118290650Shselaskystruct mlx5_ifc_fte_match_param_bits { 1119290650Shselasky struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers; 1120290650Shselasky 1121290650Shselasky struct mlx5_ifc_fte_match_set_misc_bits misc_parameters; 1122290650Shselasky 1123290650Shselasky struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers; 1124290650Shselasky 1125290650Shselasky u8 reserved_0[0xa00]; 1126290650Shselasky}; 1127290650Shselasky 1128290650Shselaskyenum { 1129290650Shselasky MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0, 1130290650Shselasky MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1, 1131290650Shselasky MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2, 1132290650Shselasky MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3, 1133290650Shselasky MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4, 1134290650Shselasky}; 1135290650Shselasky 1136290650Shselaskystruct mlx5_ifc_rx_hash_field_select_bits { 1137290650Shselasky u8 l3_prot_type[0x1]; 1138290650Shselasky u8 l4_prot_type[0x1]; 1139290650Shselasky u8 selected_fields[0x1e]; 1140290650Shselasky}; 1141290650Shselasky 1142290650Shselaskyenum { 1143290650Shselasky MLX5_WQ_TYPE_LINKED_LIST = 0x0, 1144290650Shselasky MLX5_WQ_TYPE_CYCLIC = 0x1, 1145290650Shselasky MLX5_WQ_TYPE_STRQ_LINKED_LIST = 0x2, 1146290650Shselasky MLX5_WQ_TYPE_STRQ_CYCLIC = 0x3, 1147290650Shselasky}; 1148290650Shselasky 1149306233Shselaskyenum rq_type { 1150306233Shselasky RQ_TYPE_NONE, 1151306233Shselasky RQ_TYPE_STRIDE, 1152306233Shselasky}; 1153306233Shselasky 1154290650Shselaskyenum { 1155290650Shselasky MLX5_WQ_END_PAD_MODE_NONE = 0x0, 1156290650Shselasky MLX5_WQ_END_PAD_MODE_ALIGN = 0x1, 1157290650Shselasky}; 1158290650Shselasky 1159290650Shselaskystruct mlx5_ifc_wq_bits { 1160290650Shselasky u8 wq_type[0x4]; 1161290650Shselasky u8 wq_signature[0x1]; 1162290650Shselasky u8 end_padding_mode[0x2]; 1163290650Shselasky u8 cd_slave[0x1]; 1164290650Shselasky u8 reserved_0[0x18]; 1165290650Shselasky 1166290650Shselasky u8 hds_skip_first_sge[0x1]; 1167290650Shselasky u8 log2_hds_buf_size[0x3]; 1168290650Shselasky u8 reserved_1[0x7]; 1169290650Shselasky u8 page_offset[0x5]; 1170290650Shselasky u8 lwm[0x10]; 1171290650Shselasky 1172290650Shselasky u8 reserved_2[0x8]; 1173290650Shselasky u8 pd[0x18]; 1174290650Shselasky 1175290650Shselasky u8 reserved_3[0x8]; 1176290650Shselasky u8 uar_page[0x18]; 1177290650Shselasky 1178290650Shselasky u8 dbr_addr[0x40]; 1179290650Shselasky 1180290650Shselasky u8 hw_counter[0x20]; 1181290650Shselasky 1182290650Shselasky u8 sw_counter[0x20]; 1183290650Shselasky 1184290650Shselasky u8 reserved_4[0xc]; 1185290650Shselasky u8 log_wq_stride[0x4]; 1186290650Shselasky u8 reserved_5[0x3]; 1187290650Shselasky u8 log_wq_pg_sz[0x5]; 1188290650Shselasky u8 reserved_6[0x3]; 1189290650Shselasky u8 log_wq_sz[0x5]; 1190290650Shselasky 1191290650Shselasky u8 reserved_7[0x15]; 1192290650Shselasky u8 single_wqe_log_num_of_strides[0x3]; 1193290650Shselasky u8 two_byte_shift_en[0x1]; 1194290650Shselasky u8 reserved_8[0x4]; 1195290650Shselasky u8 single_stride_log_num_of_bytes[0x3]; 1196290650Shselasky 1197290650Shselasky u8 reserved_9[0x4c0]; 1198290650Shselasky 1199290650Shselasky struct mlx5_ifc_cmd_pas_bits pas[0]; 1200290650Shselasky}; 1201290650Shselasky 1202290650Shselaskystruct mlx5_ifc_rq_num_bits { 1203290650Shselasky u8 reserved_0[0x8]; 1204290650Shselasky u8 rq_num[0x18]; 1205290650Shselasky}; 1206290650Shselasky 1207290650Shselaskystruct mlx5_ifc_mac_address_layout_bits { 1208290650Shselasky u8 reserved_0[0x10]; 1209290650Shselasky u8 mac_addr_47_32[0x10]; 1210290650Shselasky 1211290650Shselasky u8 mac_addr_31_0[0x20]; 1212290650Shselasky}; 1213290650Shselasky 1214290650Shselaskystruct mlx5_ifc_cong_control_r_roce_ecn_np_bits { 1215290650Shselasky u8 reserved_0[0xa0]; 1216290650Shselasky 1217290650Shselasky u8 min_time_between_cnps[0x20]; 1218290650Shselasky 1219290650Shselasky u8 reserved_1[0x12]; 1220290650Shselasky u8 cnp_dscp[0x6]; 1221290650Shselasky u8 reserved_2[0x4]; 1222290650Shselasky u8 cnp_prio_mode[0x1]; 1223290650Shselasky u8 cnp_802p_prio[0x3]; 1224290650Shselasky 1225290650Shselasky u8 reserved_3[0x720]; 1226290650Shselasky}; 1227290650Shselasky 1228290650Shselaskystruct mlx5_ifc_cong_control_r_roce_ecn_rp_bits { 1229290650Shselasky u8 reserved_0[0x60]; 1230290650Shselasky 1231290650Shselasky u8 reserved_1[0x4]; 1232290650Shselasky u8 clamp_tgt_rate[0x1]; 1233290650Shselasky u8 reserved_2[0x3]; 1234290650Shselasky u8 clamp_tgt_rate_after_time_inc[0x1]; 1235290650Shselasky u8 reserved_3[0x17]; 1236290650Shselasky 1237290650Shselasky u8 reserved_4[0x20]; 1238290650Shselasky 1239290650Shselasky u8 rpg_time_reset[0x20]; 1240290650Shselasky 1241290650Shselasky u8 rpg_byte_reset[0x20]; 1242290650Shselasky 1243290650Shselasky u8 rpg_threshold[0x20]; 1244290650Shselasky 1245290650Shselasky u8 rpg_max_rate[0x20]; 1246290650Shselasky 1247290650Shselasky u8 rpg_ai_rate[0x20]; 1248290650Shselasky 1249290650Shselasky u8 rpg_hai_rate[0x20]; 1250290650Shselasky 1251290650Shselasky u8 rpg_gd[0x20]; 1252290650Shselasky 1253290650Shselasky u8 rpg_min_dec_fac[0x20]; 1254290650Shselasky 1255290650Shselasky u8 rpg_min_rate[0x20]; 1256290650Shselasky 1257290650Shselasky u8 reserved_5[0xe0]; 1258290650Shselasky 1259290650Shselasky u8 rate_to_set_on_first_cnp[0x20]; 1260290650Shselasky 1261290650Shselasky u8 dce_tcp_g[0x20]; 1262290650Shselasky 1263290650Shselasky u8 dce_tcp_rtt[0x20]; 1264290650Shselasky 1265290650Shselasky u8 rate_reduce_monitor_period[0x20]; 1266290650Shselasky 1267290650Shselasky u8 reserved_6[0x20]; 1268290650Shselasky 1269290650Shselasky u8 initial_alpha_value[0x20]; 1270290650Shselasky 1271290650Shselasky u8 reserved_7[0x4a0]; 1272290650Shselasky}; 1273290650Shselasky 1274290650Shselaskystruct mlx5_ifc_cong_control_802_1qau_rp_bits { 1275290650Shselasky u8 reserved_0[0x80]; 1276290650Shselasky 1277290650Shselasky u8 rppp_max_rps[0x20]; 1278290650Shselasky 1279290650Shselasky u8 rpg_time_reset[0x20]; 1280290650Shselasky 1281290650Shselasky u8 rpg_byte_reset[0x20]; 1282290650Shselasky 1283290650Shselasky u8 rpg_threshold[0x20]; 1284290650Shselasky 1285290650Shselasky u8 rpg_max_rate[0x20]; 1286290650Shselasky 1287290650Shselasky u8 rpg_ai_rate[0x20]; 1288290650Shselasky 1289290650Shselasky u8 rpg_hai_rate[0x20]; 1290290650Shselasky 1291290650Shselasky u8 rpg_gd[0x20]; 1292290650Shselasky 1293290650Shselasky u8 rpg_min_dec_fac[0x20]; 1294290650Shselasky 1295290650Shselasky u8 rpg_min_rate[0x20]; 1296290650Shselasky 1297290650Shselasky u8 reserved_1[0x640]; 1298290650Shselasky}; 1299290650Shselasky 1300290650Shselaskyenum { 1301290650Shselasky MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1, 1302290650Shselasky MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2, 1303290650Shselasky MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4, 1304290650Shselasky}; 1305290650Shselasky 1306290650Shselaskystruct mlx5_ifc_resize_field_select_bits { 1307290650Shselasky u8 resize_field_select[0x20]; 1308290650Shselasky}; 1309290650Shselasky 1310290650Shselaskyenum { 1311290650Shselasky MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1, 1312290650Shselasky MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2, 1313290650Shselasky MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4, 1314290650Shselasky MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8, 1315290650Shselasky}; 1316290650Shselasky 1317290650Shselaskystruct mlx5_ifc_modify_field_select_bits { 1318290650Shselasky u8 modify_field_select[0x20]; 1319290650Shselasky}; 1320290650Shselasky 1321290650Shselaskystruct mlx5_ifc_field_select_r_roce_np_bits { 1322290650Shselasky u8 field_select_r_roce_np[0x20]; 1323290650Shselasky}; 1324290650Shselasky 1325290650Shselaskyenum { 1326290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_CLAMP_TGT_RATE = 0x2, 1327290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_CLAMP_TGT_RATE_AFTER_TIME_INC = 0x4, 1328290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_TIME_RESET = 0x8, 1329290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_BYTE_RESET = 0x10, 1330290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_THRESHOLD = 0x20, 1331290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_MAX_RATE = 0x40, 1332290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_AI_RATE = 0x80, 1333290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_HAI_RATE = 0x100, 1334290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_MIN_DEC_FAC = 0x200, 1335290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_MIN_RATE = 0x400, 1336290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RATE_TO_SET_ON_FIRST_CNP = 0x800, 1337290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_DCE_TCP_G = 0x1000, 1338290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_DCE_TCP_RTT = 0x2000, 1339290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RATE_REDUCE_MONITOR_PERIOD = 0x4000, 1340290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_INITIAL_ALPHA_VALUE = 0x8000, 1341290650Shselasky}; 1342290650Shselasky 1343290650Shselaskystruct mlx5_ifc_field_select_r_roce_rp_bits { 1344290650Shselasky u8 field_select_r_roce_rp[0x20]; 1345290650Shselasky}; 1346290650Shselasky 1347290650Shselaskyenum { 1348290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4, 1349290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8, 1350290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10, 1351290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20, 1352290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40, 1353290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80, 1354290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100, 1355290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200, 1356290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400, 1357290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800, 1358290650Shselasky}; 1359290650Shselasky 1360290650Shselaskystruct mlx5_ifc_field_select_802_1qau_rp_bits { 1361290650Shselasky u8 field_select_8021qaurp[0x20]; 1362290650Shselasky}; 1363290650Shselasky 1364306233Shselaskystruct mlx5_ifc_pptb_reg_bits { 1365306233Shselasky u8 reserved_0[0x2]; 1366306233Shselasky u8 mm[0x2]; 1367306233Shselasky u8 reserved_1[0x4]; 1368306233Shselasky u8 local_port[0x8]; 1369306233Shselasky u8 reserved_2[0x6]; 1370306233Shselasky u8 cm[0x1]; 1371306233Shselasky u8 um[0x1]; 1372306233Shselasky u8 pm[0x8]; 1373306233Shselasky 1374306233Shselasky u8 prio7buff[0x4]; 1375306233Shselasky u8 prio6buff[0x4]; 1376306233Shselasky u8 prio5buff[0x4]; 1377306233Shselasky u8 prio4buff[0x4]; 1378306233Shselasky u8 prio3buff[0x4]; 1379306233Shselasky u8 prio2buff[0x4]; 1380306233Shselasky u8 prio1buff[0x4]; 1381306233Shselasky u8 prio0buff[0x4]; 1382306233Shselasky 1383306233Shselasky u8 pm_msb[0x8]; 1384306233Shselasky u8 reserved_3[0x10]; 1385306233Shselasky u8 ctrl_buff[0x4]; 1386306233Shselasky u8 untagged_buff[0x4]; 1387306233Shselasky}; 1388306233Shselasky 1389306233Shselaskystruct mlx5_ifc_dcbx_app_reg_bits { 1390306233Shselasky u8 reserved_0[0x8]; 1391306233Shselasky u8 port_number[0x8]; 1392306233Shselasky u8 reserved_1[0x10]; 1393306233Shselasky 1394306233Shselasky u8 reserved_2[0x1a]; 1395306233Shselasky u8 num_app_prio[0x6]; 1396306233Shselasky 1397306233Shselasky u8 reserved_3[0x40]; 1398306233Shselasky 1399306233Shselasky struct mlx5_ifc_application_prio_entry_bits app_prio[0]; 1400306233Shselasky}; 1401306233Shselasky 1402306233Shselaskystruct mlx5_ifc_dcbx_param_reg_bits { 1403306233Shselasky u8 dcbx_cee_cap[0x1]; 1404306233Shselasky u8 dcbx_ieee_cap[0x1]; 1405306233Shselasky u8 dcbx_standby_cap[0x1]; 1406306233Shselasky u8 reserved_0[0x5]; 1407306233Shselasky u8 port_number[0x8]; 1408306233Shselasky u8 reserved_1[0xa]; 1409306233Shselasky u8 max_application_table_size[0x6]; 1410306233Shselasky 1411306233Shselasky u8 reserved_2[0x15]; 1412306233Shselasky u8 version_oper[0x3]; 1413306233Shselasky u8 reserved_3[0x5]; 1414306233Shselasky u8 version_admin[0x3]; 1415306233Shselasky 1416306233Shselasky u8 willing_admin[0x1]; 1417306233Shselasky u8 reserved_4[0x3]; 1418306233Shselasky u8 pfc_cap_oper[0x4]; 1419306233Shselasky u8 reserved_5[0x4]; 1420306233Shselasky u8 pfc_cap_admin[0x4]; 1421306233Shselasky u8 reserved_6[0x4]; 1422306233Shselasky u8 num_of_tc_oper[0x4]; 1423306233Shselasky u8 reserved_7[0x4]; 1424306233Shselasky u8 num_of_tc_admin[0x4]; 1425306233Shselasky 1426306233Shselasky u8 remote_willing[0x1]; 1427306233Shselasky u8 reserved_8[0x3]; 1428306233Shselasky u8 remote_pfc_cap[0x4]; 1429306233Shselasky u8 reserved_9[0x14]; 1430306233Shselasky u8 remote_num_of_tc[0x4]; 1431306233Shselasky 1432306233Shselasky u8 reserved_10[0x18]; 1433306233Shselasky u8 error[0x8]; 1434306233Shselasky 1435306233Shselasky u8 reserved_11[0x160]; 1436306233Shselasky}; 1437306233Shselasky 1438308678Shselaskystruct mlx5_ifc_qhll_bits { 1439308678Shselasky u8 reserved_at_0[0x8]; 1440308678Shselasky u8 local_port[0x8]; 1441308678Shselasky u8 reserved_at_10[0x10]; 1442308678Shselasky 1443308678Shselasky u8 reserved_at_20[0x1b]; 1444308678Shselasky u8 hll_time[0x5]; 1445308678Shselasky 1446308678Shselasky u8 stall_en[0x1]; 1447308678Shselasky u8 reserved_at_41[0x1c]; 1448308678Shselasky u8 stall_cnt[0x3]; 1449308678Shselasky}; 1450308678Shselasky 1451306233Shselaskystruct mlx5_ifc_qetcr_reg_bits { 1452306233Shselasky u8 operation_type[0x2]; 1453306233Shselasky u8 cap_local_admin[0x1]; 1454306233Shselasky u8 cap_remote_admin[0x1]; 1455306233Shselasky u8 reserved_0[0x4]; 1456306233Shselasky u8 port_number[0x8]; 1457306233Shselasky u8 reserved_1[0x10]; 1458306233Shselasky 1459306233Shselasky u8 reserved_2[0x20]; 1460306233Shselasky 1461306233Shselasky u8 tc[8][0x40]; 1462306233Shselasky 1463306233Shselasky u8 global_configuration[0x40]; 1464306233Shselasky}; 1465306233Shselasky 1466290650Shselaskystruct mlx5_ifc_nodnic_ring_config_reg_bits { 1467290650Shselasky u8 queue_address_63_32[0x20]; 1468290650Shselasky 1469290650Shselasky u8 queue_address_31_12[0x14]; 1470290650Shselasky u8 reserved_0[0x6]; 1471290650Shselasky u8 log_size[0x6]; 1472290650Shselasky 1473290650Shselasky struct mlx5_ifc_nodnic_ring_doorbell_bits doorbell; 1474290650Shselasky 1475290650Shselasky u8 reserved_1[0x8]; 1476290650Shselasky u8 queue_number[0x18]; 1477290650Shselasky 1478290650Shselasky u8 q_key[0x20]; 1479290650Shselasky 1480290650Shselasky u8 reserved_2[0x10]; 1481290650Shselasky u8 pkey_index[0x10]; 1482290650Shselasky 1483290650Shselasky u8 reserved_3[0x40]; 1484290650Shselasky}; 1485290650Shselasky 1486290650Shselaskystruct mlx5_ifc_nodnic_cq_arming_word_bits { 1487290650Shselasky u8 reserved_0[0x8]; 1488290650Shselasky u8 cq_ci[0x10]; 1489290650Shselasky u8 reserved_1[0x8]; 1490290650Shselasky}; 1491290650Shselasky 1492290650Shselaskyenum { 1493290650Shselasky MLX5_NODNIC_EVENT_WORD_LINK_TYPE_INFINIBAND = 0x0, 1494290650Shselasky MLX5_NODNIC_EVENT_WORD_LINK_TYPE_ETHERNET = 0x1, 1495290650Shselasky}; 1496290650Shselasky 1497290650Shselaskyenum { 1498290650Shselasky MLX5_NODNIC_EVENT_WORD_PORT_STATE_DOWN = 0x0, 1499290650Shselasky MLX5_NODNIC_EVENT_WORD_PORT_STATE_INITIALIZE = 0x1, 1500290650Shselasky MLX5_NODNIC_EVENT_WORD_PORT_STATE_ARMED = 0x2, 1501290650Shselasky MLX5_NODNIC_EVENT_WORD_PORT_STATE_ACTIVE = 0x3, 1502290650Shselasky}; 1503290650Shselasky 1504290650Shselaskystruct mlx5_ifc_nodnic_event_word_bits { 1505290650Shselasky u8 driver_reset_needed[0x1]; 1506290650Shselasky u8 port_management_change_event[0x1]; 1507290650Shselasky u8 reserved_0[0x19]; 1508290650Shselasky u8 link_type[0x1]; 1509290650Shselasky u8 port_state[0x4]; 1510290650Shselasky}; 1511290650Shselasky 1512290650Shselaskystruct mlx5_ifc_nic_vport_change_event_bits { 1513290650Shselasky u8 reserved_0[0x10]; 1514290650Shselasky u8 vport_num[0x10]; 1515290650Shselasky 1516290650Shselasky u8 reserved_1[0xc0]; 1517290650Shselasky}; 1518290650Shselasky 1519290650Shselaskystruct mlx5_ifc_pages_req_event_bits { 1520290650Shselasky u8 reserved_0[0x10]; 1521290650Shselasky u8 function_id[0x10]; 1522290650Shselasky 1523290650Shselasky u8 num_pages[0x20]; 1524290650Shselasky 1525290650Shselasky u8 reserved_1[0xa0]; 1526290650Shselasky}; 1527290650Shselasky 1528290650Shselaskystruct mlx5_ifc_cmd_inter_comp_event_bits { 1529290650Shselasky u8 command_completion_vector[0x20]; 1530290650Shselasky 1531290650Shselasky u8 reserved_0[0xc0]; 1532290650Shselasky}; 1533290650Shselasky 1534290650Shselaskystruct mlx5_ifc_stall_vl_event_bits { 1535290650Shselasky u8 reserved_0[0x18]; 1536290650Shselasky u8 port_num[0x1]; 1537290650Shselasky u8 reserved_1[0x3]; 1538290650Shselasky u8 vl[0x4]; 1539290650Shselasky 1540290650Shselasky u8 reserved_2[0xa0]; 1541290650Shselasky}; 1542290650Shselasky 1543290650Shselaskystruct mlx5_ifc_db_bf_congestion_event_bits { 1544290650Shselasky u8 event_subtype[0x8]; 1545290650Shselasky u8 reserved_0[0x8]; 1546290650Shselasky u8 congestion_level[0x8]; 1547290650Shselasky u8 reserved_1[0x8]; 1548290650Shselasky 1549290650Shselasky u8 reserved_2[0xa0]; 1550290650Shselasky}; 1551290650Shselasky 1552290650Shselaskystruct mlx5_ifc_gpio_event_bits { 1553290650Shselasky u8 reserved_0[0x60]; 1554290650Shselasky 1555290650Shselasky u8 gpio_event_hi[0x20]; 1556290650Shselasky 1557290650Shselasky u8 gpio_event_lo[0x20]; 1558290650Shselasky 1559290650Shselasky u8 reserved_1[0x40]; 1560290650Shselasky}; 1561290650Shselasky 1562290650Shselaskystruct mlx5_ifc_port_state_change_event_bits { 1563290650Shselasky u8 reserved_0[0x40]; 1564290650Shselasky 1565290650Shselasky u8 port_num[0x4]; 1566290650Shselasky u8 reserved_1[0x1c]; 1567290650Shselasky 1568290650Shselasky u8 reserved_2[0x80]; 1569290650Shselasky}; 1570290650Shselasky 1571290650Shselaskystruct mlx5_ifc_dropped_packet_logged_bits { 1572290650Shselasky u8 reserved_0[0xe0]; 1573290650Shselasky}; 1574290650Shselasky 1575290650Shselaskyenum { 1576290650Shselasky MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1, 1577290650Shselasky MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2, 1578290650Shselasky}; 1579290650Shselasky 1580290650Shselaskystruct mlx5_ifc_cq_error_bits { 1581290650Shselasky u8 reserved_0[0x8]; 1582290650Shselasky u8 cqn[0x18]; 1583290650Shselasky 1584290650Shselasky u8 reserved_1[0x20]; 1585290650Shselasky 1586290650Shselasky u8 reserved_2[0x18]; 1587290650Shselasky u8 syndrome[0x8]; 1588290650Shselasky 1589290650Shselasky u8 reserved_3[0x80]; 1590290650Shselasky}; 1591290650Shselasky 1592290650Shselaskystruct mlx5_ifc_rdma_page_fault_event_bits { 1593290650Shselasky u8 bytes_commited[0x20]; 1594290650Shselasky 1595290650Shselasky u8 r_key[0x20]; 1596290650Shselasky 1597290650Shselasky u8 reserved_0[0x10]; 1598290650Shselasky u8 packet_len[0x10]; 1599290650Shselasky 1600290650Shselasky u8 rdma_op_len[0x20]; 1601290650Shselasky 1602290650Shselasky u8 rdma_va[0x40]; 1603290650Shselasky 1604290650Shselasky u8 reserved_1[0x5]; 1605290650Shselasky u8 rdma[0x1]; 1606290650Shselasky u8 write[0x1]; 1607290650Shselasky u8 requestor[0x1]; 1608290650Shselasky u8 qp_number[0x18]; 1609290650Shselasky}; 1610290650Shselasky 1611290650Shselaskystruct mlx5_ifc_wqe_associated_page_fault_event_bits { 1612290650Shselasky u8 bytes_committed[0x20]; 1613290650Shselasky 1614290650Shselasky u8 reserved_0[0x10]; 1615290650Shselasky u8 wqe_index[0x10]; 1616290650Shselasky 1617290650Shselasky u8 reserved_1[0x10]; 1618290650Shselasky u8 len[0x10]; 1619290650Shselasky 1620290650Shselasky u8 reserved_2[0x60]; 1621290650Shselasky 1622290650Shselasky u8 reserved_3[0x5]; 1623290650Shselasky u8 rdma[0x1]; 1624290650Shselasky u8 write_read[0x1]; 1625290650Shselasky u8 requestor[0x1]; 1626290650Shselasky u8 qpn[0x18]; 1627290650Shselasky}; 1628290650Shselasky 1629290650Shselaskyenum { 1630290650Shselasky MLX5_QP_EVENTS_TYPE_QP = 0x0, 1631290650Shselasky MLX5_QP_EVENTS_TYPE_RQ = 0x1, 1632290650Shselasky MLX5_QP_EVENTS_TYPE_SQ = 0x2, 1633290650Shselasky}; 1634290650Shselasky 1635290650Shselaskystruct mlx5_ifc_qp_events_bits { 1636290650Shselasky u8 reserved_0[0xa0]; 1637290650Shselasky 1638290650Shselasky u8 type[0x8]; 1639290650Shselasky u8 reserved_1[0x18]; 1640290650Shselasky 1641290650Shselasky u8 reserved_2[0x8]; 1642290650Shselasky u8 qpn_rqn_sqn[0x18]; 1643290650Shselasky}; 1644290650Shselasky 1645290650Shselaskystruct mlx5_ifc_dct_events_bits { 1646290650Shselasky u8 reserved_0[0xc0]; 1647290650Shselasky 1648290650Shselasky u8 reserved_1[0x8]; 1649290650Shselasky u8 dct_number[0x18]; 1650290650Shselasky}; 1651290650Shselasky 1652290650Shselaskystruct mlx5_ifc_comp_event_bits { 1653290650Shselasky u8 reserved_0[0xc0]; 1654290650Shselasky 1655290650Shselasky u8 reserved_1[0x8]; 1656290650Shselasky u8 cq_number[0x18]; 1657290650Shselasky}; 1658290650Shselasky 1659290650Shselaskystruct mlx5_ifc_fw_version_bits { 1660290650Shselasky u8 major[0x10]; 1661290650Shselasky u8 reserved_0[0x10]; 1662290650Shselasky 1663290650Shselasky u8 minor[0x10]; 1664290650Shselasky u8 subminor[0x10]; 1665290650Shselasky 1666290650Shselasky u8 second[0x8]; 1667290650Shselasky u8 minute[0x8]; 1668290650Shselasky u8 hour[0x8]; 1669290650Shselasky u8 reserved_1[0x8]; 1670290650Shselasky 1671290650Shselasky u8 year[0x10]; 1672290650Shselasky u8 month[0x8]; 1673290650Shselasky u8 day[0x8]; 1674290650Shselasky}; 1675290650Shselasky 1676290650Shselaskyenum { 1677290650Shselasky MLX5_QPC_STATE_RST = 0x0, 1678290650Shselasky MLX5_QPC_STATE_INIT = 0x1, 1679290650Shselasky MLX5_QPC_STATE_RTR = 0x2, 1680290650Shselasky MLX5_QPC_STATE_RTS = 0x3, 1681290650Shselasky MLX5_QPC_STATE_SQER = 0x4, 1682290650Shselasky MLX5_QPC_STATE_SQD = 0x5, 1683290650Shselasky MLX5_QPC_STATE_ERR = 0x6, 1684290650Shselasky MLX5_QPC_STATE_SUSPENDED = 0x9, 1685290650Shselasky}; 1686290650Shselasky 1687290650Shselaskyenum { 1688290650Shselasky MLX5_QPC_ST_RC = 0x0, 1689290650Shselasky MLX5_QPC_ST_UC = 0x1, 1690290650Shselasky MLX5_QPC_ST_UD = 0x2, 1691290650Shselasky MLX5_QPC_ST_XRC = 0x3, 1692290650Shselasky MLX5_QPC_ST_DCI = 0x5, 1693290650Shselasky MLX5_QPC_ST_QP0 = 0x7, 1694290650Shselasky MLX5_QPC_ST_QP1 = 0x8, 1695290650Shselasky MLX5_QPC_ST_RAW_DATAGRAM = 0x9, 1696290650Shselasky MLX5_QPC_ST_REG_UMR = 0xc, 1697290650Shselasky}; 1698290650Shselasky 1699290650Shselaskyenum { 1700290650Shselasky MLX5_QP_PM_ARMED = 0x0, 1701290650Shselasky MLX5_QP_PM_REARM = 0x1, 1702290650Shselasky MLX5_QPC_PM_STATE_RESERVED = 0x2, 1703290650Shselasky MLX5_QP_PM_MIGRATED = 0x3, 1704290650Shselasky}; 1705290650Shselasky 1706290650Shselaskyenum { 1707290650Shselasky MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0, 1708290650Shselasky MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1, 1709290650Shselasky}; 1710290650Shselasky 1711290650Shselaskyenum { 1712290650Shselasky MLX5_QPC_MTU_256_BYTES = 0x1, 1713290650Shselasky MLX5_QPC_MTU_512_BYTES = 0x2, 1714290650Shselasky MLX5_QPC_MTU_1K_BYTES = 0x3, 1715290650Shselasky MLX5_QPC_MTU_2K_BYTES = 0x4, 1716290650Shselasky MLX5_QPC_MTU_4K_BYTES = 0x5, 1717290650Shselasky MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7, 1718290650Shselasky}; 1719290650Shselasky 1720290650Shselaskyenum { 1721290650Shselasky MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1, 1722290650Shselasky MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2, 1723290650Shselasky MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3, 1724290650Shselasky MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4, 1725290650Shselasky MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5, 1726290650Shselasky MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6, 1727290650Shselasky MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7, 1728290650Shselasky MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8, 1729290650Shselasky}; 1730290650Shselasky 1731290650Shselaskyenum { 1732290650Shselasky MLX5_QPC_CS_REQ_DISABLE = 0x0, 1733290650Shselasky MLX5_QPC_CS_REQ_UP_TO_32B = 0x11, 1734290650Shselasky MLX5_QPC_CS_REQ_UP_TO_64B = 0x22, 1735290650Shselasky}; 1736290650Shselasky 1737290650Shselaskyenum { 1738290650Shselasky MLX5_QPC_CS_RES_DISABLE = 0x0, 1739290650Shselasky MLX5_QPC_CS_RES_UP_TO_32B = 0x1, 1740290650Shselasky MLX5_QPC_CS_RES_UP_TO_64B = 0x2, 1741290650Shselasky}; 1742290650Shselasky 1743290650Shselaskystruct mlx5_ifc_qpc_bits { 1744290650Shselasky u8 state[0x4]; 1745290650Shselasky u8 reserved_0[0x4]; 1746290650Shselasky u8 st[0x8]; 1747290650Shselasky u8 reserved_1[0x3]; 1748290650Shselasky u8 pm_state[0x2]; 1749290650Shselasky u8 reserved_2[0x7]; 1750290650Shselasky u8 end_padding_mode[0x2]; 1751290650Shselasky u8 reserved_3[0x2]; 1752290650Shselasky 1753290650Shselasky u8 wq_signature[0x1]; 1754290650Shselasky u8 block_lb_mc[0x1]; 1755290650Shselasky u8 atomic_like_write_en[0x1]; 1756290650Shselasky u8 latency_sensitive[0x1]; 1757290650Shselasky u8 reserved_4[0x1]; 1758290650Shselasky u8 drain_sigerr[0x1]; 1759290650Shselasky u8 reserved_5[0x2]; 1760290650Shselasky u8 pd[0x18]; 1761290650Shselasky 1762290650Shselasky u8 mtu[0x3]; 1763290650Shselasky u8 log_msg_max[0x5]; 1764290650Shselasky u8 reserved_6[0x1]; 1765290650Shselasky u8 log_rq_size[0x4]; 1766290650Shselasky u8 log_rq_stride[0x3]; 1767290650Shselasky u8 no_sq[0x1]; 1768290650Shselasky u8 log_sq_size[0x4]; 1769290650Shselasky u8 reserved_7[0x6]; 1770290650Shselasky u8 rlky[0x1]; 1771306233Shselasky u8 ulp_stateless_offload_mode[0x4]; 1772290650Shselasky 1773290650Shselasky u8 counter_set_id[0x8]; 1774290650Shselasky u8 uar_page[0x18]; 1775290650Shselasky 1776306233Shselasky u8 reserved_8[0x8]; 1777290650Shselasky u8 user_index[0x18]; 1778290650Shselasky 1779306233Shselasky u8 reserved_9[0x3]; 1780290650Shselasky u8 log_page_size[0x5]; 1781290650Shselasky u8 remote_qpn[0x18]; 1782290650Shselasky 1783290650Shselasky struct mlx5_ifc_ads_bits primary_address_path; 1784290650Shselasky 1785290650Shselasky struct mlx5_ifc_ads_bits secondary_address_path; 1786290650Shselasky 1787290650Shselasky u8 log_ack_req_freq[0x4]; 1788306233Shselasky u8 reserved_10[0x4]; 1789290650Shselasky u8 log_sra_max[0x3]; 1790306233Shselasky u8 reserved_11[0x2]; 1791290650Shselasky u8 retry_count[0x3]; 1792290650Shselasky u8 rnr_retry[0x3]; 1793306233Shselasky u8 reserved_12[0x1]; 1794290650Shselasky u8 fre[0x1]; 1795290650Shselasky u8 cur_rnr_retry[0x3]; 1796290650Shselasky u8 cur_retry_count[0x3]; 1797306233Shselasky u8 reserved_13[0x5]; 1798290650Shselasky 1799306233Shselasky u8 reserved_14[0x20]; 1800290650Shselasky 1801306233Shselasky u8 reserved_15[0x8]; 1802290650Shselasky u8 next_send_psn[0x18]; 1803290650Shselasky 1804306233Shselasky u8 reserved_16[0x8]; 1805290650Shselasky u8 cqn_snd[0x18]; 1806290650Shselasky 1807306233Shselasky u8 reserved_17[0x40]; 1808290650Shselasky 1809306233Shselasky u8 reserved_18[0x8]; 1810290650Shselasky u8 last_acked_psn[0x18]; 1811290650Shselasky 1812306233Shselasky u8 reserved_19[0x8]; 1813290650Shselasky u8 ssn[0x18]; 1814290650Shselasky 1815306233Shselasky u8 reserved_20[0x8]; 1816290650Shselasky u8 log_rra_max[0x3]; 1817306233Shselasky u8 reserved_21[0x1]; 1818290650Shselasky u8 atomic_mode[0x4]; 1819290650Shselasky u8 rre[0x1]; 1820290650Shselasky u8 rwe[0x1]; 1821290650Shselasky u8 rae[0x1]; 1822306233Shselasky u8 reserved_22[0x1]; 1823290650Shselasky u8 page_offset[0x6]; 1824306233Shselasky u8 reserved_23[0x3]; 1825290650Shselasky u8 cd_slave_receive[0x1]; 1826290650Shselasky u8 cd_slave_send[0x1]; 1827290650Shselasky u8 cd_master[0x1]; 1828290650Shselasky 1829306233Shselasky u8 reserved_24[0x3]; 1830290650Shselasky u8 min_rnr_nak[0x5]; 1831290650Shselasky u8 next_rcv_psn[0x18]; 1832290650Shselasky 1833306233Shselasky u8 reserved_25[0x8]; 1834290650Shselasky u8 xrcd[0x18]; 1835290650Shselasky 1836306233Shselasky u8 reserved_26[0x8]; 1837290650Shselasky u8 cqn_rcv[0x18]; 1838290650Shselasky 1839290650Shselasky u8 dbr_addr[0x40]; 1840290650Shselasky 1841290650Shselasky u8 q_key[0x20]; 1842290650Shselasky 1843306233Shselasky u8 reserved_27[0x5]; 1844290650Shselasky u8 rq_type[0x3]; 1845290650Shselasky u8 srqn_rmpn[0x18]; 1846290650Shselasky 1847306233Shselasky u8 reserved_28[0x8]; 1848290650Shselasky u8 rmsn[0x18]; 1849290650Shselasky 1850290650Shselasky u8 hw_sq_wqebb_counter[0x10]; 1851290650Shselasky u8 sw_sq_wqebb_counter[0x10]; 1852290650Shselasky 1853290650Shselasky u8 hw_rq_counter[0x20]; 1854290650Shselasky 1855290650Shselasky u8 sw_rq_counter[0x20]; 1856290650Shselasky 1857306233Shselasky u8 reserved_29[0x20]; 1858290650Shselasky 1859306233Shselasky u8 reserved_30[0xf]; 1860290650Shselasky u8 cgs[0x1]; 1861290650Shselasky u8 cs_req[0x8]; 1862290650Shselasky u8 cs_res[0x8]; 1863290650Shselasky 1864290650Shselasky u8 dc_access_key[0x40]; 1865290650Shselasky 1866290650Shselasky u8 rdma_active[0x1]; 1867290650Shselasky u8 comm_est[0x1]; 1868290650Shselasky u8 suspended[0x1]; 1869306233Shselasky u8 reserved_31[0x5]; 1870290650Shselasky u8 send_msg_psn[0x18]; 1871290650Shselasky 1872306233Shselasky u8 reserved_32[0x8]; 1873290650Shselasky u8 rcv_msg_psn[0x18]; 1874290650Shselasky 1875290650Shselasky u8 rdma_va[0x40]; 1876290650Shselasky 1877290650Shselasky u8 rdma_key[0x20]; 1878290650Shselasky 1879306233Shselasky u8 reserved_33[0x20]; 1880290650Shselasky}; 1881290650Shselasky 1882290650Shselaskystruct mlx5_ifc_roce_addr_layout_bits { 1883290650Shselasky u8 source_l3_address[16][0x8]; 1884290650Shselasky 1885290650Shselasky u8 reserved_0[0x3]; 1886290650Shselasky u8 vlan_valid[0x1]; 1887290650Shselasky u8 vlan_id[0xc]; 1888290650Shselasky u8 source_mac_47_32[0x10]; 1889290650Shselasky 1890290650Shselasky u8 source_mac_31_0[0x20]; 1891290650Shselasky 1892290650Shselasky u8 reserved_1[0x14]; 1893290650Shselasky u8 roce_l3_type[0x4]; 1894290650Shselasky u8 roce_version[0x8]; 1895290650Shselasky 1896290650Shselasky u8 reserved_2[0x20]; 1897290650Shselasky}; 1898290650Shselasky 1899290650Shselaskystruct mlx5_ifc_rdbc_bits { 1900290650Shselasky u8 reserved_0[0x1c]; 1901290650Shselasky u8 type[0x4]; 1902290650Shselasky 1903290650Shselasky u8 reserved_1[0x20]; 1904290650Shselasky 1905290650Shselasky u8 reserved_2[0x8]; 1906290650Shselasky u8 psn[0x18]; 1907290650Shselasky 1908290650Shselasky u8 rkey[0x20]; 1909290650Shselasky 1910290650Shselasky u8 address[0x40]; 1911290650Shselasky 1912290650Shselasky u8 byte_count[0x20]; 1913290650Shselasky 1914290650Shselasky u8 reserved_3[0x20]; 1915290650Shselasky 1916290650Shselasky u8 atomic_resp[32][0x8]; 1917290650Shselasky}; 1918290650Shselasky 1919290650Shselaskyenum { 1920290650Shselasky MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1, 1921290650Shselasky MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2, 1922290650Shselasky MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4, 1923290650Shselasky MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8, 1924290650Shselasky}; 1925290650Shselasky 1926290650Shselaskystruct mlx5_ifc_flow_context_bits { 1927290650Shselasky u8 reserved_0[0x20]; 1928290650Shselasky 1929290650Shselasky u8 group_id[0x20]; 1930290650Shselasky 1931290650Shselasky u8 reserved_1[0x8]; 1932290650Shselasky u8 flow_tag[0x18]; 1933290650Shselasky 1934290650Shselasky u8 reserved_2[0x10]; 1935290650Shselasky u8 action[0x10]; 1936290650Shselasky 1937290650Shselasky u8 reserved_3[0x8]; 1938290650Shselasky u8 destination_list_size[0x18]; 1939290650Shselasky 1940290650Shselasky u8 reserved_4[0x8]; 1941290650Shselasky u8 flow_counter_list_size[0x18]; 1942290650Shselasky 1943290650Shselasky u8 reserved_5[0x140]; 1944290650Shselasky 1945290650Shselasky struct mlx5_ifc_fte_match_param_bits match_value; 1946290650Shselasky 1947290650Shselasky u8 reserved_6[0x600]; 1948290650Shselasky 1949290650Shselasky union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0]; 1950290650Shselasky}; 1951290650Shselasky 1952290650Shselaskyenum { 1953290650Shselasky MLX5_XRC_SRQC_STATE_GOOD = 0x0, 1954290650Shselasky MLX5_XRC_SRQC_STATE_ERROR = 0x1, 1955290650Shselasky}; 1956290650Shselasky 1957290650Shselaskystruct mlx5_ifc_xrc_srqc_bits { 1958290650Shselasky u8 state[0x4]; 1959290650Shselasky u8 log_xrc_srq_size[0x4]; 1960290650Shselasky u8 reserved_0[0x18]; 1961290650Shselasky 1962290650Shselasky u8 wq_signature[0x1]; 1963290650Shselasky u8 cont_srq[0x1]; 1964290650Shselasky u8 reserved_1[0x1]; 1965290650Shselasky u8 rlky[0x1]; 1966290650Shselasky u8 basic_cyclic_rcv_wqe[0x1]; 1967290650Shselasky u8 log_rq_stride[0x3]; 1968290650Shselasky u8 xrcd[0x18]; 1969290650Shselasky 1970290650Shselasky u8 page_offset[0x6]; 1971290650Shselasky u8 reserved_2[0x2]; 1972290650Shselasky u8 cqn[0x18]; 1973290650Shselasky 1974290650Shselasky u8 reserved_3[0x20]; 1975290650Shselasky 1976290650Shselasky u8 reserved_4[0x2]; 1977290650Shselasky u8 log_page_size[0x6]; 1978290650Shselasky u8 user_index[0x18]; 1979290650Shselasky 1980290650Shselasky u8 reserved_5[0x20]; 1981290650Shselasky 1982290650Shselasky u8 reserved_6[0x8]; 1983290650Shselasky u8 pd[0x18]; 1984290650Shselasky 1985290650Shselasky u8 lwm[0x10]; 1986290650Shselasky u8 wqe_cnt[0x10]; 1987290650Shselasky 1988290650Shselasky u8 reserved_7[0x40]; 1989290650Shselasky 1990290650Shselasky u8 db_record_addr_h[0x20]; 1991290650Shselasky 1992290650Shselasky u8 db_record_addr_l[0x1e]; 1993290650Shselasky u8 reserved_8[0x2]; 1994290650Shselasky 1995290650Shselasky u8 reserved_9[0x80]; 1996290650Shselasky}; 1997290650Shselasky 1998290650Shselaskystruct mlx5_ifc_traffic_counter_bits { 1999290650Shselasky u8 packets[0x40]; 2000290650Shselasky 2001290650Shselasky u8 octets[0x40]; 2002290650Shselasky}; 2003290650Shselasky 2004290650Shselaskystruct mlx5_ifc_tisc_bits { 2005290650Shselasky u8 reserved_0[0xc]; 2006290650Shselasky u8 prio[0x4]; 2007290650Shselasky u8 reserved_1[0x10]; 2008290650Shselasky 2009290650Shselasky u8 reserved_2[0x100]; 2010290650Shselasky 2011290650Shselasky u8 reserved_3[0x8]; 2012290650Shselasky u8 transport_domain[0x18]; 2013290650Shselasky 2014306233Shselasky u8 reserved_4[0x8]; 2015306233Shselasky u8 underlay_qpn[0x18]; 2016306233Shselasky 2017306233Shselasky u8 reserved_5[0x3a0]; 2018290650Shselasky}; 2019290650Shselasky 2020290650Shselaskyenum { 2021290650Shselasky MLX5_TIRC_DISP_TYPE_DIRECT = 0x0, 2022290650Shselasky MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1, 2023290650Shselasky}; 2024290650Shselasky 2025290650Shselaskyenum { 2026290650Shselasky MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1, 2027290650Shselasky MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2, 2028290650Shselasky}; 2029290650Shselasky 2030290650Shselaskyenum { 2031290650Shselasky MLX5_TIRC_RX_HASH_FN_HASH_NONE = 0x0, 2032290650Shselasky MLX5_TIRC_RX_HASH_FN_HASH_INVERTED_XOR8 = 0x1, 2033290650Shselasky MLX5_TIRC_RX_HASH_FN_HASH_TOEPLITZ = 0x2, 2034290650Shselasky}; 2035290650Shselasky 2036290650Shselaskyenum { 2037290650Shselasky MLX5_TIRC_SELF_LB_EN_ENABLE_UNICAST = 0x1, 2038290650Shselasky MLX5_TIRC_SELF_LB_EN_ENABLE_MULTICAST = 0x2, 2039290650Shselasky}; 2040290650Shselasky 2041290650Shselaskystruct mlx5_ifc_tirc_bits { 2042290650Shselasky u8 reserved_0[0x20]; 2043290650Shselasky 2044290650Shselasky u8 disp_type[0x4]; 2045290650Shselasky u8 reserved_1[0x1c]; 2046290650Shselasky 2047290650Shselasky u8 reserved_2[0x40]; 2048290650Shselasky 2049290650Shselasky u8 reserved_3[0x4]; 2050290650Shselasky u8 lro_timeout_period_usecs[0x10]; 2051290650Shselasky u8 lro_enable_mask[0x4]; 2052290650Shselasky u8 lro_max_msg_sz[0x8]; 2053290650Shselasky 2054290650Shselasky u8 reserved_4[0x40]; 2055290650Shselasky 2056290650Shselasky u8 reserved_5[0x8]; 2057290650Shselasky u8 inline_rqn[0x18]; 2058290650Shselasky 2059290650Shselasky u8 rx_hash_symmetric[0x1]; 2060290650Shselasky u8 reserved_6[0x1]; 2061290650Shselasky u8 tunneled_offload_en[0x1]; 2062290650Shselasky u8 reserved_7[0x5]; 2063290650Shselasky u8 indirect_table[0x18]; 2064290650Shselasky 2065290650Shselasky u8 rx_hash_fn[0x4]; 2066290650Shselasky u8 reserved_8[0x2]; 2067290650Shselasky u8 self_lb_en[0x2]; 2068290650Shselasky u8 transport_domain[0x18]; 2069290650Shselasky 2070290650Shselasky u8 rx_hash_toeplitz_key[10][0x20]; 2071290650Shselasky 2072290650Shselasky struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer; 2073290650Shselasky 2074290650Shselasky struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner; 2075290650Shselasky 2076290650Shselasky u8 reserved_9[0x4c0]; 2077290650Shselasky}; 2078290650Shselasky 2079290650Shselaskyenum { 2080290650Shselasky MLX5_SRQC_STATE_GOOD = 0x0, 2081290650Shselasky MLX5_SRQC_STATE_ERROR = 0x1, 2082290650Shselasky}; 2083290650Shselasky 2084290650Shselaskystruct mlx5_ifc_srqc_bits { 2085290650Shselasky u8 state[0x4]; 2086290650Shselasky u8 log_srq_size[0x4]; 2087290650Shselasky u8 reserved_0[0x18]; 2088290650Shselasky 2089290650Shselasky u8 wq_signature[0x1]; 2090290650Shselasky u8 cont_srq[0x1]; 2091290650Shselasky u8 reserved_1[0x1]; 2092290650Shselasky u8 rlky[0x1]; 2093290650Shselasky u8 reserved_2[0x1]; 2094290650Shselasky u8 log_rq_stride[0x3]; 2095290650Shselasky u8 xrcd[0x18]; 2096290650Shselasky 2097290650Shselasky u8 page_offset[0x6]; 2098290650Shselasky u8 reserved_3[0x2]; 2099290650Shselasky u8 cqn[0x18]; 2100290650Shselasky 2101290650Shselasky u8 reserved_4[0x20]; 2102290650Shselasky 2103290650Shselasky u8 reserved_5[0x2]; 2104290650Shselasky u8 log_page_size[0x6]; 2105290650Shselasky u8 reserved_6[0x18]; 2106290650Shselasky 2107290650Shselasky u8 reserved_7[0x20]; 2108290650Shselasky 2109290650Shselasky u8 reserved_8[0x8]; 2110290650Shselasky u8 pd[0x18]; 2111290650Shselasky 2112290650Shselasky u8 lwm[0x10]; 2113290650Shselasky u8 wqe_cnt[0x10]; 2114290650Shselasky 2115290650Shselasky u8 reserved_9[0x40]; 2116290650Shselasky 2117290650Shselasky u8 db_record_addr_h[0x20]; 2118290650Shselasky 2119290650Shselasky u8 db_record_addr_l[0x1e]; 2120290650Shselasky u8 reserved_10[0x2]; 2121290650Shselasky 2122290650Shselasky u8 reserved_11[0x80]; 2123290650Shselasky}; 2124290650Shselasky 2125290650Shselaskyenum { 2126290650Shselasky MLX5_SQC_STATE_RST = 0x0, 2127290650Shselasky MLX5_SQC_STATE_RDY = 0x1, 2128290650Shselasky MLX5_SQC_STATE_ERR = 0x3, 2129290650Shselasky}; 2130290650Shselasky 2131290650Shselaskystruct mlx5_ifc_sqc_bits { 2132308678Shselasky u8 rlkey[0x1]; 2133290650Shselasky u8 cd_master[0x1]; 2134290650Shselasky u8 fre[0x1]; 2135290650Shselasky u8 flush_in_error_en[0x1]; 2136290650Shselasky u8 allow_multi_pkt_send_wqe[0x1]; 2137290650Shselasky u8 min_wqe_inline_mode[0x3]; 2138290650Shselasky u8 state[0x4]; 2139308678Shselasky u8 reg_umr[0x1]; 2140308678Shselasky u8 allow_swp[0x1]; 2141308678Shselasky u8 reserved_0[0x12]; 2142290650Shselasky 2143290650Shselasky u8 reserved_1[0x8]; 2144290650Shselasky u8 user_index[0x18]; 2145290650Shselasky 2146290650Shselasky u8 reserved_2[0x8]; 2147290650Shselasky u8 cqn[0x18]; 2148290650Shselasky 2149308678Shselasky u8 reserved_3[0x80]; 2150308678Shselasky 2151308678Shselasky u8 qos_para_vport_number[0x10]; 2152306233Shselasky u8 packet_pacing_rate_limit_index[0x10]; 2153290650Shselasky 2154290650Shselasky u8 tis_lst_sz[0x10]; 2155290650Shselasky u8 reserved_4[0x10]; 2156290650Shselasky 2157290650Shselasky u8 reserved_5[0x40]; 2158290650Shselasky 2159290650Shselasky u8 reserved_6[0x8]; 2160290650Shselasky u8 tis_num_0[0x18]; 2161290650Shselasky 2162290650Shselasky struct mlx5_ifc_wq_bits wq; 2163290650Shselasky}; 2164290650Shselasky 2165308678Shselaskyenum { 2166308678Shselasky MLX5_TSAR_TYPE_DWRR = 0, 2167308678Shselasky MLX5_TSAR_TYPE_ROUND_ROUBIN = 1, 2168308678Shselasky MLX5_TSAR_TYPE_ETS = 2 2169308678Shselasky}; 2170308678Shselasky 2171308678Shselaskystruct mlx5_ifc_tsar_element_attributes_bits { 2172308678Shselasky u8 reserved_0[0x8]; 2173308678Shselasky u8 tsar_type[0x8]; 2174308678Shselasky u8 reserved_1[0x10]; 2175308678Shselasky}; 2176308678Shselasky 2177308678Shselaskystruct mlx5_ifc_vport_element_attributes_bits { 2178308678Shselasky u8 reserved_0[0x10]; 2179308678Shselasky u8 vport_number[0x10]; 2180308678Shselasky}; 2181308678Shselasky 2182308678Shselaskystruct mlx5_ifc_vport_tc_element_attributes_bits { 2183308678Shselasky u8 traffic_class[0x10]; 2184308678Shselasky u8 vport_number[0x10]; 2185308678Shselasky}; 2186308678Shselasky 2187308678Shselaskystruct mlx5_ifc_para_vport_tc_element_attributes_bits { 2188308678Shselasky u8 reserved_0[0x0C]; 2189308678Shselasky u8 traffic_class[0x04]; 2190308678Shselasky u8 qos_para_vport_number[0x10]; 2191308678Shselasky}; 2192308678Shselasky 2193308678Shselaskyenum { 2194308678Shselasky MLX5_SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0, 2195308678Shselasky MLX5_SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1, 2196308678Shselasky MLX5_SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2, 2197308678Shselasky MLX5_SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3, 2198308678Shselasky}; 2199308678Shselasky 2200308678Shselaskystruct mlx5_ifc_scheduling_context_bits { 2201308678Shselasky u8 element_type[0x8]; 2202308678Shselasky u8 reserved_at_8[0x18]; 2203308678Shselasky 2204308678Shselasky u8 element_attributes[0x20]; 2205308678Shselasky 2206308678Shselasky u8 parent_element_id[0x20]; 2207308678Shselasky 2208308678Shselasky u8 reserved_at_60[0x40]; 2209308678Shselasky 2210308678Shselasky u8 bw_share[0x20]; 2211308678Shselasky 2212308678Shselasky u8 max_average_bw[0x20]; 2213308678Shselasky 2214308678Shselasky u8 reserved_at_e0[0x120]; 2215308678Shselasky}; 2216308678Shselasky 2217290650Shselaskystruct mlx5_ifc_rqtc_bits { 2218290650Shselasky u8 reserved_0[0xa0]; 2219290650Shselasky 2220290650Shselasky u8 reserved_1[0x10]; 2221290650Shselasky u8 rqt_max_size[0x10]; 2222290650Shselasky 2223290650Shselasky u8 reserved_2[0x10]; 2224290650Shselasky u8 rqt_actual_size[0x10]; 2225290650Shselasky 2226290650Shselasky u8 reserved_3[0x6a0]; 2227290650Shselasky 2228290650Shselasky struct mlx5_ifc_rq_num_bits rq_num[0]; 2229290650Shselasky}; 2230290650Shselasky 2231290650Shselaskyenum { 2232290650Shselasky MLX5_RQC_RQ_TYPE_MEMORY_RQ_INLINE = 0x0, 2233290650Shselasky MLX5_RQC_RQ_TYPE_MEMORY_RQ_RMP = 0x1, 2234290650Shselasky}; 2235290650Shselasky 2236290650Shselaskyenum { 2237290650Shselasky MLX5_RQC_STATE_RST = 0x0, 2238290650Shselasky MLX5_RQC_STATE_RDY = 0x1, 2239290650Shselasky MLX5_RQC_STATE_ERR = 0x3, 2240290650Shselasky}; 2241290650Shselasky 2242290650Shselaskystruct mlx5_ifc_rqc_bits { 2243290650Shselasky u8 rlky[0x1]; 2244290650Shselasky u8 reserved_0[0x2]; 2245290650Shselasky u8 vlan_strip_disable[0x1]; 2246290650Shselasky u8 mem_rq_type[0x4]; 2247290650Shselasky u8 state[0x4]; 2248290650Shselasky u8 reserved_1[0x1]; 2249290650Shselasky u8 flush_in_error_en[0x1]; 2250290650Shselasky u8 reserved_2[0x12]; 2251290650Shselasky 2252290650Shselasky u8 reserved_3[0x8]; 2253290650Shselasky u8 user_index[0x18]; 2254290650Shselasky 2255290650Shselasky u8 reserved_4[0x8]; 2256290650Shselasky u8 cqn[0x18]; 2257290650Shselasky 2258290650Shselasky u8 counter_set_id[0x8]; 2259290650Shselasky u8 reserved_5[0x18]; 2260290650Shselasky 2261290650Shselasky u8 reserved_6[0x8]; 2262290650Shselasky u8 rmpn[0x18]; 2263290650Shselasky 2264290650Shselasky u8 reserved_7[0xe0]; 2265290650Shselasky 2266290650Shselasky struct mlx5_ifc_wq_bits wq; 2267290650Shselasky}; 2268290650Shselasky 2269290650Shselaskyenum { 2270290650Shselasky MLX5_RMPC_STATE_RDY = 0x1, 2271290650Shselasky MLX5_RMPC_STATE_ERR = 0x3, 2272290650Shselasky}; 2273290650Shselasky 2274290650Shselaskystruct mlx5_ifc_rmpc_bits { 2275290650Shselasky u8 reserved_0[0x8]; 2276290650Shselasky u8 state[0x4]; 2277290650Shselasky u8 reserved_1[0x14]; 2278290650Shselasky 2279290650Shselasky u8 basic_cyclic_rcv_wqe[0x1]; 2280290650Shselasky u8 reserved_2[0x1f]; 2281290650Shselasky 2282290650Shselasky u8 reserved_3[0x140]; 2283290650Shselasky 2284290650Shselasky struct mlx5_ifc_wq_bits wq; 2285290650Shselasky}; 2286290650Shselasky 2287290650Shselaskyenum { 2288290650Shselasky MLX5_NIC_VPORT_CONTEXT_ALLOWED_LIST_TYPE_CURRENT_UC_MAC_ADDRESS = 0x0, 2289290650Shselasky MLX5_NIC_VPORT_CONTEXT_ALLOWED_LIST_TYPE_CURRENT_MC_MAC_ADDRESS = 0x1, 2290290650Shselasky MLX5_NIC_VPORT_CONTEXT_ALLOWED_LIST_TYPE_VLAN_LIST = 0x2, 2291290650Shselasky}; 2292290650Shselasky 2293290650Shselaskystruct mlx5_ifc_nic_vport_context_bits { 2294290650Shselasky u8 reserved_0[0x5]; 2295290650Shselasky u8 min_wqe_inline_mode[0x3]; 2296290650Shselasky u8 reserved_1[0x17]; 2297290650Shselasky u8 roce_en[0x1]; 2298290650Shselasky 2299290650Shselasky u8 arm_change_event[0x1]; 2300290650Shselasky u8 reserved_2[0x1a]; 2301290650Shselasky u8 event_on_mtu[0x1]; 2302290650Shselasky u8 event_on_promisc_change[0x1]; 2303290650Shselasky u8 event_on_vlan_change[0x1]; 2304290650Shselasky u8 event_on_mc_address_change[0x1]; 2305290650Shselasky u8 event_on_uc_address_change[0x1]; 2306290650Shselasky 2307290650Shselasky u8 reserved_3[0xe0]; 2308290650Shselasky 2309290650Shselasky u8 reserved_4[0x10]; 2310290650Shselasky u8 mtu[0x10]; 2311290650Shselasky 2312290650Shselasky u8 system_image_guid[0x40]; 2313290650Shselasky 2314290650Shselasky u8 port_guid[0x40]; 2315290650Shselasky 2316290650Shselasky u8 node_guid[0x40]; 2317290650Shselasky 2318290650Shselasky u8 reserved_5[0x140]; 2319290650Shselasky 2320290650Shselasky u8 qkey_violation_counter[0x10]; 2321290650Shselasky u8 reserved_6[0x10]; 2322290650Shselasky 2323290650Shselasky u8 reserved_7[0x420]; 2324290650Shselasky 2325290650Shselasky u8 promisc_uc[0x1]; 2326290650Shselasky u8 promisc_mc[0x1]; 2327290650Shselasky u8 promisc_all[0x1]; 2328290650Shselasky u8 reserved_8[0x2]; 2329290650Shselasky u8 allowed_list_type[0x3]; 2330290650Shselasky u8 reserved_9[0xc]; 2331290650Shselasky u8 allowed_list_size[0xc]; 2332290650Shselasky 2333290650Shselasky struct mlx5_ifc_mac_address_layout_bits permanent_address; 2334290650Shselasky 2335290650Shselasky u8 reserved_10[0x20]; 2336290650Shselasky 2337290650Shselasky u8 current_uc_mac_address[0][0x40]; 2338290650Shselasky}; 2339290650Shselasky 2340290650Shselaskyenum { 2341290650Shselasky MLX5_ACCESS_MODE_PA = 0x0, 2342290650Shselasky MLX5_ACCESS_MODE_MTT = 0x1, 2343290650Shselasky MLX5_ACCESS_MODE_KLM = 0x2, 2344290650Shselasky}; 2345290650Shselasky 2346290650Shselaskystruct mlx5_ifc_mkc_bits { 2347290650Shselasky u8 reserved_0[0x1]; 2348290650Shselasky u8 free[0x1]; 2349290650Shselasky u8 reserved_1[0xd]; 2350290650Shselasky u8 small_fence_on_rdma_read_response[0x1]; 2351290650Shselasky u8 umr_en[0x1]; 2352290650Shselasky u8 a[0x1]; 2353290650Shselasky u8 rw[0x1]; 2354290650Shselasky u8 rr[0x1]; 2355290650Shselasky u8 lw[0x1]; 2356290650Shselasky u8 lr[0x1]; 2357290650Shselasky u8 access_mode[0x2]; 2358290650Shselasky u8 reserved_2[0x8]; 2359290650Shselasky 2360290650Shselasky u8 qpn[0x18]; 2361290650Shselasky u8 mkey_7_0[0x8]; 2362290650Shselasky 2363290650Shselasky u8 reserved_3[0x20]; 2364290650Shselasky 2365290650Shselasky u8 length64[0x1]; 2366290650Shselasky u8 bsf_en[0x1]; 2367290650Shselasky u8 sync_umr[0x1]; 2368290650Shselasky u8 reserved_4[0x2]; 2369290650Shselasky u8 expected_sigerr_count[0x1]; 2370290650Shselasky u8 reserved_5[0x1]; 2371290650Shselasky u8 en_rinval[0x1]; 2372290650Shselasky u8 pd[0x18]; 2373290650Shselasky 2374290650Shselasky u8 start_addr[0x40]; 2375290650Shselasky 2376290650Shselasky u8 len[0x40]; 2377290650Shselasky 2378290650Shselasky u8 bsf_octword_size[0x20]; 2379290650Shselasky 2380290650Shselasky u8 reserved_6[0x80]; 2381290650Shselasky 2382290650Shselasky u8 translations_octword_size[0x20]; 2383290650Shselasky 2384290650Shselasky u8 reserved_7[0x1b]; 2385290650Shselasky u8 log_page_size[0x5]; 2386290650Shselasky 2387290650Shselasky u8 reserved_8[0x20]; 2388290650Shselasky}; 2389290650Shselasky 2390290650Shselaskystruct mlx5_ifc_pkey_bits { 2391290650Shselasky u8 reserved_0[0x10]; 2392290650Shselasky u8 pkey[0x10]; 2393290650Shselasky}; 2394290650Shselasky 2395290650Shselaskystruct mlx5_ifc_array128_auto_bits { 2396290650Shselasky u8 array128_auto[16][0x8]; 2397290650Shselasky}; 2398290650Shselasky 2399290650Shselaskyenum { 2400290650Shselasky MLX5_HCA_VPORT_CONTEXT_FIELD_SELECT_PORT_GUID = 0x0, 2401290650Shselasky MLX5_HCA_VPORT_CONTEXT_FIELD_SELECT_NODE_GUID = 0x1, 2402290650Shselasky MLX5_HCA_VPORT_CONTEXT_FIELD_SELECT_VPORT_STATE_POLICY = 0x2, 2403290650Shselasky}; 2404290650Shselasky 2405290650Shselaskyenum { 2406290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_SLEEP = 0x1, 2407290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_POLLING = 0x2, 2408290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_DISABLED = 0x3, 2409290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_PORTCONFIGURATIONTRAINING = 0x4, 2410290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_LINKUP = 0x5, 2411290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_LINKERRORRECOVERY = 0x6, 2412290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_PHYTEST = 0x7, 2413290650Shselasky}; 2414290650Shselasky 2415290650Shselaskyenum { 2416290650Shselasky MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_POLICY_DOWN = 0x0, 2417290650Shselasky MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_POLICY_UP = 0x1, 2418290650Shselasky MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_POLICY_FOLLOW = 0x2, 2419290650Shselasky}; 2420290650Shselasky 2421290650Shselaskyenum { 2422290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_STATE_DOWN = 0x1, 2423290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_STATE_INIT = 0x2, 2424290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_STATE_ARM = 0x3, 2425290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_STATE_ACTIVE = 0x4, 2426290650Shselasky}; 2427290650Shselasky 2428290650Shselaskyenum { 2429290650Shselasky MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_DOWN = 0x1, 2430290650Shselasky MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_INIT = 0x2, 2431290650Shselasky MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_ARM = 0x3, 2432290650Shselasky MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_ACTIVE = 0x4, 2433290650Shselasky}; 2434290650Shselasky 2435290650Shselaskystruct mlx5_ifc_hca_vport_context_bits { 2436290650Shselasky u8 field_select[0x20]; 2437290650Shselasky 2438290650Shselasky u8 reserved_0[0xe0]; 2439290650Shselasky 2440290650Shselasky u8 sm_virt_aware[0x1]; 2441290650Shselasky u8 has_smi[0x1]; 2442290650Shselasky u8 has_raw[0x1]; 2443290650Shselasky u8 grh_required[0x1]; 2444306233Shselasky u8 reserved_1[0x1]; 2445306233Shselasky u8 min_wqe_inline_mode[0x3]; 2446306233Shselasky u8 reserved_2[0x8]; 2447290650Shselasky u8 port_physical_state[0x4]; 2448290650Shselasky u8 vport_state_policy[0x4]; 2449290650Shselasky u8 port_state[0x4]; 2450290650Shselasky u8 vport_state[0x4]; 2451290650Shselasky 2452306233Shselasky u8 reserved_3[0x20]; 2453290650Shselasky 2454290650Shselasky u8 system_image_guid[0x40]; 2455290650Shselasky 2456290650Shselasky u8 port_guid[0x40]; 2457290650Shselasky 2458290650Shselasky u8 node_guid[0x40]; 2459290650Shselasky 2460290650Shselasky u8 cap_mask1[0x20]; 2461290650Shselasky 2462290650Shselasky u8 cap_mask1_field_select[0x20]; 2463290650Shselasky 2464290650Shselasky u8 cap_mask2[0x20]; 2465290650Shselasky 2466290650Shselasky u8 cap_mask2_field_select[0x20]; 2467290650Shselasky 2468306233Shselasky u8 reserved_4[0x80]; 2469290650Shselasky 2470290650Shselasky u8 lid[0x10]; 2471306233Shselasky u8 reserved_5[0x4]; 2472290650Shselasky u8 init_type_reply[0x4]; 2473290650Shselasky u8 lmc[0x3]; 2474290650Shselasky u8 subnet_timeout[0x5]; 2475290650Shselasky 2476290650Shselasky u8 sm_lid[0x10]; 2477290650Shselasky u8 sm_sl[0x4]; 2478306233Shselasky u8 reserved_6[0xc]; 2479290650Shselasky 2480290650Shselasky u8 qkey_violation_counter[0x10]; 2481290650Shselasky u8 pkey_violation_counter[0x10]; 2482290650Shselasky 2483306233Shselasky u8 reserved_7[0xca0]; 2484290650Shselasky}; 2485290650Shselasky 2486290650Shselaskyunion mlx5_ifc_hca_cap_union_bits { 2487290650Shselasky struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap; 2488290650Shselasky struct mlx5_ifc_odp_cap_bits odp_cap; 2489290650Shselasky struct mlx5_ifc_atomic_caps_bits atomic_caps; 2490290650Shselasky struct mlx5_ifc_roce_cap_bits roce_cap; 2491290650Shselasky struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps; 2492290650Shselasky struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap; 2493290650Shselasky struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap; 2494290650Shselasky struct mlx5_ifc_e_switch_cap_bits e_switch_cap; 2495306233Shselasky struct mlx5_ifc_snapshot_cap_bits snapshot_cap; 2496306233Shselasky struct mlx5_ifc_debug_cap_bits diagnostic_counters_cap; 2497306233Shselasky struct mlx5_ifc_qos_cap_bits qos_cap; 2498290650Shselasky u8 reserved_0[0x8000]; 2499290650Shselasky}; 2500290650Shselasky 2501290650Shselaskystruct mlx5_ifc_esw_vport_context_bits { 2502290650Shselasky u8 reserved_0[0x3]; 2503290650Shselasky u8 vport_svlan_strip[0x1]; 2504290650Shselasky u8 vport_cvlan_strip[0x1]; 2505290650Shselasky u8 vport_svlan_insert[0x1]; 2506290650Shselasky u8 vport_cvlan_insert[0x2]; 2507290650Shselasky u8 reserved_1[0x18]; 2508290650Shselasky 2509290650Shselasky u8 reserved_2[0x20]; 2510290650Shselasky 2511290650Shselasky u8 svlan_cfi[0x1]; 2512290650Shselasky u8 svlan_pcp[0x3]; 2513290650Shselasky u8 svlan_id[0xc]; 2514290650Shselasky u8 cvlan_cfi[0x1]; 2515290650Shselasky u8 cvlan_pcp[0x3]; 2516290650Shselasky u8 cvlan_id[0xc]; 2517290650Shselasky 2518290650Shselasky u8 reserved_3[0x7a0]; 2519290650Shselasky}; 2520290650Shselasky 2521290650Shselaskyenum { 2522290650Shselasky MLX5_EQC_STATUS_OK = 0x0, 2523290650Shselasky MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa, 2524290650Shselasky}; 2525290650Shselasky 2526290650Shselaskyenum { 2527290650Shselasky MLX5_EQ_STATE_ARMED = 0x9, 2528290650Shselasky MLX5_EQ_STATE_FIRED = 0xa, 2529290650Shselasky}; 2530290650Shselasky 2531290650Shselaskystruct mlx5_ifc_eqc_bits { 2532290650Shselasky u8 status[0x4]; 2533290650Shselasky u8 reserved_0[0x9]; 2534290650Shselasky u8 ec[0x1]; 2535290650Shselasky u8 oi[0x1]; 2536290650Shselasky u8 reserved_1[0x5]; 2537290650Shselasky u8 st[0x4]; 2538290650Shselasky u8 reserved_2[0x8]; 2539290650Shselasky 2540290650Shselasky u8 reserved_3[0x20]; 2541290650Shselasky 2542290650Shselasky u8 reserved_4[0x14]; 2543290650Shselasky u8 page_offset[0x6]; 2544290650Shselasky u8 reserved_5[0x6]; 2545290650Shselasky 2546290650Shselasky u8 reserved_6[0x3]; 2547290650Shselasky u8 log_eq_size[0x5]; 2548290650Shselasky u8 uar_page[0x18]; 2549290650Shselasky 2550290650Shselasky u8 reserved_7[0x20]; 2551290650Shselasky 2552290650Shselasky u8 reserved_8[0x18]; 2553290650Shselasky u8 intr[0x8]; 2554290650Shselasky 2555290650Shselasky u8 reserved_9[0x3]; 2556290650Shselasky u8 log_page_size[0x5]; 2557290650Shselasky u8 reserved_10[0x18]; 2558290650Shselasky 2559290650Shselasky u8 reserved_11[0x60]; 2560290650Shselasky 2561290650Shselasky u8 reserved_12[0x8]; 2562290650Shselasky u8 consumer_counter[0x18]; 2563290650Shselasky 2564290650Shselasky u8 reserved_13[0x8]; 2565290650Shselasky u8 producer_counter[0x18]; 2566290650Shselasky 2567290650Shselasky u8 reserved_14[0x80]; 2568290650Shselasky}; 2569290650Shselasky 2570290650Shselaskyenum { 2571290650Shselasky MLX5_DCTC_STATE_ACTIVE = 0x0, 2572290650Shselasky MLX5_DCTC_STATE_DRAINING = 0x1, 2573290650Shselasky MLX5_DCTC_STATE_DRAINED = 0x2, 2574290650Shselasky}; 2575290650Shselasky 2576290650Shselaskyenum { 2577290650Shselasky MLX5_DCTC_CS_RES_DISABLE = 0x0, 2578290650Shselasky MLX5_DCTC_CS_RES_NA = 0x1, 2579290650Shselasky MLX5_DCTC_CS_RES_UP_TO_64B = 0x2, 2580290650Shselasky}; 2581290650Shselasky 2582290650Shselaskyenum { 2583290650Shselasky MLX5_DCTC_MTU_256_BYTES = 0x1, 2584290650Shselasky MLX5_DCTC_MTU_512_BYTES = 0x2, 2585290650Shselasky MLX5_DCTC_MTU_1K_BYTES = 0x3, 2586290650Shselasky MLX5_DCTC_MTU_2K_BYTES = 0x4, 2587290650Shselasky MLX5_DCTC_MTU_4K_BYTES = 0x5, 2588290650Shselasky}; 2589290650Shselasky 2590290650Shselaskystruct mlx5_ifc_dctc_bits { 2591290650Shselasky u8 reserved_0[0x4]; 2592290650Shselasky u8 state[0x4]; 2593290650Shselasky u8 reserved_1[0x18]; 2594290650Shselasky 2595290650Shselasky u8 reserved_2[0x8]; 2596290650Shselasky u8 user_index[0x18]; 2597290650Shselasky 2598290650Shselasky u8 reserved_3[0x8]; 2599290650Shselasky u8 cqn[0x18]; 2600290650Shselasky 2601290650Shselasky u8 counter_set_id[0x8]; 2602290650Shselasky u8 atomic_mode[0x4]; 2603290650Shselasky u8 rre[0x1]; 2604290650Shselasky u8 rwe[0x1]; 2605290650Shselasky u8 rae[0x1]; 2606290650Shselasky u8 atomic_like_write_en[0x1]; 2607290650Shselasky u8 latency_sensitive[0x1]; 2608290650Shselasky u8 rlky[0x1]; 2609290650Shselasky u8 reserved_4[0xe]; 2610290650Shselasky 2611290650Shselasky u8 reserved_5[0x8]; 2612290650Shselasky u8 cs_res[0x8]; 2613290650Shselasky u8 reserved_6[0x3]; 2614290650Shselasky u8 min_rnr_nak[0x5]; 2615290650Shselasky u8 reserved_7[0x8]; 2616290650Shselasky 2617290650Shselasky u8 reserved_8[0x8]; 2618290650Shselasky u8 srqn[0x18]; 2619290650Shselasky 2620290650Shselasky u8 reserved_9[0x8]; 2621290650Shselasky u8 pd[0x18]; 2622290650Shselasky 2623290650Shselasky u8 tclass[0x8]; 2624290650Shselasky u8 reserved_10[0x4]; 2625290650Shselasky u8 flow_label[0x14]; 2626290650Shselasky 2627290650Shselasky u8 dc_access_key[0x40]; 2628290650Shselasky 2629290650Shselasky u8 reserved_11[0x5]; 2630290650Shselasky u8 mtu[0x3]; 2631290650Shselasky u8 port[0x8]; 2632290650Shselasky u8 pkey_index[0x10]; 2633290650Shselasky 2634290650Shselasky u8 reserved_12[0x8]; 2635290650Shselasky u8 my_addr_index[0x8]; 2636290650Shselasky u8 reserved_13[0x8]; 2637290650Shselasky u8 hop_limit[0x8]; 2638290650Shselasky 2639290650Shselasky u8 dc_access_key_violation_count[0x20]; 2640290650Shselasky 2641290650Shselasky u8 reserved_14[0x14]; 2642290650Shselasky u8 dei_cfi[0x1]; 2643290650Shselasky u8 eth_prio[0x3]; 2644290650Shselasky u8 ecn[0x2]; 2645290650Shselasky u8 dscp[0x6]; 2646290650Shselasky 2647290650Shselasky u8 reserved_15[0x40]; 2648290650Shselasky}; 2649290650Shselasky 2650290650Shselaskyenum { 2651290650Shselasky MLX5_CQC_STATUS_OK = 0x0, 2652290650Shselasky MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9, 2653290650Shselasky MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa, 2654290650Shselasky}; 2655290650Shselasky 2656290650Shselaskyenum { 2657290650Shselasky CQE_SIZE_64 = 0x0, 2658290650Shselasky CQE_SIZE_128 = 0x1, 2659290650Shselasky}; 2660290650Shselasky 2661290650Shselaskyenum { 2662290650Shselasky MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0, 2663290650Shselasky MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1, 2664290650Shselasky}; 2665290650Shselasky 2666290650Shselaskyenum { 2667290650Shselasky MLX5_CQ_STATE_SOLICITED_ARMED = 0x6, 2668290650Shselasky MLX5_CQ_STATE_ARMED = 0x9, 2669290650Shselasky MLX5_CQ_STATE_FIRED = 0xa, 2670290650Shselasky}; 2671290650Shselasky 2672290650Shselaskystruct mlx5_ifc_cqc_bits { 2673290650Shselasky u8 status[0x4]; 2674290650Shselasky u8 reserved_0[0x4]; 2675290650Shselasky u8 cqe_sz[0x3]; 2676290650Shselasky u8 cc[0x1]; 2677290650Shselasky u8 reserved_1[0x1]; 2678290650Shselasky u8 scqe_break_moderation_en[0x1]; 2679290650Shselasky u8 oi[0x1]; 2680290650Shselasky u8 cq_period_mode[0x2]; 2681290650Shselasky u8 cqe_compression_en[0x1]; 2682290650Shselasky u8 mini_cqe_res_format[0x2]; 2683290650Shselasky u8 st[0x4]; 2684290650Shselasky u8 reserved_2[0x8]; 2685290650Shselasky 2686290650Shselasky u8 reserved_3[0x20]; 2687290650Shselasky 2688290650Shselasky u8 reserved_4[0x14]; 2689290650Shselasky u8 page_offset[0x6]; 2690290650Shselasky u8 reserved_5[0x6]; 2691290650Shselasky 2692290650Shselasky u8 reserved_6[0x3]; 2693290650Shselasky u8 log_cq_size[0x5]; 2694290650Shselasky u8 uar_page[0x18]; 2695290650Shselasky 2696290650Shselasky u8 reserved_7[0x4]; 2697290650Shselasky u8 cq_period[0xc]; 2698290650Shselasky u8 cq_max_count[0x10]; 2699290650Shselasky 2700290650Shselasky u8 reserved_8[0x18]; 2701290650Shselasky u8 c_eqn[0x8]; 2702290650Shselasky 2703290650Shselasky u8 reserved_9[0x3]; 2704290650Shselasky u8 log_page_size[0x5]; 2705290650Shselasky u8 reserved_10[0x18]; 2706290650Shselasky 2707290650Shselasky u8 reserved_11[0x20]; 2708290650Shselasky 2709290650Shselasky u8 reserved_12[0x8]; 2710290650Shselasky u8 last_notified_index[0x18]; 2711290650Shselasky 2712290650Shselasky u8 reserved_13[0x8]; 2713290650Shselasky u8 last_solicit_index[0x18]; 2714290650Shselasky 2715290650Shselasky u8 reserved_14[0x8]; 2716290650Shselasky u8 consumer_counter[0x18]; 2717290650Shselasky 2718290650Shselasky u8 reserved_15[0x8]; 2719290650Shselasky u8 producer_counter[0x18]; 2720290650Shselasky 2721290650Shselasky u8 reserved_16[0x40]; 2722290650Shselasky 2723290650Shselasky u8 dbr_addr[0x40]; 2724290650Shselasky}; 2725290650Shselasky 2726290650Shselaskyunion mlx5_ifc_cong_control_roce_ecn_auto_bits { 2727290650Shselasky struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp; 2728290650Shselasky struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp; 2729290650Shselasky struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np; 2730290650Shselasky u8 reserved_0[0x800]; 2731290650Shselasky}; 2732290650Shselasky 2733290650Shselaskystruct mlx5_ifc_query_adapter_param_block_bits { 2734290650Shselasky u8 reserved_0[0xc0]; 2735290650Shselasky 2736290650Shselasky u8 reserved_1[0x8]; 2737290650Shselasky u8 ieee_vendor_id[0x18]; 2738290650Shselasky 2739290650Shselasky u8 reserved_2[0x10]; 2740290650Shselasky u8 vsd_vendor_id[0x10]; 2741290650Shselasky 2742290650Shselasky u8 vsd[208][0x8]; 2743290650Shselasky 2744290650Shselasky u8 vsd_contd_psid[16][0x8]; 2745290650Shselasky}; 2746290650Shselasky 2747290650Shselaskyunion mlx5_ifc_modify_field_select_resize_field_select_auto_bits { 2748290650Shselasky struct mlx5_ifc_modify_field_select_bits modify_field_select; 2749290650Shselasky struct mlx5_ifc_resize_field_select_bits resize_field_select; 2750290650Shselasky u8 reserved_0[0x20]; 2751290650Shselasky}; 2752290650Shselasky 2753290650Shselaskyunion mlx5_ifc_field_select_802_1_r_roce_auto_bits { 2754290650Shselasky struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp; 2755290650Shselasky struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp; 2756290650Shselasky struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np; 2757290650Shselasky u8 reserved_0[0x20]; 2758290650Shselasky}; 2759290650Shselasky 2760290650Shselaskystruct mlx5_ifc_bufferx_reg_bits { 2761290650Shselasky u8 reserved_0[0x6]; 2762290650Shselasky u8 lossy[0x1]; 2763290650Shselasky u8 epsb[0x1]; 2764290650Shselasky u8 reserved_1[0xc]; 2765290650Shselasky u8 size[0xc]; 2766290650Shselasky 2767290650Shselasky u8 xoff_threshold[0x10]; 2768290650Shselasky u8 xon_threshold[0x10]; 2769290650Shselasky}; 2770290650Shselasky 2771290650Shselaskystruct mlx5_ifc_config_item_bits { 2772290650Shselasky u8 valid[0x2]; 2773290650Shselasky u8 reserved_0[0x2]; 2774290650Shselasky u8 header_type[0x2]; 2775290650Shselasky u8 reserved_1[0x2]; 2776290650Shselasky u8 default_location[0x1]; 2777290650Shselasky u8 reserved_2[0x7]; 2778290650Shselasky u8 version[0x4]; 2779290650Shselasky u8 reserved_3[0x3]; 2780290650Shselasky u8 length[0x9]; 2781290650Shselasky 2782290650Shselasky u8 type[0x20]; 2783290650Shselasky 2784290650Shselasky u8 reserved_4[0x10]; 2785290650Shselasky u8 crc16[0x10]; 2786290650Shselasky}; 2787290650Shselasky 2788290650Shselaskystruct mlx5_ifc_nodnic_port_config_reg_bits { 2789290650Shselasky struct mlx5_ifc_nodnic_event_word_bits event; 2790290650Shselasky 2791290650Shselasky u8 network_en[0x1]; 2792290650Shselasky u8 dma_en[0x1]; 2793290650Shselasky u8 promisc_en[0x1]; 2794290650Shselasky u8 promisc_multicast_en[0x1]; 2795290650Shselasky u8 reserved_0[0x17]; 2796290650Shselasky u8 receive_filter_en[0x5]; 2797290650Shselasky 2798290650Shselasky u8 reserved_1[0x10]; 2799290650Shselasky u8 mac_47_32[0x10]; 2800290650Shselasky 2801290650Shselasky u8 mac_31_0[0x20]; 2802290650Shselasky 2803290650Shselasky u8 receive_filters_mgid_mac[64][0x8]; 2804290650Shselasky 2805290650Shselasky u8 gid[16][0x8]; 2806290650Shselasky 2807290650Shselasky u8 reserved_2[0x10]; 2808290650Shselasky u8 lid[0x10]; 2809290650Shselasky 2810290650Shselasky u8 reserved_3[0xc]; 2811290650Shselasky u8 sm_sl[0x4]; 2812290650Shselasky u8 sm_lid[0x10]; 2813290650Shselasky 2814290650Shselasky u8 completion_address_63_32[0x20]; 2815290650Shselasky 2816290650Shselasky u8 completion_address_31_12[0x14]; 2817290650Shselasky u8 reserved_4[0x6]; 2818290650Shselasky u8 log_cq_size[0x6]; 2819290650Shselasky 2820290650Shselasky u8 working_buffer_address_63_32[0x20]; 2821290650Shselasky 2822290650Shselasky u8 working_buffer_address_31_12[0x14]; 2823290650Shselasky u8 reserved_5[0xc]; 2824290650Shselasky 2825290650Shselasky struct mlx5_ifc_nodnic_cq_arming_word_bits arm_cq; 2826290650Shselasky 2827290650Shselasky u8 pkey_index[0x10]; 2828290650Shselasky u8 pkey[0x10]; 2829290650Shselasky 2830290650Shselasky struct mlx5_ifc_nodnic_ring_config_reg_bits send_ring0; 2831290650Shselasky 2832290650Shselasky struct mlx5_ifc_nodnic_ring_config_reg_bits send_ring1; 2833290650Shselasky 2834290650Shselasky struct mlx5_ifc_nodnic_ring_config_reg_bits receive_ring0; 2835290650Shselasky 2836290650Shselasky struct mlx5_ifc_nodnic_ring_config_reg_bits receive_ring1; 2837290650Shselasky 2838290650Shselasky u8 reserved_6[0x400]; 2839290650Shselasky}; 2840290650Shselasky 2841290650Shselaskyunion mlx5_ifc_event_auto_bits { 2842290650Shselasky struct mlx5_ifc_comp_event_bits comp_event; 2843290650Shselasky struct mlx5_ifc_dct_events_bits dct_events; 2844290650Shselasky struct mlx5_ifc_qp_events_bits qp_events; 2845290650Shselasky struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event; 2846290650Shselasky struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event; 2847290650Shselasky struct mlx5_ifc_cq_error_bits cq_error; 2848290650Shselasky struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged; 2849290650Shselasky struct mlx5_ifc_port_state_change_event_bits port_state_change_event; 2850290650Shselasky struct mlx5_ifc_gpio_event_bits gpio_event; 2851290650Shselasky struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event; 2852290650Shselasky struct mlx5_ifc_stall_vl_event_bits stall_vl_event; 2853290650Shselasky struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event; 2854290650Shselasky struct mlx5_ifc_pages_req_event_bits pages_req_event; 2855290650Shselasky struct mlx5_ifc_nic_vport_change_event_bits nic_vport_change_event; 2856290650Shselasky u8 reserved_0[0xe0]; 2857290650Shselasky}; 2858290650Shselasky 2859290650Shselaskystruct mlx5_ifc_health_buffer_bits { 2860290650Shselasky u8 reserved_0[0x100]; 2861290650Shselasky 2862290650Shselasky u8 assert_existptr[0x20]; 2863290650Shselasky 2864290650Shselasky u8 assert_callra[0x20]; 2865290650Shselasky 2866290650Shselasky u8 reserved_1[0x40]; 2867290650Shselasky 2868290650Shselasky u8 fw_version[0x20]; 2869290650Shselasky 2870290650Shselasky u8 hw_id[0x20]; 2871290650Shselasky 2872290650Shselasky u8 reserved_2[0x20]; 2873290650Shselasky 2874290650Shselasky u8 irisc_index[0x8]; 2875290650Shselasky u8 synd[0x8]; 2876290650Shselasky u8 ext_synd[0x10]; 2877290650Shselasky}; 2878290650Shselasky 2879290650Shselaskystruct mlx5_ifc_register_loopback_control_bits { 2880290650Shselasky u8 no_lb[0x1]; 2881290650Shselasky u8 reserved_0[0x7]; 2882290650Shselasky u8 port[0x8]; 2883290650Shselasky u8 reserved_1[0x10]; 2884290650Shselasky 2885290650Shselasky u8 reserved_2[0x60]; 2886290650Shselasky}; 2887290650Shselasky 2888306233Shselaskystruct mlx5_ifc_lrh_bits { 2889306233Shselasky u8 vl[4]; 2890306233Shselasky u8 lver[4]; 2891306233Shselasky u8 sl[4]; 2892306233Shselasky u8 reserved2[2]; 2893306233Shselasky u8 lnh[2]; 2894306233Shselasky u8 dlid[16]; 2895306233Shselasky u8 reserved5[5]; 2896306233Shselasky u8 pkt_len[11]; 2897306233Shselasky u8 slid[16]; 2898306233Shselasky}; 2899306233Shselasky 2900290650Shselaskystruct mlx5_ifc_icmd_set_wol_rol_out_bits { 2901290650Shselasky u8 reserved_0[0x40]; 2902290650Shselasky 2903290650Shselasky u8 reserved_1[0x10]; 2904290650Shselasky u8 rol_mode[0x8]; 2905290650Shselasky u8 wol_mode[0x8]; 2906290650Shselasky}; 2907290650Shselasky 2908290650Shselaskystruct mlx5_ifc_icmd_set_wol_rol_in_bits { 2909290650Shselasky u8 reserved_0[0x40]; 2910290650Shselasky 2911290650Shselasky u8 rol_mode_valid[0x1]; 2912290650Shselasky u8 wol_mode_valid[0x1]; 2913290650Shselasky u8 reserved_1[0xe]; 2914290650Shselasky u8 rol_mode[0x8]; 2915290650Shselasky u8 wol_mode[0x8]; 2916290650Shselasky 2917290650Shselasky u8 reserved_2[0x7a0]; 2918290650Shselasky}; 2919290650Shselasky 2920290650Shselaskystruct mlx5_ifc_icmd_set_virtual_mac_in_bits { 2921290650Shselasky u8 virtual_mac_en[0x1]; 2922290650Shselasky u8 mac_aux_v[0x1]; 2923290650Shselasky u8 reserved_0[0x1e]; 2924290650Shselasky 2925290650Shselasky u8 reserved_1[0x40]; 2926290650Shselasky 2927290650Shselasky struct mlx5_ifc_mac_address_layout_bits virtual_mac; 2928290650Shselasky 2929290650Shselasky u8 reserved_2[0x760]; 2930290650Shselasky}; 2931290650Shselasky 2932290650Shselaskystruct mlx5_ifc_icmd_query_virtual_mac_out_bits { 2933290650Shselasky u8 virtual_mac_en[0x1]; 2934290650Shselasky u8 mac_aux_v[0x1]; 2935290650Shselasky u8 reserved_0[0x1e]; 2936290650Shselasky 2937290650Shselasky struct mlx5_ifc_mac_address_layout_bits permanent_mac; 2938290650Shselasky 2939290650Shselasky struct mlx5_ifc_mac_address_layout_bits virtual_mac; 2940290650Shselasky 2941290650Shselasky u8 reserved_1[0x760]; 2942290650Shselasky}; 2943290650Shselasky 2944290650Shselaskystruct mlx5_ifc_icmd_query_fw_info_out_bits { 2945290650Shselasky struct mlx5_ifc_fw_version_bits fw_version; 2946290650Shselasky 2947290650Shselasky u8 reserved_0[0x10]; 2948290650Shselasky u8 hash_signature[0x10]; 2949290650Shselasky 2950290650Shselasky u8 psid[16][0x8]; 2951290650Shselasky 2952290650Shselasky u8 reserved_1[0x6e0]; 2953290650Shselasky}; 2954290650Shselasky 2955290650Shselaskystruct mlx5_ifc_icmd_query_cap_in_bits { 2956290650Shselasky u8 reserved_0[0x10]; 2957290650Shselasky u8 capability_group[0x10]; 2958290650Shselasky}; 2959290650Shselasky 2960290650Shselaskystruct mlx5_ifc_icmd_query_cap_general_bits { 2961290650Shselasky u8 nv_access[0x1]; 2962290650Shselasky u8 fw_info_psid[0x1]; 2963290650Shselasky u8 reserved_0[0x1e]; 2964290650Shselasky 2965290650Shselasky u8 reserved_1[0x16]; 2966290650Shselasky u8 rol_s[0x1]; 2967290650Shselasky u8 rol_g[0x1]; 2968290650Shselasky u8 reserved_2[0x1]; 2969290650Shselasky u8 wol_s[0x1]; 2970290650Shselasky u8 wol_g[0x1]; 2971290650Shselasky u8 wol_a[0x1]; 2972290650Shselasky u8 wol_b[0x1]; 2973290650Shselasky u8 wol_m[0x1]; 2974290650Shselasky u8 wol_u[0x1]; 2975290650Shselasky u8 wol_p[0x1]; 2976290650Shselasky}; 2977290650Shselasky 2978290650Shselaskystruct mlx5_ifc_icmd_ocbb_query_header_stats_out_bits { 2979290650Shselasky u8 status[0x8]; 2980290650Shselasky u8 reserved_0[0x18]; 2981290650Shselasky 2982290650Shselasky u8 reserved_1[0x7e0]; 2983290650Shselasky}; 2984290650Shselasky 2985290650Shselaskystruct mlx5_ifc_icmd_ocbb_query_etoc_stats_out_bits { 2986290650Shselasky u8 status[0x8]; 2987290650Shselasky u8 reserved_0[0x18]; 2988290650Shselasky 2989290650Shselasky u8 reserved_1[0x7e0]; 2990290650Shselasky}; 2991290650Shselasky 2992290650Shselaskystruct mlx5_ifc_icmd_ocbb_init_in_bits { 2993290650Shselasky u8 address_hi[0x20]; 2994290650Shselasky 2995290650Shselasky u8 address_lo[0x20]; 2996290650Shselasky 2997290650Shselasky u8 reserved_0[0x7c0]; 2998290650Shselasky}; 2999290650Shselasky 3000290650Shselaskystruct mlx5_ifc_icmd_init_ocsd_in_bits { 3001290650Shselasky u8 reserved_0[0x20]; 3002290650Shselasky 3003290650Shselasky u8 address_hi[0x20]; 3004290650Shselasky 3005290650Shselasky u8 address_lo[0x20]; 3006290650Shselasky 3007290650Shselasky u8 reserved_1[0x7a0]; 3008290650Shselasky}; 3009290650Shselasky 3010290650Shselaskystruct mlx5_ifc_icmd_access_reg_out_bits { 3011290650Shselasky u8 reserved_0[0x11]; 3012290650Shselasky u8 status[0x7]; 3013290650Shselasky u8 reserved_1[0x8]; 3014290650Shselasky 3015290650Shselasky u8 register_id[0x10]; 3016290650Shselasky u8 reserved_2[0x10]; 3017290650Shselasky 3018290650Shselasky u8 reserved_3[0x40]; 3019290650Shselasky 3020290650Shselasky u8 reserved_4[0x5]; 3021290650Shselasky u8 len[0xb]; 3022290650Shselasky u8 reserved_5[0x10]; 3023290650Shselasky 3024290650Shselasky u8 register_data[0][0x20]; 3025290650Shselasky}; 3026290650Shselasky 3027290650Shselaskyenum { 3028290650Shselasky MLX5_ICMD_ACCESS_REG_IN_METHOD_QUERY = 0x1, 3029290650Shselasky MLX5_ICMD_ACCESS_REG_IN_METHOD_WRITE = 0x2, 3030290650Shselasky}; 3031290650Shselasky 3032290650Shselaskystruct mlx5_ifc_icmd_access_reg_in_bits { 3033290650Shselasky u8 constant_1[0x5]; 3034290650Shselasky u8 constant_2[0xb]; 3035290650Shselasky u8 reserved_0[0x10]; 3036290650Shselasky 3037290650Shselasky u8 register_id[0x10]; 3038290650Shselasky u8 reserved_1[0x1]; 3039290650Shselasky u8 method[0x7]; 3040290650Shselasky u8 constant_3[0x8]; 3041290650Shselasky 3042290650Shselasky u8 reserved_2[0x40]; 3043290650Shselasky 3044290650Shselasky u8 constant_4[0x5]; 3045290650Shselasky u8 len[0xb]; 3046290650Shselasky u8 reserved_3[0x10]; 3047290650Shselasky 3048290650Shselasky u8 register_data[0][0x20]; 3049290650Shselasky}; 3050290650Shselasky 3051290650Shselaskystruct mlx5_ifc_teardown_hca_out_bits { 3052290650Shselasky u8 status[0x8]; 3053290650Shselasky u8 reserved_0[0x18]; 3054290650Shselasky 3055290650Shselasky u8 syndrome[0x20]; 3056290650Shselasky 3057290650Shselasky u8 reserved_1[0x40]; 3058290650Shselasky}; 3059290650Shselasky 3060290650Shselaskyenum { 3061290650Shselasky MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0, 3062290650Shselasky MLX5_TEARDOWN_HCA_IN_PROFILE_PANIC_CLOSE = 0x1, 3063290650Shselasky}; 3064290650Shselasky 3065290650Shselaskystruct mlx5_ifc_teardown_hca_in_bits { 3066290650Shselasky u8 opcode[0x10]; 3067290650Shselasky u8 reserved_0[0x10]; 3068290650Shselasky 3069290650Shselasky u8 reserved_1[0x10]; 3070290650Shselasky u8 op_mod[0x10]; 3071290650Shselasky 3072290650Shselasky u8 reserved_2[0x10]; 3073290650Shselasky u8 profile[0x10]; 3074290650Shselasky 3075290650Shselasky u8 reserved_3[0x20]; 3076290650Shselasky}; 3077290650Shselasky 3078290650Shselaskystruct mlx5_ifc_suspend_qp_out_bits { 3079290650Shselasky u8 status[0x8]; 3080290650Shselasky u8 reserved_0[0x18]; 3081290650Shselasky 3082290650Shselasky u8 syndrome[0x20]; 3083290650Shselasky 3084290650Shselasky u8 reserved_1[0x40]; 3085290650Shselasky}; 3086290650Shselasky 3087290650Shselaskystruct mlx5_ifc_suspend_qp_in_bits { 3088290650Shselasky u8 opcode[0x10]; 3089290650Shselasky u8 reserved_0[0x10]; 3090290650Shselasky 3091290650Shselasky u8 reserved_1[0x10]; 3092290650Shselasky u8 op_mod[0x10]; 3093290650Shselasky 3094290650Shselasky u8 reserved_2[0x8]; 3095290650Shselasky u8 qpn[0x18]; 3096290650Shselasky 3097290650Shselasky u8 reserved_3[0x20]; 3098290650Shselasky}; 3099290650Shselasky 3100290650Shselaskystruct mlx5_ifc_sqerr2rts_qp_out_bits { 3101290650Shselasky u8 status[0x8]; 3102290650Shselasky u8 reserved_0[0x18]; 3103290650Shselasky 3104290650Shselasky u8 syndrome[0x20]; 3105290650Shselasky 3106290650Shselasky u8 reserved_1[0x40]; 3107290650Shselasky}; 3108290650Shselasky 3109290650Shselaskystruct mlx5_ifc_sqerr2rts_qp_in_bits { 3110290650Shselasky u8 opcode[0x10]; 3111290650Shselasky u8 reserved_0[0x10]; 3112290650Shselasky 3113290650Shselasky u8 reserved_1[0x10]; 3114290650Shselasky u8 op_mod[0x10]; 3115290650Shselasky 3116290650Shselasky u8 reserved_2[0x8]; 3117290650Shselasky u8 qpn[0x18]; 3118290650Shselasky 3119290650Shselasky u8 reserved_3[0x20]; 3120290650Shselasky 3121290650Shselasky u8 opt_param_mask[0x20]; 3122290650Shselasky 3123290650Shselasky u8 reserved_4[0x20]; 3124290650Shselasky 3125290650Shselasky struct mlx5_ifc_qpc_bits qpc; 3126290650Shselasky 3127290650Shselasky u8 reserved_5[0x80]; 3128290650Shselasky}; 3129290650Shselasky 3130290650Shselaskystruct mlx5_ifc_sqd2rts_qp_out_bits { 3131290650Shselasky u8 status[0x8]; 3132290650Shselasky u8 reserved_0[0x18]; 3133290650Shselasky 3134290650Shselasky u8 syndrome[0x20]; 3135290650Shselasky 3136290650Shselasky u8 reserved_1[0x40]; 3137290650Shselasky}; 3138290650Shselasky 3139290650Shselaskystruct mlx5_ifc_sqd2rts_qp_in_bits { 3140290650Shselasky u8 opcode[0x10]; 3141290650Shselasky u8 reserved_0[0x10]; 3142290650Shselasky 3143290650Shselasky u8 reserved_1[0x10]; 3144290650Shselasky u8 op_mod[0x10]; 3145290650Shselasky 3146290650Shselasky u8 reserved_2[0x8]; 3147290650Shselasky u8 qpn[0x18]; 3148290650Shselasky 3149290650Shselasky u8 reserved_3[0x20]; 3150290650Shselasky 3151290650Shselasky u8 opt_param_mask[0x20]; 3152290650Shselasky 3153290650Shselasky u8 reserved_4[0x20]; 3154290650Shselasky 3155290650Shselasky struct mlx5_ifc_qpc_bits qpc; 3156290650Shselasky 3157290650Shselasky u8 reserved_5[0x80]; 3158290650Shselasky}; 3159290650Shselasky 3160290650Shselaskystruct mlx5_ifc_set_wol_rol_out_bits { 3161290650Shselasky u8 status[0x8]; 3162290650Shselasky u8 reserved_0[0x18]; 3163290650Shselasky 3164290650Shselasky u8 syndrome[0x20]; 3165290650Shselasky 3166290650Shselasky u8 reserved_1[0x40]; 3167290650Shselasky}; 3168290650Shselasky 3169290650Shselaskystruct mlx5_ifc_set_wol_rol_in_bits { 3170290650Shselasky u8 opcode[0x10]; 3171290650Shselasky u8 reserved_0[0x10]; 3172290650Shselasky 3173290650Shselasky u8 reserved_1[0x10]; 3174290650Shselasky u8 op_mod[0x10]; 3175290650Shselasky 3176290650Shselasky u8 rol_mode_valid[0x1]; 3177290650Shselasky u8 wol_mode_valid[0x1]; 3178290650Shselasky u8 reserved_2[0xe]; 3179290650Shselasky u8 rol_mode[0x8]; 3180290650Shselasky u8 wol_mode[0x8]; 3181290650Shselasky 3182290650Shselasky u8 reserved_3[0x20]; 3183290650Shselasky}; 3184290650Shselasky 3185290650Shselaskystruct mlx5_ifc_set_roce_address_out_bits { 3186290650Shselasky u8 status[0x8]; 3187290650Shselasky u8 reserved_0[0x18]; 3188290650Shselasky 3189290650Shselasky u8 syndrome[0x20]; 3190290650Shselasky 3191290650Shselasky u8 reserved_1[0x40]; 3192290650Shselasky}; 3193290650Shselasky 3194290650Shselaskystruct mlx5_ifc_set_roce_address_in_bits { 3195290650Shselasky u8 opcode[0x10]; 3196290650Shselasky u8 reserved_0[0x10]; 3197290650Shselasky 3198290650Shselasky u8 reserved_1[0x10]; 3199290650Shselasky u8 op_mod[0x10]; 3200290650Shselasky 3201290650Shselasky u8 roce_address_index[0x10]; 3202290650Shselasky u8 reserved_2[0x10]; 3203290650Shselasky 3204290650Shselasky u8 reserved_3[0x20]; 3205290650Shselasky 3206290650Shselasky struct mlx5_ifc_roce_addr_layout_bits roce_address; 3207290650Shselasky}; 3208290650Shselasky 3209290650Shselaskystruct mlx5_ifc_set_rdb_out_bits { 3210290650Shselasky u8 status[0x8]; 3211290650Shselasky u8 reserved_0[0x18]; 3212290650Shselasky 3213290650Shselasky u8 syndrome[0x20]; 3214290650Shselasky 3215290650Shselasky u8 reserved_1[0x40]; 3216290650Shselasky}; 3217290650Shselasky 3218290650Shselaskystruct mlx5_ifc_set_rdb_in_bits { 3219290650Shselasky u8 opcode[0x10]; 3220290650Shselasky u8 reserved_0[0x10]; 3221290650Shselasky 3222290650Shselasky u8 reserved_1[0x10]; 3223290650Shselasky u8 op_mod[0x10]; 3224290650Shselasky 3225290650Shselasky u8 reserved_2[0x8]; 3226290650Shselasky u8 qpn[0x18]; 3227290650Shselasky 3228290650Shselasky u8 reserved_3[0x18]; 3229290650Shselasky u8 rdb_list_size[0x8]; 3230290650Shselasky 3231290650Shselasky struct mlx5_ifc_rdbc_bits rdb_context[0]; 3232290650Shselasky}; 3233290650Shselasky 3234290650Shselaskystruct mlx5_ifc_set_mad_demux_out_bits { 3235290650Shselasky u8 status[0x8]; 3236290650Shselasky u8 reserved_0[0x18]; 3237290650Shselasky 3238290650Shselasky u8 syndrome[0x20]; 3239290650Shselasky 3240290650Shselasky u8 reserved_1[0x40]; 3241290650Shselasky}; 3242290650Shselasky 3243290650Shselaskyenum { 3244290650Shselasky MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0, 3245290650Shselasky MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2, 3246290650Shselasky}; 3247290650Shselasky 3248290650Shselaskystruct mlx5_ifc_set_mad_demux_in_bits { 3249290650Shselasky u8 opcode[0x10]; 3250290650Shselasky u8 reserved_0[0x10]; 3251290650Shselasky 3252290650Shselasky u8 reserved_1[0x10]; 3253290650Shselasky u8 op_mod[0x10]; 3254290650Shselasky 3255290650Shselasky u8 reserved_2[0x20]; 3256290650Shselasky 3257290650Shselasky u8 reserved_3[0x6]; 3258290650Shselasky u8 demux_mode[0x2]; 3259290650Shselasky u8 reserved_4[0x18]; 3260290650Shselasky}; 3261290650Shselasky 3262290650Shselaskystruct mlx5_ifc_set_l2_table_entry_out_bits { 3263290650Shselasky u8 status[0x8]; 3264290650Shselasky u8 reserved_0[0x18]; 3265290650Shselasky 3266290650Shselasky u8 syndrome[0x20]; 3267290650Shselasky 3268290650Shselasky u8 reserved_1[0x40]; 3269290650Shselasky}; 3270290650Shselasky 3271290650Shselaskystruct mlx5_ifc_set_l2_table_entry_in_bits { 3272290650Shselasky u8 opcode[0x10]; 3273290650Shselasky u8 reserved_0[0x10]; 3274290650Shselasky 3275290650Shselasky u8 reserved_1[0x10]; 3276290650Shselasky u8 op_mod[0x10]; 3277290650Shselasky 3278290650Shselasky u8 reserved_2[0x60]; 3279290650Shselasky 3280290650Shselasky u8 reserved_3[0x8]; 3281290650Shselasky u8 table_index[0x18]; 3282290650Shselasky 3283290650Shselasky u8 reserved_4[0x20]; 3284290650Shselasky 3285290650Shselasky u8 reserved_5[0x13]; 3286290650Shselasky u8 vlan_valid[0x1]; 3287290650Shselasky u8 vlan[0xc]; 3288290650Shselasky 3289290650Shselasky struct mlx5_ifc_mac_address_layout_bits mac_address; 3290290650Shselasky 3291290650Shselasky u8 reserved_6[0xc0]; 3292290650Shselasky}; 3293290650Shselasky 3294290650Shselaskystruct mlx5_ifc_set_issi_out_bits { 3295290650Shselasky u8 status[0x8]; 3296290650Shselasky u8 reserved_0[0x18]; 3297290650Shselasky 3298290650Shselasky u8 syndrome[0x20]; 3299290650Shselasky 3300290650Shselasky u8 reserved_1[0x40]; 3301290650Shselasky}; 3302290650Shselasky 3303290650Shselaskystruct mlx5_ifc_set_issi_in_bits { 3304290650Shselasky u8 opcode[0x10]; 3305290650Shselasky u8 reserved_0[0x10]; 3306290650Shselasky 3307290650Shselasky u8 reserved_1[0x10]; 3308290650Shselasky u8 op_mod[0x10]; 3309290650Shselasky 3310290650Shselasky u8 reserved_2[0x10]; 3311290650Shselasky u8 current_issi[0x10]; 3312290650Shselasky 3313290650Shselasky u8 reserved_3[0x20]; 3314290650Shselasky}; 3315290650Shselasky 3316290650Shselaskystruct mlx5_ifc_set_hca_cap_out_bits { 3317290650Shselasky u8 status[0x8]; 3318290650Shselasky u8 reserved_0[0x18]; 3319290650Shselasky 3320290650Shselasky u8 syndrome[0x20]; 3321290650Shselasky 3322290650Shselasky u8 reserved_1[0x40]; 3323290650Shselasky}; 3324290650Shselasky 3325290650Shselaskystruct mlx5_ifc_set_hca_cap_in_bits { 3326290650Shselasky u8 opcode[0x10]; 3327290650Shselasky u8 reserved_0[0x10]; 3328290650Shselasky 3329290650Shselasky u8 reserved_1[0x10]; 3330290650Shselasky u8 op_mod[0x10]; 3331290650Shselasky 3332290650Shselasky u8 reserved_2[0x40]; 3333290650Shselasky 3334290650Shselasky union mlx5_ifc_hca_cap_union_bits capability; 3335290650Shselasky}; 3336290650Shselasky 3337306233Shselaskyenum { 3338306233Shselasky MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0, 3339306233Shselasky MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1, 3340306233Shselasky MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2, 3341306233Shselasky MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3 3342306233Shselasky}; 3343306233Shselasky 3344290650Shselaskystruct mlx5_ifc_set_flow_table_root_out_bits { 3345290650Shselasky u8 status[0x8]; 3346290650Shselasky u8 reserved_0[0x18]; 3347290650Shselasky 3348290650Shselasky u8 syndrome[0x20]; 3349290650Shselasky 3350290650Shselasky u8 reserved_1[0x40]; 3351290650Shselasky}; 3352290650Shselasky 3353290650Shselaskystruct mlx5_ifc_set_flow_table_root_in_bits { 3354290650Shselasky u8 opcode[0x10]; 3355290650Shselasky u8 reserved_0[0x10]; 3356290650Shselasky 3357290650Shselasky u8 reserved_1[0x10]; 3358290650Shselasky u8 op_mod[0x10]; 3359290650Shselasky 3360290650Shselasky u8 other_vport[0x1]; 3361290650Shselasky u8 reserved_2[0xf]; 3362290650Shselasky u8 vport_number[0x10]; 3363290650Shselasky 3364290650Shselasky u8 reserved_3[0x20]; 3365290650Shselasky 3366290650Shselasky u8 table_type[0x8]; 3367290650Shselasky u8 reserved_4[0x18]; 3368290650Shselasky 3369290650Shselasky u8 reserved_5[0x8]; 3370290650Shselasky u8 table_id[0x18]; 3371290650Shselasky 3372306233Shselasky u8 reserved_6[0x8]; 3373306233Shselasky u8 underlay_qpn[0x18]; 3374306233Shselasky 3375306233Shselasky u8 reserved_7[0x120]; 3376290650Shselasky}; 3377290650Shselasky 3378290650Shselaskystruct mlx5_ifc_set_fte_out_bits { 3379290650Shselasky u8 status[0x8]; 3380290650Shselasky u8 reserved_0[0x18]; 3381290650Shselasky 3382290650Shselasky u8 syndrome[0x20]; 3383290650Shselasky 3384290650Shselasky u8 reserved_1[0x40]; 3385290650Shselasky}; 3386290650Shselasky 3387290650Shselaskystruct mlx5_ifc_set_fte_in_bits { 3388290650Shselasky u8 opcode[0x10]; 3389290650Shselasky u8 reserved_0[0x10]; 3390290650Shselasky 3391290650Shselasky u8 reserved_1[0x10]; 3392290650Shselasky u8 op_mod[0x10]; 3393290650Shselasky 3394290650Shselasky u8 other_vport[0x1]; 3395290650Shselasky u8 reserved_2[0xf]; 3396290650Shselasky u8 vport_number[0x10]; 3397290650Shselasky 3398290650Shselasky u8 reserved_3[0x20]; 3399290650Shselasky 3400290650Shselasky u8 table_type[0x8]; 3401290650Shselasky u8 reserved_4[0x18]; 3402290650Shselasky 3403290650Shselasky u8 reserved_5[0x8]; 3404290650Shselasky u8 table_id[0x18]; 3405290650Shselasky 3406290650Shselasky u8 reserved_6[0x18]; 3407290650Shselasky u8 modify_enable_mask[0x8]; 3408290650Shselasky 3409290650Shselasky u8 reserved_7[0x20]; 3410290650Shselasky 3411290650Shselasky u8 flow_index[0x20]; 3412290650Shselasky 3413290650Shselasky u8 reserved_8[0xe0]; 3414290650Shselasky 3415290650Shselasky struct mlx5_ifc_flow_context_bits flow_context; 3416290650Shselasky}; 3417290650Shselasky 3418290650Shselaskystruct mlx5_ifc_set_driver_version_out_bits { 3419290650Shselasky u8 status[0x8]; 3420290650Shselasky u8 reserved_0[0x18]; 3421290650Shselasky 3422290650Shselasky u8 syndrome[0x20]; 3423290650Shselasky 3424290650Shselasky u8 reserved_1[0x40]; 3425290650Shselasky}; 3426290650Shselasky 3427290650Shselaskystruct mlx5_ifc_set_driver_version_in_bits { 3428290650Shselasky u8 opcode[0x10]; 3429290650Shselasky u8 reserved_0[0x10]; 3430290650Shselasky 3431290650Shselasky u8 reserved_1[0x10]; 3432290650Shselasky u8 op_mod[0x10]; 3433290650Shselasky 3434290650Shselasky u8 reserved_2[0x40]; 3435290650Shselasky 3436290650Shselasky u8 driver_version[64][0x8]; 3437290650Shselasky}; 3438290650Shselasky 3439290650Shselaskystruct mlx5_ifc_set_dc_cnak_trace_out_bits { 3440290650Shselasky u8 status[0x8]; 3441290650Shselasky u8 reserved_0[0x18]; 3442290650Shselasky 3443290650Shselasky u8 syndrome[0x20]; 3444290650Shselasky 3445290650Shselasky u8 reserved_1[0x40]; 3446290650Shselasky}; 3447290650Shselasky 3448290650Shselaskystruct mlx5_ifc_set_dc_cnak_trace_in_bits { 3449290650Shselasky u8 opcode[0x10]; 3450290650Shselasky u8 reserved_0[0x10]; 3451290650Shselasky 3452290650Shselasky u8 reserved_1[0x10]; 3453290650Shselasky u8 op_mod[0x10]; 3454290650Shselasky 3455290650Shselasky u8 enable[0x1]; 3456290650Shselasky u8 reserved_2[0x1f]; 3457290650Shselasky 3458290650Shselasky u8 reserved_3[0x160]; 3459290650Shselasky 3460290650Shselasky struct mlx5_ifc_cmd_pas_bits pas; 3461290650Shselasky}; 3462290650Shselasky 3463290650Shselaskystruct mlx5_ifc_set_burst_size_out_bits { 3464290650Shselasky u8 status[0x8]; 3465290650Shselasky u8 reserved_0[0x18]; 3466290650Shselasky 3467290650Shselasky u8 syndrome[0x20]; 3468290650Shselasky 3469290650Shselasky u8 reserved_1[0x40]; 3470290650Shselasky}; 3471290650Shselasky 3472290650Shselaskystruct mlx5_ifc_set_burst_size_in_bits { 3473290650Shselasky u8 opcode[0x10]; 3474290650Shselasky u8 reserved_0[0x10]; 3475290650Shselasky 3476290650Shselasky u8 reserved_1[0x10]; 3477290650Shselasky u8 op_mod[0x10]; 3478290650Shselasky 3479290650Shselasky u8 reserved_2[0x20]; 3480290650Shselasky 3481290650Shselasky u8 reserved_3[0x9]; 3482290650Shselasky u8 device_burst_size[0x17]; 3483290650Shselasky}; 3484290650Shselasky 3485290650Shselaskystruct mlx5_ifc_rts2rts_qp_out_bits { 3486290650Shselasky u8 status[0x8]; 3487290650Shselasky u8 reserved_0[0x18]; 3488290650Shselasky 3489290650Shselasky u8 syndrome[0x20]; 3490290650Shselasky 3491290650Shselasky u8 reserved_1[0x40]; 3492290650Shselasky}; 3493290650Shselasky 3494290650Shselaskystruct mlx5_ifc_rts2rts_qp_in_bits { 3495290650Shselasky u8 opcode[0x10]; 3496290650Shselasky u8 reserved_0[0x10]; 3497290650Shselasky 3498290650Shselasky u8 reserved_1[0x10]; 3499290650Shselasky u8 op_mod[0x10]; 3500290650Shselasky 3501290650Shselasky u8 reserved_2[0x8]; 3502290650Shselasky u8 qpn[0x18]; 3503290650Shselasky 3504290650Shselasky u8 reserved_3[0x20]; 3505290650Shselasky 3506290650Shselasky u8 opt_param_mask[0x20]; 3507290650Shselasky 3508290650Shselasky u8 reserved_4[0x20]; 3509290650Shselasky 3510290650Shselasky struct mlx5_ifc_qpc_bits qpc; 3511290650Shselasky 3512290650Shselasky u8 reserved_5[0x80]; 3513290650Shselasky}; 3514290650Shselasky 3515290650Shselaskystruct mlx5_ifc_rtr2rts_qp_out_bits { 3516290650Shselasky u8 status[0x8]; 3517290650Shselasky u8 reserved_0[0x18]; 3518290650Shselasky 3519290650Shselasky u8 syndrome[0x20]; 3520290650Shselasky 3521290650Shselasky u8 reserved_1[0x40]; 3522290650Shselasky}; 3523290650Shselasky 3524290650Shselaskystruct mlx5_ifc_rtr2rts_qp_in_bits { 3525290650Shselasky u8 opcode[0x10]; 3526290650Shselasky u8 reserved_0[0x10]; 3527290650Shselasky 3528290650Shselasky u8 reserved_1[0x10]; 3529290650Shselasky u8 op_mod[0x10]; 3530290650Shselasky 3531290650Shselasky u8 reserved_2[0x8]; 3532290650Shselasky u8 qpn[0x18]; 3533290650Shselasky 3534290650Shselasky u8 reserved_3[0x20]; 3535290650Shselasky 3536290650Shselasky u8 opt_param_mask[0x20]; 3537290650Shselasky 3538290650Shselasky u8 reserved_4[0x20]; 3539290650Shselasky 3540290650Shselasky struct mlx5_ifc_qpc_bits qpc; 3541290650Shselasky 3542290650Shselasky u8 reserved_5[0x80]; 3543290650Shselasky}; 3544290650Shselasky 3545290650Shselaskystruct mlx5_ifc_rst2init_qp_out_bits { 3546290650Shselasky u8 status[0x8]; 3547290650Shselasky u8 reserved_0[0x18]; 3548290650Shselasky 3549290650Shselasky u8 syndrome[0x20]; 3550290650Shselasky 3551290650Shselasky u8 reserved_1[0x40]; 3552290650Shselasky}; 3553290650Shselasky 3554290650Shselaskystruct mlx5_ifc_rst2init_qp_in_bits { 3555290650Shselasky u8 opcode[0x10]; 3556290650Shselasky u8 reserved_0[0x10]; 3557290650Shselasky 3558290650Shselasky u8 reserved_1[0x10]; 3559290650Shselasky u8 op_mod[0x10]; 3560290650Shselasky 3561290650Shselasky u8 reserved_2[0x8]; 3562290650Shselasky u8 qpn[0x18]; 3563290650Shselasky 3564290650Shselasky u8 reserved_3[0x20]; 3565290650Shselasky 3566290650Shselasky u8 opt_param_mask[0x20]; 3567290650Shselasky 3568290650Shselasky u8 reserved_4[0x20]; 3569290650Shselasky 3570290650Shselasky struct mlx5_ifc_qpc_bits qpc; 3571290650Shselasky 3572290650Shselasky u8 reserved_5[0x80]; 3573290650Shselasky}; 3574290650Shselasky 3575290650Shselaskystruct mlx5_ifc_resume_qp_out_bits { 3576290650Shselasky u8 status[0x8]; 3577290650Shselasky u8 reserved_0[0x18]; 3578290650Shselasky 3579290650Shselasky u8 syndrome[0x20]; 3580290650Shselasky 3581290650Shselasky u8 reserved_1[0x40]; 3582290650Shselasky}; 3583290650Shselasky 3584290650Shselaskystruct mlx5_ifc_resume_qp_in_bits { 3585290650Shselasky u8 opcode[0x10]; 3586290650Shselasky u8 reserved_0[0x10]; 3587290650Shselasky 3588290650Shselasky u8 reserved_1[0x10]; 3589290650Shselasky u8 op_mod[0x10]; 3590290650Shselasky 3591290650Shselasky u8 reserved_2[0x8]; 3592290650Shselasky u8 qpn[0x18]; 3593290650Shselasky 3594290650Shselasky u8 reserved_3[0x20]; 3595290650Shselasky}; 3596290650Shselasky 3597290650Shselaskystruct mlx5_ifc_query_xrc_srq_out_bits { 3598290650Shselasky u8 status[0x8]; 3599290650Shselasky u8 reserved_0[0x18]; 3600290650Shselasky 3601290650Shselasky u8 syndrome[0x20]; 3602290650Shselasky 3603290650Shselasky u8 reserved_1[0x40]; 3604290650Shselasky 3605290650Shselasky struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry; 3606290650Shselasky 3607290650Shselasky u8 reserved_2[0x600]; 3608290650Shselasky 3609290650Shselasky u8 pas[0][0x40]; 3610290650Shselasky}; 3611290650Shselasky 3612290650Shselaskystruct mlx5_ifc_query_xrc_srq_in_bits { 3613290650Shselasky u8 opcode[0x10]; 3614290650Shselasky u8 reserved_0[0x10]; 3615290650Shselasky 3616290650Shselasky u8 reserved_1[0x10]; 3617290650Shselasky u8 op_mod[0x10]; 3618290650Shselasky 3619290650Shselasky u8 reserved_2[0x8]; 3620290650Shselasky u8 xrc_srqn[0x18]; 3621290650Shselasky 3622290650Shselasky u8 reserved_3[0x20]; 3623290650Shselasky}; 3624290650Shselasky 3625290650Shselaskystruct mlx5_ifc_query_wol_rol_out_bits { 3626290650Shselasky u8 status[0x8]; 3627290650Shselasky u8 reserved_0[0x18]; 3628290650Shselasky 3629290650Shselasky u8 syndrome[0x20]; 3630290650Shselasky 3631290650Shselasky u8 reserved_1[0x10]; 3632290650Shselasky u8 rol_mode[0x8]; 3633290650Shselasky u8 wol_mode[0x8]; 3634290650Shselasky 3635290650Shselasky u8 reserved_2[0x20]; 3636290650Shselasky}; 3637290650Shselasky 3638290650Shselaskystruct mlx5_ifc_query_wol_rol_in_bits { 3639290650Shselasky u8 opcode[0x10]; 3640290650Shselasky u8 reserved_0[0x10]; 3641290650Shselasky 3642290650Shselasky u8 reserved_1[0x10]; 3643290650Shselasky u8 op_mod[0x10]; 3644290650Shselasky 3645290650Shselasky u8 reserved_2[0x40]; 3646290650Shselasky}; 3647290650Shselasky 3648290650Shselaskyenum { 3649290650Shselasky MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0, 3650290650Shselasky MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1, 3651290650Shselasky}; 3652290650Shselasky 3653290650Shselaskystruct mlx5_ifc_query_vport_state_out_bits { 3654290650Shselasky u8 status[0x8]; 3655290650Shselasky u8 reserved_0[0x18]; 3656290650Shselasky 3657290650Shselasky u8 syndrome[0x20]; 3658290650Shselasky 3659290650Shselasky u8 reserved_1[0x20]; 3660290650Shselasky 3661290650Shselasky u8 reserved_2[0x18]; 3662290650Shselasky u8 admin_state[0x4]; 3663290650Shselasky u8 state[0x4]; 3664290650Shselasky}; 3665290650Shselasky 3666290650Shselaskyenum { 3667290650Shselasky MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0, 3668290650Shselasky MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1, 3669290650Shselasky MLX5_QUERY_VPORT_STATE_IN_OP_MOD_UPLINK = 0x2, 3670290650Shselasky}; 3671290650Shselasky 3672290650Shselaskystruct mlx5_ifc_query_vport_state_in_bits { 3673290650Shselasky u8 opcode[0x10]; 3674290650Shselasky u8 reserved_0[0x10]; 3675290650Shselasky 3676290650Shselasky u8 reserved_1[0x10]; 3677290650Shselasky u8 op_mod[0x10]; 3678290650Shselasky 3679290650Shselasky u8 other_vport[0x1]; 3680290650Shselasky u8 reserved_2[0xf]; 3681290650Shselasky u8 vport_number[0x10]; 3682290650Shselasky 3683290650Shselasky u8 reserved_3[0x20]; 3684290650Shselasky}; 3685290650Shselasky 3686290650Shselaskystruct mlx5_ifc_query_vport_counter_out_bits { 3687290650Shselasky u8 status[0x8]; 3688290650Shselasky u8 reserved_0[0x18]; 3689290650Shselasky 3690290650Shselasky u8 syndrome[0x20]; 3691290650Shselasky 3692290650Shselasky u8 reserved_1[0x40]; 3693290650Shselasky 3694290650Shselasky struct mlx5_ifc_traffic_counter_bits received_errors; 3695290650Shselasky 3696290650Shselasky struct mlx5_ifc_traffic_counter_bits transmit_errors; 3697290650Shselasky 3698290650Shselasky struct mlx5_ifc_traffic_counter_bits received_ib_unicast; 3699290650Shselasky 3700290650Shselasky struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast; 3701290650Shselasky 3702290650Shselasky struct mlx5_ifc_traffic_counter_bits received_ib_multicast; 3703290650Shselasky 3704290650Shselasky struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast; 3705290650Shselasky 3706290650Shselasky struct mlx5_ifc_traffic_counter_bits received_eth_broadcast; 3707290650Shselasky 3708290650Shselasky struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast; 3709290650Shselasky 3710290650Shselasky struct mlx5_ifc_traffic_counter_bits received_eth_unicast; 3711290650Shselasky 3712290650Shselasky struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast; 3713290650Shselasky 3714290650Shselasky struct mlx5_ifc_traffic_counter_bits received_eth_multicast; 3715290650Shselasky 3716290650Shselasky struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast; 3717290650Shselasky 3718290650Shselasky u8 reserved_2[0xa00]; 3719290650Shselasky}; 3720290650Shselasky 3721290650Shselaskyenum { 3722290650Shselasky MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0, 3723290650Shselasky}; 3724290650Shselasky 3725290650Shselaskystruct mlx5_ifc_query_vport_counter_in_bits { 3726290650Shselasky u8 opcode[0x10]; 3727290650Shselasky u8 reserved_0[0x10]; 3728290650Shselasky 3729290650Shselasky u8 reserved_1[0x10]; 3730290650Shselasky u8 op_mod[0x10]; 3731290650Shselasky 3732290650Shselasky u8 other_vport[0x1]; 3733290650Shselasky u8 reserved_2[0xb]; 3734290650Shselasky u8 port_num[0x4]; 3735290650Shselasky u8 vport_number[0x10]; 3736290650Shselasky 3737290650Shselasky u8 reserved_3[0x60]; 3738290650Shselasky 3739290650Shselasky u8 clear[0x1]; 3740290650Shselasky u8 reserved_4[0x1f]; 3741290650Shselasky 3742290650Shselasky u8 reserved_5[0x20]; 3743290650Shselasky}; 3744290650Shselasky 3745290650Shselaskystruct mlx5_ifc_query_tis_out_bits { 3746290650Shselasky u8 status[0x8]; 3747290650Shselasky u8 reserved_0[0x18]; 3748290650Shselasky 3749290650Shselasky u8 syndrome[0x20]; 3750290650Shselasky 3751290650Shselasky u8 reserved_1[0x40]; 3752290650Shselasky 3753290650Shselasky struct mlx5_ifc_tisc_bits tis_context; 3754290650Shselasky}; 3755290650Shselasky 3756290650Shselaskystruct mlx5_ifc_query_tis_in_bits { 3757290650Shselasky u8 opcode[0x10]; 3758290650Shselasky u8 reserved_0[0x10]; 3759290650Shselasky 3760290650Shselasky u8 reserved_1[0x10]; 3761290650Shselasky u8 op_mod[0x10]; 3762290650Shselasky 3763290650Shselasky u8 reserved_2[0x8]; 3764290650Shselasky u8 tisn[0x18]; 3765290650Shselasky 3766290650Shselasky u8 reserved_3[0x20]; 3767290650Shselasky}; 3768290650Shselasky 3769290650Shselaskystruct mlx5_ifc_query_tir_out_bits { 3770290650Shselasky u8 status[0x8]; 3771290650Shselasky u8 reserved_0[0x18]; 3772290650Shselasky 3773290650Shselasky u8 syndrome[0x20]; 3774290650Shselasky 3775290650Shselasky u8 reserved_1[0xc0]; 3776290650Shselasky 3777290650Shselasky struct mlx5_ifc_tirc_bits tir_context; 3778290650Shselasky}; 3779290650Shselasky 3780290650Shselaskystruct mlx5_ifc_query_tir_in_bits { 3781290650Shselasky u8 opcode[0x10]; 3782290650Shselasky u8 reserved_0[0x10]; 3783290650Shselasky 3784290650Shselasky u8 reserved_1[0x10]; 3785290650Shselasky u8 op_mod[0x10]; 3786290650Shselasky 3787290650Shselasky u8 reserved_2[0x8]; 3788290650Shselasky u8 tirn[0x18]; 3789290650Shselasky 3790290650Shselasky u8 reserved_3[0x20]; 3791290650Shselasky}; 3792290650Shselasky 3793290650Shselaskystruct mlx5_ifc_query_srq_out_bits { 3794290650Shselasky u8 status[0x8]; 3795290650Shselasky u8 reserved_0[0x18]; 3796290650Shselasky 3797290650Shselasky u8 syndrome[0x20]; 3798290650Shselasky 3799290650Shselasky u8 reserved_1[0x40]; 3800290650Shselasky 3801290650Shselasky struct mlx5_ifc_srqc_bits srq_context_entry; 3802290650Shselasky 3803290650Shselasky u8 reserved_2[0x600]; 3804290650Shselasky 3805290650Shselasky u8 pas[0][0x40]; 3806290650Shselasky}; 3807290650Shselasky 3808290650Shselaskystruct mlx5_ifc_query_srq_in_bits { 3809290650Shselasky u8 opcode[0x10]; 3810290650Shselasky u8 reserved_0[0x10]; 3811290650Shselasky 3812290650Shselasky u8 reserved_1[0x10]; 3813290650Shselasky u8 op_mod[0x10]; 3814290650Shselasky 3815290650Shselasky u8 reserved_2[0x8]; 3816290650Shselasky u8 srqn[0x18]; 3817290650Shselasky 3818290650Shselasky u8 reserved_3[0x20]; 3819290650Shselasky}; 3820290650Shselasky 3821290650Shselaskystruct mlx5_ifc_query_sq_out_bits { 3822290650Shselasky u8 status[0x8]; 3823290650Shselasky u8 reserved_0[0x18]; 3824290650Shselasky 3825290650Shselasky u8 syndrome[0x20]; 3826290650Shselasky 3827290650Shselasky u8 reserved_1[0xc0]; 3828290650Shselasky 3829290650Shselasky struct mlx5_ifc_sqc_bits sq_context; 3830290650Shselasky}; 3831290650Shselasky 3832290650Shselaskystruct mlx5_ifc_query_sq_in_bits { 3833290650Shselasky u8 opcode[0x10]; 3834290650Shselasky u8 reserved_0[0x10]; 3835290650Shselasky 3836290650Shselasky u8 reserved_1[0x10]; 3837290650Shselasky u8 op_mod[0x10]; 3838290650Shselasky 3839290650Shselasky u8 reserved_2[0x8]; 3840290650Shselasky u8 sqn[0x18]; 3841290650Shselasky 3842290650Shselasky u8 reserved_3[0x20]; 3843290650Shselasky}; 3844290650Shselasky 3845290650Shselaskystruct mlx5_ifc_query_special_contexts_out_bits { 3846290650Shselasky u8 status[0x8]; 3847290650Shselasky u8 reserved_0[0x18]; 3848290650Shselasky 3849290650Shselasky u8 syndrome[0x20]; 3850290650Shselasky 3851290650Shselasky u8 reserved_1[0x20]; 3852290650Shselasky 3853290650Shselasky u8 resd_lkey[0x20]; 3854290650Shselasky}; 3855290650Shselasky 3856290650Shselaskystruct mlx5_ifc_query_special_contexts_in_bits { 3857290650Shselasky u8 opcode[0x10]; 3858290650Shselasky u8 reserved_0[0x10]; 3859290650Shselasky 3860290650Shselasky u8 reserved_1[0x10]; 3861290650Shselasky u8 op_mod[0x10]; 3862290650Shselasky 3863290650Shselasky u8 reserved_2[0x40]; 3864290650Shselasky}; 3865290650Shselasky 3866308678Shselaskystruct mlx5_ifc_query_scheduling_element_out_bits { 3867308678Shselasky u8 status[0x8]; 3868308678Shselasky u8 reserved_at_8[0x18]; 3869308678Shselasky 3870308678Shselasky u8 syndrome[0x20]; 3871308678Shselasky 3872308678Shselasky u8 reserved_at_40[0xc0]; 3873308678Shselasky 3874308678Shselasky struct mlx5_ifc_scheduling_context_bits scheduling_context; 3875308678Shselasky 3876308678Shselasky u8 reserved_at_300[0x100]; 3877308678Shselasky}; 3878308678Shselasky 3879308678Shselaskyenum { 3880308678Shselasky MLX5_SCHEDULING_ELEMENT_IN_HIERARCHY_E_SWITCH = 0x2, 3881308678Shselasky}; 3882308678Shselasky 3883308678Shselaskystruct mlx5_ifc_query_scheduling_element_in_bits { 3884308678Shselasky u8 opcode[0x10]; 3885308678Shselasky u8 reserved_at_10[0x10]; 3886308678Shselasky 3887308678Shselasky u8 reserved_at_20[0x10]; 3888308678Shselasky u8 op_mod[0x10]; 3889308678Shselasky 3890308678Shselasky u8 scheduling_hierarchy[0x8]; 3891308678Shselasky u8 reserved_at_48[0x18]; 3892308678Shselasky 3893308678Shselasky u8 scheduling_element_id[0x20]; 3894308678Shselasky 3895308678Shselasky u8 reserved_at_80[0x180]; 3896308678Shselasky}; 3897308678Shselasky 3898290650Shselaskystruct mlx5_ifc_query_rqt_out_bits { 3899290650Shselasky u8 status[0x8]; 3900290650Shselasky u8 reserved_0[0x18]; 3901290650Shselasky 3902290650Shselasky u8 syndrome[0x20]; 3903290650Shselasky 3904290650Shselasky u8 reserved_1[0xc0]; 3905290650Shselasky 3906290650Shselasky struct mlx5_ifc_rqtc_bits rqt_context; 3907290650Shselasky}; 3908290650Shselasky 3909290650Shselaskystruct mlx5_ifc_query_rqt_in_bits { 3910290650Shselasky u8 opcode[0x10]; 3911290650Shselasky u8 reserved_0[0x10]; 3912290650Shselasky 3913290650Shselasky u8 reserved_1[0x10]; 3914290650Shselasky u8 op_mod[0x10]; 3915290650Shselasky 3916290650Shselasky u8 reserved_2[0x8]; 3917290650Shselasky u8 rqtn[0x18]; 3918290650Shselasky 3919290650Shselasky u8 reserved_3[0x20]; 3920290650Shselasky}; 3921290650Shselasky 3922290650Shselaskystruct mlx5_ifc_query_rq_out_bits { 3923290650Shselasky u8 status[0x8]; 3924290650Shselasky u8 reserved_0[0x18]; 3925290650Shselasky 3926290650Shselasky u8 syndrome[0x20]; 3927290650Shselasky 3928290650Shselasky u8 reserved_1[0xc0]; 3929290650Shselasky 3930290650Shselasky struct mlx5_ifc_rqc_bits rq_context; 3931290650Shselasky}; 3932290650Shselasky 3933290650Shselaskystruct mlx5_ifc_query_rq_in_bits { 3934290650Shselasky u8 opcode[0x10]; 3935290650Shselasky u8 reserved_0[0x10]; 3936290650Shselasky 3937290650Shselasky u8 reserved_1[0x10]; 3938290650Shselasky u8 op_mod[0x10]; 3939290650Shselasky 3940290650Shselasky u8 reserved_2[0x8]; 3941290650Shselasky u8 rqn[0x18]; 3942290650Shselasky 3943290650Shselasky u8 reserved_3[0x20]; 3944290650Shselasky}; 3945290650Shselasky 3946290650Shselaskystruct mlx5_ifc_query_roce_address_out_bits { 3947290650Shselasky u8 status[0x8]; 3948290650Shselasky u8 reserved_0[0x18]; 3949290650Shselasky 3950290650Shselasky u8 syndrome[0x20]; 3951290650Shselasky 3952290650Shselasky u8 reserved_1[0x40]; 3953290650Shselasky 3954290650Shselasky struct mlx5_ifc_roce_addr_layout_bits roce_address; 3955290650Shselasky}; 3956290650Shselasky 3957290650Shselaskystruct mlx5_ifc_query_roce_address_in_bits { 3958290650Shselasky u8 opcode[0x10]; 3959290650Shselasky u8 reserved_0[0x10]; 3960290650Shselasky 3961290650Shselasky u8 reserved_1[0x10]; 3962290650Shselasky u8 op_mod[0x10]; 3963290650Shselasky 3964290650Shselasky u8 roce_address_index[0x10]; 3965290650Shselasky u8 reserved_2[0x10]; 3966290650Shselasky 3967290650Shselasky u8 reserved_3[0x20]; 3968290650Shselasky}; 3969290650Shselasky 3970290650Shselaskystruct mlx5_ifc_query_rmp_out_bits { 3971290650Shselasky u8 status[0x8]; 3972290650Shselasky u8 reserved_0[0x18]; 3973290650Shselasky 3974290650Shselasky u8 syndrome[0x20]; 3975290650Shselasky 3976290650Shselasky u8 reserved_1[0xc0]; 3977290650Shselasky 3978290650Shselasky struct mlx5_ifc_rmpc_bits rmp_context; 3979290650Shselasky}; 3980290650Shselasky 3981290650Shselaskystruct mlx5_ifc_query_rmp_in_bits { 3982290650Shselasky u8 opcode[0x10]; 3983290650Shselasky u8 reserved_0[0x10]; 3984290650Shselasky 3985290650Shselasky u8 reserved_1[0x10]; 3986290650Shselasky u8 op_mod[0x10]; 3987290650Shselasky 3988290650Shselasky u8 reserved_2[0x8]; 3989290650Shselasky u8 rmpn[0x18]; 3990290650Shselasky 3991290650Shselasky u8 reserved_3[0x20]; 3992290650Shselasky}; 3993290650Shselasky 3994290650Shselaskystruct mlx5_ifc_query_rdb_out_bits { 3995290650Shselasky u8 status[0x8]; 3996290650Shselasky u8 reserved_0[0x18]; 3997290650Shselasky 3998290650Shselasky u8 syndrome[0x20]; 3999290650Shselasky 4000290650Shselasky u8 reserved_1[0x20]; 4001290650Shselasky 4002290650Shselasky u8 reserved_2[0x18]; 4003290650Shselasky u8 rdb_list_size[0x8]; 4004290650Shselasky 4005290650Shselasky struct mlx5_ifc_rdbc_bits rdb_context[0]; 4006290650Shselasky}; 4007290650Shselasky 4008290650Shselaskystruct mlx5_ifc_query_rdb_in_bits { 4009290650Shselasky u8 opcode[0x10]; 4010290650Shselasky u8 reserved_0[0x10]; 4011290650Shselasky 4012290650Shselasky u8 reserved_1[0x10]; 4013290650Shselasky u8 op_mod[0x10]; 4014290650Shselasky 4015290650Shselasky u8 reserved_2[0x8]; 4016290650Shselasky u8 qpn[0x18]; 4017290650Shselasky 4018290650Shselasky u8 reserved_3[0x20]; 4019290650Shselasky}; 4020290650Shselasky 4021290650Shselaskystruct mlx5_ifc_query_qp_out_bits { 4022290650Shselasky u8 status[0x8]; 4023290650Shselasky u8 reserved_0[0x18]; 4024290650Shselasky 4025290650Shselasky u8 syndrome[0x20]; 4026290650Shselasky 4027290650Shselasky u8 reserved_1[0x40]; 4028290650Shselasky 4029290650Shselasky u8 opt_param_mask[0x20]; 4030290650Shselasky 4031290650Shselasky u8 reserved_2[0x20]; 4032290650Shselasky 4033290650Shselasky struct mlx5_ifc_qpc_bits qpc; 4034290650Shselasky 4035290650Shselasky u8 reserved_3[0x80]; 4036290650Shselasky 4037290650Shselasky u8 pas[0][0x40]; 4038290650Shselasky}; 4039290650Shselasky 4040290650Shselaskystruct mlx5_ifc_query_qp_in_bits { 4041290650Shselasky u8 opcode[0x10]; 4042290650Shselasky u8 reserved_0[0x10]; 4043290650Shselasky 4044290650Shselasky u8 reserved_1[0x10]; 4045290650Shselasky u8 op_mod[0x10]; 4046290650Shselasky 4047290650Shselasky u8 reserved_2[0x8]; 4048290650Shselasky u8 qpn[0x18]; 4049290650Shselasky 4050290650Shselasky u8 reserved_3[0x20]; 4051290650Shselasky}; 4052290650Shselasky 4053290650Shselaskystruct mlx5_ifc_query_q_counter_out_bits { 4054290650Shselasky u8 status[0x8]; 4055290650Shselasky u8 reserved_0[0x18]; 4056290650Shselasky 4057290650Shselasky u8 syndrome[0x20]; 4058290650Shselasky 4059290650Shselasky u8 reserved_1[0x40]; 4060290650Shselasky 4061290650Shselasky u8 rx_write_requests[0x20]; 4062290650Shselasky 4063290650Shselasky u8 reserved_2[0x20]; 4064290650Shselasky 4065290650Shselasky u8 rx_read_requests[0x20]; 4066290650Shselasky 4067290650Shselasky u8 reserved_3[0x20]; 4068290650Shselasky 4069290650Shselasky u8 rx_atomic_requests[0x20]; 4070290650Shselasky 4071290650Shselasky u8 reserved_4[0x20]; 4072290650Shselasky 4073290650Shselasky u8 rx_dct_connect[0x20]; 4074290650Shselasky 4075290650Shselasky u8 reserved_5[0x20]; 4076290650Shselasky 4077290650Shselasky u8 out_of_buffer[0x20]; 4078290650Shselasky 4079306233Shselasky u8 reserved_7[0x20]; 4080290650Shselasky 4081290650Shselasky u8 out_of_sequence[0x20]; 4082290650Shselasky 4083306233Shselasky u8 reserved_8[0x20]; 4084306233Shselasky 4085306233Shselasky u8 duplicate_request[0x20]; 4086306233Shselasky 4087306233Shselasky u8 reserved_9[0x20]; 4088306233Shselasky 4089306233Shselasky u8 rnr_nak_retry_err[0x20]; 4090306233Shselasky 4091306233Shselasky u8 reserved_10[0x20]; 4092306233Shselasky 4093306233Shselasky u8 packet_seq_err[0x20]; 4094306233Shselasky 4095306233Shselasky u8 reserved_11[0x20]; 4096306233Shselasky 4097306233Shselasky u8 implied_nak_seq_err[0x20]; 4098306233Shselasky 4099306233Shselasky u8 reserved_12[0x20]; 4100306233Shselasky 4101306233Shselasky u8 local_ack_timeout_err[0x20]; 4102306233Shselasky 4103306233Shselasky u8 reserved_13[0x4e0]; 4104290650Shselasky}; 4105290650Shselasky 4106290650Shselaskystruct mlx5_ifc_query_q_counter_in_bits { 4107290650Shselasky u8 opcode[0x10]; 4108290650Shselasky u8 reserved_0[0x10]; 4109290650Shselasky 4110290650Shselasky u8 reserved_1[0x10]; 4111290650Shselasky u8 op_mod[0x10]; 4112290650Shselasky 4113290650Shselasky u8 reserved_2[0x80]; 4114290650Shselasky 4115290650Shselasky u8 clear[0x1]; 4116290650Shselasky u8 reserved_3[0x1f]; 4117290650Shselasky 4118290650Shselasky u8 reserved_4[0x18]; 4119290650Shselasky u8 counter_set_id[0x8]; 4120290650Shselasky}; 4121290650Shselasky 4122290650Shselaskystruct mlx5_ifc_query_pages_out_bits { 4123290650Shselasky u8 status[0x8]; 4124290650Shselasky u8 reserved_0[0x18]; 4125290650Shselasky 4126290650Shselasky u8 syndrome[0x20]; 4127290650Shselasky 4128290650Shselasky u8 reserved_1[0x10]; 4129290650Shselasky u8 function_id[0x10]; 4130290650Shselasky 4131290650Shselasky u8 num_pages[0x20]; 4132290650Shselasky}; 4133290650Shselasky 4134290650Shselaskyenum { 4135290650Shselasky MLX5_BOOT_PAGES = 0x1, 4136290650Shselasky MLX5_INIT_PAGES = 0x2, 4137290650Shselasky MLX5_POST_INIT_PAGES = 0x3, 4138290650Shselasky}; 4139290650Shselasky 4140290650Shselaskystruct mlx5_ifc_query_pages_in_bits { 4141290650Shselasky u8 opcode[0x10]; 4142290650Shselasky u8 reserved_0[0x10]; 4143290650Shselasky 4144290650Shselasky u8 reserved_1[0x10]; 4145290650Shselasky u8 op_mod[0x10]; 4146290650Shselasky 4147290650Shselasky u8 reserved_2[0x10]; 4148290650Shselasky u8 function_id[0x10]; 4149290650Shselasky 4150290650Shselasky u8 reserved_3[0x20]; 4151290650Shselasky}; 4152290650Shselasky 4153290650Shselaskystruct mlx5_ifc_query_nic_vport_context_out_bits { 4154290650Shselasky u8 status[0x8]; 4155290650Shselasky u8 reserved_0[0x18]; 4156290650Shselasky 4157290650Shselasky u8 syndrome[0x20]; 4158290650Shselasky 4159290650Shselasky u8 reserved_1[0x40]; 4160290650Shselasky 4161290650Shselasky struct mlx5_ifc_nic_vport_context_bits nic_vport_context; 4162290650Shselasky}; 4163290650Shselasky 4164290650Shselaskystruct mlx5_ifc_query_nic_vport_context_in_bits { 4165290650Shselasky u8 opcode[0x10]; 4166290650Shselasky u8 reserved_0[0x10]; 4167290650Shselasky 4168290650Shselasky u8 reserved_1[0x10]; 4169290650Shselasky u8 op_mod[0x10]; 4170290650Shselasky 4171290650Shselasky u8 other_vport[0x1]; 4172290650Shselasky u8 reserved_2[0xf]; 4173290650Shselasky u8 vport_number[0x10]; 4174290650Shselasky 4175290650Shselasky u8 reserved_3[0x5]; 4176290650Shselasky u8 allowed_list_type[0x3]; 4177290650Shselasky u8 reserved_4[0x18]; 4178290650Shselasky}; 4179290650Shselasky 4180290650Shselaskystruct mlx5_ifc_query_mkey_out_bits { 4181290650Shselasky u8 status[0x8]; 4182290650Shselasky u8 reserved_0[0x18]; 4183290650Shselasky 4184290650Shselasky u8 syndrome[0x20]; 4185290650Shselasky 4186290650Shselasky u8 reserved_1[0x40]; 4187290650Shselasky 4188290650Shselasky struct mlx5_ifc_mkc_bits memory_key_mkey_entry; 4189290650Shselasky 4190290650Shselasky u8 reserved_2[0x600]; 4191290650Shselasky 4192290650Shselasky u8 bsf0_klm0_pas_mtt0_1[16][0x8]; 4193290650Shselasky 4194290650Shselasky u8 bsf1_klm1_pas_mtt2_3[16][0x8]; 4195290650Shselasky}; 4196290650Shselasky 4197290650Shselaskystruct mlx5_ifc_query_mkey_in_bits { 4198290650Shselasky u8 opcode[0x10]; 4199290650Shselasky u8 reserved_0[0x10]; 4200290650Shselasky 4201290650Shselasky u8 reserved_1[0x10]; 4202290650Shselasky u8 op_mod[0x10]; 4203290650Shselasky 4204290650Shselasky u8 reserved_2[0x8]; 4205290650Shselasky u8 mkey_index[0x18]; 4206290650Shselasky 4207290650Shselasky u8 pg_access[0x1]; 4208290650Shselasky u8 reserved_3[0x1f]; 4209290650Shselasky}; 4210290650Shselasky 4211290650Shselaskystruct mlx5_ifc_query_mad_demux_out_bits { 4212290650Shselasky u8 status[0x8]; 4213290650Shselasky u8 reserved_0[0x18]; 4214290650Shselasky 4215290650Shselasky u8 syndrome[0x20]; 4216290650Shselasky 4217290650Shselasky u8 reserved_1[0x40]; 4218290650Shselasky 4219290650Shselasky u8 mad_dumux_parameters_block[0x20]; 4220290650Shselasky}; 4221290650Shselasky 4222290650Shselaskystruct mlx5_ifc_query_mad_demux_in_bits { 4223290650Shselasky u8 opcode[0x10]; 4224290650Shselasky u8 reserved_0[0x10]; 4225290650Shselasky 4226290650Shselasky u8 reserved_1[0x10]; 4227290650Shselasky u8 op_mod[0x10]; 4228290650Shselasky 4229290650Shselasky u8 reserved_2[0x40]; 4230290650Shselasky}; 4231290650Shselasky 4232290650Shselaskystruct mlx5_ifc_query_l2_table_entry_out_bits { 4233290650Shselasky u8 status[0x8]; 4234290650Shselasky u8 reserved_0[0x18]; 4235290650Shselasky 4236290650Shselasky u8 syndrome[0x20]; 4237290650Shselasky 4238290650Shselasky u8 reserved_1[0xa0]; 4239290650Shselasky 4240290650Shselasky u8 reserved_2[0x13]; 4241290650Shselasky u8 vlan_valid[0x1]; 4242290650Shselasky u8 vlan[0xc]; 4243290650Shselasky 4244290650Shselasky struct mlx5_ifc_mac_address_layout_bits mac_address; 4245290650Shselasky 4246290650Shselasky u8 reserved_3[0xc0]; 4247290650Shselasky}; 4248290650Shselasky 4249290650Shselaskystruct mlx5_ifc_query_l2_table_entry_in_bits { 4250290650Shselasky u8 opcode[0x10]; 4251290650Shselasky u8 reserved_0[0x10]; 4252290650Shselasky 4253290650Shselasky u8 reserved_1[0x10]; 4254290650Shselasky u8 op_mod[0x10]; 4255290650Shselasky 4256290650Shselasky u8 reserved_2[0x60]; 4257290650Shselasky 4258290650Shselasky u8 reserved_3[0x8]; 4259290650Shselasky u8 table_index[0x18]; 4260290650Shselasky 4261290650Shselasky u8 reserved_4[0x140]; 4262290650Shselasky}; 4263290650Shselasky 4264290650Shselaskystruct mlx5_ifc_query_issi_out_bits { 4265290650Shselasky u8 status[0x8]; 4266290650Shselasky u8 reserved_0[0x18]; 4267290650Shselasky 4268290650Shselasky u8 syndrome[0x20]; 4269290650Shselasky 4270290650Shselasky u8 reserved_1[0x10]; 4271290650Shselasky u8 current_issi[0x10]; 4272290650Shselasky 4273290650Shselasky u8 reserved_2[0xa0]; 4274290650Shselasky 4275290650Shselasky u8 supported_issi_reserved[76][0x8]; 4276290650Shselasky u8 supported_issi_dw0[0x20]; 4277290650Shselasky}; 4278290650Shselasky 4279290650Shselaskystruct mlx5_ifc_query_issi_in_bits { 4280290650Shselasky u8 opcode[0x10]; 4281290650Shselasky u8 reserved_0[0x10]; 4282290650Shselasky 4283290650Shselasky u8 reserved_1[0x10]; 4284290650Shselasky u8 op_mod[0x10]; 4285290650Shselasky 4286290650Shselasky u8 reserved_2[0x40]; 4287290650Shselasky}; 4288290650Shselasky 4289290650Shselaskystruct mlx5_ifc_query_hca_vport_pkey_out_bits { 4290290650Shselasky u8 status[0x8]; 4291290650Shselasky u8 reserved_0[0x18]; 4292290650Shselasky 4293290650Shselasky u8 syndrome[0x20]; 4294290650Shselasky 4295290650Shselasky u8 reserved_1[0x40]; 4296290650Shselasky 4297290650Shselasky struct mlx5_ifc_pkey_bits pkey[0]; 4298290650Shselasky}; 4299290650Shselasky 4300290650Shselaskystruct mlx5_ifc_query_hca_vport_pkey_in_bits { 4301290650Shselasky u8 opcode[0x10]; 4302290650Shselasky u8 reserved_0[0x10]; 4303290650Shselasky 4304290650Shselasky u8 reserved_1[0x10]; 4305290650Shselasky u8 op_mod[0x10]; 4306290650Shselasky 4307290650Shselasky u8 other_vport[0x1]; 4308290650Shselasky u8 reserved_2[0xb]; 4309290650Shselasky u8 port_num[0x4]; 4310290650Shselasky u8 vport_number[0x10]; 4311290650Shselasky 4312290650Shselasky u8 reserved_3[0x10]; 4313290650Shselasky u8 pkey_index[0x10]; 4314290650Shselasky}; 4315290650Shselasky 4316290650Shselaskystruct mlx5_ifc_query_hca_vport_gid_out_bits { 4317290650Shselasky u8 status[0x8]; 4318290650Shselasky u8 reserved_0[0x18]; 4319290650Shselasky 4320290650Shselasky u8 syndrome[0x20]; 4321290650Shselasky 4322290650Shselasky u8 reserved_1[0x20]; 4323290650Shselasky 4324290650Shselasky u8 gids_num[0x10]; 4325290650Shselasky u8 reserved_2[0x10]; 4326290650Shselasky 4327290650Shselasky struct mlx5_ifc_array128_auto_bits gid[0]; 4328290650Shselasky}; 4329290650Shselasky 4330290650Shselaskystruct mlx5_ifc_query_hca_vport_gid_in_bits { 4331290650Shselasky u8 opcode[0x10]; 4332290650Shselasky u8 reserved_0[0x10]; 4333290650Shselasky 4334290650Shselasky u8 reserved_1[0x10]; 4335290650Shselasky u8 op_mod[0x10]; 4336290650Shselasky 4337290650Shselasky u8 other_vport[0x1]; 4338290650Shselasky u8 reserved_2[0xb]; 4339290650Shselasky u8 port_num[0x4]; 4340290650Shselasky u8 vport_number[0x10]; 4341290650Shselasky 4342290650Shselasky u8 reserved_3[0x10]; 4343290650Shselasky u8 gid_index[0x10]; 4344290650Shselasky}; 4345290650Shselasky 4346290650Shselaskystruct mlx5_ifc_query_hca_vport_context_out_bits { 4347290650Shselasky u8 status[0x8]; 4348290650Shselasky u8 reserved_0[0x18]; 4349290650Shselasky 4350290650Shselasky u8 syndrome[0x20]; 4351290650Shselasky 4352290650Shselasky u8 reserved_1[0x40]; 4353290650Shselasky 4354290650Shselasky struct mlx5_ifc_hca_vport_context_bits hca_vport_context; 4355290650Shselasky}; 4356290650Shselasky 4357290650Shselaskystruct mlx5_ifc_query_hca_vport_context_in_bits { 4358290650Shselasky u8 opcode[0x10]; 4359290650Shselasky u8 reserved_0[0x10]; 4360290650Shselasky 4361290650Shselasky u8 reserved_1[0x10]; 4362290650Shselasky u8 op_mod[0x10]; 4363290650Shselasky 4364290650Shselasky u8 other_vport[0x1]; 4365290650Shselasky u8 reserved_2[0xb]; 4366290650Shselasky u8 port_num[0x4]; 4367290650Shselasky u8 vport_number[0x10]; 4368290650Shselasky 4369290650Shselasky u8 reserved_3[0x20]; 4370290650Shselasky}; 4371290650Shselasky 4372290650Shselaskystruct mlx5_ifc_query_hca_cap_out_bits { 4373290650Shselasky u8 status[0x8]; 4374290650Shselasky u8 reserved_0[0x18]; 4375290650Shselasky 4376290650Shselasky u8 syndrome[0x20]; 4377290650Shselasky 4378290650Shselasky u8 reserved_1[0x40]; 4379290650Shselasky 4380290650Shselasky union mlx5_ifc_hca_cap_union_bits capability; 4381290650Shselasky}; 4382290650Shselasky 4383290650Shselaskystruct mlx5_ifc_query_hca_cap_in_bits { 4384290650Shselasky u8 opcode[0x10]; 4385290650Shselasky u8 reserved_0[0x10]; 4386290650Shselasky 4387290650Shselasky u8 reserved_1[0x10]; 4388290650Shselasky u8 op_mod[0x10]; 4389290650Shselasky 4390290650Shselasky u8 reserved_2[0x40]; 4391290650Shselasky}; 4392290650Shselasky 4393290650Shselaskystruct mlx5_ifc_query_flow_table_out_bits { 4394290650Shselasky u8 status[0x8]; 4395290650Shselasky u8 reserved_0[0x18]; 4396290650Shselasky 4397290650Shselasky u8 syndrome[0x20]; 4398290650Shselasky 4399290650Shselasky u8 reserved_1[0x80]; 4400290650Shselasky 4401290650Shselasky u8 reserved_2[0x8]; 4402290650Shselasky u8 level[0x8]; 4403290650Shselasky u8 reserved_3[0x8]; 4404290650Shselasky u8 log_size[0x8]; 4405290650Shselasky 4406290650Shselasky u8 reserved_4[0x120]; 4407290650Shselasky}; 4408290650Shselasky 4409290650Shselaskystruct mlx5_ifc_query_flow_table_in_bits { 4410290650Shselasky u8 opcode[0x10]; 4411290650Shselasky u8 reserved_0[0x10]; 4412290650Shselasky 4413290650Shselasky u8 reserved_1[0x10]; 4414290650Shselasky u8 op_mod[0x10]; 4415290650Shselasky 4416290650Shselasky u8 other_vport[0x1]; 4417290650Shselasky u8 reserved_2[0xf]; 4418290650Shselasky u8 vport_number[0x10]; 4419290650Shselasky 4420290650Shselasky u8 reserved_3[0x20]; 4421290650Shselasky 4422290650Shselasky u8 table_type[0x8]; 4423290650Shselasky u8 reserved_4[0x18]; 4424290650Shselasky 4425290650Shselasky u8 reserved_5[0x8]; 4426290650Shselasky u8 table_id[0x18]; 4427290650Shselasky 4428290650Shselasky u8 reserved_6[0x140]; 4429290650Shselasky}; 4430290650Shselasky 4431290650Shselaskystruct mlx5_ifc_query_fte_out_bits { 4432290650Shselasky u8 status[0x8]; 4433290650Shselasky u8 reserved_0[0x18]; 4434290650Shselasky 4435290650Shselasky u8 syndrome[0x20]; 4436290650Shselasky 4437290650Shselasky u8 reserved_1[0x1c0]; 4438290650Shselasky 4439290650Shselasky struct mlx5_ifc_flow_context_bits flow_context; 4440290650Shselasky}; 4441290650Shselasky 4442290650Shselaskystruct mlx5_ifc_query_fte_in_bits { 4443290650Shselasky u8 opcode[0x10]; 4444290650Shselasky u8 reserved_0[0x10]; 4445290650Shselasky 4446290650Shselasky u8 reserved_1[0x10]; 4447290650Shselasky u8 op_mod[0x10]; 4448290650Shselasky 4449290650Shselasky u8 other_vport[0x1]; 4450290650Shselasky u8 reserved_2[0xf]; 4451290650Shselasky u8 vport_number[0x10]; 4452290650Shselasky 4453290650Shselasky u8 reserved_3[0x20]; 4454290650Shselasky 4455290650Shselasky u8 table_type[0x8]; 4456290650Shselasky u8 reserved_4[0x18]; 4457290650Shselasky 4458290650Shselasky u8 reserved_5[0x8]; 4459290650Shselasky u8 table_id[0x18]; 4460290650Shselasky 4461290650Shselasky u8 reserved_6[0x40]; 4462290650Shselasky 4463290650Shselasky u8 flow_index[0x20]; 4464290650Shselasky 4465290650Shselasky u8 reserved_7[0xe0]; 4466290650Shselasky}; 4467290650Shselasky 4468290650Shselaskyenum { 4469290650Shselasky MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0, 4470290650Shselasky MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1, 4471290650Shselasky MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2, 4472290650Shselasky}; 4473290650Shselasky 4474290650Shselaskystruct mlx5_ifc_query_flow_group_out_bits { 4475290650Shselasky u8 status[0x8]; 4476290650Shselasky u8 reserved_0[0x18]; 4477290650Shselasky 4478290650Shselasky u8 syndrome[0x20]; 4479290650Shselasky 4480290650Shselasky u8 reserved_1[0xa0]; 4481290650Shselasky 4482290650Shselasky u8 start_flow_index[0x20]; 4483290650Shselasky 4484290650Shselasky u8 reserved_2[0x20]; 4485290650Shselasky 4486290650Shselasky u8 end_flow_index[0x20]; 4487290650Shselasky 4488290650Shselasky u8 reserved_3[0xa0]; 4489290650Shselasky 4490290650Shselasky u8 reserved_4[0x18]; 4491290650Shselasky u8 match_criteria_enable[0x8]; 4492290650Shselasky 4493290650Shselasky struct mlx5_ifc_fte_match_param_bits match_criteria; 4494290650Shselasky 4495290650Shselasky u8 reserved_5[0xe00]; 4496290650Shselasky}; 4497290650Shselasky 4498290650Shselaskystruct mlx5_ifc_query_flow_group_in_bits { 4499290650Shselasky u8 opcode[0x10]; 4500290650Shselasky u8 reserved_0[0x10]; 4501290650Shselasky 4502290650Shselasky u8 reserved_1[0x10]; 4503290650Shselasky u8 op_mod[0x10]; 4504290650Shselasky 4505290650Shselasky u8 other_vport[0x1]; 4506290650Shselasky u8 reserved_2[0xf]; 4507290650Shselasky u8 vport_number[0x10]; 4508290650Shselasky 4509290650Shselasky u8 reserved_3[0x20]; 4510290650Shselasky 4511290650Shselasky u8 table_type[0x8]; 4512290650Shselasky u8 reserved_4[0x18]; 4513290650Shselasky 4514290650Shselasky u8 reserved_5[0x8]; 4515290650Shselasky u8 table_id[0x18]; 4516290650Shselasky 4517290650Shselasky u8 group_id[0x20]; 4518290650Shselasky 4519290650Shselasky u8 reserved_6[0x120]; 4520290650Shselasky}; 4521290650Shselasky 4522290650Shselaskystruct mlx5_ifc_query_flow_counter_out_bits { 4523290650Shselasky u8 status[0x8]; 4524290650Shselasky u8 reserved_0[0x18]; 4525290650Shselasky 4526290650Shselasky u8 syndrome[0x20]; 4527290650Shselasky 4528290650Shselasky u8 reserved_1[0x40]; 4529290650Shselasky 4530290650Shselasky struct mlx5_ifc_traffic_counter_bits flow_statistics; 4531290650Shselasky 4532290650Shselasky u8 reserved_2[0x700]; 4533290650Shselasky}; 4534290650Shselasky 4535290650Shselaskystruct mlx5_ifc_query_flow_counter_in_bits { 4536290650Shselasky u8 opcode[0x10]; 4537290650Shselasky u8 reserved_0[0x10]; 4538290650Shselasky 4539290650Shselasky u8 reserved_1[0x10]; 4540290650Shselasky u8 op_mod[0x10]; 4541290650Shselasky 4542290650Shselasky u8 reserved_2[0x80]; 4543290650Shselasky 4544290650Shselasky u8 clear[0x1]; 4545290650Shselasky u8 reserved_3[0x1f]; 4546290650Shselasky 4547290650Shselasky u8 reserved_4[0x10]; 4548290650Shselasky u8 flow_counter_id[0x10]; 4549290650Shselasky}; 4550290650Shselasky 4551290650Shselaskystruct mlx5_ifc_query_esw_vport_context_out_bits { 4552290650Shselasky u8 status[0x8]; 4553290650Shselasky u8 reserved_0[0x18]; 4554290650Shselasky 4555290650Shselasky u8 syndrome[0x20]; 4556290650Shselasky 4557290650Shselasky u8 reserved_1[0x40]; 4558290650Shselasky 4559290650Shselasky struct mlx5_ifc_esw_vport_context_bits esw_vport_context; 4560290650Shselasky}; 4561290650Shselasky 4562290650Shselaskystruct mlx5_ifc_query_esw_vport_context_in_bits { 4563290650Shselasky u8 opcode[0x10]; 4564290650Shselasky u8 reserved_0[0x10]; 4565290650Shselasky 4566290650Shselasky u8 reserved_1[0x10]; 4567290650Shselasky u8 op_mod[0x10]; 4568290650Shselasky 4569290650Shselasky u8 other_vport[0x1]; 4570290650Shselasky u8 reserved_2[0xf]; 4571290650Shselasky u8 vport_number[0x10]; 4572290650Shselasky 4573290650Shselasky u8 reserved_3[0x20]; 4574290650Shselasky}; 4575290650Shselasky 4576290650Shselaskystruct mlx5_ifc_query_eq_out_bits { 4577290650Shselasky u8 status[0x8]; 4578290650Shselasky u8 reserved_0[0x18]; 4579290650Shselasky 4580290650Shselasky u8 syndrome[0x20]; 4581290650Shselasky 4582290650Shselasky u8 reserved_1[0x40]; 4583290650Shselasky 4584290650Shselasky struct mlx5_ifc_eqc_bits eq_context_entry; 4585290650Shselasky 4586290650Shselasky u8 reserved_2[0x40]; 4587290650Shselasky 4588290650Shselasky u8 event_bitmask[0x40]; 4589290650Shselasky 4590290650Shselasky u8 reserved_3[0x580]; 4591290650Shselasky 4592290650Shselasky u8 pas[0][0x40]; 4593290650Shselasky}; 4594290650Shselasky 4595290650Shselaskystruct mlx5_ifc_query_eq_in_bits { 4596290650Shselasky u8 opcode[0x10]; 4597290650Shselasky u8 reserved_0[0x10]; 4598290650Shselasky 4599290650Shselasky u8 reserved_1[0x10]; 4600290650Shselasky u8 op_mod[0x10]; 4601290650Shselasky 4602290650Shselasky u8 reserved_2[0x18]; 4603290650Shselasky u8 eq_number[0x8]; 4604290650Shselasky 4605290650Shselasky u8 reserved_3[0x20]; 4606290650Shselasky}; 4607290650Shselasky 4608290650Shselaskystruct mlx5_ifc_query_dct_out_bits { 4609290650Shselasky u8 status[0x8]; 4610290650Shselasky u8 reserved_0[0x18]; 4611290650Shselasky 4612290650Shselasky u8 syndrome[0x20]; 4613290650Shselasky 4614290650Shselasky u8 reserved_1[0x40]; 4615290650Shselasky 4616290650Shselasky struct mlx5_ifc_dctc_bits dct_context_entry; 4617290650Shselasky 4618290650Shselasky u8 reserved_2[0x180]; 4619290650Shselasky}; 4620290650Shselasky 4621290650Shselaskystruct mlx5_ifc_query_dct_in_bits { 4622290650Shselasky u8 opcode[0x10]; 4623290650Shselasky u8 reserved_0[0x10]; 4624290650Shselasky 4625290650Shselasky u8 reserved_1[0x10]; 4626290650Shselasky u8 op_mod[0x10]; 4627290650Shselasky 4628290650Shselasky u8 reserved_2[0x8]; 4629290650Shselasky u8 dctn[0x18]; 4630290650Shselasky 4631290650Shselasky u8 reserved_3[0x20]; 4632290650Shselasky}; 4633290650Shselasky 4634290650Shselaskystruct mlx5_ifc_query_dc_cnak_trace_out_bits { 4635290650Shselasky u8 status[0x8]; 4636290650Shselasky u8 reserved_0[0x18]; 4637290650Shselasky 4638290650Shselasky u8 syndrome[0x20]; 4639290650Shselasky 4640290650Shselasky u8 enable[0x1]; 4641290650Shselasky u8 reserved_1[0x1f]; 4642290650Shselasky 4643290650Shselasky u8 reserved_2[0x160]; 4644290650Shselasky 4645290650Shselasky struct mlx5_ifc_cmd_pas_bits pas; 4646290650Shselasky}; 4647290650Shselasky 4648290650Shselaskystruct mlx5_ifc_query_dc_cnak_trace_in_bits { 4649290650Shselasky u8 opcode[0x10]; 4650290650Shselasky u8 reserved_0[0x10]; 4651290650Shselasky 4652290650Shselasky u8 reserved_1[0x10]; 4653290650Shselasky u8 op_mod[0x10]; 4654290650Shselasky 4655290650Shselasky u8 reserved_2[0x40]; 4656290650Shselasky}; 4657290650Shselasky 4658290650Shselaskystruct mlx5_ifc_query_cq_out_bits { 4659290650Shselasky u8 status[0x8]; 4660290650Shselasky u8 reserved_0[0x18]; 4661290650Shselasky 4662290650Shselasky u8 syndrome[0x20]; 4663290650Shselasky 4664290650Shselasky u8 reserved_1[0x40]; 4665290650Shselasky 4666290650Shselasky struct mlx5_ifc_cqc_bits cq_context; 4667290650Shselasky 4668290650Shselasky u8 reserved_2[0x600]; 4669290650Shselasky 4670290650Shselasky u8 pas[0][0x40]; 4671290650Shselasky}; 4672290650Shselasky 4673290650Shselaskystruct mlx5_ifc_query_cq_in_bits { 4674290650Shselasky u8 opcode[0x10]; 4675290650Shselasky u8 reserved_0[0x10]; 4676290650Shselasky 4677290650Shselasky u8 reserved_1[0x10]; 4678290650Shselasky u8 op_mod[0x10]; 4679290650Shselasky 4680290650Shselasky u8 reserved_2[0x8]; 4681290650Shselasky u8 cqn[0x18]; 4682290650Shselasky 4683290650Shselasky u8 reserved_3[0x20]; 4684290650Shselasky}; 4685290650Shselasky 4686290650Shselaskystruct mlx5_ifc_query_cong_status_out_bits { 4687290650Shselasky u8 status[0x8]; 4688290650Shselasky u8 reserved_0[0x18]; 4689290650Shselasky 4690290650Shselasky u8 syndrome[0x20]; 4691290650Shselasky 4692290650Shselasky u8 reserved_1[0x20]; 4693290650Shselasky 4694290650Shselasky u8 enable[0x1]; 4695290650Shselasky u8 tag_enable[0x1]; 4696290650Shselasky u8 reserved_2[0x1e]; 4697290650Shselasky}; 4698290650Shselasky 4699290650Shselaskystruct mlx5_ifc_query_cong_status_in_bits { 4700290650Shselasky u8 opcode[0x10]; 4701290650Shselasky u8 reserved_0[0x10]; 4702290650Shselasky 4703290650Shselasky u8 reserved_1[0x10]; 4704290650Shselasky u8 op_mod[0x10]; 4705290650Shselasky 4706290650Shselasky u8 reserved_2[0x18]; 4707290650Shselasky u8 priority[0x4]; 4708290650Shselasky u8 cong_protocol[0x4]; 4709290650Shselasky 4710290650Shselasky u8 reserved_3[0x20]; 4711290650Shselasky}; 4712290650Shselasky 4713290650Shselaskystruct mlx5_ifc_query_cong_statistics_out_bits { 4714290650Shselasky u8 status[0x8]; 4715290650Shselasky u8 reserved_0[0x18]; 4716290650Shselasky 4717290650Shselasky u8 syndrome[0x20]; 4718290650Shselasky 4719290650Shselasky u8 reserved_1[0x40]; 4720290650Shselasky 4721290650Shselasky u8 cur_flows[0x20]; 4722290650Shselasky 4723290650Shselasky u8 sum_flows[0x20]; 4724290650Shselasky 4725290650Shselasky u8 cnp_ignored_high[0x20]; 4726290650Shselasky 4727290650Shselasky u8 cnp_ignored_low[0x20]; 4728290650Shselasky 4729290650Shselasky u8 cnp_handled_high[0x20]; 4730290650Shselasky 4731290650Shselasky u8 cnp_handled_low[0x20]; 4732290650Shselasky 4733290650Shselasky u8 reserved_2[0x100]; 4734290650Shselasky 4735290650Shselasky u8 time_stamp_high[0x20]; 4736290650Shselasky 4737290650Shselasky u8 time_stamp_low[0x20]; 4738290650Shselasky 4739290650Shselasky u8 accumulators_period[0x20]; 4740290650Shselasky 4741290650Shselasky u8 ecn_marked_roce_packets_high[0x20]; 4742290650Shselasky 4743290650Shselasky u8 ecn_marked_roce_packets_low[0x20]; 4744290650Shselasky 4745290650Shselasky u8 cnps_sent_high[0x20]; 4746290650Shselasky 4747290650Shselasky u8 cnps_sent_low[0x20]; 4748290650Shselasky 4749290650Shselasky u8 reserved_3[0x560]; 4750290650Shselasky}; 4751290650Shselasky 4752290650Shselaskystruct mlx5_ifc_query_cong_statistics_in_bits { 4753290650Shselasky u8 opcode[0x10]; 4754290650Shselasky u8 reserved_0[0x10]; 4755290650Shselasky 4756290650Shselasky u8 reserved_1[0x10]; 4757290650Shselasky u8 op_mod[0x10]; 4758290650Shselasky 4759290650Shselasky u8 clear[0x1]; 4760290650Shselasky u8 reserved_2[0x1f]; 4761290650Shselasky 4762290650Shselasky u8 reserved_3[0x20]; 4763290650Shselasky}; 4764290650Shselasky 4765290650Shselaskystruct mlx5_ifc_query_cong_params_out_bits { 4766290650Shselasky u8 status[0x8]; 4767290650Shselasky u8 reserved_0[0x18]; 4768290650Shselasky 4769290650Shselasky u8 syndrome[0x20]; 4770290650Shselasky 4771290650Shselasky u8 reserved_1[0x40]; 4772290650Shselasky 4773290650Shselasky union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters; 4774290650Shselasky}; 4775290650Shselasky 4776290650Shselaskystruct mlx5_ifc_query_cong_params_in_bits { 4777290650Shselasky u8 opcode[0x10]; 4778290650Shselasky u8 reserved_0[0x10]; 4779290650Shselasky 4780290650Shselasky u8 reserved_1[0x10]; 4781290650Shselasky u8 op_mod[0x10]; 4782290650Shselasky 4783290650Shselasky u8 reserved_2[0x1c]; 4784290650Shselasky u8 cong_protocol[0x4]; 4785290650Shselasky 4786290650Shselasky u8 reserved_3[0x20]; 4787290650Shselasky}; 4788290650Shselasky 4789290650Shselaskystruct mlx5_ifc_query_burst_size_out_bits { 4790290650Shselasky u8 status[0x8]; 4791290650Shselasky u8 reserved_0[0x18]; 4792290650Shselasky 4793290650Shselasky u8 syndrome[0x20]; 4794290650Shselasky 4795290650Shselasky u8 reserved_1[0x20]; 4796290650Shselasky 4797290650Shselasky u8 reserved_2[0x9]; 4798290650Shselasky u8 device_burst_size[0x17]; 4799290650Shselasky}; 4800290650Shselasky 4801290650Shselaskystruct mlx5_ifc_query_burst_size_in_bits { 4802290650Shselasky u8 opcode[0x10]; 4803290650Shselasky u8 reserved_0[0x10]; 4804290650Shselasky 4805290650Shselasky u8 reserved_1[0x10]; 4806290650Shselasky u8 op_mod[0x10]; 4807290650Shselasky 4808290650Shselasky u8 reserved_2[0x40]; 4809290650Shselasky}; 4810290650Shselasky 4811290650Shselaskystruct mlx5_ifc_query_adapter_out_bits { 4812290650Shselasky u8 status[0x8]; 4813290650Shselasky u8 reserved_0[0x18]; 4814290650Shselasky 4815290650Shselasky u8 syndrome[0x20]; 4816290650Shselasky 4817290650Shselasky u8 reserved_1[0x40]; 4818290650Shselasky 4819290650Shselasky struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct; 4820290650Shselasky}; 4821290650Shselasky 4822290650Shselaskystruct mlx5_ifc_query_adapter_in_bits { 4823290650Shselasky u8 opcode[0x10]; 4824290650Shselasky u8 reserved_0[0x10]; 4825290650Shselasky 4826290650Shselasky u8 reserved_1[0x10]; 4827290650Shselasky u8 op_mod[0x10]; 4828290650Shselasky 4829290650Shselasky u8 reserved_2[0x40]; 4830290650Shselasky}; 4831290650Shselasky 4832290650Shselaskystruct mlx5_ifc_qp_2rst_out_bits { 4833290650Shselasky u8 status[0x8]; 4834290650Shselasky u8 reserved_0[0x18]; 4835290650Shselasky 4836290650Shselasky u8 syndrome[0x20]; 4837290650Shselasky 4838290650Shselasky u8 reserved_1[0x40]; 4839290650Shselasky}; 4840290650Shselasky 4841290650Shselaskystruct mlx5_ifc_qp_2rst_in_bits { 4842290650Shselasky u8 opcode[0x10]; 4843290650Shselasky u8 reserved_0[0x10]; 4844290650Shselasky 4845290650Shselasky u8 reserved_1[0x10]; 4846290650Shselasky u8 op_mod[0x10]; 4847290650Shselasky 4848290650Shselasky u8 reserved_2[0x8]; 4849290650Shselasky u8 qpn[0x18]; 4850290650Shselasky 4851290650Shselasky u8 reserved_3[0x20]; 4852290650Shselasky}; 4853290650Shselasky 4854290650Shselaskystruct mlx5_ifc_qp_2err_out_bits { 4855290650Shselasky u8 status[0x8]; 4856290650Shselasky u8 reserved_0[0x18]; 4857290650Shselasky 4858290650Shselasky u8 syndrome[0x20]; 4859290650Shselasky 4860290650Shselasky u8 reserved_1[0x40]; 4861290650Shselasky}; 4862290650Shselasky 4863290650Shselaskystruct mlx5_ifc_qp_2err_in_bits { 4864290650Shselasky u8 opcode[0x10]; 4865290650Shselasky u8 reserved_0[0x10]; 4866290650Shselasky 4867290650Shselasky u8 reserved_1[0x10]; 4868290650Shselasky u8 op_mod[0x10]; 4869290650Shselasky 4870290650Shselasky u8 reserved_2[0x8]; 4871290650Shselasky u8 qpn[0x18]; 4872290650Shselasky 4873290650Shselasky u8 reserved_3[0x20]; 4874290650Shselasky}; 4875290650Shselasky 4876308678Shselaskystruct mlx5_ifc_para_vport_element_bits { 4877308678Shselasky u8 reserved_at_0[0xc]; 4878308678Shselasky u8 traffic_class[0x4]; 4879308678Shselasky u8 qos_para_vport_number[0x10]; 4880308678Shselasky}; 4881308678Shselasky 4882290650Shselaskystruct mlx5_ifc_page_fault_resume_out_bits { 4883290650Shselasky u8 status[0x8]; 4884290650Shselasky u8 reserved_0[0x18]; 4885290650Shselasky 4886290650Shselasky u8 syndrome[0x20]; 4887290650Shselasky 4888290650Shselasky u8 reserved_1[0x40]; 4889290650Shselasky}; 4890290650Shselasky 4891290650Shselaskystruct mlx5_ifc_page_fault_resume_in_bits { 4892290650Shselasky u8 opcode[0x10]; 4893290650Shselasky u8 reserved_0[0x10]; 4894290650Shselasky 4895290650Shselasky u8 reserved_1[0x10]; 4896290650Shselasky u8 op_mod[0x10]; 4897290650Shselasky 4898290650Shselasky u8 error[0x1]; 4899290650Shselasky u8 reserved_2[0x4]; 4900290650Shselasky u8 rdma[0x1]; 4901290650Shselasky u8 read_write[0x1]; 4902290650Shselasky u8 req_res[0x1]; 4903290650Shselasky u8 qpn[0x18]; 4904290650Shselasky 4905290650Shselasky u8 reserved_3[0x20]; 4906290650Shselasky}; 4907290650Shselasky 4908290650Shselaskystruct mlx5_ifc_nop_out_bits { 4909290650Shselasky u8 status[0x8]; 4910290650Shselasky u8 reserved_0[0x18]; 4911290650Shselasky 4912290650Shselasky u8 syndrome[0x20]; 4913290650Shselasky 4914290650Shselasky u8 reserved_1[0x40]; 4915290650Shselasky}; 4916290650Shselasky 4917290650Shselaskystruct mlx5_ifc_nop_in_bits { 4918290650Shselasky u8 opcode[0x10]; 4919290650Shselasky u8 reserved_0[0x10]; 4920290650Shselasky 4921290650Shselasky u8 reserved_1[0x10]; 4922290650Shselasky u8 op_mod[0x10]; 4923290650Shselasky 4924290650Shselasky u8 reserved_2[0x40]; 4925290650Shselasky}; 4926290650Shselasky 4927290650Shselaskystruct mlx5_ifc_modify_vport_state_out_bits { 4928290650Shselasky u8 status[0x8]; 4929290650Shselasky u8 reserved_0[0x18]; 4930290650Shselasky 4931290650Shselasky u8 syndrome[0x20]; 4932290650Shselasky 4933290650Shselasky u8 reserved_1[0x40]; 4934290650Shselasky}; 4935290650Shselasky 4936290650Shselaskyenum { 4937290650Shselasky MLX5_MODIFY_VPORT_STATE_IN_OP_MOD_NIC_VPORT = 0x0, 4938290650Shselasky MLX5_MODIFY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1, 4939290650Shselasky MLX5_MODIFY_VPORT_STATE_IN_OP_MOD_UPLINK = 0x2, 4940290650Shselasky}; 4941290650Shselasky 4942290650Shselaskyenum { 4943290650Shselasky MLX5_MODIFY_VPORT_STATE_IN_ADMIN_STATE_DOWN = 0x0, 4944290650Shselasky MLX5_MODIFY_VPORT_STATE_IN_ADMIN_STATE_UP = 0x1, 4945290650Shselasky MLX5_MODIFY_VPORT_STATE_IN_ADMIN_STATE_FOLLOW = 0x2, 4946290650Shselasky}; 4947290650Shselasky 4948290650Shselaskystruct mlx5_ifc_modify_vport_state_in_bits { 4949290650Shselasky u8 opcode[0x10]; 4950290650Shselasky u8 reserved_0[0x10]; 4951290650Shselasky 4952290650Shselasky u8 reserved_1[0x10]; 4953290650Shselasky u8 op_mod[0x10]; 4954290650Shselasky 4955290650Shselasky u8 other_vport[0x1]; 4956290650Shselasky u8 reserved_2[0xf]; 4957290650Shselasky u8 vport_number[0x10]; 4958290650Shselasky 4959290650Shselasky u8 reserved_3[0x18]; 4960290650Shselasky u8 admin_state[0x4]; 4961290650Shselasky u8 reserved_4[0x4]; 4962290650Shselasky}; 4963290650Shselasky 4964290650Shselaskystruct mlx5_ifc_modify_tis_out_bits { 4965290650Shselasky u8 status[0x8]; 4966290650Shselasky u8 reserved_0[0x18]; 4967290650Shselasky 4968290650Shselasky u8 syndrome[0x20]; 4969290650Shselasky 4970290650Shselasky u8 reserved_1[0x40]; 4971290650Shselasky}; 4972290650Shselasky 4973290650Shselaskystruct mlx5_ifc_modify_tis_in_bits { 4974290650Shselasky u8 opcode[0x10]; 4975290650Shselasky u8 reserved_0[0x10]; 4976290650Shselasky 4977290650Shselasky u8 reserved_1[0x10]; 4978290650Shselasky u8 op_mod[0x10]; 4979290650Shselasky 4980290650Shselasky u8 reserved_2[0x8]; 4981290650Shselasky u8 tisn[0x18]; 4982290650Shselasky 4983290650Shselasky u8 reserved_3[0x20]; 4984290650Shselasky 4985290650Shselasky u8 modify_bitmask[0x40]; 4986290650Shselasky 4987290650Shselasky u8 reserved_4[0x40]; 4988290650Shselasky 4989290650Shselasky struct mlx5_ifc_tisc_bits ctx; 4990290650Shselasky}; 4991290650Shselasky 4992290650Shselaskystruct mlx5_ifc_modify_tir_out_bits { 4993290650Shselasky u8 status[0x8]; 4994290650Shselasky u8 reserved_0[0x18]; 4995290650Shselasky 4996290650Shselasky u8 syndrome[0x20]; 4997290650Shselasky 4998290650Shselasky u8 reserved_1[0x40]; 4999290650Shselasky}; 5000290650Shselasky 5001308678Shselaskyenum 5002308678Shselasky{ 5003308678Shselasky MLX5_MODIFY_SQ_BITMASK_PACKET_PACING_RATE_LIMIT_INDEX = 0x1 << 0, 5004308678Shselasky MLX5_MODIFY_SQ_BITMASK_QOS_PARA_VPORT_NUMBER = 0x1 << 1 5005308678Shselasky}; 5006308678Shselasky 5007290650Shselaskystruct mlx5_ifc_modify_tir_in_bits { 5008290650Shselasky u8 opcode[0x10]; 5009290650Shselasky u8 reserved_0[0x10]; 5010290650Shselasky 5011290650Shselasky u8 reserved_1[0x10]; 5012290650Shselasky u8 op_mod[0x10]; 5013290650Shselasky 5014290650Shselasky u8 reserved_2[0x8]; 5015290650Shselasky u8 tirn[0x18]; 5016290650Shselasky 5017290650Shselasky u8 reserved_3[0x20]; 5018290650Shselasky 5019290650Shselasky u8 modify_bitmask[0x40]; 5020290650Shselasky 5021290650Shselasky u8 reserved_4[0x40]; 5022290650Shselasky 5023290650Shselasky struct mlx5_ifc_tirc_bits tir_context; 5024290650Shselasky}; 5025290650Shselasky 5026290650Shselaskystruct mlx5_ifc_modify_sq_out_bits { 5027290650Shselasky u8 status[0x8]; 5028290650Shselasky u8 reserved_0[0x18]; 5029290650Shselasky 5030290650Shselasky u8 syndrome[0x20]; 5031290650Shselasky 5032290650Shselasky u8 reserved_1[0x40]; 5033290650Shselasky}; 5034290650Shselasky 5035290650Shselaskystruct mlx5_ifc_modify_sq_in_bits { 5036290650Shselasky u8 opcode[0x10]; 5037290650Shselasky u8 reserved_0[0x10]; 5038290650Shselasky 5039290650Shselasky u8 reserved_1[0x10]; 5040290650Shselasky u8 op_mod[0x10]; 5041290650Shselasky 5042290650Shselasky u8 sq_state[0x4]; 5043290650Shselasky u8 reserved_2[0x4]; 5044290650Shselasky u8 sqn[0x18]; 5045290650Shselasky 5046290650Shselasky u8 reserved_3[0x20]; 5047290650Shselasky 5048290650Shselasky u8 modify_bitmask[0x40]; 5049290650Shselasky 5050290650Shselasky u8 reserved_4[0x40]; 5051290650Shselasky 5052290650Shselasky struct mlx5_ifc_sqc_bits ctx; 5053290650Shselasky}; 5054290650Shselasky 5055308678Shselaskystruct mlx5_ifc_modify_scheduling_element_out_bits { 5056308678Shselasky u8 status[0x8]; 5057308678Shselasky u8 reserved_at_8[0x18]; 5058308678Shselasky 5059308678Shselasky u8 syndrome[0x20]; 5060308678Shselasky 5061308678Shselasky u8 reserved_at_40[0x1c0]; 5062308678Shselasky}; 5063308678Shselasky 5064308678Shselaskyenum { 5065308678Shselasky MLX5_MODIFY_SCHEDULING_ELEMENT_IN_SCHEDULING_HIERARCHY_E_SWITCH = 0x2, 5066308678Shselasky}; 5067308678Shselasky 5068308678Shselaskyenum { 5069308678Shselasky MLX5_MODIFY_SCHEDULING_ELEMENT_BITMASK_BW_SHARE = 0x1, 5070308678Shselasky MLX5_MODIFY_SCHEDULING_ELEMENT_BITMASK_MAX_AVERAGE_BW = 0x2, 5071308678Shselasky}; 5072308678Shselasky 5073308678Shselaskystruct mlx5_ifc_modify_scheduling_element_in_bits { 5074308678Shselasky u8 opcode[0x10]; 5075308678Shselasky u8 reserved_at_10[0x10]; 5076308678Shselasky 5077308678Shselasky u8 reserved_at_20[0x10]; 5078308678Shselasky u8 op_mod[0x10]; 5079308678Shselasky 5080308678Shselasky u8 scheduling_hierarchy[0x8]; 5081308678Shselasky u8 reserved_at_48[0x18]; 5082308678Shselasky 5083308678Shselasky u8 scheduling_element_id[0x20]; 5084308678Shselasky 5085308678Shselasky u8 reserved_at_80[0x20]; 5086308678Shselasky 5087308678Shselasky u8 modify_bitmask[0x20]; 5088308678Shselasky 5089308678Shselasky u8 reserved_at_c0[0x40]; 5090308678Shselasky 5091308678Shselasky struct mlx5_ifc_scheduling_context_bits scheduling_context; 5092308678Shselasky 5093308678Shselasky u8 reserved_at_300[0x100]; 5094308678Shselasky}; 5095308678Shselasky 5096290650Shselaskystruct mlx5_ifc_modify_rqt_out_bits { 5097290650Shselasky u8 status[0x8]; 5098290650Shselasky u8 reserved_0[0x18]; 5099290650Shselasky 5100290650Shselasky u8 syndrome[0x20]; 5101290650Shselasky 5102290650Shselasky u8 reserved_1[0x40]; 5103290650Shselasky}; 5104290650Shselasky 5105290650Shselaskystruct mlx5_ifc_modify_rqt_in_bits { 5106290650Shselasky u8 opcode[0x10]; 5107290650Shselasky u8 reserved_0[0x10]; 5108290650Shselasky 5109290650Shselasky u8 reserved_1[0x10]; 5110290650Shselasky u8 op_mod[0x10]; 5111290650Shselasky 5112290650Shselasky u8 reserved_2[0x8]; 5113290650Shselasky u8 rqtn[0x18]; 5114290650Shselasky 5115290650Shselasky u8 reserved_3[0x20]; 5116290650Shselasky 5117290650Shselasky u8 modify_bitmask[0x40]; 5118290650Shselasky 5119290650Shselasky u8 reserved_4[0x40]; 5120290650Shselasky 5121290650Shselasky struct mlx5_ifc_rqtc_bits ctx; 5122290650Shselasky}; 5123290650Shselasky 5124290650Shselaskystruct mlx5_ifc_modify_rq_out_bits { 5125290650Shselasky u8 status[0x8]; 5126290650Shselasky u8 reserved_0[0x18]; 5127290650Shselasky 5128290650Shselasky u8 syndrome[0x20]; 5129290650Shselasky 5130290650Shselasky u8 reserved_1[0x40]; 5131290650Shselasky}; 5132290650Shselasky 5133306233Shselaskystruct mlx5_ifc_rq_bitmask_bits { 5134306233Shselasky u8 reserved[0x20]; 5135306233Shselasky 5136306233Shselasky u8 reserved1[0x1e]; 5137306233Shselasky u8 vlan_strip_disable[0x1]; 5138306233Shselasky u8 reserved2[0x1]; 5139306233Shselasky}; 5140306233Shselasky 5141290650Shselaskystruct mlx5_ifc_modify_rq_in_bits { 5142290650Shselasky u8 opcode[0x10]; 5143290650Shselasky u8 reserved_0[0x10]; 5144290650Shselasky 5145290650Shselasky u8 reserved_1[0x10]; 5146290650Shselasky u8 op_mod[0x10]; 5147290650Shselasky 5148290650Shselasky u8 rq_state[0x4]; 5149290650Shselasky u8 reserved_2[0x4]; 5150290650Shselasky u8 rqn[0x18]; 5151290650Shselasky 5152290650Shselasky u8 reserved_3[0x20]; 5153290650Shselasky 5154306233Shselasky struct mlx5_ifc_rq_bitmask_bits bitmask; 5155290650Shselasky 5156290650Shselasky u8 reserved_4[0x40]; 5157290650Shselasky 5158290650Shselasky struct mlx5_ifc_rqc_bits ctx; 5159290650Shselasky}; 5160290650Shselasky 5161290650Shselaskystruct mlx5_ifc_modify_rmp_out_bits { 5162290650Shselasky u8 status[0x8]; 5163290650Shselasky u8 reserved_0[0x18]; 5164290650Shselasky 5165290650Shselasky u8 syndrome[0x20]; 5166290650Shselasky 5167290650Shselasky u8 reserved_1[0x40]; 5168290650Shselasky}; 5169290650Shselasky 5170290650Shselaskystruct mlx5_ifc_rmp_bitmask_bits { 5171290650Shselasky u8 reserved[0x20]; 5172290650Shselasky 5173290650Shselasky u8 reserved1[0x1f]; 5174290650Shselasky u8 lwm[0x1]; 5175290650Shselasky}; 5176290650Shselasky 5177290650Shselaskystruct mlx5_ifc_modify_rmp_in_bits { 5178290650Shselasky u8 opcode[0x10]; 5179290650Shselasky u8 reserved_0[0x10]; 5180290650Shselasky 5181290650Shselasky u8 reserved_1[0x10]; 5182290650Shselasky u8 op_mod[0x10]; 5183290650Shselasky 5184290650Shselasky u8 rmp_state[0x4]; 5185290650Shselasky u8 reserved_2[0x4]; 5186290650Shselasky u8 rmpn[0x18]; 5187290650Shselasky 5188290650Shselasky u8 reserved_3[0x20]; 5189290650Shselasky 5190290650Shselasky struct mlx5_ifc_rmp_bitmask_bits bitmask; 5191290650Shselasky 5192290650Shselasky u8 reserved_4[0x40]; 5193290650Shselasky 5194290650Shselasky struct mlx5_ifc_rmpc_bits ctx; 5195290650Shselasky}; 5196290650Shselasky 5197290650Shselaskystruct mlx5_ifc_modify_nic_vport_context_out_bits { 5198290650Shselasky u8 status[0x8]; 5199290650Shselasky u8 reserved_0[0x18]; 5200290650Shselasky 5201290650Shselasky u8 syndrome[0x20]; 5202290650Shselasky 5203290650Shselasky u8 reserved_1[0x40]; 5204290650Shselasky}; 5205290650Shselasky 5206290650Shselaskystruct mlx5_ifc_modify_nic_vport_field_select_bits { 5207306233Shselasky u8 reserved_0[0x16]; 5208306233Shselasky u8 node_guid[0x1]; 5209306233Shselasky u8 port_guid[0x1]; 5210290650Shselasky u8 min_wqe_inline_mode[0x1]; 5211290650Shselasky u8 mtu[0x1]; 5212290650Shselasky u8 change_event[0x1]; 5213290650Shselasky u8 promisc[0x1]; 5214290650Shselasky u8 permanent_address[0x1]; 5215290650Shselasky u8 addresses_list[0x1]; 5216290650Shselasky u8 roce_en[0x1]; 5217290650Shselasky u8 reserved_1[0x1]; 5218290650Shselasky}; 5219290650Shselasky 5220290650Shselaskystruct mlx5_ifc_modify_nic_vport_context_in_bits { 5221290650Shselasky u8 opcode[0x10]; 5222290650Shselasky u8 reserved_0[0x10]; 5223290650Shselasky 5224290650Shselasky u8 reserved_1[0x10]; 5225290650Shselasky u8 op_mod[0x10]; 5226290650Shselasky 5227290650Shselasky u8 other_vport[0x1]; 5228290650Shselasky u8 reserved_2[0xf]; 5229290650Shselasky u8 vport_number[0x10]; 5230290650Shselasky 5231290650Shselasky struct mlx5_ifc_modify_nic_vport_field_select_bits field_select; 5232290650Shselasky 5233290650Shselasky u8 reserved_3[0x780]; 5234290650Shselasky 5235290650Shselasky struct mlx5_ifc_nic_vport_context_bits nic_vport_context; 5236290650Shselasky}; 5237290650Shselasky 5238290650Shselaskystruct mlx5_ifc_modify_hca_vport_context_out_bits { 5239290650Shselasky u8 status[0x8]; 5240290650Shselasky u8 reserved_0[0x18]; 5241290650Shselasky 5242290650Shselasky u8 syndrome[0x20]; 5243290650Shselasky 5244290650Shselasky u8 reserved_1[0x40]; 5245290650Shselasky}; 5246290650Shselasky 5247306233Shselaskystruct mlx5_ifc_grh_bits { 5248306233Shselasky u8 ip_version[4]; 5249306233Shselasky u8 traffic_class[8]; 5250306233Shselasky u8 flow_label[20]; 5251306233Shselasky u8 payload_length[16]; 5252306233Shselasky u8 next_header[8]; 5253306233Shselasky u8 hop_limit[8]; 5254306233Shselasky u8 sgid[128]; 5255306233Shselasky u8 dgid[128]; 5256306233Shselasky}; 5257306233Shselasky 5258306233Shselaskystruct mlx5_ifc_bth_bits { 5259306233Shselasky u8 opcode[8]; 5260306233Shselasky u8 se[1]; 5261306233Shselasky u8 migreq[1]; 5262306233Shselasky u8 pad_count[2]; 5263306233Shselasky u8 tver[4]; 5264306233Shselasky u8 p_key[16]; 5265306233Shselasky u8 reserved8[8]; 5266306233Shselasky u8 dest_qp[24]; 5267306233Shselasky u8 ack_req[1]; 5268306233Shselasky u8 reserved7[7]; 5269306233Shselasky u8 psn[24]; 5270306233Shselasky}; 5271306233Shselasky 5272306233Shselaskystruct mlx5_ifc_aeth_bits { 5273306233Shselasky u8 syndrome[8]; 5274306233Shselasky u8 msn[24]; 5275306233Shselasky}; 5276306233Shselasky 5277306233Shselaskystruct mlx5_ifc_dceth_bits { 5278306233Shselasky u8 reserved0[8]; 5279306233Shselasky u8 session_id[24]; 5280306233Shselasky u8 reserved1[8]; 5281306233Shselasky u8 dci_dct[24]; 5282306233Shselasky}; 5283306233Shselasky 5284290650Shselaskystruct mlx5_ifc_modify_hca_vport_context_in_bits { 5285290650Shselasky u8 opcode[0x10]; 5286290650Shselasky u8 reserved_0[0x10]; 5287290650Shselasky 5288290650Shselasky u8 reserved_1[0x10]; 5289290650Shselasky u8 op_mod[0x10]; 5290290650Shselasky 5291290650Shselasky u8 other_vport[0x1]; 5292290650Shselasky u8 reserved_2[0xb]; 5293290650Shselasky u8 port_num[0x4]; 5294290650Shselasky u8 vport_number[0x10]; 5295290650Shselasky 5296290650Shselasky u8 reserved_3[0x20]; 5297290650Shselasky 5298290650Shselasky struct mlx5_ifc_hca_vport_context_bits hca_vport_context; 5299290650Shselasky}; 5300290650Shselasky 5301290650Shselaskystruct mlx5_ifc_modify_esw_vport_context_out_bits { 5302290650Shselasky u8 status[0x8]; 5303290650Shselasky u8 reserved_0[0x18]; 5304290650Shselasky 5305290650Shselasky u8 syndrome[0x20]; 5306290650Shselasky 5307290650Shselasky u8 reserved_1[0x40]; 5308290650Shselasky}; 5309290650Shselasky 5310306233Shselaskystruct mlx5_ifc_esw_vport_context_fields_select_bits { 5311306233Shselasky u8 reserved[0x1c]; 5312306233Shselasky u8 vport_cvlan_insert[0x1]; 5313306233Shselasky u8 vport_svlan_insert[0x1]; 5314306233Shselasky u8 vport_cvlan_strip[0x1]; 5315306233Shselasky u8 vport_svlan_strip[0x1]; 5316306233Shselasky}; 5317306233Shselasky 5318290650Shselaskystruct mlx5_ifc_modify_esw_vport_context_in_bits { 5319290650Shselasky u8 opcode[0x10]; 5320290650Shselasky u8 reserved_0[0x10]; 5321290650Shselasky 5322290650Shselasky u8 reserved_1[0x10]; 5323290650Shselasky u8 op_mod[0x10]; 5324290650Shselasky 5325290650Shselasky u8 other_vport[0x1]; 5326290650Shselasky u8 reserved_2[0xf]; 5327290650Shselasky u8 vport_number[0x10]; 5328290650Shselasky 5329306233Shselasky struct mlx5_ifc_esw_vport_context_fields_select_bits field_select; 5330290650Shselasky 5331290650Shselasky struct mlx5_ifc_esw_vport_context_bits esw_vport_context; 5332290650Shselasky}; 5333290650Shselasky 5334290650Shselaskystruct mlx5_ifc_modify_cq_out_bits { 5335290650Shselasky u8 status[0x8]; 5336290650Shselasky u8 reserved_0[0x18]; 5337290650Shselasky 5338290650Shselasky u8 syndrome[0x20]; 5339290650Shselasky 5340290650Shselasky u8 reserved_1[0x40]; 5341290650Shselasky}; 5342290650Shselasky 5343290650Shselaskyenum { 5344290650Shselasky MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0, 5345290650Shselasky MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1, 5346290650Shselasky}; 5347290650Shselasky 5348290650Shselaskystruct mlx5_ifc_modify_cq_in_bits { 5349290650Shselasky u8 opcode[0x10]; 5350290650Shselasky u8 reserved_0[0x10]; 5351290650Shselasky 5352290650Shselasky u8 reserved_1[0x10]; 5353290650Shselasky u8 op_mod[0x10]; 5354290650Shselasky 5355290650Shselasky u8 reserved_2[0x8]; 5356290650Shselasky u8 cqn[0x18]; 5357290650Shselasky 5358290650Shselasky union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select; 5359290650Shselasky 5360290650Shselasky struct mlx5_ifc_cqc_bits cq_context; 5361290650Shselasky 5362290650Shselasky u8 reserved_3[0x600]; 5363290650Shselasky 5364290650Shselasky u8 pas[0][0x40]; 5365290650Shselasky}; 5366290650Shselasky 5367290650Shselaskystruct mlx5_ifc_modify_cong_status_out_bits { 5368290650Shselasky u8 status[0x8]; 5369290650Shselasky u8 reserved_0[0x18]; 5370290650Shselasky 5371290650Shselasky u8 syndrome[0x20]; 5372290650Shselasky 5373290650Shselasky u8 reserved_1[0x40]; 5374290650Shselasky}; 5375290650Shselasky 5376290650Shselaskystruct mlx5_ifc_modify_cong_status_in_bits { 5377290650Shselasky u8 opcode[0x10]; 5378290650Shselasky u8 reserved_0[0x10]; 5379290650Shselasky 5380290650Shselasky u8 reserved_1[0x10]; 5381290650Shselasky u8 op_mod[0x10]; 5382290650Shselasky 5383290650Shselasky u8 reserved_2[0x18]; 5384290650Shselasky u8 priority[0x4]; 5385290650Shselasky u8 cong_protocol[0x4]; 5386290650Shselasky 5387290650Shselasky u8 enable[0x1]; 5388290650Shselasky u8 tag_enable[0x1]; 5389290650Shselasky u8 reserved_3[0x1e]; 5390290650Shselasky}; 5391290650Shselasky 5392290650Shselaskystruct mlx5_ifc_modify_cong_params_out_bits { 5393290650Shselasky u8 status[0x8]; 5394290650Shselasky u8 reserved_0[0x18]; 5395290650Shselasky 5396290650Shselasky u8 syndrome[0x20]; 5397290650Shselasky 5398290650Shselasky u8 reserved_1[0x40]; 5399290650Shselasky}; 5400290650Shselasky 5401290650Shselaskystruct mlx5_ifc_modify_cong_params_in_bits { 5402290650Shselasky u8 opcode[0x10]; 5403290650Shselasky u8 reserved_0[0x10]; 5404290650Shselasky 5405290650Shselasky u8 reserved_1[0x10]; 5406290650Shselasky u8 op_mod[0x10]; 5407290650Shselasky 5408290650Shselasky u8 reserved_2[0x1c]; 5409290650Shselasky u8 cong_protocol[0x4]; 5410290650Shselasky 5411290650Shselasky union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select; 5412290650Shselasky 5413290650Shselasky u8 reserved_3[0x80]; 5414290650Shselasky 5415290650Shselasky union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters; 5416290650Shselasky}; 5417290650Shselasky 5418290650Shselaskystruct mlx5_ifc_manage_pages_out_bits { 5419290650Shselasky u8 status[0x8]; 5420290650Shselasky u8 reserved_0[0x18]; 5421290650Shselasky 5422290650Shselasky u8 syndrome[0x20]; 5423290650Shselasky 5424290650Shselasky u8 output_num_entries[0x20]; 5425290650Shselasky 5426290650Shselasky u8 reserved_1[0x20]; 5427290650Shselasky 5428290650Shselasky u8 pas[0][0x40]; 5429290650Shselasky}; 5430290650Shselasky 5431290650Shselaskyenum { 5432290650Shselasky MLX5_PAGES_CANT_GIVE = 0x0, 5433290650Shselasky MLX5_PAGES_GIVE = 0x1, 5434290650Shselasky MLX5_PAGES_TAKE = 0x2, 5435290650Shselasky}; 5436290650Shselasky 5437290650Shselaskystruct mlx5_ifc_manage_pages_in_bits { 5438290650Shselasky u8 opcode[0x10]; 5439290650Shselasky u8 reserved_0[0x10]; 5440290650Shselasky 5441290650Shselasky u8 reserved_1[0x10]; 5442290650Shselasky u8 op_mod[0x10]; 5443290650Shselasky 5444290650Shselasky u8 reserved_2[0x10]; 5445290650Shselasky u8 function_id[0x10]; 5446290650Shselasky 5447290650Shselasky u8 input_num_entries[0x20]; 5448290650Shselasky 5449290650Shselasky u8 pas[0][0x40]; 5450290650Shselasky}; 5451290650Shselasky 5452290650Shselaskystruct mlx5_ifc_mad_ifc_out_bits { 5453290650Shselasky u8 status[0x8]; 5454290650Shselasky u8 reserved_0[0x18]; 5455290650Shselasky 5456290650Shselasky u8 syndrome[0x20]; 5457290650Shselasky 5458290650Shselasky u8 reserved_1[0x40]; 5459290650Shselasky 5460290650Shselasky u8 response_mad_packet[256][0x8]; 5461290650Shselasky}; 5462290650Shselasky 5463290650Shselaskystruct mlx5_ifc_mad_ifc_in_bits { 5464290650Shselasky u8 opcode[0x10]; 5465290650Shselasky u8 reserved_0[0x10]; 5466290650Shselasky 5467290650Shselasky u8 reserved_1[0x10]; 5468290650Shselasky u8 op_mod[0x10]; 5469290650Shselasky 5470290650Shselasky u8 remote_lid[0x10]; 5471290650Shselasky u8 reserved_2[0x8]; 5472290650Shselasky u8 port[0x8]; 5473290650Shselasky 5474290650Shselasky u8 reserved_3[0x20]; 5475290650Shselasky 5476290650Shselasky u8 mad[256][0x8]; 5477290650Shselasky}; 5478290650Shselasky 5479290650Shselaskystruct mlx5_ifc_init_hca_out_bits { 5480290650Shselasky u8 status[0x8]; 5481290650Shselasky u8 reserved_0[0x18]; 5482290650Shselasky 5483290650Shselasky u8 syndrome[0x20]; 5484290650Shselasky 5485290650Shselasky u8 reserved_1[0x40]; 5486290650Shselasky}; 5487290650Shselasky 5488290650Shselaskyenum { 5489290650Shselasky MLX5_INIT_HCA_IN_OP_MOD_INIT = 0x0, 5490290650Shselasky MLX5_INIT_HCA_IN_OP_MOD_PRE_INIT = 0x1, 5491290650Shselasky}; 5492290650Shselasky 5493290650Shselaskystruct mlx5_ifc_init_hca_in_bits { 5494290650Shselasky u8 opcode[0x10]; 5495290650Shselasky u8 reserved_0[0x10]; 5496290650Shselasky 5497290650Shselasky u8 reserved_1[0x10]; 5498290650Shselasky u8 op_mod[0x10]; 5499290650Shselasky 5500290650Shselasky u8 reserved_2[0x40]; 5501290650Shselasky}; 5502290650Shselasky 5503290650Shselaskystruct mlx5_ifc_init2rtr_qp_out_bits { 5504290650Shselasky u8 status[0x8]; 5505290650Shselasky u8 reserved_0[0x18]; 5506290650Shselasky 5507290650Shselasky u8 syndrome[0x20]; 5508290650Shselasky 5509290650Shselasky u8 reserved_1[0x40]; 5510290650Shselasky}; 5511290650Shselasky 5512290650Shselaskystruct mlx5_ifc_init2rtr_qp_in_bits { 5513290650Shselasky u8 opcode[0x10]; 5514290650Shselasky u8 reserved_0[0x10]; 5515290650Shselasky 5516290650Shselasky u8 reserved_1[0x10]; 5517290650Shselasky u8 op_mod[0x10]; 5518290650Shselasky 5519290650Shselasky u8 reserved_2[0x8]; 5520290650Shselasky u8 qpn[0x18]; 5521290650Shselasky 5522290650Shselasky u8 reserved_3[0x20]; 5523290650Shselasky 5524290650Shselasky u8 opt_param_mask[0x20]; 5525290650Shselasky 5526290650Shselasky u8 reserved_4[0x20]; 5527290650Shselasky 5528290650Shselasky struct mlx5_ifc_qpc_bits qpc; 5529290650Shselasky 5530290650Shselasky u8 reserved_5[0x80]; 5531290650Shselasky}; 5532290650Shselasky 5533290650Shselaskystruct mlx5_ifc_init2init_qp_out_bits { 5534290650Shselasky u8 status[0x8]; 5535290650Shselasky u8 reserved_0[0x18]; 5536290650Shselasky 5537290650Shselasky u8 syndrome[0x20]; 5538290650Shselasky 5539290650Shselasky u8 reserved_1[0x40]; 5540290650Shselasky}; 5541290650Shselasky 5542290650Shselaskystruct mlx5_ifc_init2init_qp_in_bits { 5543290650Shselasky u8 opcode[0x10]; 5544290650Shselasky u8 reserved_0[0x10]; 5545290650Shselasky 5546290650Shselasky u8 reserved_1[0x10]; 5547290650Shselasky u8 op_mod[0x10]; 5548290650Shselasky 5549290650Shselasky u8 reserved_2[0x8]; 5550290650Shselasky u8 qpn[0x18]; 5551290650Shselasky 5552290650Shselasky u8 reserved_3[0x20]; 5553290650Shselasky 5554290650Shselasky u8 opt_param_mask[0x20]; 5555290650Shselasky 5556290650Shselasky u8 reserved_4[0x20]; 5557290650Shselasky 5558290650Shselasky struct mlx5_ifc_qpc_bits qpc; 5559290650Shselasky 5560290650Shselasky u8 reserved_5[0x80]; 5561290650Shselasky}; 5562290650Shselasky 5563290650Shselaskystruct mlx5_ifc_get_dropped_packet_log_out_bits { 5564290650Shselasky u8 status[0x8]; 5565290650Shselasky u8 reserved_0[0x18]; 5566290650Shselasky 5567290650Shselasky u8 syndrome[0x20]; 5568290650Shselasky 5569290650Shselasky u8 reserved_1[0x40]; 5570290650Shselasky 5571290650Shselasky u8 packet_headers_log[128][0x8]; 5572290650Shselasky 5573290650Shselasky u8 packet_syndrome[64][0x8]; 5574290650Shselasky}; 5575290650Shselasky 5576290650Shselaskystruct mlx5_ifc_get_dropped_packet_log_in_bits { 5577290650Shselasky u8 opcode[0x10]; 5578290650Shselasky u8 reserved_0[0x10]; 5579290650Shselasky 5580290650Shselasky u8 reserved_1[0x10]; 5581290650Shselasky u8 op_mod[0x10]; 5582290650Shselasky 5583290650Shselasky u8 reserved_2[0x40]; 5584290650Shselasky}; 5585290650Shselasky 5586290650Shselaskystruct mlx5_ifc_gen_eqe_in_bits { 5587290650Shselasky u8 opcode[0x10]; 5588290650Shselasky u8 reserved_0[0x10]; 5589290650Shselasky 5590290650Shselasky u8 reserved_1[0x10]; 5591290650Shselasky u8 op_mod[0x10]; 5592290650Shselasky 5593290650Shselasky u8 reserved_2[0x18]; 5594290650Shselasky u8 eq_number[0x8]; 5595290650Shselasky 5596290650Shselasky u8 reserved_3[0x20]; 5597290650Shselasky 5598290650Shselasky u8 eqe[64][0x8]; 5599290650Shselasky}; 5600290650Shselasky 5601290650Shselaskystruct mlx5_ifc_gen_eq_out_bits { 5602290650Shselasky u8 status[0x8]; 5603290650Shselasky u8 reserved_0[0x18]; 5604290650Shselasky 5605290650Shselasky u8 syndrome[0x20]; 5606290650Shselasky 5607290650Shselasky u8 reserved_1[0x40]; 5608290650Shselasky}; 5609290650Shselasky 5610290650Shselaskystruct mlx5_ifc_enable_hca_out_bits { 5611290650Shselasky u8 status[0x8]; 5612290650Shselasky u8 reserved_0[0x18]; 5613290650Shselasky 5614290650Shselasky u8 syndrome[0x20]; 5615290650Shselasky 5616290650Shselasky u8 reserved_1[0x20]; 5617290650Shselasky}; 5618290650Shselasky 5619290650Shselaskystruct mlx5_ifc_enable_hca_in_bits { 5620290650Shselasky u8 opcode[0x10]; 5621290650Shselasky u8 reserved_0[0x10]; 5622290650Shselasky 5623290650Shselasky u8 reserved_1[0x10]; 5624290650Shselasky u8 op_mod[0x10]; 5625290650Shselasky 5626290650Shselasky u8 reserved_2[0x10]; 5627290650Shselasky u8 function_id[0x10]; 5628290650Shselasky 5629290650Shselasky u8 reserved_3[0x20]; 5630290650Shselasky}; 5631290650Shselasky 5632290650Shselaskystruct mlx5_ifc_drain_dct_out_bits { 5633290650Shselasky u8 status[0x8]; 5634290650Shselasky u8 reserved_0[0x18]; 5635290650Shselasky 5636290650Shselasky u8 syndrome[0x20]; 5637290650Shselasky 5638290650Shselasky u8 reserved_1[0x40]; 5639290650Shselasky}; 5640290650Shselasky 5641290650Shselaskystruct mlx5_ifc_drain_dct_in_bits { 5642290650Shselasky u8 opcode[0x10]; 5643290650Shselasky u8 reserved_0[0x10]; 5644290650Shselasky 5645290650Shselasky u8 reserved_1[0x10]; 5646290650Shselasky u8 op_mod[0x10]; 5647290650Shselasky 5648290650Shselasky u8 reserved_2[0x8]; 5649290650Shselasky u8 dctn[0x18]; 5650290650Shselasky 5651290650Shselasky u8 reserved_3[0x20]; 5652290650Shselasky}; 5653290650Shselasky 5654290650Shselaskystruct mlx5_ifc_disable_hca_out_bits { 5655290650Shselasky u8 status[0x8]; 5656290650Shselasky u8 reserved_0[0x18]; 5657290650Shselasky 5658290650Shselasky u8 syndrome[0x20]; 5659290650Shselasky 5660290650Shselasky u8 reserved_1[0x20]; 5661290650Shselasky}; 5662290650Shselasky 5663290650Shselaskystruct mlx5_ifc_disable_hca_in_bits { 5664290650Shselasky u8 opcode[0x10]; 5665290650Shselasky u8 reserved_0[0x10]; 5666290650Shselasky 5667290650Shselasky u8 reserved_1[0x10]; 5668290650Shselasky u8 op_mod[0x10]; 5669290650Shselasky 5670290650Shselasky u8 reserved_2[0x10]; 5671290650Shselasky u8 function_id[0x10]; 5672290650Shselasky 5673290650Shselasky u8 reserved_3[0x20]; 5674290650Shselasky}; 5675290650Shselasky 5676290650Shselaskystruct mlx5_ifc_detach_from_mcg_out_bits { 5677290650Shselasky u8 status[0x8]; 5678290650Shselasky u8 reserved_0[0x18]; 5679290650Shselasky 5680290650Shselasky u8 syndrome[0x20]; 5681290650Shselasky 5682290650Shselasky u8 reserved_1[0x40]; 5683290650Shselasky}; 5684290650Shselasky 5685290650Shselaskystruct mlx5_ifc_detach_from_mcg_in_bits { 5686290650Shselasky u8 opcode[0x10]; 5687290650Shselasky u8 reserved_0[0x10]; 5688290650Shselasky 5689290650Shselasky u8 reserved_1[0x10]; 5690290650Shselasky u8 op_mod[0x10]; 5691290650Shselasky 5692290650Shselasky u8 reserved_2[0x8]; 5693290650Shselasky u8 qpn[0x18]; 5694290650Shselasky 5695290650Shselasky u8 reserved_3[0x20]; 5696290650Shselasky 5697290650Shselasky u8 multicast_gid[16][0x8]; 5698290650Shselasky}; 5699290650Shselasky 5700290650Shselaskystruct mlx5_ifc_destroy_xrc_srq_out_bits { 5701290650Shselasky u8 status[0x8]; 5702290650Shselasky u8 reserved_0[0x18]; 5703290650Shselasky 5704290650Shselasky u8 syndrome[0x20]; 5705290650Shselasky 5706290650Shselasky u8 reserved_1[0x40]; 5707290650Shselasky}; 5708290650Shselasky 5709290650Shselaskystruct mlx5_ifc_destroy_xrc_srq_in_bits { 5710290650Shselasky u8 opcode[0x10]; 5711290650Shselasky u8 reserved_0[0x10]; 5712290650Shselasky 5713290650Shselasky u8 reserved_1[0x10]; 5714290650Shselasky u8 op_mod[0x10]; 5715290650Shselasky 5716290650Shselasky u8 reserved_2[0x8]; 5717290650Shselasky u8 xrc_srqn[0x18]; 5718290650Shselasky 5719290650Shselasky u8 reserved_3[0x20]; 5720290650Shselasky}; 5721290650Shselasky 5722290650Shselaskystruct mlx5_ifc_destroy_tis_out_bits { 5723290650Shselasky u8 status[0x8]; 5724290650Shselasky u8 reserved_0[0x18]; 5725290650Shselasky 5726290650Shselasky u8 syndrome[0x20]; 5727290650Shselasky 5728290650Shselasky u8 reserved_1[0x40]; 5729290650Shselasky}; 5730290650Shselasky 5731290650Shselaskystruct mlx5_ifc_destroy_tis_in_bits { 5732290650Shselasky u8 opcode[0x10]; 5733290650Shselasky u8 reserved_0[0x10]; 5734290650Shselasky 5735290650Shselasky u8 reserved_1[0x10]; 5736290650Shselasky u8 op_mod[0x10]; 5737290650Shselasky 5738290650Shselasky u8 reserved_2[0x8]; 5739290650Shselasky u8 tisn[0x18]; 5740290650Shselasky 5741290650Shselasky u8 reserved_3[0x20]; 5742290650Shselasky}; 5743290650Shselasky 5744290650Shselaskystruct mlx5_ifc_destroy_tir_out_bits { 5745290650Shselasky u8 status[0x8]; 5746290650Shselasky u8 reserved_0[0x18]; 5747290650Shselasky 5748290650Shselasky u8 syndrome[0x20]; 5749290650Shselasky 5750290650Shselasky u8 reserved_1[0x40]; 5751290650Shselasky}; 5752290650Shselasky 5753290650Shselaskystruct mlx5_ifc_destroy_tir_in_bits { 5754290650Shselasky u8 opcode[0x10]; 5755290650Shselasky u8 reserved_0[0x10]; 5756290650Shselasky 5757290650Shselasky u8 reserved_1[0x10]; 5758290650Shselasky u8 op_mod[0x10]; 5759290650Shselasky 5760290650Shselasky u8 reserved_2[0x8]; 5761290650Shselasky u8 tirn[0x18]; 5762290650Shselasky 5763290650Shselasky u8 reserved_3[0x20]; 5764290650Shselasky}; 5765290650Shselasky 5766290650Shselaskystruct mlx5_ifc_destroy_srq_out_bits { 5767290650Shselasky u8 status[0x8]; 5768290650Shselasky u8 reserved_0[0x18]; 5769290650Shselasky 5770290650Shselasky u8 syndrome[0x20]; 5771290650Shselasky 5772290650Shselasky u8 reserved_1[0x40]; 5773290650Shselasky}; 5774290650Shselasky 5775290650Shselaskystruct mlx5_ifc_destroy_srq_in_bits { 5776290650Shselasky u8 opcode[0x10]; 5777290650Shselasky u8 reserved_0[0x10]; 5778290650Shselasky 5779290650Shselasky u8 reserved_1[0x10]; 5780290650Shselasky u8 op_mod[0x10]; 5781290650Shselasky 5782290650Shselasky u8 reserved_2[0x8]; 5783290650Shselasky u8 srqn[0x18]; 5784290650Shselasky 5785290650Shselasky u8 reserved_3[0x20]; 5786290650Shselasky}; 5787290650Shselasky 5788290650Shselaskystruct mlx5_ifc_destroy_sq_out_bits { 5789290650Shselasky u8 status[0x8]; 5790290650Shselasky u8 reserved_0[0x18]; 5791290650Shselasky 5792290650Shselasky u8 syndrome[0x20]; 5793290650Shselasky 5794290650Shselasky u8 reserved_1[0x40]; 5795290650Shselasky}; 5796290650Shselasky 5797290650Shselaskystruct mlx5_ifc_destroy_sq_in_bits { 5798290650Shselasky u8 opcode[0x10]; 5799290650Shselasky u8 reserved_0[0x10]; 5800290650Shselasky 5801290650Shselasky u8 reserved_1[0x10]; 5802290650Shselasky u8 op_mod[0x10]; 5803290650Shselasky 5804290650Shselasky u8 reserved_2[0x8]; 5805290650Shselasky u8 sqn[0x18]; 5806290650Shselasky 5807290650Shselasky u8 reserved_3[0x20]; 5808290650Shselasky}; 5809290650Shselasky 5810308678Shselaskystruct mlx5_ifc_destroy_scheduling_element_out_bits { 5811308678Shselasky u8 status[0x8]; 5812308678Shselasky u8 reserved_at_8[0x18]; 5813308678Shselasky 5814308678Shselasky u8 syndrome[0x20]; 5815308678Shselasky 5816308678Shselasky u8 reserved_at_40[0x1c0]; 5817308678Shselasky}; 5818308678Shselasky 5819308678Shselaskyenum { 5820308678Shselasky MLX5_DESTROY_SCHEDULING_ELEMENT_IN_SCHEDULING_HIERARCHY_E_SWITCH = 0x2, 5821308678Shselasky}; 5822308678Shselasky 5823308678Shselaskystruct mlx5_ifc_destroy_scheduling_element_in_bits { 5824308678Shselasky u8 opcode[0x10]; 5825308678Shselasky u8 reserved_at_10[0x10]; 5826308678Shselasky 5827308678Shselasky u8 reserved_at_20[0x10]; 5828308678Shselasky u8 op_mod[0x10]; 5829308678Shselasky 5830308678Shselasky u8 scheduling_hierarchy[0x8]; 5831308678Shselasky u8 reserved_at_48[0x18]; 5832308678Shselasky 5833308678Shselasky u8 scheduling_element_id[0x20]; 5834308678Shselasky 5835308678Shselasky u8 reserved_at_80[0x180]; 5836308678Shselasky}; 5837308678Shselasky 5838290650Shselaskystruct mlx5_ifc_destroy_rqt_out_bits { 5839290650Shselasky u8 status[0x8]; 5840290650Shselasky u8 reserved_0[0x18]; 5841290650Shselasky 5842290650Shselasky u8 syndrome[0x20]; 5843290650Shselasky 5844290650Shselasky u8 reserved_1[0x40]; 5845290650Shselasky}; 5846290650Shselasky 5847290650Shselaskystruct mlx5_ifc_destroy_rqt_in_bits { 5848290650Shselasky u8 opcode[0x10]; 5849290650Shselasky u8 reserved_0[0x10]; 5850290650Shselasky 5851290650Shselasky u8 reserved_1[0x10]; 5852290650Shselasky u8 op_mod[0x10]; 5853290650Shselasky 5854290650Shselasky u8 reserved_2[0x8]; 5855290650Shselasky u8 rqtn[0x18]; 5856290650Shselasky 5857290650Shselasky u8 reserved_3[0x20]; 5858290650Shselasky}; 5859290650Shselasky 5860290650Shselaskystruct mlx5_ifc_destroy_rq_out_bits { 5861290650Shselasky u8 status[0x8]; 5862290650Shselasky u8 reserved_0[0x18]; 5863290650Shselasky 5864290650Shselasky u8 syndrome[0x20]; 5865290650Shselasky 5866290650Shselasky u8 reserved_1[0x40]; 5867290650Shselasky}; 5868290650Shselasky 5869290650Shselaskystruct mlx5_ifc_destroy_rq_in_bits { 5870290650Shselasky u8 opcode[0x10]; 5871290650Shselasky u8 reserved_0[0x10]; 5872290650Shselasky 5873290650Shselasky u8 reserved_1[0x10]; 5874290650Shselasky u8 op_mod[0x10]; 5875290650Shselasky 5876290650Shselasky u8 reserved_2[0x8]; 5877290650Shselasky u8 rqn[0x18]; 5878290650Shselasky 5879290650Shselasky u8 reserved_3[0x20]; 5880290650Shselasky}; 5881290650Shselasky 5882290650Shselaskystruct mlx5_ifc_destroy_rmp_out_bits { 5883290650Shselasky u8 status[0x8]; 5884290650Shselasky u8 reserved_0[0x18]; 5885290650Shselasky 5886290650Shselasky u8 syndrome[0x20]; 5887290650Shselasky 5888290650Shselasky u8 reserved_1[0x40]; 5889290650Shselasky}; 5890290650Shselasky 5891290650Shselaskystruct mlx5_ifc_destroy_rmp_in_bits { 5892290650Shselasky u8 opcode[0x10]; 5893290650Shselasky u8 reserved_0[0x10]; 5894290650Shselasky 5895290650Shselasky u8 reserved_1[0x10]; 5896290650Shselasky u8 op_mod[0x10]; 5897290650Shselasky 5898290650Shselasky u8 reserved_2[0x8]; 5899290650Shselasky u8 rmpn[0x18]; 5900290650Shselasky 5901290650Shselasky u8 reserved_3[0x20]; 5902290650Shselasky}; 5903290650Shselasky 5904290650Shselaskystruct mlx5_ifc_destroy_qp_out_bits { 5905290650Shselasky u8 status[0x8]; 5906290650Shselasky u8 reserved_0[0x18]; 5907290650Shselasky 5908290650Shselasky u8 syndrome[0x20]; 5909290650Shselasky 5910290650Shselasky u8 reserved_1[0x40]; 5911290650Shselasky}; 5912290650Shselasky 5913290650Shselaskystruct mlx5_ifc_destroy_qp_in_bits { 5914290650Shselasky u8 opcode[0x10]; 5915290650Shselasky u8 reserved_0[0x10]; 5916290650Shselasky 5917290650Shselasky u8 reserved_1[0x10]; 5918290650Shselasky u8 op_mod[0x10]; 5919290650Shselasky 5920290650Shselasky u8 reserved_2[0x8]; 5921290650Shselasky u8 qpn[0x18]; 5922290650Shselasky 5923290650Shselasky u8 reserved_3[0x20]; 5924290650Shselasky}; 5925290650Shselasky 5926308678Shselaskystruct mlx5_ifc_destroy_qos_para_vport_out_bits { 5927308678Shselasky u8 status[0x8]; 5928308678Shselasky u8 reserved_at_8[0x18]; 5929308678Shselasky 5930308678Shselasky u8 syndrome[0x20]; 5931308678Shselasky 5932308678Shselasky u8 reserved_at_40[0x1c0]; 5933308678Shselasky}; 5934308678Shselasky 5935308678Shselaskystruct mlx5_ifc_destroy_qos_para_vport_in_bits { 5936308678Shselasky u8 opcode[0x10]; 5937308678Shselasky u8 reserved_at_10[0x10]; 5938308678Shselasky 5939308678Shselasky u8 reserved_at_20[0x10]; 5940308678Shselasky u8 op_mod[0x10]; 5941308678Shselasky 5942308678Shselasky u8 reserved_at_40[0x20]; 5943308678Shselasky 5944308678Shselasky u8 reserved_at_60[0x10]; 5945308678Shselasky u8 qos_para_vport_number[0x10]; 5946308678Shselasky 5947308678Shselasky u8 reserved_at_80[0x180]; 5948308678Shselasky}; 5949308678Shselasky 5950290650Shselaskystruct mlx5_ifc_destroy_psv_out_bits { 5951290650Shselasky u8 status[0x8]; 5952290650Shselasky u8 reserved_0[0x18]; 5953290650Shselasky 5954290650Shselasky u8 syndrome[0x20]; 5955290650Shselasky 5956290650Shselasky u8 reserved_1[0x40]; 5957290650Shselasky}; 5958290650Shselasky 5959290650Shselaskystruct mlx5_ifc_destroy_psv_in_bits { 5960290650Shselasky u8 opcode[0x10]; 5961290650Shselasky u8 reserved_0[0x10]; 5962290650Shselasky 5963290650Shselasky u8 reserved_1[0x10]; 5964290650Shselasky u8 op_mod[0x10]; 5965290650Shselasky 5966290650Shselasky u8 reserved_2[0x8]; 5967290650Shselasky u8 psvn[0x18]; 5968290650Shselasky 5969290650Shselasky u8 reserved_3[0x20]; 5970290650Shselasky}; 5971290650Shselasky 5972290650Shselaskystruct mlx5_ifc_destroy_mkey_out_bits { 5973290650Shselasky u8 status[0x8]; 5974290650Shselasky u8 reserved_0[0x18]; 5975290650Shselasky 5976290650Shselasky u8 syndrome[0x20]; 5977290650Shselasky 5978290650Shselasky u8 reserved_1[0x40]; 5979290650Shselasky}; 5980290650Shselasky 5981290650Shselaskystruct mlx5_ifc_destroy_mkey_in_bits { 5982290650Shselasky u8 opcode[0x10]; 5983290650Shselasky u8 reserved_0[0x10]; 5984290650Shselasky 5985290650Shselasky u8 reserved_1[0x10]; 5986290650Shselasky u8 op_mod[0x10]; 5987290650Shselasky 5988290650Shselasky u8 reserved_2[0x8]; 5989290650Shselasky u8 mkey_index[0x18]; 5990290650Shselasky 5991290650Shselasky u8 reserved_3[0x20]; 5992290650Shselasky}; 5993290650Shselasky 5994290650Shselaskystruct mlx5_ifc_destroy_flow_table_out_bits { 5995290650Shselasky u8 status[0x8]; 5996290650Shselasky u8 reserved_0[0x18]; 5997290650Shselasky 5998290650Shselasky u8 syndrome[0x20]; 5999290650Shselasky 6000290650Shselasky u8 reserved_1[0x40]; 6001290650Shselasky}; 6002290650Shselasky 6003290650Shselaskystruct mlx5_ifc_destroy_flow_table_in_bits { 6004290650Shselasky u8 opcode[0x10]; 6005290650Shselasky u8 reserved_0[0x10]; 6006290650Shselasky 6007290650Shselasky u8 reserved_1[0x10]; 6008290650Shselasky u8 op_mod[0x10]; 6009290650Shselasky 6010290650Shselasky u8 other_vport[0x1]; 6011290650Shselasky u8 reserved_2[0xf]; 6012290650Shselasky u8 vport_number[0x10]; 6013290650Shselasky 6014290650Shselasky u8 reserved_3[0x20]; 6015290650Shselasky 6016290650Shselasky u8 table_type[0x8]; 6017290650Shselasky u8 reserved_4[0x18]; 6018290650Shselasky 6019290650Shselasky u8 reserved_5[0x8]; 6020290650Shselasky u8 table_id[0x18]; 6021290650Shselasky 6022290650Shselasky u8 reserved_6[0x140]; 6023290650Shselasky}; 6024290650Shselasky 6025290650Shselaskystruct mlx5_ifc_destroy_flow_group_out_bits { 6026290650Shselasky u8 status[0x8]; 6027290650Shselasky u8 reserved_0[0x18]; 6028290650Shselasky 6029290650Shselasky u8 syndrome[0x20]; 6030290650Shselasky 6031290650Shselasky u8 reserved_1[0x40]; 6032290650Shselasky}; 6033290650Shselasky 6034290650Shselaskystruct mlx5_ifc_destroy_flow_group_in_bits { 6035290650Shselasky u8 opcode[0x10]; 6036290650Shselasky u8 reserved_0[0x10]; 6037290650Shselasky 6038290650Shselasky u8 reserved_1[0x10]; 6039290650Shselasky u8 op_mod[0x10]; 6040290650Shselasky 6041290650Shselasky u8 other_vport[0x1]; 6042290650Shselasky u8 reserved_2[0xf]; 6043290650Shselasky u8 vport_number[0x10]; 6044290650Shselasky 6045290650Shselasky u8 reserved_3[0x20]; 6046290650Shselasky 6047290650Shselasky u8 table_type[0x8]; 6048290650Shselasky u8 reserved_4[0x18]; 6049290650Shselasky 6050290650Shselasky u8 reserved_5[0x8]; 6051290650Shselasky u8 table_id[0x18]; 6052290650Shselasky 6053290650Shselasky u8 group_id[0x20]; 6054290650Shselasky 6055290650Shselasky u8 reserved_6[0x120]; 6056290650Shselasky}; 6057290650Shselasky 6058290650Shselaskystruct mlx5_ifc_destroy_eq_out_bits { 6059290650Shselasky u8 status[0x8]; 6060290650Shselasky u8 reserved_0[0x18]; 6061290650Shselasky 6062290650Shselasky u8 syndrome[0x20]; 6063290650Shselasky 6064290650Shselasky u8 reserved_1[0x40]; 6065290650Shselasky}; 6066290650Shselasky 6067290650Shselaskystruct mlx5_ifc_destroy_eq_in_bits { 6068290650Shselasky u8 opcode[0x10]; 6069290650Shselasky u8 reserved_0[0x10]; 6070290650Shselasky 6071290650Shselasky u8 reserved_1[0x10]; 6072290650Shselasky u8 op_mod[0x10]; 6073290650Shselasky 6074290650Shselasky u8 reserved_2[0x18]; 6075290650Shselasky u8 eq_number[0x8]; 6076290650Shselasky 6077290650Shselasky u8 reserved_3[0x20]; 6078290650Shselasky}; 6079290650Shselasky 6080290650Shselaskystruct mlx5_ifc_destroy_dct_out_bits { 6081290650Shselasky u8 status[0x8]; 6082290650Shselasky u8 reserved_0[0x18]; 6083290650Shselasky 6084290650Shselasky u8 syndrome[0x20]; 6085290650Shselasky 6086290650Shselasky u8 reserved_1[0x40]; 6087290650Shselasky}; 6088290650Shselasky 6089290650Shselaskystruct mlx5_ifc_destroy_dct_in_bits { 6090290650Shselasky u8 opcode[0x10]; 6091290650Shselasky u8 reserved_0[0x10]; 6092290650Shselasky 6093290650Shselasky u8 reserved_1[0x10]; 6094290650Shselasky u8 op_mod[0x10]; 6095290650Shselasky 6096290650Shselasky u8 reserved_2[0x8]; 6097290650Shselasky u8 dctn[0x18]; 6098290650Shselasky 6099290650Shselasky u8 reserved_3[0x20]; 6100290650Shselasky}; 6101290650Shselasky 6102290650Shselaskystruct mlx5_ifc_destroy_cq_out_bits { 6103290650Shselasky u8 status[0x8]; 6104290650Shselasky u8 reserved_0[0x18]; 6105290650Shselasky 6106290650Shselasky u8 syndrome[0x20]; 6107290650Shselasky 6108290650Shselasky u8 reserved_1[0x40]; 6109290650Shselasky}; 6110290650Shselasky 6111290650Shselaskystruct mlx5_ifc_destroy_cq_in_bits { 6112290650Shselasky u8 opcode[0x10]; 6113290650Shselasky u8 reserved_0[0x10]; 6114290650Shselasky 6115290650Shselasky u8 reserved_1[0x10]; 6116290650Shselasky u8 op_mod[0x10]; 6117290650Shselasky 6118290650Shselasky u8 reserved_2[0x8]; 6119290650Shselasky u8 cqn[0x18]; 6120290650Shselasky 6121290650Shselasky u8 reserved_3[0x20]; 6122290650Shselasky}; 6123290650Shselasky 6124290650Shselaskystruct mlx5_ifc_delete_vxlan_udp_dport_out_bits { 6125290650Shselasky u8 status[0x8]; 6126290650Shselasky u8 reserved_0[0x18]; 6127290650Shselasky 6128290650Shselasky u8 syndrome[0x20]; 6129290650Shselasky 6130290650Shselasky u8 reserved_1[0x40]; 6131290650Shselasky}; 6132290650Shselasky 6133290650Shselaskystruct mlx5_ifc_delete_vxlan_udp_dport_in_bits { 6134290650Shselasky u8 opcode[0x10]; 6135290650Shselasky u8 reserved_0[0x10]; 6136290650Shselasky 6137290650Shselasky u8 reserved_1[0x10]; 6138290650Shselasky u8 op_mod[0x10]; 6139290650Shselasky 6140290650Shselasky u8 reserved_2[0x20]; 6141290650Shselasky 6142290650Shselasky u8 reserved_3[0x10]; 6143290650Shselasky u8 vxlan_udp_port[0x10]; 6144290650Shselasky}; 6145290650Shselasky 6146290650Shselaskystruct mlx5_ifc_delete_l2_table_entry_out_bits { 6147290650Shselasky u8 status[0x8]; 6148290650Shselasky u8 reserved_0[0x18]; 6149290650Shselasky 6150290650Shselasky u8 syndrome[0x20]; 6151290650Shselasky 6152290650Shselasky u8 reserved_1[0x40]; 6153290650Shselasky}; 6154290650Shselasky 6155290650Shselaskystruct mlx5_ifc_delete_l2_table_entry_in_bits { 6156290650Shselasky u8 opcode[0x10]; 6157290650Shselasky u8 reserved_0[0x10]; 6158290650Shselasky 6159290650Shselasky u8 reserved_1[0x10]; 6160290650Shselasky u8 op_mod[0x10]; 6161290650Shselasky 6162290650Shselasky u8 reserved_2[0x60]; 6163290650Shselasky 6164290650Shselasky u8 reserved_3[0x8]; 6165290650Shselasky u8 table_index[0x18]; 6166290650Shselasky 6167290650Shselasky u8 reserved_4[0x140]; 6168290650Shselasky}; 6169290650Shselasky 6170290650Shselaskystruct mlx5_ifc_delete_fte_out_bits { 6171290650Shselasky u8 status[0x8]; 6172290650Shselasky u8 reserved_0[0x18]; 6173290650Shselasky 6174290650Shselasky u8 syndrome[0x20]; 6175290650Shselasky 6176290650Shselasky u8 reserved_1[0x40]; 6177290650Shselasky}; 6178290650Shselasky 6179290650Shselaskystruct mlx5_ifc_delete_fte_in_bits { 6180290650Shselasky u8 opcode[0x10]; 6181290650Shselasky u8 reserved_0[0x10]; 6182290650Shselasky 6183290650Shselasky u8 reserved_1[0x10]; 6184290650Shselasky u8 op_mod[0x10]; 6185290650Shselasky 6186290650Shselasky u8 other_vport[0x1]; 6187290650Shselasky u8 reserved_2[0xf]; 6188290650Shselasky u8 vport_number[0x10]; 6189290650Shselasky 6190290650Shselasky u8 reserved_3[0x20]; 6191290650Shselasky 6192290650Shselasky u8 table_type[0x8]; 6193290650Shselasky u8 reserved_4[0x18]; 6194290650Shselasky 6195290650Shselasky u8 reserved_5[0x8]; 6196290650Shselasky u8 table_id[0x18]; 6197290650Shselasky 6198290650Shselasky u8 reserved_6[0x40]; 6199290650Shselasky 6200290650Shselasky u8 flow_index[0x20]; 6201290650Shselasky 6202290650Shselasky u8 reserved_7[0xe0]; 6203290650Shselasky}; 6204290650Shselasky 6205290650Shselaskystruct mlx5_ifc_dealloc_xrcd_out_bits { 6206290650Shselasky u8 status[0x8]; 6207290650Shselasky u8 reserved_0[0x18]; 6208290650Shselasky 6209290650Shselasky u8 syndrome[0x20]; 6210290650Shselasky 6211290650Shselasky u8 reserved_1[0x40]; 6212290650Shselasky}; 6213290650Shselasky 6214290650Shselaskystruct mlx5_ifc_dealloc_xrcd_in_bits { 6215290650Shselasky u8 opcode[0x10]; 6216290650Shselasky u8 reserved_0[0x10]; 6217290650Shselasky 6218290650Shselasky u8 reserved_1[0x10]; 6219290650Shselasky u8 op_mod[0x10]; 6220290650Shselasky 6221290650Shselasky u8 reserved_2[0x8]; 6222290650Shselasky u8 xrcd[0x18]; 6223290650Shselasky 6224290650Shselasky u8 reserved_3[0x20]; 6225290650Shselasky}; 6226290650Shselasky 6227290650Shselaskystruct mlx5_ifc_dealloc_uar_out_bits { 6228290650Shselasky u8 status[0x8]; 6229290650Shselasky u8 reserved_0[0x18]; 6230290650Shselasky 6231290650Shselasky u8 syndrome[0x20]; 6232290650Shselasky 6233290650Shselasky u8 reserved_1[0x40]; 6234290650Shselasky}; 6235290650Shselasky 6236290650Shselaskystruct mlx5_ifc_dealloc_uar_in_bits { 6237290650Shselasky u8 opcode[0x10]; 6238290650Shselasky u8 reserved_0[0x10]; 6239290650Shselasky 6240290650Shselasky u8 reserved_1[0x10]; 6241290650Shselasky u8 op_mod[0x10]; 6242290650Shselasky 6243290650Shselasky u8 reserved_2[0x8]; 6244290650Shselasky u8 uar[0x18]; 6245290650Shselasky 6246290650Shselasky u8 reserved_3[0x20]; 6247290650Shselasky}; 6248290650Shselasky 6249290650Shselaskystruct mlx5_ifc_dealloc_transport_domain_out_bits { 6250290650Shselasky u8 status[0x8]; 6251290650Shselasky u8 reserved_0[0x18]; 6252290650Shselasky 6253290650Shselasky u8 syndrome[0x20]; 6254290650Shselasky 6255290650Shselasky u8 reserved_1[0x40]; 6256290650Shselasky}; 6257290650Shselasky 6258290650Shselaskystruct mlx5_ifc_dealloc_transport_domain_in_bits { 6259290650Shselasky u8 opcode[0x10]; 6260290650Shselasky u8 reserved_0[0x10]; 6261290650Shselasky 6262290650Shselasky u8 reserved_1[0x10]; 6263290650Shselasky u8 op_mod[0x10]; 6264290650Shselasky 6265290650Shselasky u8 reserved_2[0x8]; 6266290650Shselasky u8 transport_domain[0x18]; 6267290650Shselasky 6268290650Shselasky u8 reserved_3[0x20]; 6269290650Shselasky}; 6270290650Shselasky 6271290650Shselaskystruct mlx5_ifc_dealloc_q_counter_out_bits { 6272290650Shselasky u8 status[0x8]; 6273290650Shselasky u8 reserved_0[0x18]; 6274290650Shselasky 6275290650Shselasky u8 syndrome[0x20]; 6276290650Shselasky 6277290650Shselasky u8 reserved_1[0x40]; 6278290650Shselasky}; 6279290650Shselasky 6280306233Shselaskystruct mlx5_ifc_counter_id_bits { 6281306233Shselasky u8 reserved[0x10]; 6282306233Shselasky u8 counter_id[0x10]; 6283306233Shselasky}; 6284306233Shselasky 6285308678Shselaskystruct mlx5_ifc_diagnostic_params_context_bits { 6286306233Shselasky u8 num_of_counters[0x10]; 6287306233Shselasky u8 reserved_2[0x8]; 6288306233Shselasky u8 log_num_of_samples[0x8]; 6289306233Shselasky 6290306233Shselasky u8 single[0x1]; 6291306233Shselasky u8 repetitive[0x1]; 6292306233Shselasky u8 sync[0x1]; 6293306233Shselasky u8 clear[0x1]; 6294306233Shselasky u8 on_demand[0x1]; 6295306233Shselasky u8 enable[0x1]; 6296306233Shselasky u8 reserved_3[0x12]; 6297306233Shselasky u8 log_sample_period[0x8]; 6298306233Shselasky 6299306233Shselasky u8 reserved_4[0x80]; 6300306233Shselasky 6301306233Shselasky struct mlx5_ifc_counter_id_bits counter_id[0]; 6302306233Shselasky}; 6303306233Shselasky 6304308678Shselaskystruct mlx5_ifc_set_diagnostic_params_in_bits { 6305308678Shselasky u8 opcode[0x10]; 6306308678Shselasky u8 reserved_0[0x10]; 6307308678Shselasky 6308308678Shselasky u8 reserved_1[0x10]; 6309308678Shselasky u8 op_mod[0x10]; 6310308678Shselasky 6311308678Shselasky struct mlx5_ifc_diagnostic_params_context_bits diagnostic_params_ctx; 6312308678Shselasky}; 6313308678Shselasky 6314308678Shselaskystruct mlx5_ifc_set_diagnostic_params_out_bits { 6315306233Shselasky u8 status[0x8]; 6316306233Shselasky u8 reserved_0[0x18]; 6317306233Shselasky 6318306233Shselasky u8 syndrome[0x20]; 6319306233Shselasky 6320306233Shselasky u8 reserved_1[0x40]; 6321306233Shselasky}; 6322306233Shselasky 6323308678Shselaskystruct mlx5_ifc_query_diagnostic_counters_in_bits { 6324306233Shselasky u8 opcode[0x10]; 6325306233Shselasky u8 reserved_0[0x10]; 6326306233Shselasky 6327306233Shselasky u8 reserved_1[0x10]; 6328306233Shselasky u8 op_mod[0x10]; 6329306233Shselasky 6330306233Shselasky u8 num_of_samples[0x10]; 6331306233Shselasky u8 sample_index[0x10]; 6332306233Shselasky 6333306233Shselasky u8 reserved_2[0x20]; 6334306233Shselasky}; 6335306233Shselasky 6336306233Shselaskystruct mlx5_ifc_diagnostic_counter_bits { 6337306233Shselasky u8 counter_id[0x10]; 6338306233Shselasky u8 sample_id[0x10]; 6339306233Shselasky 6340306233Shselasky u8 time_stamp_31_0[0x20]; 6341306233Shselasky 6342306233Shselasky u8 counter_value_h[0x20]; 6343306233Shselasky 6344306233Shselasky u8 counter_value_l[0x20]; 6345306233Shselasky}; 6346306233Shselasky 6347308678Shselaskystruct mlx5_ifc_query_diagnostic_counters_out_bits { 6348306233Shselasky u8 status[0x8]; 6349306233Shselasky u8 reserved_0[0x18]; 6350306233Shselasky 6351306233Shselasky u8 syndrome[0x20]; 6352306233Shselasky 6353306233Shselasky u8 reserved_1[0x40]; 6354306233Shselasky 6355306233Shselasky struct mlx5_ifc_diagnostic_counter_bits diag_counter[0]; 6356306233Shselasky}; 6357306233Shselasky 6358290650Shselaskystruct mlx5_ifc_dealloc_q_counter_in_bits { 6359290650Shselasky u8 opcode[0x10]; 6360290650Shselasky u8 reserved_0[0x10]; 6361290650Shselasky 6362290650Shselasky u8 reserved_1[0x10]; 6363290650Shselasky u8 op_mod[0x10]; 6364290650Shselasky 6365290650Shselasky u8 reserved_2[0x18]; 6366290650Shselasky u8 counter_set_id[0x8]; 6367290650Shselasky 6368290650Shselasky u8 reserved_3[0x20]; 6369290650Shselasky}; 6370290650Shselasky 6371290650Shselaskystruct mlx5_ifc_dealloc_pd_out_bits { 6372290650Shselasky u8 status[0x8]; 6373290650Shselasky u8 reserved_0[0x18]; 6374290650Shselasky 6375290650Shselasky u8 syndrome[0x20]; 6376290650Shselasky 6377290650Shselasky u8 reserved_1[0x40]; 6378290650Shselasky}; 6379290650Shselasky 6380290650Shselaskystruct mlx5_ifc_dealloc_pd_in_bits { 6381290650Shselasky u8 opcode[0x10]; 6382290650Shselasky u8 reserved_0[0x10]; 6383290650Shselasky 6384290650Shselasky u8 reserved_1[0x10]; 6385290650Shselasky u8 op_mod[0x10]; 6386290650Shselasky 6387290650Shselasky u8 reserved_2[0x8]; 6388290650Shselasky u8 pd[0x18]; 6389290650Shselasky 6390290650Shselasky u8 reserved_3[0x20]; 6391290650Shselasky}; 6392290650Shselasky 6393290650Shselaskystruct mlx5_ifc_dealloc_flow_counter_out_bits { 6394290650Shselasky u8 status[0x8]; 6395290650Shselasky u8 reserved_0[0x18]; 6396290650Shselasky 6397290650Shselasky u8 syndrome[0x20]; 6398290650Shselasky 6399290650Shselasky u8 reserved_1[0x40]; 6400290650Shselasky}; 6401290650Shselasky 6402290650Shselaskystruct mlx5_ifc_dealloc_flow_counter_in_bits { 6403290650Shselasky u8 opcode[0x10]; 6404290650Shselasky u8 reserved_0[0x10]; 6405290650Shselasky 6406290650Shselasky u8 reserved_1[0x10]; 6407290650Shselasky u8 op_mod[0x10]; 6408290650Shselasky 6409290650Shselasky u8 reserved_2[0x10]; 6410290650Shselasky u8 flow_counter_id[0x10]; 6411290650Shselasky 6412290650Shselasky u8 reserved_3[0x20]; 6413290650Shselasky}; 6414290650Shselasky 6415290650Shselaskystruct mlx5_ifc_deactivate_tracer_out_bits { 6416290650Shselasky u8 status[0x8]; 6417290650Shselasky u8 reserved_0[0x18]; 6418290650Shselasky 6419290650Shselasky u8 syndrome[0x20]; 6420290650Shselasky 6421290650Shselasky u8 reserved_1[0x40]; 6422290650Shselasky}; 6423290650Shselasky 6424290650Shselaskystruct mlx5_ifc_deactivate_tracer_in_bits { 6425290650Shselasky u8 opcode[0x10]; 6426290650Shselasky u8 reserved_0[0x10]; 6427290650Shselasky 6428290650Shselasky u8 reserved_1[0x10]; 6429290650Shselasky u8 op_mod[0x10]; 6430290650Shselasky 6431290650Shselasky u8 mkey[0x20]; 6432290650Shselasky 6433290650Shselasky u8 reserved_2[0x20]; 6434290650Shselasky}; 6435290650Shselasky 6436290650Shselaskystruct mlx5_ifc_create_xrc_srq_out_bits { 6437290650Shselasky u8 status[0x8]; 6438290650Shselasky u8 reserved_0[0x18]; 6439290650Shselasky 6440290650Shselasky u8 syndrome[0x20]; 6441290650Shselasky 6442290650Shselasky u8 reserved_1[0x8]; 6443290650Shselasky u8 xrc_srqn[0x18]; 6444290650Shselasky 6445290650Shselasky u8 reserved_2[0x20]; 6446290650Shselasky}; 6447290650Shselasky 6448290650Shselaskystruct mlx5_ifc_create_xrc_srq_in_bits { 6449290650Shselasky u8 opcode[0x10]; 6450290650Shselasky u8 reserved_0[0x10]; 6451290650Shselasky 6452290650Shselasky u8 reserved_1[0x10]; 6453290650Shselasky u8 op_mod[0x10]; 6454290650Shselasky 6455290650Shselasky u8 reserved_2[0x40]; 6456290650Shselasky 6457290650Shselasky struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry; 6458290650Shselasky 6459290650Shselasky u8 reserved_3[0x600]; 6460290650Shselasky 6461290650Shselasky u8 pas[0][0x40]; 6462290650Shselasky}; 6463290650Shselasky 6464290650Shselaskystruct mlx5_ifc_create_tis_out_bits { 6465290650Shselasky u8 status[0x8]; 6466290650Shselasky u8 reserved_0[0x18]; 6467290650Shselasky 6468290650Shselasky u8 syndrome[0x20]; 6469290650Shselasky 6470290650Shselasky u8 reserved_1[0x8]; 6471290650Shselasky u8 tisn[0x18]; 6472290650Shselasky 6473290650Shselasky u8 reserved_2[0x20]; 6474290650Shselasky}; 6475290650Shselasky 6476290650Shselaskystruct mlx5_ifc_create_tis_in_bits { 6477290650Shselasky u8 opcode[0x10]; 6478290650Shselasky u8 reserved_0[0x10]; 6479290650Shselasky 6480290650Shselasky u8 reserved_1[0x10]; 6481290650Shselasky u8 op_mod[0x10]; 6482290650Shselasky 6483290650Shselasky u8 reserved_2[0xc0]; 6484290650Shselasky 6485290650Shselasky struct mlx5_ifc_tisc_bits ctx; 6486290650Shselasky}; 6487290650Shselasky 6488290650Shselaskystruct mlx5_ifc_create_tir_out_bits { 6489290650Shselasky u8 status[0x8]; 6490290650Shselasky u8 reserved_0[0x18]; 6491290650Shselasky 6492290650Shselasky u8 syndrome[0x20]; 6493290650Shselasky 6494290650Shselasky u8 reserved_1[0x8]; 6495290650Shselasky u8 tirn[0x18]; 6496290650Shselasky 6497290650Shselasky u8 reserved_2[0x20]; 6498290650Shselasky}; 6499290650Shselasky 6500290650Shselaskystruct mlx5_ifc_create_tir_in_bits { 6501290650Shselasky u8 opcode[0x10]; 6502290650Shselasky u8 reserved_0[0x10]; 6503290650Shselasky 6504290650Shselasky u8 reserved_1[0x10]; 6505290650Shselasky u8 op_mod[0x10]; 6506290650Shselasky 6507290650Shselasky u8 reserved_2[0xc0]; 6508290650Shselasky 6509290650Shselasky struct mlx5_ifc_tirc_bits tir_context; 6510290650Shselasky}; 6511290650Shselasky 6512290650Shselaskystruct mlx5_ifc_create_srq_out_bits { 6513290650Shselasky u8 status[0x8]; 6514290650Shselasky u8 reserved_0[0x18]; 6515290650Shselasky 6516290650Shselasky u8 syndrome[0x20]; 6517290650Shselasky 6518290650Shselasky u8 reserved_1[0x8]; 6519290650Shselasky u8 srqn[0x18]; 6520290650Shselasky 6521290650Shselasky u8 reserved_2[0x20]; 6522290650Shselasky}; 6523290650Shselasky 6524290650Shselaskystruct mlx5_ifc_create_srq_in_bits { 6525290650Shselasky u8 opcode[0x10]; 6526290650Shselasky u8 reserved_0[0x10]; 6527290650Shselasky 6528290650Shselasky u8 reserved_1[0x10]; 6529290650Shselasky u8 op_mod[0x10]; 6530290650Shselasky 6531290650Shselasky u8 reserved_2[0x40]; 6532290650Shselasky 6533290650Shselasky struct mlx5_ifc_srqc_bits srq_context_entry; 6534290650Shselasky 6535290650Shselasky u8 reserved_3[0x600]; 6536290650Shselasky 6537290650Shselasky u8 pas[0][0x40]; 6538290650Shselasky}; 6539290650Shselasky 6540290650Shselaskystruct mlx5_ifc_create_sq_out_bits { 6541290650Shselasky u8 status[0x8]; 6542290650Shselasky u8 reserved_0[0x18]; 6543290650Shselasky 6544290650Shselasky u8 syndrome[0x20]; 6545290650Shselasky 6546290650Shselasky u8 reserved_1[0x8]; 6547290650Shselasky u8 sqn[0x18]; 6548290650Shselasky 6549290650Shselasky u8 reserved_2[0x20]; 6550290650Shselasky}; 6551290650Shselasky 6552290650Shselaskystruct mlx5_ifc_create_sq_in_bits { 6553290650Shselasky u8 opcode[0x10]; 6554290650Shselasky u8 reserved_0[0x10]; 6555290650Shselasky 6556290650Shselasky u8 reserved_1[0x10]; 6557290650Shselasky u8 op_mod[0x10]; 6558290650Shselasky 6559290650Shselasky u8 reserved_2[0xc0]; 6560290650Shselasky 6561290650Shselasky struct mlx5_ifc_sqc_bits ctx; 6562290650Shselasky}; 6563290650Shselasky 6564308678Shselaskystruct mlx5_ifc_create_scheduling_element_out_bits { 6565308678Shselasky u8 status[0x8]; 6566308678Shselasky u8 reserved_at_8[0x18]; 6567308678Shselasky 6568308678Shselasky u8 syndrome[0x20]; 6569308678Shselasky 6570308678Shselasky u8 reserved_at_40[0x40]; 6571308678Shselasky 6572308678Shselasky u8 scheduling_element_id[0x20]; 6573308678Shselasky 6574308678Shselasky u8 reserved_at_a0[0x160]; 6575308678Shselasky}; 6576308678Shselasky 6577308678Shselaskyenum { 6578308678Shselasky MLX5_CREATE_SCHEDULING_ELEMENT_IN_SCHEDULING_HIERARCHY_E_SWITCH = 0x2, 6579308678Shselasky}; 6580308678Shselasky 6581308678Shselaskystruct mlx5_ifc_create_scheduling_element_in_bits { 6582308678Shselasky u8 opcode[0x10]; 6583308678Shselasky u8 reserved_at_10[0x10]; 6584308678Shselasky 6585308678Shselasky u8 reserved_at_20[0x10]; 6586308678Shselasky u8 op_mod[0x10]; 6587308678Shselasky 6588308678Shselasky u8 scheduling_hierarchy[0x8]; 6589308678Shselasky u8 reserved_at_48[0x18]; 6590308678Shselasky 6591308678Shselasky u8 reserved_at_60[0xa0]; 6592308678Shselasky 6593308678Shselasky struct mlx5_ifc_scheduling_context_bits scheduling_context; 6594308678Shselasky 6595308678Shselasky u8 reserved_at_300[0x100]; 6596308678Shselasky}; 6597308678Shselasky 6598290650Shselaskystruct mlx5_ifc_create_rqt_out_bits { 6599290650Shselasky u8 status[0x8]; 6600290650Shselasky u8 reserved_0[0x18]; 6601290650Shselasky 6602290650Shselasky u8 syndrome[0x20]; 6603290650Shselasky 6604290650Shselasky u8 reserved_1[0x8]; 6605290650Shselasky u8 rqtn[0x18]; 6606290650Shselasky 6607290650Shselasky u8 reserved_2[0x20]; 6608290650Shselasky}; 6609290650Shselasky 6610290650Shselaskystruct mlx5_ifc_create_rqt_in_bits { 6611290650Shselasky u8 opcode[0x10]; 6612290650Shselasky u8 reserved_0[0x10]; 6613290650Shselasky 6614290650Shselasky u8 reserved_1[0x10]; 6615290650Shselasky u8 op_mod[0x10]; 6616290650Shselasky 6617290650Shselasky u8 reserved_2[0xc0]; 6618290650Shselasky 6619290650Shselasky struct mlx5_ifc_rqtc_bits rqt_context; 6620290650Shselasky}; 6621290650Shselasky 6622290650Shselaskystruct mlx5_ifc_create_rq_out_bits { 6623290650Shselasky u8 status[0x8]; 6624290650Shselasky u8 reserved_0[0x18]; 6625290650Shselasky 6626290650Shselasky u8 syndrome[0x20]; 6627290650Shselasky 6628290650Shselasky u8 reserved_1[0x8]; 6629290650Shselasky u8 rqn[0x18]; 6630290650Shselasky 6631290650Shselasky u8 reserved_2[0x20]; 6632290650Shselasky}; 6633290650Shselasky 6634290650Shselaskystruct mlx5_ifc_create_rq_in_bits { 6635290650Shselasky u8 opcode[0x10]; 6636290650Shselasky u8 reserved_0[0x10]; 6637290650Shselasky 6638290650Shselasky u8 reserved_1[0x10]; 6639290650Shselasky u8 op_mod[0x10]; 6640290650Shselasky 6641290650Shselasky u8 reserved_2[0xc0]; 6642290650Shselasky 6643290650Shselasky struct mlx5_ifc_rqc_bits ctx; 6644290650Shselasky}; 6645290650Shselasky 6646290650Shselaskystruct mlx5_ifc_create_rmp_out_bits { 6647290650Shselasky u8 status[0x8]; 6648290650Shselasky u8 reserved_0[0x18]; 6649290650Shselasky 6650290650Shselasky u8 syndrome[0x20]; 6651290650Shselasky 6652290650Shselasky u8 reserved_1[0x8]; 6653290650Shselasky u8 rmpn[0x18]; 6654290650Shselasky 6655290650Shselasky u8 reserved_2[0x20]; 6656290650Shselasky}; 6657290650Shselasky 6658290650Shselaskystruct mlx5_ifc_create_rmp_in_bits { 6659290650Shselasky u8 opcode[0x10]; 6660290650Shselasky u8 reserved_0[0x10]; 6661290650Shselasky 6662290650Shselasky u8 reserved_1[0x10]; 6663290650Shselasky u8 op_mod[0x10]; 6664290650Shselasky 6665290650Shselasky u8 reserved_2[0xc0]; 6666290650Shselasky 6667290650Shselasky struct mlx5_ifc_rmpc_bits ctx; 6668290650Shselasky}; 6669290650Shselasky 6670290650Shselaskystruct mlx5_ifc_create_qp_out_bits { 6671290650Shselasky u8 status[0x8]; 6672290650Shselasky u8 reserved_0[0x18]; 6673290650Shselasky 6674290650Shselasky u8 syndrome[0x20]; 6675290650Shselasky 6676290650Shselasky u8 reserved_1[0x8]; 6677290650Shselasky u8 qpn[0x18]; 6678290650Shselasky 6679290650Shselasky u8 reserved_2[0x20]; 6680290650Shselasky}; 6681290650Shselasky 6682290650Shselaskystruct mlx5_ifc_create_qp_in_bits { 6683290650Shselasky u8 opcode[0x10]; 6684290650Shselasky u8 reserved_0[0x10]; 6685290650Shselasky 6686290650Shselasky u8 reserved_1[0x10]; 6687290650Shselasky u8 op_mod[0x10]; 6688290650Shselasky 6689306233Shselasky u8 reserved_2[0x8]; 6690306233Shselasky u8 input_qpn[0x18]; 6691290650Shselasky 6692306233Shselasky u8 reserved_3[0x20]; 6693306233Shselasky 6694290650Shselasky u8 opt_param_mask[0x20]; 6695290650Shselasky 6696306233Shselasky u8 reserved_4[0x20]; 6697290650Shselasky 6698290650Shselasky struct mlx5_ifc_qpc_bits qpc; 6699290650Shselasky 6700306233Shselasky u8 reserved_5[0x80]; 6701290650Shselasky 6702290650Shselasky u8 pas[0][0x40]; 6703290650Shselasky}; 6704290650Shselasky 6705308678Shselaskystruct mlx5_ifc_create_qos_para_vport_out_bits { 6706308678Shselasky u8 status[0x8]; 6707308678Shselasky u8 reserved_at_8[0x18]; 6708308678Shselasky 6709308678Shselasky u8 syndrome[0x20]; 6710308678Shselasky 6711308678Shselasky u8 reserved_at_40[0x20]; 6712308678Shselasky 6713308678Shselasky u8 reserved_at_60[0x10]; 6714308678Shselasky u8 qos_para_vport_number[0x10]; 6715308678Shselasky 6716308678Shselasky u8 reserved_at_80[0x180]; 6717308678Shselasky}; 6718308678Shselasky 6719308678Shselaskystruct mlx5_ifc_create_qos_para_vport_in_bits { 6720308678Shselasky u8 opcode[0x10]; 6721308678Shselasky u8 reserved_at_10[0x10]; 6722308678Shselasky 6723308678Shselasky u8 reserved_at_20[0x10]; 6724308678Shselasky u8 op_mod[0x10]; 6725308678Shselasky 6726308678Shselasky u8 reserved_at_40[0x1c0]; 6727308678Shselasky}; 6728308678Shselasky 6729290650Shselaskystruct mlx5_ifc_create_psv_out_bits { 6730290650Shselasky u8 status[0x8]; 6731290650Shselasky u8 reserved_0[0x18]; 6732290650Shselasky 6733290650Shselasky u8 syndrome[0x20]; 6734290650Shselasky 6735290650Shselasky u8 reserved_1[0x40]; 6736290650Shselasky 6737290650Shselasky u8 reserved_2[0x8]; 6738290650Shselasky u8 psv0_index[0x18]; 6739290650Shselasky 6740290650Shselasky u8 reserved_3[0x8]; 6741290650Shselasky u8 psv1_index[0x18]; 6742290650Shselasky 6743290650Shselasky u8 reserved_4[0x8]; 6744290650Shselasky u8 psv2_index[0x18]; 6745290650Shselasky 6746290650Shselasky u8 reserved_5[0x8]; 6747290650Shselasky u8 psv3_index[0x18]; 6748290650Shselasky}; 6749290650Shselasky 6750290650Shselaskystruct mlx5_ifc_create_psv_in_bits { 6751290650Shselasky u8 opcode[0x10]; 6752290650Shselasky u8 reserved_0[0x10]; 6753290650Shselasky 6754290650Shselasky u8 reserved_1[0x10]; 6755290650Shselasky u8 op_mod[0x10]; 6756290650Shselasky 6757290650Shselasky u8 num_psv[0x4]; 6758290650Shselasky u8 reserved_2[0x4]; 6759290650Shselasky u8 pd[0x18]; 6760290650Shselasky 6761290650Shselasky u8 reserved_3[0x20]; 6762290650Shselasky}; 6763290650Shselasky 6764290650Shselaskystruct mlx5_ifc_create_mkey_out_bits { 6765290650Shselasky u8 status[0x8]; 6766290650Shselasky u8 reserved_0[0x18]; 6767290650Shselasky 6768290650Shselasky u8 syndrome[0x20]; 6769290650Shselasky 6770290650Shselasky u8 reserved_1[0x8]; 6771290650Shselasky u8 mkey_index[0x18]; 6772290650Shselasky 6773290650Shselasky u8 reserved_2[0x20]; 6774290650Shselasky}; 6775290650Shselasky 6776290650Shselaskystruct mlx5_ifc_create_mkey_in_bits { 6777290650Shselasky u8 opcode[0x10]; 6778290650Shselasky u8 reserved_0[0x10]; 6779290650Shselasky 6780290650Shselasky u8 reserved_1[0x10]; 6781290650Shselasky u8 op_mod[0x10]; 6782290650Shselasky 6783290650Shselasky u8 reserved_2[0x20]; 6784290650Shselasky 6785290650Shselasky u8 pg_access[0x1]; 6786290650Shselasky u8 reserved_3[0x1f]; 6787290650Shselasky 6788290650Shselasky struct mlx5_ifc_mkc_bits memory_key_mkey_entry; 6789290650Shselasky 6790290650Shselasky u8 reserved_4[0x80]; 6791290650Shselasky 6792290650Shselasky u8 translations_octword_actual_size[0x20]; 6793290650Shselasky 6794290650Shselasky u8 reserved_5[0x560]; 6795290650Shselasky 6796290650Shselasky u8 klm_pas_mtt[0][0x20]; 6797290650Shselasky}; 6798290650Shselasky 6799290650Shselaskystruct mlx5_ifc_create_flow_table_out_bits { 6800290650Shselasky u8 status[0x8]; 6801290650Shselasky u8 reserved_0[0x18]; 6802290650Shselasky 6803290650Shselasky u8 syndrome[0x20]; 6804290650Shselasky 6805290650Shselasky u8 reserved_1[0x8]; 6806290650Shselasky u8 table_id[0x18]; 6807290650Shselasky 6808290650Shselasky u8 reserved_2[0x20]; 6809290650Shselasky}; 6810290650Shselasky 6811290650Shselaskystruct mlx5_ifc_create_flow_table_in_bits { 6812290650Shselasky u8 opcode[0x10]; 6813290650Shselasky u8 reserved_0[0x10]; 6814290650Shselasky 6815290650Shselasky u8 reserved_1[0x10]; 6816290650Shselasky u8 op_mod[0x10]; 6817290650Shselasky 6818290650Shselasky u8 other_vport[0x1]; 6819290650Shselasky u8 reserved_2[0xf]; 6820290650Shselasky u8 vport_number[0x10]; 6821290650Shselasky 6822290650Shselasky u8 reserved_3[0x20]; 6823290650Shselasky 6824290650Shselasky u8 table_type[0x8]; 6825290650Shselasky u8 reserved_4[0x18]; 6826290650Shselasky 6827290650Shselasky u8 reserved_5[0x20]; 6828290650Shselasky 6829290650Shselasky u8 reserved_6[0x8]; 6830290650Shselasky u8 level[0x8]; 6831290650Shselasky u8 reserved_7[0x8]; 6832290650Shselasky u8 log_size[0x8]; 6833290650Shselasky 6834290650Shselasky u8 reserved_8[0x120]; 6835290650Shselasky}; 6836290650Shselasky 6837290650Shselaskystruct mlx5_ifc_create_flow_group_out_bits { 6838290650Shselasky u8 status[0x8]; 6839290650Shselasky u8 reserved_0[0x18]; 6840290650Shselasky 6841290650Shselasky u8 syndrome[0x20]; 6842290650Shselasky 6843290650Shselasky u8 reserved_1[0x8]; 6844290650Shselasky u8 group_id[0x18]; 6845290650Shselasky 6846290650Shselasky u8 reserved_2[0x20]; 6847290650Shselasky}; 6848290650Shselasky 6849290650Shselaskyenum { 6850290650Shselasky MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0, 6851290650Shselasky MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1, 6852290650Shselasky MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2, 6853290650Shselasky}; 6854290650Shselasky 6855290650Shselaskystruct mlx5_ifc_create_flow_group_in_bits { 6856290650Shselasky u8 opcode[0x10]; 6857290650Shselasky u8 reserved_0[0x10]; 6858290650Shselasky 6859290650Shselasky u8 reserved_1[0x10]; 6860290650Shselasky u8 op_mod[0x10]; 6861290650Shselasky 6862290650Shselasky u8 other_vport[0x1]; 6863290650Shselasky u8 reserved_2[0xf]; 6864290650Shselasky u8 vport_number[0x10]; 6865290650Shselasky 6866290650Shselasky u8 reserved_3[0x20]; 6867290650Shselasky 6868290650Shselasky u8 table_type[0x8]; 6869290650Shselasky u8 reserved_4[0x18]; 6870290650Shselasky 6871290650Shselasky u8 reserved_5[0x8]; 6872290650Shselasky u8 table_id[0x18]; 6873290650Shselasky 6874290650Shselasky u8 reserved_6[0x20]; 6875290650Shselasky 6876290650Shselasky u8 start_flow_index[0x20]; 6877290650Shselasky 6878290650Shselasky u8 reserved_7[0x20]; 6879290650Shselasky 6880290650Shselasky u8 end_flow_index[0x20]; 6881290650Shselasky 6882290650Shselasky u8 reserved_8[0xa0]; 6883290650Shselasky 6884290650Shselasky u8 reserved_9[0x18]; 6885290650Shselasky u8 match_criteria_enable[0x8]; 6886290650Shselasky 6887290650Shselasky struct mlx5_ifc_fte_match_param_bits match_criteria; 6888290650Shselasky 6889290650Shselasky u8 reserved_10[0xe00]; 6890290650Shselasky}; 6891290650Shselasky 6892290650Shselaskystruct mlx5_ifc_create_eq_out_bits { 6893290650Shselasky u8 status[0x8]; 6894290650Shselasky u8 reserved_0[0x18]; 6895290650Shselasky 6896290650Shselasky u8 syndrome[0x20]; 6897290650Shselasky 6898290650Shselasky u8 reserved_1[0x18]; 6899290650Shselasky u8 eq_number[0x8]; 6900290650Shselasky 6901290650Shselasky u8 reserved_2[0x20]; 6902290650Shselasky}; 6903290650Shselasky 6904290650Shselaskystruct mlx5_ifc_create_eq_in_bits { 6905290650Shselasky u8 opcode[0x10]; 6906290650Shselasky u8 reserved_0[0x10]; 6907290650Shselasky 6908290650Shselasky u8 reserved_1[0x10]; 6909290650Shselasky u8 op_mod[0x10]; 6910290650Shselasky 6911290650Shselasky u8 reserved_2[0x40]; 6912290650Shselasky 6913290650Shselasky struct mlx5_ifc_eqc_bits eq_context_entry; 6914290650Shselasky 6915290650Shselasky u8 reserved_3[0x40]; 6916290650Shselasky 6917290650Shselasky u8 event_bitmask[0x40]; 6918290650Shselasky 6919290650Shselasky u8 reserved_4[0x580]; 6920290650Shselasky 6921290650Shselasky u8 pas[0][0x40]; 6922290650Shselasky}; 6923290650Shselasky 6924290650Shselaskystruct mlx5_ifc_create_dct_out_bits { 6925290650Shselasky u8 status[0x8]; 6926290650Shselasky u8 reserved_0[0x18]; 6927290650Shselasky 6928290650Shselasky u8 syndrome[0x20]; 6929290650Shselasky 6930290650Shselasky u8 reserved_1[0x8]; 6931290650Shselasky u8 dctn[0x18]; 6932290650Shselasky 6933290650Shselasky u8 reserved_2[0x20]; 6934290650Shselasky}; 6935290650Shselasky 6936290650Shselaskystruct mlx5_ifc_create_dct_in_bits { 6937290650Shselasky u8 opcode[0x10]; 6938290650Shselasky u8 reserved_0[0x10]; 6939290650Shselasky 6940290650Shselasky u8 reserved_1[0x10]; 6941290650Shselasky u8 op_mod[0x10]; 6942290650Shselasky 6943290650Shselasky u8 reserved_2[0x40]; 6944290650Shselasky 6945290650Shselasky struct mlx5_ifc_dctc_bits dct_context_entry; 6946290650Shselasky 6947290650Shselasky u8 reserved_3[0x180]; 6948290650Shselasky}; 6949290650Shselasky 6950290650Shselaskystruct mlx5_ifc_create_cq_out_bits { 6951290650Shselasky u8 status[0x8]; 6952290650Shselasky u8 reserved_0[0x18]; 6953290650Shselasky 6954290650Shselasky u8 syndrome[0x20]; 6955290650Shselasky 6956290650Shselasky u8 reserved_1[0x8]; 6957290650Shselasky u8 cqn[0x18]; 6958290650Shselasky 6959290650Shselasky u8 reserved_2[0x20]; 6960290650Shselasky}; 6961290650Shselasky 6962290650Shselaskystruct mlx5_ifc_create_cq_in_bits { 6963290650Shselasky u8 opcode[0x10]; 6964290650Shselasky u8 reserved_0[0x10]; 6965290650Shselasky 6966290650Shselasky u8 reserved_1[0x10]; 6967290650Shselasky u8 op_mod[0x10]; 6968290650Shselasky 6969290650Shselasky u8 reserved_2[0x40]; 6970290650Shselasky 6971290650Shselasky struct mlx5_ifc_cqc_bits cq_context; 6972290650Shselasky 6973290650Shselasky u8 reserved_3[0x600]; 6974290650Shselasky 6975290650Shselasky u8 pas[0][0x40]; 6976290650Shselasky}; 6977290650Shselasky 6978290650Shselaskystruct mlx5_ifc_config_int_moderation_out_bits { 6979290650Shselasky u8 status[0x8]; 6980290650Shselasky u8 reserved_0[0x18]; 6981290650Shselasky 6982290650Shselasky u8 syndrome[0x20]; 6983290650Shselasky 6984290650Shselasky u8 reserved_1[0x4]; 6985290650Shselasky u8 min_delay[0xc]; 6986290650Shselasky u8 int_vector[0x10]; 6987290650Shselasky 6988290650Shselasky u8 reserved_2[0x20]; 6989290650Shselasky}; 6990290650Shselasky 6991290650Shselaskyenum { 6992290650Shselasky MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0, 6993290650Shselasky MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1, 6994290650Shselasky}; 6995290650Shselasky 6996290650Shselaskystruct mlx5_ifc_config_int_moderation_in_bits { 6997290650Shselasky u8 opcode[0x10]; 6998290650Shselasky u8 reserved_0[0x10]; 6999290650Shselasky 7000290650Shselasky u8 reserved_1[0x10]; 7001290650Shselasky u8 op_mod[0x10]; 7002290650Shselasky 7003290650Shselasky u8 reserved_2[0x4]; 7004290650Shselasky u8 min_delay[0xc]; 7005290650Shselasky u8 int_vector[0x10]; 7006290650Shselasky 7007290650Shselasky u8 reserved_3[0x20]; 7008290650Shselasky}; 7009290650Shselasky 7010290650Shselaskystruct mlx5_ifc_attach_to_mcg_out_bits { 7011290650Shselasky u8 status[0x8]; 7012290650Shselasky u8 reserved_0[0x18]; 7013290650Shselasky 7014290650Shselasky u8 syndrome[0x20]; 7015290650Shselasky 7016290650Shselasky u8 reserved_1[0x40]; 7017290650Shselasky}; 7018290650Shselasky 7019290650Shselaskystruct mlx5_ifc_attach_to_mcg_in_bits { 7020290650Shselasky u8 opcode[0x10]; 7021290650Shselasky u8 reserved_0[0x10]; 7022290650Shselasky 7023290650Shselasky u8 reserved_1[0x10]; 7024290650Shselasky u8 op_mod[0x10]; 7025290650Shselasky 7026290650Shselasky u8 reserved_2[0x8]; 7027290650Shselasky u8 qpn[0x18]; 7028290650Shselasky 7029290650Shselasky u8 reserved_3[0x20]; 7030290650Shselasky 7031290650Shselasky u8 multicast_gid[16][0x8]; 7032290650Shselasky}; 7033290650Shselasky 7034290650Shselaskystruct mlx5_ifc_arm_xrc_srq_out_bits { 7035290650Shselasky u8 status[0x8]; 7036290650Shselasky u8 reserved_0[0x18]; 7037290650Shselasky 7038290650Shselasky u8 syndrome[0x20]; 7039290650Shselasky 7040290650Shselasky u8 reserved_1[0x40]; 7041290650Shselasky}; 7042290650Shselasky 7043290650Shselaskyenum { 7044290650Shselasky MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1, 7045290650Shselasky}; 7046290650Shselasky 7047290650Shselaskystruct mlx5_ifc_arm_xrc_srq_in_bits { 7048290650Shselasky u8 opcode[0x10]; 7049290650Shselasky u8 reserved_0[0x10]; 7050290650Shselasky 7051290650Shselasky u8 reserved_1[0x10]; 7052290650Shselasky u8 op_mod[0x10]; 7053290650Shselasky 7054290650Shselasky u8 reserved_2[0x8]; 7055290650Shselasky u8 xrc_srqn[0x18]; 7056290650Shselasky 7057290650Shselasky u8 reserved_3[0x10]; 7058290650Shselasky u8 lwm[0x10]; 7059290650Shselasky}; 7060290650Shselasky 7061290650Shselaskystruct mlx5_ifc_arm_rq_out_bits { 7062290650Shselasky u8 status[0x8]; 7063290650Shselasky u8 reserved_0[0x18]; 7064290650Shselasky 7065290650Shselasky u8 syndrome[0x20]; 7066290650Shselasky 7067290650Shselasky u8 reserved_1[0x40]; 7068290650Shselasky}; 7069290650Shselasky 7070290650Shselaskyenum { 7071290650Shselasky MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1, 7072290650Shselasky}; 7073290650Shselasky 7074290650Shselaskystruct mlx5_ifc_arm_rq_in_bits { 7075290650Shselasky u8 opcode[0x10]; 7076290650Shselasky u8 reserved_0[0x10]; 7077290650Shselasky 7078290650Shselasky u8 reserved_1[0x10]; 7079290650Shselasky u8 op_mod[0x10]; 7080290650Shselasky 7081290650Shselasky u8 reserved_2[0x8]; 7082290650Shselasky u8 srq_number[0x18]; 7083290650Shselasky 7084290650Shselasky u8 reserved_3[0x10]; 7085290650Shselasky u8 lwm[0x10]; 7086290650Shselasky}; 7087290650Shselasky 7088290650Shselaskystruct mlx5_ifc_arm_dct_out_bits { 7089290650Shselasky u8 status[0x8]; 7090290650Shselasky u8 reserved_0[0x18]; 7091290650Shselasky 7092290650Shselasky u8 syndrome[0x20]; 7093290650Shselasky 7094290650Shselasky u8 reserved_1[0x40]; 7095290650Shselasky}; 7096290650Shselasky 7097290650Shselaskystruct mlx5_ifc_arm_dct_in_bits { 7098290650Shselasky u8 opcode[0x10]; 7099290650Shselasky u8 reserved_0[0x10]; 7100290650Shselasky 7101290650Shselasky u8 reserved_1[0x10]; 7102290650Shselasky u8 op_mod[0x10]; 7103290650Shselasky 7104290650Shselasky u8 reserved_2[0x8]; 7105290650Shselasky u8 dctn[0x18]; 7106290650Shselasky 7107290650Shselasky u8 reserved_3[0x20]; 7108290650Shselasky}; 7109290650Shselasky 7110290650Shselaskystruct mlx5_ifc_alloc_xrcd_out_bits { 7111290650Shselasky u8 status[0x8]; 7112290650Shselasky u8 reserved_0[0x18]; 7113290650Shselasky 7114290650Shselasky u8 syndrome[0x20]; 7115290650Shselasky 7116290650Shselasky u8 reserved_1[0x8]; 7117290650Shselasky u8 xrcd[0x18]; 7118290650Shselasky 7119290650Shselasky u8 reserved_2[0x20]; 7120290650Shselasky}; 7121290650Shselasky 7122290650Shselaskystruct mlx5_ifc_alloc_xrcd_in_bits { 7123290650Shselasky u8 opcode[0x10]; 7124290650Shselasky u8 reserved_0[0x10]; 7125290650Shselasky 7126290650Shselasky u8 reserved_1[0x10]; 7127290650Shselasky u8 op_mod[0x10]; 7128290650Shselasky 7129290650Shselasky u8 reserved_2[0x40]; 7130290650Shselasky}; 7131290650Shselasky 7132290650Shselaskystruct mlx5_ifc_alloc_uar_out_bits { 7133290650Shselasky u8 status[0x8]; 7134290650Shselasky u8 reserved_0[0x18]; 7135290650Shselasky 7136290650Shselasky u8 syndrome[0x20]; 7137290650Shselasky 7138290650Shselasky u8 reserved_1[0x8]; 7139290650Shselasky u8 uar[0x18]; 7140290650Shselasky 7141290650Shselasky u8 reserved_2[0x20]; 7142290650Shselasky}; 7143290650Shselasky 7144290650Shselaskystruct mlx5_ifc_alloc_uar_in_bits { 7145290650Shselasky u8 opcode[0x10]; 7146290650Shselasky u8 reserved_0[0x10]; 7147290650Shselasky 7148290650Shselasky u8 reserved_1[0x10]; 7149290650Shselasky u8 op_mod[0x10]; 7150290650Shselasky 7151290650Shselasky u8 reserved_2[0x40]; 7152290650Shselasky}; 7153290650Shselasky 7154290650Shselaskystruct mlx5_ifc_alloc_transport_domain_out_bits { 7155290650Shselasky u8 status[0x8]; 7156290650Shselasky u8 reserved_0[0x18]; 7157290650Shselasky 7158290650Shselasky u8 syndrome[0x20]; 7159290650Shselasky 7160290650Shselasky u8 reserved_1[0x8]; 7161290650Shselasky u8 transport_domain[0x18]; 7162290650Shselasky 7163290650Shselasky u8 reserved_2[0x20]; 7164290650Shselasky}; 7165290650Shselasky 7166290650Shselaskystruct mlx5_ifc_alloc_transport_domain_in_bits { 7167290650Shselasky u8 opcode[0x10]; 7168290650Shselasky u8 reserved_0[0x10]; 7169290650Shselasky 7170290650Shselasky u8 reserved_1[0x10]; 7171290650Shselasky u8 op_mod[0x10]; 7172290650Shselasky 7173290650Shselasky u8 reserved_2[0x40]; 7174290650Shselasky}; 7175290650Shselasky 7176290650Shselaskystruct mlx5_ifc_alloc_q_counter_out_bits { 7177290650Shselasky u8 status[0x8]; 7178290650Shselasky u8 reserved_0[0x18]; 7179290650Shselasky 7180290650Shselasky u8 syndrome[0x20]; 7181290650Shselasky 7182290650Shselasky u8 reserved_1[0x18]; 7183290650Shselasky u8 counter_set_id[0x8]; 7184290650Shselasky 7185290650Shselasky u8 reserved_2[0x20]; 7186290650Shselasky}; 7187290650Shselasky 7188290650Shselaskystruct mlx5_ifc_alloc_q_counter_in_bits { 7189290650Shselasky u8 opcode[0x10]; 7190290650Shselasky u8 reserved_0[0x10]; 7191290650Shselasky 7192290650Shselasky u8 reserved_1[0x10]; 7193290650Shselasky u8 op_mod[0x10]; 7194290650Shselasky 7195290650Shselasky u8 reserved_2[0x40]; 7196290650Shselasky}; 7197290650Shselasky 7198290650Shselaskystruct mlx5_ifc_alloc_pd_out_bits { 7199290650Shselasky u8 status[0x8]; 7200290650Shselasky u8 reserved_0[0x18]; 7201290650Shselasky 7202290650Shselasky u8 syndrome[0x20]; 7203290650Shselasky 7204290650Shselasky u8 reserved_1[0x8]; 7205290650Shselasky u8 pd[0x18]; 7206290650Shselasky 7207290650Shselasky u8 reserved_2[0x20]; 7208290650Shselasky}; 7209290650Shselasky 7210290650Shselaskystruct mlx5_ifc_alloc_pd_in_bits { 7211290650Shselasky u8 opcode[0x10]; 7212290650Shselasky u8 reserved_0[0x10]; 7213290650Shselasky 7214290650Shselasky u8 reserved_1[0x10]; 7215290650Shselasky u8 op_mod[0x10]; 7216290650Shselasky 7217290650Shselasky u8 reserved_2[0x40]; 7218290650Shselasky}; 7219290650Shselasky 7220290650Shselaskystruct mlx5_ifc_alloc_flow_counter_out_bits { 7221290650Shselasky u8 status[0x8]; 7222290650Shselasky u8 reserved_0[0x18]; 7223290650Shselasky 7224290650Shselasky u8 syndrome[0x20]; 7225290650Shselasky 7226290650Shselasky u8 reserved_1[0x10]; 7227290650Shselasky u8 flow_counter_id[0x10]; 7228290650Shselasky 7229290650Shselasky u8 reserved_2[0x20]; 7230290650Shselasky}; 7231290650Shselasky 7232290650Shselaskystruct mlx5_ifc_alloc_flow_counter_in_bits { 7233290650Shselasky u8 opcode[0x10]; 7234290650Shselasky u8 reserved_0[0x10]; 7235290650Shselasky 7236290650Shselasky u8 reserved_1[0x10]; 7237290650Shselasky u8 op_mod[0x10]; 7238290650Shselasky 7239290650Shselasky u8 reserved_2[0x40]; 7240290650Shselasky}; 7241290650Shselasky 7242290650Shselaskystruct mlx5_ifc_add_vxlan_udp_dport_out_bits { 7243290650Shselasky u8 status[0x8]; 7244290650Shselasky u8 reserved_0[0x18]; 7245290650Shselasky 7246290650Shselasky u8 syndrome[0x20]; 7247290650Shselasky 7248290650Shselasky u8 reserved_1[0x40]; 7249290650Shselasky}; 7250290650Shselasky 7251290650Shselaskystruct mlx5_ifc_add_vxlan_udp_dport_in_bits { 7252290650Shselasky u8 opcode[0x10]; 7253290650Shselasky u8 reserved_0[0x10]; 7254290650Shselasky 7255290650Shselasky u8 reserved_1[0x10]; 7256290650Shselasky u8 op_mod[0x10]; 7257290650Shselasky 7258290650Shselasky u8 reserved_2[0x20]; 7259290650Shselasky 7260290650Shselasky u8 reserved_3[0x10]; 7261290650Shselasky u8 vxlan_udp_port[0x10]; 7262290650Shselasky}; 7263290650Shselasky 7264290650Shselaskystruct mlx5_ifc_activate_tracer_out_bits { 7265290650Shselasky u8 status[0x8]; 7266290650Shselasky u8 reserved_0[0x18]; 7267290650Shselasky 7268290650Shselasky u8 syndrome[0x20]; 7269290650Shselasky 7270290650Shselasky u8 reserved_1[0x40]; 7271290650Shselasky}; 7272290650Shselasky 7273290650Shselaskystruct mlx5_ifc_activate_tracer_in_bits { 7274290650Shselasky u8 opcode[0x10]; 7275290650Shselasky u8 reserved_0[0x10]; 7276290650Shselasky 7277290650Shselasky u8 reserved_1[0x10]; 7278290650Shselasky u8 op_mod[0x10]; 7279290650Shselasky 7280290650Shselasky u8 mkey[0x20]; 7281290650Shselasky 7282290650Shselasky u8 reserved_2[0x20]; 7283290650Shselasky}; 7284290650Shselasky 7285306233Shselaskystruct mlx5_ifc_set_rate_limit_out_bits { 7286306233Shselasky u8 status[0x8]; 7287306233Shselasky u8 reserved_at_8[0x18]; 7288306233Shselasky 7289306233Shselasky u8 syndrome[0x20]; 7290306233Shselasky 7291306233Shselasky u8 reserved_at_40[0x40]; 7292306233Shselasky}; 7293306233Shselasky 7294306233Shselaskystruct mlx5_ifc_set_rate_limit_in_bits { 7295306233Shselasky u8 opcode[0x10]; 7296306233Shselasky u8 reserved_at_10[0x10]; 7297306233Shselasky 7298306233Shselasky u8 reserved_at_20[0x10]; 7299306233Shselasky u8 op_mod[0x10]; 7300306233Shselasky 7301306233Shselasky u8 reserved_at_40[0x10]; 7302306233Shselasky u8 rate_limit_index[0x10]; 7303306233Shselasky 7304306233Shselasky u8 reserved_at_60[0x20]; 7305306233Shselasky 7306306233Shselasky u8 rate_limit[0x20]; 7307308678Shselasky u8 burst_upper_bound[0x20]; 7308306233Shselasky}; 7309306233Shselasky 7310290650Shselaskystruct mlx5_ifc_access_register_out_bits { 7311290650Shselasky u8 status[0x8]; 7312290650Shselasky u8 reserved_0[0x18]; 7313290650Shselasky 7314290650Shselasky u8 syndrome[0x20]; 7315290650Shselasky 7316290650Shselasky u8 reserved_1[0x40]; 7317290650Shselasky 7318290650Shselasky u8 register_data[0][0x20]; 7319290650Shselasky}; 7320290650Shselasky 7321290650Shselaskyenum { 7322290650Shselasky MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0, 7323290650Shselasky MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1, 7324290650Shselasky}; 7325290650Shselasky 7326290650Shselaskystruct mlx5_ifc_access_register_in_bits { 7327290650Shselasky u8 opcode[0x10]; 7328290650Shselasky u8 reserved_0[0x10]; 7329290650Shselasky 7330290650Shselasky u8 reserved_1[0x10]; 7331290650Shselasky u8 op_mod[0x10]; 7332290650Shselasky 7333290650Shselasky u8 reserved_2[0x10]; 7334290650Shselasky u8 register_id[0x10]; 7335290650Shselasky 7336290650Shselasky u8 argument[0x20]; 7337290650Shselasky 7338290650Shselasky u8 register_data[0][0x20]; 7339290650Shselasky}; 7340290650Shselasky 7341290650Shselaskystruct mlx5_ifc_sltp_reg_bits { 7342290650Shselasky u8 status[0x4]; 7343290650Shselasky u8 version[0x4]; 7344290650Shselasky u8 local_port[0x8]; 7345290650Shselasky u8 pnat[0x2]; 7346290650Shselasky u8 reserved_0[0x2]; 7347290650Shselasky u8 lane[0x4]; 7348290650Shselasky u8 reserved_1[0x8]; 7349290650Shselasky 7350290650Shselasky u8 reserved_2[0x20]; 7351290650Shselasky 7352290650Shselasky u8 reserved_3[0x7]; 7353290650Shselasky u8 polarity[0x1]; 7354290650Shselasky u8 ob_tap0[0x8]; 7355290650Shselasky u8 ob_tap1[0x8]; 7356290650Shselasky u8 ob_tap2[0x8]; 7357290650Shselasky 7358290650Shselasky u8 reserved_4[0xc]; 7359290650Shselasky u8 ob_preemp_mode[0x4]; 7360290650Shselasky u8 ob_reg[0x8]; 7361290650Shselasky u8 ob_bias[0x8]; 7362290650Shselasky 7363290650Shselasky u8 reserved_5[0x20]; 7364290650Shselasky}; 7365290650Shselasky 7366290650Shselaskystruct mlx5_ifc_slrp_reg_bits { 7367290650Shselasky u8 status[0x4]; 7368290650Shselasky u8 version[0x4]; 7369290650Shselasky u8 local_port[0x8]; 7370290650Shselasky u8 pnat[0x2]; 7371290650Shselasky u8 reserved_0[0x2]; 7372290650Shselasky u8 lane[0x4]; 7373290650Shselasky u8 reserved_1[0x8]; 7374290650Shselasky 7375290650Shselasky u8 ib_sel[0x2]; 7376290650Shselasky u8 reserved_2[0x11]; 7377290650Shselasky u8 dp_sel[0x1]; 7378290650Shselasky u8 dp90sel[0x4]; 7379290650Shselasky u8 mix90phase[0x8]; 7380290650Shselasky 7381290650Shselasky u8 ffe_tap0[0x8]; 7382290650Shselasky u8 ffe_tap1[0x8]; 7383290650Shselasky u8 ffe_tap2[0x8]; 7384290650Shselasky u8 ffe_tap3[0x8]; 7385290650Shselasky 7386290650Shselasky u8 ffe_tap4[0x8]; 7387290650Shselasky u8 ffe_tap5[0x8]; 7388290650Shselasky u8 ffe_tap6[0x8]; 7389290650Shselasky u8 ffe_tap7[0x8]; 7390290650Shselasky 7391290650Shselasky u8 ffe_tap8[0x8]; 7392290650Shselasky u8 mixerbias_tap_amp[0x8]; 7393290650Shselasky u8 reserved_3[0x7]; 7394290650Shselasky u8 ffe_tap_en[0x9]; 7395290650Shselasky 7396290650Shselasky u8 ffe_tap_offset0[0x8]; 7397290650Shselasky u8 ffe_tap_offset1[0x8]; 7398290650Shselasky u8 slicer_offset0[0x10]; 7399290650Shselasky 7400290650Shselasky u8 mixer_offset0[0x10]; 7401290650Shselasky u8 mixer_offset1[0x10]; 7402290650Shselasky 7403290650Shselasky u8 mixerbgn_inp[0x8]; 7404290650Shselasky u8 mixerbgn_inn[0x8]; 7405290650Shselasky u8 mixerbgn_refp[0x8]; 7406290650Shselasky u8 mixerbgn_refn[0x8]; 7407290650Shselasky 7408290650Shselasky u8 sel_slicer_lctrl_h[0x1]; 7409290650Shselasky u8 sel_slicer_lctrl_l[0x1]; 7410290650Shselasky u8 reserved_4[0x1]; 7411290650Shselasky u8 ref_mixer_vreg[0x5]; 7412290650Shselasky u8 slicer_gctrl[0x8]; 7413290650Shselasky u8 lctrl_input[0x8]; 7414290650Shselasky u8 mixer_offset_cm1[0x8]; 7415290650Shselasky 7416290650Shselasky u8 common_mode[0x6]; 7417290650Shselasky u8 reserved_5[0x1]; 7418290650Shselasky u8 mixer_offset_cm0[0x9]; 7419290650Shselasky u8 reserved_6[0x7]; 7420290650Shselasky u8 slicer_offset_cm[0x9]; 7421290650Shselasky}; 7422290650Shselasky 7423290650Shselaskystruct mlx5_ifc_slrg_reg_bits { 7424290650Shselasky u8 status[0x4]; 7425290650Shselasky u8 version[0x4]; 7426290650Shselasky u8 local_port[0x8]; 7427290650Shselasky u8 pnat[0x2]; 7428290650Shselasky u8 reserved_0[0x2]; 7429290650Shselasky u8 lane[0x4]; 7430290650Shselasky u8 reserved_1[0x8]; 7431290650Shselasky 7432290650Shselasky u8 time_to_link_up[0x10]; 7433290650Shselasky u8 reserved_2[0xc]; 7434290650Shselasky u8 grade_lane_speed[0x4]; 7435290650Shselasky 7436290650Shselasky u8 grade_version[0x8]; 7437290650Shselasky u8 grade[0x18]; 7438290650Shselasky 7439290650Shselasky u8 reserved_3[0x4]; 7440290650Shselasky u8 height_grade_type[0x4]; 7441290650Shselasky u8 height_grade[0x18]; 7442290650Shselasky 7443290650Shselasky u8 height_dz[0x10]; 7444290650Shselasky u8 height_dv[0x10]; 7445290650Shselasky 7446290650Shselasky u8 reserved_4[0x10]; 7447290650Shselasky u8 height_sigma[0x10]; 7448290650Shselasky 7449290650Shselasky u8 reserved_5[0x20]; 7450290650Shselasky 7451290650Shselasky u8 reserved_6[0x4]; 7452290650Shselasky u8 phase_grade_type[0x4]; 7453290650Shselasky u8 phase_grade[0x18]; 7454290650Shselasky 7455290650Shselasky u8 reserved_7[0x8]; 7456290650Shselasky u8 phase_eo_pos[0x8]; 7457290650Shselasky u8 reserved_8[0x8]; 7458290650Shselasky u8 phase_eo_neg[0x8]; 7459290650Shselasky 7460290650Shselasky u8 ffe_set_tested[0x10]; 7461290650Shselasky u8 test_errors_per_lane[0x10]; 7462290650Shselasky}; 7463290650Shselasky 7464290650Shselaskystruct mlx5_ifc_pvlc_reg_bits { 7465290650Shselasky u8 reserved_0[0x8]; 7466290650Shselasky u8 local_port[0x8]; 7467290650Shselasky u8 reserved_1[0x10]; 7468290650Shselasky 7469290650Shselasky u8 reserved_2[0x1c]; 7470290650Shselasky u8 vl_hw_cap[0x4]; 7471290650Shselasky 7472290650Shselasky u8 reserved_3[0x1c]; 7473290650Shselasky u8 vl_admin[0x4]; 7474290650Shselasky 7475290650Shselasky u8 reserved_4[0x1c]; 7476290650Shselasky u8 vl_operational[0x4]; 7477290650Shselasky}; 7478290650Shselasky 7479290650Shselaskystruct mlx5_ifc_pude_reg_bits { 7480290650Shselasky u8 swid[0x8]; 7481290650Shselasky u8 local_port[0x8]; 7482290650Shselasky u8 reserved_0[0x4]; 7483290650Shselasky u8 admin_status[0x4]; 7484290650Shselasky u8 reserved_1[0x4]; 7485290650Shselasky u8 oper_status[0x4]; 7486290650Shselasky 7487290650Shselasky u8 reserved_2[0x60]; 7488290650Shselasky}; 7489290650Shselasky 7490290650Shselaskyenum { 7491290650Shselasky MLX5_PTYS_REG_PROTO_MASK_INFINIBAND = 0x1, 7492290650Shselasky MLX5_PTYS_REG_PROTO_MASK_ETHERNET = 0x4, 7493290650Shselasky}; 7494290650Shselasky 7495290650Shselaskystruct mlx5_ifc_ptys_reg_bits { 7496306233Shselasky u8 reserved_0[0x1]; 7497306233Shselasky u8 an_disable_admin[0x1]; 7498306233Shselasky u8 an_disable_cap[0x1]; 7499306233Shselasky u8 reserved_1[0x4]; 7500306233Shselasky u8 force_tx_aba_param[0x1]; 7501290650Shselasky u8 local_port[0x8]; 7502306233Shselasky u8 reserved_2[0xd]; 7503290650Shselasky u8 proto_mask[0x3]; 7504290650Shselasky 7505306233Shselasky u8 an_status[0x4]; 7506306233Shselasky u8 reserved_3[0xc]; 7507306233Shselasky u8 data_rate_oper[0x10]; 7508290650Shselasky 7509306233Shselasky u8 fc_proto_capability[0x20]; 7510306233Shselasky 7511290650Shselasky u8 eth_proto_capability[0x20]; 7512290650Shselasky 7513290650Shselasky u8 ib_link_width_capability[0x10]; 7514290650Shselasky u8 ib_proto_capability[0x10]; 7515290650Shselasky 7516306233Shselasky u8 fc_proto_admin[0x20]; 7517290650Shselasky 7518290650Shselasky u8 eth_proto_admin[0x20]; 7519290650Shselasky 7520290650Shselasky u8 ib_link_width_admin[0x10]; 7521290650Shselasky u8 ib_proto_admin[0x10]; 7522290650Shselasky 7523306233Shselasky u8 fc_proto_oper[0x20]; 7524290650Shselasky 7525290650Shselasky u8 eth_proto_oper[0x20]; 7526290650Shselasky 7527290650Shselasky u8 ib_link_width_oper[0x10]; 7528290650Shselasky u8 ib_proto_oper[0x10]; 7529290650Shselasky 7530306233Shselasky u8 reserved_4[0x20]; 7531290650Shselasky 7532290650Shselasky u8 eth_proto_lp_advertise[0x20]; 7533290650Shselasky 7534306233Shselasky u8 reserved_5[0x60]; 7535290650Shselasky}; 7536290650Shselasky 7537290650Shselaskystruct mlx5_ifc_ptas_reg_bits { 7538290650Shselasky u8 reserved_0[0x20]; 7539290650Shselasky 7540290650Shselasky u8 algorithm_options[0x10]; 7541290650Shselasky u8 reserved_1[0x4]; 7542290650Shselasky u8 repetitions_mode[0x4]; 7543290650Shselasky u8 num_of_repetitions[0x8]; 7544290650Shselasky 7545290650Shselasky u8 grade_version[0x8]; 7546290650Shselasky u8 height_grade_type[0x4]; 7547290650Shselasky u8 phase_grade_type[0x4]; 7548290650Shselasky u8 height_grade_weight[0x8]; 7549290650Shselasky u8 phase_grade_weight[0x8]; 7550290650Shselasky 7551290650Shselasky u8 gisim_measure_bits[0x10]; 7552290650Shselasky u8 adaptive_tap_measure_bits[0x10]; 7553290650Shselasky 7554290650Shselasky u8 ber_bath_high_error_threshold[0x10]; 7555290650Shselasky u8 ber_bath_mid_error_threshold[0x10]; 7556290650Shselasky 7557290650Shselasky u8 ber_bath_low_error_threshold[0x10]; 7558290650Shselasky u8 one_ratio_high_threshold[0x10]; 7559290650Shselasky 7560290650Shselasky u8 one_ratio_high_mid_threshold[0x10]; 7561290650Shselasky u8 one_ratio_low_mid_threshold[0x10]; 7562290650Shselasky 7563290650Shselasky u8 one_ratio_low_threshold[0x10]; 7564290650Shselasky u8 ndeo_error_threshold[0x10]; 7565290650Shselasky 7566290650Shselasky u8 mixer_offset_step_size[0x10]; 7567290650Shselasky u8 reserved_2[0x8]; 7568290650Shselasky u8 mix90_phase_for_voltage_bath[0x8]; 7569290650Shselasky 7570290650Shselasky u8 mixer_offset_start[0x10]; 7571290650Shselasky u8 mixer_offset_end[0x10]; 7572290650Shselasky 7573290650Shselasky u8 reserved_3[0x15]; 7574290650Shselasky u8 ber_test_time[0xb]; 7575290650Shselasky}; 7576290650Shselasky 7577290650Shselaskystruct mlx5_ifc_pspa_reg_bits { 7578290650Shselasky u8 swid[0x8]; 7579290650Shselasky u8 local_port[0x8]; 7580290650Shselasky u8 sub_port[0x8]; 7581290650Shselasky u8 reserved_0[0x8]; 7582290650Shselasky 7583290650Shselasky u8 reserved_1[0x20]; 7584290650Shselasky}; 7585290650Shselasky 7586290650Shselaskystruct mlx5_ifc_ppsc_reg_bits { 7587290650Shselasky u8 reserved_0[0x8]; 7588290650Shselasky u8 local_port[0x8]; 7589290650Shselasky u8 reserved_1[0x10]; 7590290650Shselasky 7591290650Shselasky u8 reserved_2[0x60]; 7592290650Shselasky 7593290650Shselasky u8 reserved_3[0x1c]; 7594290650Shselasky u8 wrps_admin[0x4]; 7595290650Shselasky 7596290650Shselasky u8 reserved_4[0x1c]; 7597290650Shselasky u8 wrps_status[0x4]; 7598290650Shselasky 7599290650Shselasky u8 up_th_vld[0x1]; 7600290650Shselasky u8 down_th_vld[0x1]; 7601290650Shselasky u8 reserved_5[0x6]; 7602290650Shselasky u8 up_threshold[0x8]; 7603290650Shselasky u8 reserved_6[0x8]; 7604290650Shselasky u8 down_threshold[0x8]; 7605290650Shselasky 7606290650Shselasky u8 reserved_7[0x20]; 7607290650Shselasky 7608290650Shselasky u8 reserved_8[0x1c]; 7609290650Shselasky u8 srps_admin[0x4]; 7610290650Shselasky 7611290650Shselasky u8 reserved_9[0x60]; 7612290650Shselasky}; 7613290650Shselasky 7614290650Shselaskystruct mlx5_ifc_pplr_reg_bits { 7615290650Shselasky u8 reserved_0[0x8]; 7616290650Shselasky u8 local_port[0x8]; 7617290650Shselasky u8 reserved_1[0x10]; 7618290650Shselasky 7619290650Shselasky u8 reserved_2[0x8]; 7620290650Shselasky u8 lb_cap[0x8]; 7621290650Shselasky u8 reserved_3[0x8]; 7622290650Shselasky u8 lb_en[0x8]; 7623290650Shselasky}; 7624290650Shselasky 7625290650Shselaskystruct mlx5_ifc_pplm_reg_bits { 7626290650Shselasky u8 reserved_0[0x8]; 7627290650Shselasky u8 local_port[0x8]; 7628290650Shselasky u8 reserved_1[0x10]; 7629290650Shselasky 7630290650Shselasky u8 reserved_2[0x20]; 7631290650Shselasky 7632290650Shselasky u8 port_profile_mode[0x8]; 7633290650Shselasky u8 static_port_profile[0x8]; 7634290650Shselasky u8 active_port_profile[0x8]; 7635290650Shselasky u8 reserved_3[0x8]; 7636290650Shselasky 7637290650Shselasky u8 retransmission_active[0x8]; 7638290650Shselasky u8 fec_mode_active[0x18]; 7639290650Shselasky 7640290650Shselasky u8 reserved_4[0x10]; 7641290650Shselasky u8 v_100g_fec_override_cap[0x4]; 7642290650Shselasky u8 v_50g_fec_override_cap[0x4]; 7643290650Shselasky u8 v_25g_fec_override_cap[0x4]; 7644290650Shselasky u8 v_10g_40g_fec_override_cap[0x4]; 7645290650Shselasky 7646290650Shselasky u8 reserved_5[0x10]; 7647290650Shselasky u8 v_100g_fec_override_admin[0x4]; 7648290650Shselasky u8 v_50g_fec_override_admin[0x4]; 7649290650Shselasky u8 v_25g_fec_override_admin[0x4]; 7650290650Shselasky u8 v_10g_40g_fec_override_admin[0x4]; 7651290650Shselasky}; 7652290650Shselasky 7653290650Shselaskystruct mlx5_ifc_ppll_reg_bits { 7654290650Shselasky u8 num_pll_groups[0x8]; 7655290650Shselasky u8 pll_group[0x8]; 7656290650Shselasky u8 reserved_0[0x4]; 7657290650Shselasky u8 num_plls[0x4]; 7658290650Shselasky u8 reserved_1[0x8]; 7659290650Shselasky 7660290650Shselasky u8 reserved_2[0x1f]; 7661290650Shselasky u8 ae[0x1]; 7662290650Shselasky 7663290650Shselasky u8 pll_status[4][0x40]; 7664290650Shselasky}; 7665290650Shselasky 7666290650Shselaskystruct mlx5_ifc_ppad_reg_bits { 7667290650Shselasky u8 reserved_0[0x3]; 7668290650Shselasky u8 single_mac[0x1]; 7669290650Shselasky u8 reserved_1[0x4]; 7670290650Shselasky u8 local_port[0x8]; 7671290650Shselasky u8 mac_47_32[0x10]; 7672290650Shselasky 7673290650Shselasky u8 mac_31_0[0x20]; 7674290650Shselasky 7675290650Shselasky u8 reserved_2[0x40]; 7676290650Shselasky}; 7677290650Shselasky 7678290650Shselaskystruct mlx5_ifc_pmtu_reg_bits { 7679290650Shselasky u8 reserved_0[0x8]; 7680290650Shselasky u8 local_port[0x8]; 7681290650Shselasky u8 reserved_1[0x10]; 7682290650Shselasky 7683290650Shselasky u8 max_mtu[0x10]; 7684290650Shselasky u8 reserved_2[0x10]; 7685290650Shselasky 7686290650Shselasky u8 admin_mtu[0x10]; 7687290650Shselasky u8 reserved_3[0x10]; 7688290650Shselasky 7689290650Shselasky u8 oper_mtu[0x10]; 7690290650Shselasky u8 reserved_4[0x10]; 7691290650Shselasky}; 7692290650Shselasky 7693290650Shselaskystruct mlx5_ifc_pmpr_reg_bits { 7694290650Shselasky u8 reserved_0[0x8]; 7695290650Shselasky u8 module[0x8]; 7696290650Shselasky u8 reserved_1[0x10]; 7697290650Shselasky 7698290650Shselasky u8 reserved_2[0x18]; 7699290650Shselasky u8 attenuation_5g[0x8]; 7700290650Shselasky 7701290650Shselasky u8 reserved_3[0x18]; 7702290650Shselasky u8 attenuation_7g[0x8]; 7703290650Shselasky 7704290650Shselasky u8 reserved_4[0x18]; 7705290650Shselasky u8 attenuation_12g[0x8]; 7706290650Shselasky}; 7707290650Shselasky 7708290650Shselaskystruct mlx5_ifc_pmpe_reg_bits { 7709290650Shselasky u8 reserved_0[0x8]; 7710290650Shselasky u8 module[0x8]; 7711290650Shselasky u8 reserved_1[0xc]; 7712290650Shselasky u8 module_status[0x4]; 7713290650Shselasky 7714290650Shselasky u8 reserved_2[0x14]; 7715290650Shselasky u8 error_type[0x4]; 7716290650Shselasky u8 reserved_3[0x8]; 7717290650Shselasky 7718290650Shselasky u8 reserved_4[0x40]; 7719290650Shselasky}; 7720290650Shselasky 7721290650Shselaskystruct mlx5_ifc_pmpc_reg_bits { 7722290650Shselasky u8 module_state_updated[32][0x8]; 7723290650Shselasky}; 7724290650Shselasky 7725290650Shselaskystruct mlx5_ifc_pmlpn_reg_bits { 7726290650Shselasky u8 reserved_0[0x4]; 7727290650Shselasky u8 mlpn_status[0x4]; 7728290650Shselasky u8 local_port[0x8]; 7729290650Shselasky u8 reserved_1[0x10]; 7730290650Shselasky 7731290650Shselasky u8 e[0x1]; 7732290650Shselasky u8 reserved_2[0x1f]; 7733290650Shselasky}; 7734290650Shselasky 7735290650Shselaskystruct mlx5_ifc_pmlp_reg_bits { 7736290650Shselasky u8 rxtx[0x1]; 7737290650Shselasky u8 reserved_0[0x7]; 7738290650Shselasky u8 local_port[0x8]; 7739290650Shselasky u8 reserved_1[0x8]; 7740290650Shselasky u8 width[0x8]; 7741290650Shselasky 7742290650Shselasky u8 lane0_module_mapping[0x20]; 7743290650Shselasky 7744290650Shselasky u8 lane1_module_mapping[0x20]; 7745290650Shselasky 7746290650Shselasky u8 lane2_module_mapping[0x20]; 7747290650Shselasky 7748290650Shselasky u8 lane3_module_mapping[0x20]; 7749290650Shselasky 7750290650Shselasky u8 reserved_2[0x160]; 7751290650Shselasky}; 7752290650Shselasky 7753290650Shselaskystruct mlx5_ifc_pmaos_reg_bits { 7754290650Shselasky u8 reserved_0[0x8]; 7755290650Shselasky u8 module[0x8]; 7756290650Shselasky u8 reserved_1[0x4]; 7757290650Shselasky u8 admin_status[0x4]; 7758290650Shselasky u8 reserved_2[0x4]; 7759290650Shselasky u8 oper_status[0x4]; 7760290650Shselasky 7761290650Shselasky u8 ase[0x1]; 7762290650Shselasky u8 ee[0x1]; 7763290650Shselasky u8 reserved_3[0x12]; 7764290650Shselasky u8 error_type[0x4]; 7765290650Shselasky u8 reserved_4[0x6]; 7766290650Shselasky u8 e[0x2]; 7767290650Shselasky 7768290650Shselasky u8 reserved_5[0x40]; 7769290650Shselasky}; 7770290650Shselasky 7771290650Shselaskystruct mlx5_ifc_plpc_reg_bits { 7772290650Shselasky u8 reserved_0[0x4]; 7773290650Shselasky u8 profile_id[0xc]; 7774290650Shselasky u8 reserved_1[0x4]; 7775290650Shselasky u8 proto_mask[0x4]; 7776290650Shselasky u8 reserved_2[0x8]; 7777290650Shselasky 7778290650Shselasky u8 reserved_3[0x10]; 7779290650Shselasky u8 lane_speed[0x10]; 7780290650Shselasky 7781290650Shselasky u8 reserved_4[0x17]; 7782290650Shselasky u8 lpbf[0x1]; 7783290650Shselasky u8 fec_mode_policy[0x8]; 7784290650Shselasky 7785290650Shselasky u8 retransmission_capability[0x8]; 7786290650Shselasky u8 fec_mode_capability[0x18]; 7787290650Shselasky 7788290650Shselasky u8 retransmission_support_admin[0x8]; 7789290650Shselasky u8 fec_mode_support_admin[0x18]; 7790290650Shselasky 7791290650Shselasky u8 retransmission_request_admin[0x8]; 7792290650Shselasky u8 fec_mode_request_admin[0x18]; 7793290650Shselasky 7794290650Shselasky u8 reserved_5[0x80]; 7795290650Shselasky}; 7796290650Shselasky 7797290650Shselaskystruct mlx5_ifc_pll_status_data_bits { 7798290650Shselasky u8 reserved_0[0x1]; 7799290650Shselasky u8 lock_cal[0x1]; 7800290650Shselasky u8 lock_status[0x2]; 7801290650Shselasky u8 reserved_1[0x2]; 7802290650Shselasky u8 algo_f_ctrl[0xa]; 7803290650Shselasky u8 analog_algo_num_var[0x6]; 7804290650Shselasky u8 f_ctrl_measure[0xa]; 7805290650Shselasky 7806290650Shselasky u8 reserved_2[0x2]; 7807290650Shselasky u8 analog_var[0x6]; 7808290650Shselasky u8 reserved_3[0x2]; 7809290650Shselasky u8 high_var[0x6]; 7810290650Shselasky u8 reserved_4[0x2]; 7811290650Shselasky u8 low_var[0x6]; 7812290650Shselasky u8 reserved_5[0x2]; 7813290650Shselasky u8 mid_val[0x6]; 7814290650Shselasky}; 7815290650Shselasky 7816290650Shselaskystruct mlx5_ifc_plib_reg_bits { 7817290650Shselasky u8 reserved_0[0x8]; 7818290650Shselasky u8 local_port[0x8]; 7819290650Shselasky u8 reserved_1[0x8]; 7820290650Shselasky u8 ib_port[0x8]; 7821290650Shselasky 7822290650Shselasky u8 reserved_2[0x60]; 7823290650Shselasky}; 7824290650Shselasky 7825290650Shselaskystruct mlx5_ifc_plbf_reg_bits { 7826290650Shselasky u8 reserved_0[0x8]; 7827290650Shselasky u8 local_port[0x8]; 7828290650Shselasky u8 reserved_1[0xd]; 7829290650Shselasky u8 lbf_mode[0x3]; 7830290650Shselasky 7831290650Shselasky u8 reserved_2[0x20]; 7832290650Shselasky}; 7833290650Shselasky 7834290650Shselaskystruct mlx5_ifc_pipg_reg_bits { 7835290650Shselasky u8 reserved_0[0x8]; 7836290650Shselasky u8 local_port[0x8]; 7837290650Shselasky u8 reserved_1[0x10]; 7838290650Shselasky 7839290650Shselasky u8 dic[0x1]; 7840290650Shselasky u8 reserved_2[0x19]; 7841290650Shselasky u8 ipg[0x4]; 7842290650Shselasky u8 reserved_3[0x2]; 7843290650Shselasky}; 7844290650Shselasky 7845290650Shselaskystruct mlx5_ifc_pifr_reg_bits { 7846290650Shselasky u8 reserved_0[0x8]; 7847290650Shselasky u8 local_port[0x8]; 7848290650Shselasky u8 reserved_1[0x10]; 7849290650Shselasky 7850290650Shselasky u8 reserved_2[0xe0]; 7851290650Shselasky 7852290650Shselasky u8 port_filter[8][0x20]; 7853290650Shselasky 7854290650Shselasky u8 port_filter_update_en[8][0x20]; 7855290650Shselasky}; 7856290650Shselasky 7857290650Shselaskystruct mlx5_ifc_phys_layer_cntrs_bits { 7858290650Shselasky u8 time_since_last_clear_high[0x20]; 7859290650Shselasky 7860290650Shselasky u8 time_since_last_clear_low[0x20]; 7861290650Shselasky 7862290650Shselasky u8 symbol_errors_high[0x20]; 7863290650Shselasky 7864290650Shselasky u8 symbol_errors_low[0x20]; 7865290650Shselasky 7866290650Shselasky u8 sync_headers_errors_high[0x20]; 7867290650Shselasky 7868290650Shselasky u8 sync_headers_errors_low[0x20]; 7869290650Shselasky 7870290650Shselasky u8 edpl_bip_errors_lane0_high[0x20]; 7871290650Shselasky 7872290650Shselasky u8 edpl_bip_errors_lane0_low[0x20]; 7873290650Shselasky 7874290650Shselasky u8 edpl_bip_errors_lane1_high[0x20]; 7875290650Shselasky 7876290650Shselasky u8 edpl_bip_errors_lane1_low[0x20]; 7877290650Shselasky 7878290650Shselasky u8 edpl_bip_errors_lane2_high[0x20]; 7879290650Shselasky 7880290650Shselasky u8 edpl_bip_errors_lane2_low[0x20]; 7881290650Shselasky 7882290650Shselasky u8 edpl_bip_errors_lane3_high[0x20]; 7883290650Shselasky 7884290650Shselasky u8 edpl_bip_errors_lane3_low[0x20]; 7885290650Shselasky 7886290650Shselasky u8 fc_fec_corrected_blocks_lane0_high[0x20]; 7887290650Shselasky 7888290650Shselasky u8 fc_fec_corrected_blocks_lane0_low[0x20]; 7889290650Shselasky 7890290650Shselasky u8 fc_fec_corrected_blocks_lane1_high[0x20]; 7891290650Shselasky 7892290650Shselasky u8 fc_fec_corrected_blocks_lane1_low[0x20]; 7893290650Shselasky 7894290650Shselasky u8 fc_fec_corrected_blocks_lane2_high[0x20]; 7895290650Shselasky 7896290650Shselasky u8 fc_fec_corrected_blocks_lane2_low[0x20]; 7897290650Shselasky 7898290650Shselasky u8 fc_fec_corrected_blocks_lane3_high[0x20]; 7899290650Shselasky 7900290650Shselasky u8 fc_fec_corrected_blocks_lane3_low[0x20]; 7901290650Shselasky 7902290650Shselasky u8 fc_fec_uncorrectable_blocks_lane0_high[0x20]; 7903290650Shselasky 7904290650Shselasky u8 fc_fec_uncorrectable_blocks_lane0_low[0x20]; 7905290650Shselasky 7906290650Shselasky u8 fc_fec_uncorrectable_blocks_lane1_high[0x20]; 7907290650Shselasky 7908290650Shselasky u8 fc_fec_uncorrectable_blocks_lane1_low[0x20]; 7909290650Shselasky 7910290650Shselasky u8 fc_fec_uncorrectable_blocks_lane2_high[0x20]; 7911290650Shselasky 7912290650Shselasky u8 fc_fec_uncorrectable_blocks_lane2_low[0x20]; 7913290650Shselasky 7914290650Shselasky u8 fc_fec_uncorrectable_blocks_lane3_high[0x20]; 7915290650Shselasky 7916290650Shselasky u8 fc_fec_uncorrectable_blocks_lane3_low[0x20]; 7917290650Shselasky 7918290650Shselasky u8 rs_fec_corrected_blocks_high[0x20]; 7919290650Shselasky 7920290650Shselasky u8 rs_fec_corrected_blocks_low[0x20]; 7921290650Shselasky 7922290650Shselasky u8 rs_fec_uncorrectable_blocks_high[0x20]; 7923290650Shselasky 7924290650Shselasky u8 rs_fec_uncorrectable_blocks_low[0x20]; 7925290650Shselasky 7926290650Shselasky u8 rs_fec_no_errors_blocks_high[0x20]; 7927290650Shselasky 7928290650Shselasky u8 rs_fec_no_errors_blocks_low[0x20]; 7929290650Shselasky 7930290650Shselasky u8 rs_fec_single_error_blocks_high[0x20]; 7931290650Shselasky 7932290650Shselasky u8 rs_fec_single_error_blocks_low[0x20]; 7933290650Shselasky 7934290650Shselasky u8 rs_fec_corrected_symbols_total_high[0x20]; 7935290650Shselasky 7936290650Shselasky u8 rs_fec_corrected_symbols_total_low[0x20]; 7937290650Shselasky 7938290650Shselasky u8 rs_fec_corrected_symbols_lane0_high[0x20]; 7939290650Shselasky 7940290650Shselasky u8 rs_fec_corrected_symbols_lane0_low[0x20]; 7941290650Shselasky 7942290650Shselasky u8 rs_fec_corrected_symbols_lane1_high[0x20]; 7943290650Shselasky 7944290650Shselasky u8 rs_fec_corrected_symbols_lane1_low[0x20]; 7945290650Shselasky 7946290650Shselasky u8 rs_fec_corrected_symbols_lane2_high[0x20]; 7947290650Shselasky 7948290650Shselasky u8 rs_fec_corrected_symbols_lane2_low[0x20]; 7949290650Shselasky 7950290650Shselasky u8 rs_fec_corrected_symbols_lane3_high[0x20]; 7951290650Shselasky 7952290650Shselasky u8 rs_fec_corrected_symbols_lane3_low[0x20]; 7953290650Shselasky 7954290650Shselasky u8 link_down_events[0x20]; 7955290650Shselasky 7956290650Shselasky u8 successful_recovery_events[0x20]; 7957290650Shselasky 7958290650Shselasky u8 reserved_0[0x180]; 7959290650Shselasky}; 7960290650Shselasky 7961308678Shselaskystruct mlx5_ifc_infiniband_port_cntrs_bits { 7962308678Shselasky u8 symbol_error_counter[0x10]; 7963308678Shselasky u8 link_error_recovery_counter[0x8]; 7964308678Shselasky u8 link_downed_counter[0x8]; 7965308678Shselasky 7966308678Shselasky u8 port_rcv_errors[0x10]; 7967308678Shselasky u8 port_rcv_remote_physical_errors[0x10]; 7968308678Shselasky 7969308678Shselasky u8 port_rcv_switch_relay_errors[0x10]; 7970308678Shselasky u8 port_xmit_discards[0x10]; 7971308678Shselasky 7972308678Shselasky u8 port_xmit_constraint_errors[0x8]; 7973308678Shselasky u8 port_rcv_constraint_errors[0x8]; 7974308678Shselasky u8 reserved_0[0x8]; 7975308678Shselasky u8 local_link_integrity_errors[0x4]; 7976308678Shselasky u8 excessive_buffer_overrun_errors[0x4]; 7977308678Shselasky 7978308678Shselasky u8 reserved_1[0x10]; 7979308678Shselasky u8 vl_15_dropped[0x10]; 7980308678Shselasky 7981308678Shselasky u8 port_xmit_data[0x20]; 7982308678Shselasky 7983308678Shselasky u8 port_rcv_data[0x20]; 7984308678Shselasky 7985308678Shselasky u8 port_xmit_pkts[0x20]; 7986308678Shselasky 7987308678Shselasky u8 port_rcv_pkts[0x20]; 7988308678Shselasky 7989308678Shselasky u8 port_xmit_wait[0x20]; 7990308678Shselasky 7991308678Shselasky u8 reserved_2[0x680]; 7992308678Shselasky}; 7993308678Shselasky 7994290650Shselaskystruct mlx5_ifc_phrr_reg_bits { 7995290650Shselasky u8 clr[0x1]; 7996290650Shselasky u8 reserved_0[0x7]; 7997290650Shselasky u8 local_port[0x8]; 7998290650Shselasky u8 reserved_1[0x10]; 7999290650Shselasky 8000290650Shselasky u8 hist_group[0x8]; 8001290650Shselasky u8 reserved_2[0x10]; 8002290650Shselasky u8 hist_id[0x8]; 8003290650Shselasky 8004290650Shselasky u8 reserved_3[0x40]; 8005290650Shselasky 8006290650Shselasky u8 time_since_last_clear_high[0x20]; 8007290650Shselasky 8008290650Shselasky u8 time_since_last_clear_low[0x20]; 8009290650Shselasky 8010290650Shselasky u8 bin[10][0x20]; 8011290650Shselasky}; 8012290650Shselasky 8013290650Shselaskystruct mlx5_ifc_phbr_for_prio_reg_bits { 8014290650Shselasky u8 reserved_0[0x18]; 8015290650Shselasky u8 prio[0x8]; 8016290650Shselasky}; 8017290650Shselasky 8018290650Shselaskystruct mlx5_ifc_phbr_for_port_tclass_reg_bits { 8019290650Shselasky u8 reserved_0[0x18]; 8020290650Shselasky u8 tclass[0x8]; 8021290650Shselasky}; 8022290650Shselasky 8023290650Shselaskystruct mlx5_ifc_phbr_binding_reg_bits { 8024290650Shselasky u8 opcode[0x4]; 8025290650Shselasky u8 reserved_0[0x4]; 8026290650Shselasky u8 local_port[0x8]; 8027290650Shselasky u8 pnat[0x2]; 8028290650Shselasky u8 reserved_1[0xe]; 8029290650Shselasky 8030290650Shselasky u8 hist_group[0x8]; 8031290650Shselasky u8 reserved_2[0x10]; 8032290650Shselasky u8 hist_id[0x8]; 8033290650Shselasky 8034290650Shselasky u8 reserved_3[0x10]; 8035290650Shselasky u8 hist_type[0x10]; 8036290650Shselasky 8037290650Shselasky u8 hist_parameters[0x20]; 8038290650Shselasky 8039290650Shselasky u8 hist_min_value[0x20]; 8040290650Shselasky 8041290650Shselasky u8 hist_max_value[0x20]; 8042290650Shselasky 8043290650Shselasky u8 sample_time[0x20]; 8044290650Shselasky}; 8045290650Shselasky 8046290650Shselaskyenum { 8047290650Shselasky MLX5_PFCC_REG_PPAN_DISABLED = 0x0, 8048290650Shselasky MLX5_PFCC_REG_PPAN_ENABLED = 0x1, 8049290650Shselasky}; 8050290650Shselasky 8051290650Shselaskystruct mlx5_ifc_pfcc_reg_bits { 8052306233Shselasky u8 dcbx_operation_type[0x2]; 8053306233Shselasky u8 cap_local_admin[0x1]; 8054306233Shselasky u8 cap_remote_admin[0x1]; 8055306233Shselasky u8 reserved_0[0x4]; 8056290650Shselasky u8 local_port[0x8]; 8057290650Shselasky u8 pnat[0x2]; 8058290650Shselasky u8 reserved_1[0xc]; 8059290650Shselasky u8 shl_cap[0x1]; 8060290650Shselasky u8 shl_opr[0x1]; 8061290650Shselasky 8062290650Shselasky u8 ppan[0x4]; 8063290650Shselasky u8 reserved_2[0x4]; 8064290650Shselasky u8 prio_mask_tx[0x8]; 8065290650Shselasky u8 reserved_3[0x8]; 8066290650Shselasky u8 prio_mask_rx[0x8]; 8067290650Shselasky 8068290650Shselasky u8 pptx[0x1]; 8069290650Shselasky u8 aptx[0x1]; 8070290650Shselasky u8 reserved_4[0x6]; 8071290650Shselasky u8 pfctx[0x8]; 8072306233Shselasky u8 reserved_5[0x8]; 8073306233Shselasky u8 cbftx[0x8]; 8074290650Shselasky 8075290650Shselasky u8 pprx[0x1]; 8076290650Shselasky u8 aprx[0x1]; 8077290650Shselasky u8 reserved_6[0x6]; 8078290650Shselasky u8 pfcrx[0x8]; 8079306233Shselasky u8 reserved_7[0x8]; 8080306233Shselasky u8 cbfrx[0x8]; 8081290650Shselasky 8082308678Shselasky u8 device_stall_minor_watermark[0x10]; 8083308678Shselasky u8 device_stall_critical_watermark[0x10]; 8084308678Shselasky 8085308678Shselasky u8 reserved_8[0x60]; 8086290650Shselasky}; 8087290650Shselasky 8088290650Shselaskystruct mlx5_ifc_pelc_reg_bits { 8089290650Shselasky u8 op[0x4]; 8090290650Shselasky u8 reserved_0[0x4]; 8091290650Shselasky u8 local_port[0x8]; 8092290650Shselasky u8 reserved_1[0x10]; 8093290650Shselasky 8094290650Shselasky u8 op_admin[0x8]; 8095290650Shselasky u8 op_capability[0x8]; 8096290650Shselasky u8 op_request[0x8]; 8097290650Shselasky u8 op_active[0x8]; 8098290650Shselasky 8099290650Shselasky u8 admin[0x40]; 8100290650Shselasky 8101290650Shselasky u8 capability[0x40]; 8102290650Shselasky 8103290650Shselasky u8 request[0x40]; 8104290650Shselasky 8105290650Shselasky u8 active[0x40]; 8106290650Shselasky 8107290650Shselasky u8 reserved_2[0x80]; 8108290650Shselasky}; 8109290650Shselasky 8110290650Shselaskystruct mlx5_ifc_peir_reg_bits { 8111290650Shselasky u8 reserved_0[0x8]; 8112290650Shselasky u8 local_port[0x8]; 8113290650Shselasky u8 reserved_1[0x10]; 8114290650Shselasky 8115290650Shselasky u8 reserved_2[0xc]; 8116290650Shselasky u8 error_count[0x4]; 8117290650Shselasky u8 reserved_3[0x10]; 8118290650Shselasky 8119290650Shselasky u8 reserved_4[0xc]; 8120290650Shselasky u8 lane[0x4]; 8121290650Shselasky u8 reserved_5[0x8]; 8122290650Shselasky u8 error_type[0x8]; 8123290650Shselasky}; 8124290650Shselasky 8125290650Shselaskystruct mlx5_ifc_pcap_reg_bits { 8126290650Shselasky u8 reserved_0[0x8]; 8127290650Shselasky u8 local_port[0x8]; 8128290650Shselasky u8 reserved_1[0x10]; 8129290650Shselasky 8130290650Shselasky u8 port_capability_mask[4][0x20]; 8131290650Shselasky}; 8132290650Shselasky 8133290650Shselaskystruct mlx5_ifc_pbmc_reg_bits { 8134290650Shselasky u8 reserved_0[0x8]; 8135290650Shselasky u8 local_port[0x8]; 8136290650Shselasky u8 reserved_1[0x10]; 8137290650Shselasky 8138290650Shselasky u8 xoff_timer_value[0x10]; 8139290650Shselasky u8 xoff_refresh[0x10]; 8140290650Shselasky 8141290650Shselasky u8 reserved_2[0x10]; 8142290650Shselasky u8 port_buffer_size[0x10]; 8143290650Shselasky 8144290650Shselasky struct mlx5_ifc_bufferx_reg_bits buffer[10]; 8145290650Shselasky 8146290650Shselasky u8 reserved_3[0x40]; 8147290650Shselasky 8148290650Shselasky u8 port_shared_buffer[0x40]; 8149290650Shselasky}; 8150290650Shselasky 8151290650Shselaskystruct mlx5_ifc_paos_reg_bits { 8152290650Shselasky u8 swid[0x8]; 8153290650Shselasky u8 local_port[0x8]; 8154290650Shselasky u8 reserved_0[0x4]; 8155290650Shselasky u8 admin_status[0x4]; 8156290650Shselasky u8 reserved_1[0x4]; 8157290650Shselasky u8 oper_status[0x4]; 8158290650Shselasky 8159290650Shselasky u8 ase[0x1]; 8160290650Shselasky u8 ee[0x1]; 8161290650Shselasky u8 reserved_2[0x1c]; 8162290650Shselasky u8 e[0x2]; 8163290650Shselasky 8164290650Shselasky u8 reserved_3[0x40]; 8165290650Shselasky}; 8166290650Shselasky 8167290650Shselaskystruct mlx5_ifc_pamp_reg_bits { 8168290650Shselasky u8 reserved_0[0x8]; 8169290650Shselasky u8 opamp_group[0x8]; 8170290650Shselasky u8 reserved_1[0xc]; 8171290650Shselasky u8 opamp_group_type[0x4]; 8172290650Shselasky 8173290650Shselasky u8 start_index[0x10]; 8174290650Shselasky u8 reserved_2[0x4]; 8175290650Shselasky u8 num_of_indices[0xc]; 8176290650Shselasky 8177290650Shselasky u8 index_data[18][0x10]; 8178290650Shselasky}; 8179290650Shselasky 8180290650Shselaskystruct mlx5_ifc_link_level_retrans_cntr_grp_date_bits { 8181290650Shselasky u8 llr_rx_cells_high[0x20]; 8182290650Shselasky 8183290650Shselasky u8 llr_rx_cells_low[0x20]; 8184290650Shselasky 8185290650Shselasky u8 llr_rx_error_high[0x20]; 8186290650Shselasky 8187290650Shselasky u8 llr_rx_error_low[0x20]; 8188290650Shselasky 8189290650Shselasky u8 llr_rx_crc_error_high[0x20]; 8190290650Shselasky 8191290650Shselasky u8 llr_rx_crc_error_low[0x20]; 8192290650Shselasky 8193290650Shselasky u8 llr_tx_cells_high[0x20]; 8194290650Shselasky 8195290650Shselasky u8 llr_tx_cells_low[0x20]; 8196290650Shselasky 8197290650Shselasky u8 llr_tx_ret_cells_high[0x20]; 8198290650Shselasky 8199290650Shselasky u8 llr_tx_ret_cells_low[0x20]; 8200290650Shselasky 8201290650Shselasky u8 llr_tx_ret_events_high[0x20]; 8202290650Shselasky 8203290650Shselasky u8 llr_tx_ret_events_low[0x20]; 8204290650Shselasky 8205290650Shselasky u8 reserved_0[0x640]; 8206290650Shselasky}; 8207290650Shselasky 8208290650Shselaskystruct mlx5_ifc_lane_2_module_mapping_bits { 8209290650Shselasky u8 reserved_0[0x6]; 8210290650Shselasky u8 rx_lane[0x2]; 8211290650Shselasky u8 reserved_1[0x6]; 8212290650Shselasky u8 tx_lane[0x2]; 8213290650Shselasky u8 reserved_2[0x8]; 8214290650Shselasky u8 module[0x8]; 8215290650Shselasky}; 8216290650Shselasky 8217290650Shselaskystruct mlx5_ifc_eth_per_traffic_class_layout_bits { 8218290650Shselasky u8 transmit_queue_high[0x20]; 8219290650Shselasky 8220290650Shselasky u8 transmit_queue_low[0x20]; 8221290650Shselasky 8222290650Shselasky u8 reserved_0[0x780]; 8223290650Shselasky}; 8224290650Shselasky 8225290650Shselaskystruct mlx5_ifc_eth_per_traffic_class_cong_layout_bits { 8226290650Shselasky u8 no_buffer_discard_uc_high[0x20]; 8227290650Shselasky 8228290650Shselasky u8 no_buffer_discard_uc_low[0x20]; 8229290650Shselasky 8230290650Shselasky u8 wred_discard_high[0x20]; 8231290650Shselasky 8232290650Shselasky u8 wred_discard_low[0x20]; 8233290650Shselasky 8234290650Shselasky u8 reserved_0[0x740]; 8235290650Shselasky}; 8236290650Shselasky 8237290650Shselaskystruct mlx5_ifc_eth_per_prio_grp_data_layout_bits { 8238290650Shselasky u8 rx_octets_high[0x20]; 8239290650Shselasky 8240290650Shselasky u8 rx_octets_low[0x20]; 8241290650Shselasky 8242290650Shselasky u8 reserved_0[0xc0]; 8243290650Shselasky 8244290650Shselasky u8 rx_frames_high[0x20]; 8245290650Shselasky 8246290650Shselasky u8 rx_frames_low[0x20]; 8247290650Shselasky 8248290650Shselasky u8 tx_octets_high[0x20]; 8249290650Shselasky 8250290650Shselasky u8 tx_octets_low[0x20]; 8251290650Shselasky 8252290650Shselasky u8 reserved_1[0xc0]; 8253290650Shselasky 8254290650Shselasky u8 tx_frames_high[0x20]; 8255290650Shselasky 8256290650Shselasky u8 tx_frames_low[0x20]; 8257290650Shselasky 8258290650Shselasky u8 rx_pause_high[0x20]; 8259290650Shselasky 8260290650Shselasky u8 rx_pause_low[0x20]; 8261290650Shselasky 8262290650Shselasky u8 rx_pause_duration_high[0x20]; 8263290650Shselasky 8264290650Shselasky u8 rx_pause_duration_low[0x20]; 8265290650Shselasky 8266290650Shselasky u8 tx_pause_high[0x20]; 8267290650Shselasky 8268290650Shselasky u8 tx_pause_low[0x20]; 8269290650Shselasky 8270290650Shselasky u8 tx_pause_duration_high[0x20]; 8271290650Shselasky 8272290650Shselasky u8 tx_pause_duration_low[0x20]; 8273290650Shselasky 8274290650Shselasky u8 rx_pause_transition_high[0x20]; 8275290650Shselasky 8276290650Shselasky u8 rx_pause_transition_low[0x20]; 8277290650Shselasky 8278308678Shselasky u8 rx_discards_high[0x20]; 8279308678Shselasky 8280308678Shselasky u8 rx_discards_low[0x20]; 8281308678Shselasky 8282308678Shselasky u8 device_stall_minor_watermark_cnt_high[0x20]; 8283308678Shselasky 8284308678Shselasky u8 device_stall_minor_watermark_cnt_low[0x20]; 8285308678Shselasky 8286308678Shselasky u8 device_stall_critical_watermark_cnt_high[0x20]; 8287308678Shselasky 8288308678Shselasky u8 device_stall_critical_watermark_cnt_low[0x20]; 8289308678Shselasky 8290308678Shselasky u8 reserved_2[0x340]; 8291290650Shselasky}; 8292290650Shselasky 8293290650Shselaskystruct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits { 8294290650Shselasky u8 port_transmit_wait_high[0x20]; 8295290650Shselasky 8296290650Shselasky u8 port_transmit_wait_low[0x20]; 8297290650Shselasky 8298290650Shselasky u8 ecn_marked_high[0x20]; 8299290650Shselasky 8300290650Shselasky u8 ecn_marked_low[0x20]; 8301290650Shselasky 8302290650Shselasky u8 no_buffer_discard_mc_high[0x20]; 8303290650Shselasky 8304290650Shselasky u8 no_buffer_discard_mc_low[0x20]; 8305290650Shselasky 8306290650Shselasky u8 reserved_0[0x700]; 8307290650Shselasky}; 8308290650Shselasky 8309290650Shselaskystruct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits { 8310290650Shselasky u8 a_frames_transmitted_ok_high[0x20]; 8311290650Shselasky 8312290650Shselasky u8 a_frames_transmitted_ok_low[0x20]; 8313290650Shselasky 8314290650Shselasky u8 a_frames_received_ok_high[0x20]; 8315290650Shselasky 8316290650Shselasky u8 a_frames_received_ok_low[0x20]; 8317290650Shselasky 8318290650Shselasky u8 a_frame_check_sequence_errors_high[0x20]; 8319290650Shselasky 8320290650Shselasky u8 a_frame_check_sequence_errors_low[0x20]; 8321290650Shselasky 8322290650Shselasky u8 a_alignment_errors_high[0x20]; 8323290650Shselasky 8324290650Shselasky u8 a_alignment_errors_low[0x20]; 8325290650Shselasky 8326290650Shselasky u8 a_octets_transmitted_ok_high[0x20]; 8327290650Shselasky 8328290650Shselasky u8 a_octets_transmitted_ok_low[0x20]; 8329290650Shselasky 8330290650Shselasky u8 a_octets_received_ok_high[0x20]; 8331290650Shselasky 8332290650Shselasky u8 a_octets_received_ok_low[0x20]; 8333290650Shselasky 8334290650Shselasky u8 a_multicast_frames_xmitted_ok_high[0x20]; 8335290650Shselasky 8336290650Shselasky u8 a_multicast_frames_xmitted_ok_low[0x20]; 8337290650Shselasky 8338290650Shselasky u8 a_broadcast_frames_xmitted_ok_high[0x20]; 8339290650Shselasky 8340290650Shselasky u8 a_broadcast_frames_xmitted_ok_low[0x20]; 8341290650Shselasky 8342290650Shselasky u8 a_multicast_frames_received_ok_high[0x20]; 8343290650Shselasky 8344290650Shselasky u8 a_multicast_frames_received_ok_low[0x20]; 8345290650Shselasky 8346290650Shselasky u8 a_broadcast_frames_recieved_ok_high[0x20]; 8347290650Shselasky 8348290650Shselasky u8 a_broadcast_frames_recieved_ok_low[0x20]; 8349290650Shselasky 8350290650Shselasky u8 a_in_range_length_errors_high[0x20]; 8351290650Shselasky 8352290650Shselasky u8 a_in_range_length_errors_low[0x20]; 8353290650Shselasky 8354290650Shselasky u8 a_out_of_range_length_field_high[0x20]; 8355290650Shselasky 8356290650Shselasky u8 a_out_of_range_length_field_low[0x20]; 8357290650Shselasky 8358290650Shselasky u8 a_frame_too_long_errors_high[0x20]; 8359290650Shselasky 8360290650Shselasky u8 a_frame_too_long_errors_low[0x20]; 8361290650Shselasky 8362290650Shselasky u8 a_symbol_error_during_carrier_high[0x20]; 8363290650Shselasky 8364290650Shselasky u8 a_symbol_error_during_carrier_low[0x20]; 8365290650Shselasky 8366290650Shselasky u8 a_mac_control_frames_transmitted_high[0x20]; 8367290650Shselasky 8368290650Shselasky u8 a_mac_control_frames_transmitted_low[0x20]; 8369290650Shselasky 8370290650Shselasky u8 a_mac_control_frames_received_high[0x20]; 8371290650Shselasky 8372290650Shselasky u8 a_mac_control_frames_received_low[0x20]; 8373290650Shselasky 8374290650Shselasky u8 a_unsupported_opcodes_received_high[0x20]; 8375290650Shselasky 8376290650Shselasky u8 a_unsupported_opcodes_received_low[0x20]; 8377290650Shselasky 8378290650Shselasky u8 a_pause_mac_ctrl_frames_received_high[0x20]; 8379290650Shselasky 8380290650Shselasky u8 a_pause_mac_ctrl_frames_received_low[0x20]; 8381290650Shselasky 8382290650Shselasky u8 a_pause_mac_ctrl_frames_transmitted_high[0x20]; 8383290650Shselasky 8384290650Shselasky u8 a_pause_mac_ctrl_frames_transmitted_low[0x20]; 8385290650Shselasky 8386290650Shselasky u8 reserved_0[0x300]; 8387290650Shselasky}; 8388290650Shselasky 8389290650Shselaskystruct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits { 8390290650Shselasky u8 dot3stats_alignment_errors_high[0x20]; 8391290650Shselasky 8392290650Shselasky u8 dot3stats_alignment_errors_low[0x20]; 8393290650Shselasky 8394290650Shselasky u8 dot3stats_fcs_errors_high[0x20]; 8395290650Shselasky 8396290650Shselasky u8 dot3stats_fcs_errors_low[0x20]; 8397290650Shselasky 8398290650Shselasky u8 dot3stats_single_collision_frames_high[0x20]; 8399290650Shselasky 8400290650Shselasky u8 dot3stats_single_collision_frames_low[0x20]; 8401290650Shselasky 8402290650Shselasky u8 dot3stats_multiple_collision_frames_high[0x20]; 8403290650Shselasky 8404290650Shselasky u8 dot3stats_multiple_collision_frames_low[0x20]; 8405290650Shselasky 8406290650Shselasky u8 dot3stats_sqe_test_errors_high[0x20]; 8407290650Shselasky 8408290650Shselasky u8 dot3stats_sqe_test_errors_low[0x20]; 8409290650Shselasky 8410290650Shselasky u8 dot3stats_deferred_transmissions_high[0x20]; 8411290650Shselasky 8412290650Shselasky u8 dot3stats_deferred_transmissions_low[0x20]; 8413290650Shselasky 8414290650Shselasky u8 dot3stats_late_collisions_high[0x20]; 8415290650Shselasky 8416290650Shselasky u8 dot3stats_late_collisions_low[0x20]; 8417290650Shselasky 8418290650Shselasky u8 dot3stats_excessive_collisions_high[0x20]; 8419290650Shselasky 8420290650Shselasky u8 dot3stats_excessive_collisions_low[0x20]; 8421290650Shselasky 8422290650Shselasky u8 dot3stats_internal_mac_transmit_errors_high[0x20]; 8423290650Shselasky 8424290650Shselasky u8 dot3stats_internal_mac_transmit_errors_low[0x20]; 8425290650Shselasky 8426290650Shselasky u8 dot3stats_carrier_sense_errors_high[0x20]; 8427290650Shselasky 8428290650Shselasky u8 dot3stats_carrier_sense_errors_low[0x20]; 8429290650Shselasky 8430290650Shselasky u8 dot3stats_frame_too_longs_high[0x20]; 8431290650Shselasky 8432290650Shselasky u8 dot3stats_frame_too_longs_low[0x20]; 8433290650Shselasky 8434290650Shselasky u8 dot3stats_internal_mac_receive_errors_high[0x20]; 8435290650Shselasky 8436290650Shselasky u8 dot3stats_internal_mac_receive_errors_low[0x20]; 8437290650Shselasky 8438290650Shselasky u8 dot3stats_symbol_errors_high[0x20]; 8439290650Shselasky 8440290650Shselasky u8 dot3stats_symbol_errors_low[0x20]; 8441290650Shselasky 8442290650Shselasky u8 dot3control_in_unknown_opcodes_high[0x20]; 8443290650Shselasky 8444290650Shselasky u8 dot3control_in_unknown_opcodes_low[0x20]; 8445290650Shselasky 8446290650Shselasky u8 dot3in_pause_frames_high[0x20]; 8447290650Shselasky 8448290650Shselasky u8 dot3in_pause_frames_low[0x20]; 8449290650Shselasky 8450290650Shselasky u8 dot3out_pause_frames_high[0x20]; 8451290650Shselasky 8452290650Shselasky u8 dot3out_pause_frames_low[0x20]; 8453290650Shselasky 8454290650Shselasky u8 reserved_0[0x3c0]; 8455290650Shselasky}; 8456290650Shselasky 8457290650Shselaskystruct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits { 8458290650Shselasky u8 if_in_octets_high[0x20]; 8459290650Shselasky 8460290650Shselasky u8 if_in_octets_low[0x20]; 8461290650Shselasky 8462290650Shselasky u8 if_in_ucast_pkts_high[0x20]; 8463290650Shselasky 8464290650Shselasky u8 if_in_ucast_pkts_low[0x20]; 8465290650Shselasky 8466290650Shselasky u8 if_in_discards_high[0x20]; 8467290650Shselasky 8468290650Shselasky u8 if_in_discards_low[0x20]; 8469290650Shselasky 8470290650Shselasky u8 if_in_errors_high[0x20]; 8471290650Shselasky 8472290650Shselasky u8 if_in_errors_low[0x20]; 8473290650Shselasky 8474290650Shselasky u8 if_in_unknown_protos_high[0x20]; 8475290650Shselasky 8476290650Shselasky u8 if_in_unknown_protos_low[0x20]; 8477290650Shselasky 8478290650Shselasky u8 if_out_octets_high[0x20]; 8479290650Shselasky 8480290650Shselasky u8 if_out_octets_low[0x20]; 8481290650Shselasky 8482290650Shselasky u8 if_out_ucast_pkts_high[0x20]; 8483290650Shselasky 8484290650Shselasky u8 if_out_ucast_pkts_low[0x20]; 8485290650Shselasky 8486290650Shselasky u8 if_out_discards_high[0x20]; 8487290650Shselasky 8488290650Shselasky u8 if_out_discards_low[0x20]; 8489290650Shselasky 8490290650Shselasky u8 if_out_errors_high[0x20]; 8491290650Shselasky 8492290650Shselasky u8 if_out_errors_low[0x20]; 8493290650Shselasky 8494290650Shselasky u8 if_in_multicast_pkts_high[0x20]; 8495290650Shselasky 8496290650Shselasky u8 if_in_multicast_pkts_low[0x20]; 8497290650Shselasky 8498290650Shselasky u8 if_in_broadcast_pkts_high[0x20]; 8499290650Shselasky 8500290650Shselasky u8 if_in_broadcast_pkts_low[0x20]; 8501290650Shselasky 8502290650Shselasky u8 if_out_multicast_pkts_high[0x20]; 8503290650Shselasky 8504290650Shselasky u8 if_out_multicast_pkts_low[0x20]; 8505290650Shselasky 8506290650Shselasky u8 if_out_broadcast_pkts_high[0x20]; 8507290650Shselasky 8508290650Shselasky u8 if_out_broadcast_pkts_low[0x20]; 8509290650Shselasky 8510290650Shselasky u8 reserved_0[0x480]; 8511290650Shselasky}; 8512290650Shselasky 8513290650Shselaskystruct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits { 8514290650Shselasky u8 ether_stats_drop_events_high[0x20]; 8515290650Shselasky 8516290650Shselasky u8 ether_stats_drop_events_low[0x20]; 8517290650Shselasky 8518290650Shselasky u8 ether_stats_octets_high[0x20]; 8519290650Shselasky 8520290650Shselasky u8 ether_stats_octets_low[0x20]; 8521290650Shselasky 8522290650Shselasky u8 ether_stats_pkts_high[0x20]; 8523290650Shselasky 8524290650Shselasky u8 ether_stats_pkts_low[0x20]; 8525290650Shselasky 8526290650Shselasky u8 ether_stats_broadcast_pkts_high[0x20]; 8527290650Shselasky 8528290650Shselasky u8 ether_stats_broadcast_pkts_low[0x20]; 8529290650Shselasky 8530290650Shselasky u8 ether_stats_multicast_pkts_high[0x20]; 8531290650Shselasky 8532290650Shselasky u8 ether_stats_multicast_pkts_low[0x20]; 8533290650Shselasky 8534290650Shselasky u8 ether_stats_crc_align_errors_high[0x20]; 8535290650Shselasky 8536290650Shselasky u8 ether_stats_crc_align_errors_low[0x20]; 8537290650Shselasky 8538290650Shselasky u8 ether_stats_undersize_pkts_high[0x20]; 8539290650Shselasky 8540290650Shselasky u8 ether_stats_undersize_pkts_low[0x20]; 8541290650Shselasky 8542290650Shselasky u8 ether_stats_oversize_pkts_high[0x20]; 8543290650Shselasky 8544290650Shselasky u8 ether_stats_oversize_pkts_low[0x20]; 8545290650Shselasky 8546290650Shselasky u8 ether_stats_fragments_high[0x20]; 8547290650Shselasky 8548290650Shselasky u8 ether_stats_fragments_low[0x20]; 8549290650Shselasky 8550290650Shselasky u8 ether_stats_jabbers_high[0x20]; 8551290650Shselasky 8552290650Shselasky u8 ether_stats_jabbers_low[0x20]; 8553290650Shselasky 8554290650Shselasky u8 ether_stats_collisions_high[0x20]; 8555290650Shselasky 8556290650Shselasky u8 ether_stats_collisions_low[0x20]; 8557290650Shselasky 8558290650Shselasky u8 ether_stats_pkts64octets_high[0x20]; 8559290650Shselasky 8560290650Shselasky u8 ether_stats_pkts64octets_low[0x20]; 8561290650Shselasky 8562290650Shselasky u8 ether_stats_pkts65to127octets_high[0x20]; 8563290650Shselasky 8564290650Shselasky u8 ether_stats_pkts65to127octets_low[0x20]; 8565290650Shselasky 8566290650Shselasky u8 ether_stats_pkts128to255octets_high[0x20]; 8567290650Shselasky 8568290650Shselasky u8 ether_stats_pkts128to255octets_low[0x20]; 8569290650Shselasky 8570290650Shselasky u8 ether_stats_pkts256to511octets_high[0x20]; 8571290650Shselasky 8572290650Shselasky u8 ether_stats_pkts256to511octets_low[0x20]; 8573290650Shselasky 8574290650Shselasky u8 ether_stats_pkts512to1023octets_high[0x20]; 8575290650Shselasky 8576290650Shselasky u8 ether_stats_pkts512to1023octets_low[0x20]; 8577290650Shselasky 8578290650Shselasky u8 ether_stats_pkts1024to1518octets_high[0x20]; 8579290650Shselasky 8580290650Shselasky u8 ether_stats_pkts1024to1518octets_low[0x20]; 8581290650Shselasky 8582290650Shselasky u8 ether_stats_pkts1519to2047octets_high[0x20]; 8583290650Shselasky 8584290650Shselasky u8 ether_stats_pkts1519to2047octets_low[0x20]; 8585290650Shselasky 8586290650Shselasky u8 ether_stats_pkts2048to4095octets_high[0x20]; 8587290650Shselasky 8588290650Shselasky u8 ether_stats_pkts2048to4095octets_low[0x20]; 8589290650Shselasky 8590290650Shselasky u8 ether_stats_pkts4096to8191octets_high[0x20]; 8591290650Shselasky 8592290650Shselasky u8 ether_stats_pkts4096to8191octets_low[0x20]; 8593290650Shselasky 8594290650Shselasky u8 ether_stats_pkts8192to10239octets_high[0x20]; 8595290650Shselasky 8596290650Shselasky u8 ether_stats_pkts8192to10239octets_low[0x20]; 8597290650Shselasky 8598290650Shselasky u8 reserved_0[0x280]; 8599290650Shselasky}; 8600290650Shselasky 8601290650Shselaskystruct mlx5_ifc_ib_portcntrs_attribute_grp_data_bits { 8602290650Shselasky u8 symbol_error_counter[0x10]; 8603290650Shselasky u8 link_error_recovery_counter[0x8]; 8604290650Shselasky u8 link_downed_counter[0x8]; 8605290650Shselasky 8606290650Shselasky u8 port_rcv_errors[0x10]; 8607290650Shselasky u8 port_rcv_remote_physical_errors[0x10]; 8608290650Shselasky 8609290650Shselasky u8 port_rcv_switch_relay_errors[0x10]; 8610290650Shselasky u8 port_xmit_discards[0x10]; 8611290650Shselasky 8612290650Shselasky u8 port_xmit_constraint_errors[0x8]; 8613290650Shselasky u8 port_rcv_constraint_errors[0x8]; 8614290650Shselasky u8 reserved_0[0x8]; 8615290650Shselasky u8 local_link_integrity_errors[0x4]; 8616290650Shselasky u8 excessive_buffer_overrun_errors[0x4]; 8617290650Shselasky 8618290650Shselasky u8 reserved_1[0x10]; 8619290650Shselasky u8 vl_15_dropped[0x10]; 8620290650Shselasky 8621290650Shselasky u8 port_xmit_data[0x20]; 8622290650Shselasky 8623290650Shselasky u8 port_rcv_data[0x20]; 8624290650Shselasky 8625290650Shselasky u8 port_xmit_pkts[0x20]; 8626290650Shselasky 8627290650Shselasky u8 port_rcv_pkts[0x20]; 8628290650Shselasky 8629290650Shselasky u8 port_xmit_wait[0x20]; 8630290650Shselasky 8631290650Shselasky u8 reserved_2[0x680]; 8632290650Shselasky}; 8633290650Shselasky 8634290650Shselaskystruct mlx5_ifc_trc_tlb_reg_bits { 8635290650Shselasky u8 reserved_0[0x80]; 8636290650Shselasky 8637290650Shselasky u8 tlb_addr[0][0x40]; 8638290650Shselasky}; 8639290650Shselasky 8640290650Shselaskystruct mlx5_ifc_trc_read_fifo_reg_bits { 8641290650Shselasky u8 reserved_0[0x10]; 8642290650Shselasky u8 requested_event_num[0x10]; 8643290650Shselasky 8644290650Shselasky u8 reserved_1[0x20]; 8645290650Shselasky 8646290650Shselasky u8 reserved_2[0x10]; 8647290650Shselasky u8 acual_event_num[0x10]; 8648290650Shselasky 8649290650Shselasky u8 reserved_3[0x20]; 8650290650Shselasky 8651290650Shselasky u8 event[0][0x40]; 8652290650Shselasky}; 8653290650Shselasky 8654290650Shselaskystruct mlx5_ifc_trc_lock_reg_bits { 8655290650Shselasky u8 reserved_0[0x1f]; 8656290650Shselasky u8 lock[0x1]; 8657290650Shselasky 8658290650Shselasky u8 reserved_1[0x60]; 8659290650Shselasky}; 8660290650Shselasky 8661290650Shselaskystruct mlx5_ifc_trc_filter_reg_bits { 8662290650Shselasky u8 status[0x1]; 8663290650Shselasky u8 reserved_0[0xf]; 8664290650Shselasky u8 filter_index[0x10]; 8665290650Shselasky 8666290650Shselasky u8 reserved_1[0x20]; 8667290650Shselasky 8668290650Shselasky u8 filter_val[0x20]; 8669290650Shselasky 8670290650Shselasky u8 reserved_2[0x1a0]; 8671290650Shselasky}; 8672290650Shselasky 8673290650Shselaskystruct mlx5_ifc_trc_event_reg_bits { 8674290650Shselasky u8 status[0x1]; 8675290650Shselasky u8 reserved_0[0xf]; 8676290650Shselasky u8 event_index[0x10]; 8677290650Shselasky 8678290650Shselasky u8 reserved_1[0x20]; 8679290650Shselasky 8680290650Shselasky u8 event_id[0x20]; 8681290650Shselasky 8682290650Shselasky u8 event_selector_val[0x10]; 8683290650Shselasky u8 event_selector_size[0x10]; 8684290650Shselasky 8685290650Shselasky u8 reserved_2[0x180]; 8686290650Shselasky}; 8687290650Shselasky 8688290650Shselaskystruct mlx5_ifc_trc_conf_reg_bits { 8689290650Shselasky u8 limit_en[0x1]; 8690290650Shselasky u8 reserved_0[0x3]; 8691290650Shselasky u8 dump_mode[0x4]; 8692290650Shselasky u8 reserved_1[0x15]; 8693290650Shselasky u8 state[0x3]; 8694290650Shselasky 8695290650Shselasky u8 reserved_2[0x20]; 8696290650Shselasky 8697290650Shselasky u8 limit_event_index[0x20]; 8698290650Shselasky 8699290650Shselasky u8 mkey[0x20]; 8700290650Shselasky 8701290650Shselasky u8 fifo_ready_ev_num[0x20]; 8702290650Shselasky 8703290650Shselasky u8 reserved_3[0x160]; 8704290650Shselasky}; 8705290650Shselasky 8706290650Shselaskystruct mlx5_ifc_trc_cap_reg_bits { 8707290650Shselasky u8 reserved_0[0x18]; 8708290650Shselasky u8 dump_mode[0x8]; 8709290650Shselasky 8710290650Shselasky u8 reserved_1[0x20]; 8711290650Shselasky 8712290650Shselasky u8 num_of_events[0x10]; 8713290650Shselasky u8 num_of_filters[0x10]; 8714290650Shselasky 8715290650Shselasky u8 fifo_size[0x20]; 8716290650Shselasky 8717290650Shselasky u8 tlb_size[0x10]; 8718290650Shselasky u8 event_size[0x10]; 8719290650Shselasky 8720290650Shselasky u8 reserved_2[0x160]; 8721290650Shselasky}; 8722290650Shselasky 8723290650Shselaskystruct mlx5_ifc_set_node_in_bits { 8724290650Shselasky u8 node_description[64][0x8]; 8725290650Shselasky}; 8726290650Shselasky 8727290650Shselaskystruct mlx5_ifc_register_power_settings_bits { 8728290650Shselasky u8 reserved_0[0x18]; 8729290650Shselasky u8 power_settings_level[0x8]; 8730290650Shselasky 8731290650Shselasky u8 reserved_1[0x60]; 8732290650Shselasky}; 8733290650Shselasky 8734290650Shselaskystruct mlx5_ifc_register_host_endianess_bits { 8735290650Shselasky u8 he[0x1]; 8736290650Shselasky u8 reserved_0[0x1f]; 8737290650Shselasky 8738290650Shselasky u8 reserved_1[0x60]; 8739290650Shselasky}; 8740290650Shselasky 8741290650Shselaskystruct mlx5_ifc_register_diag_buffer_ctrl_bits { 8742290650Shselasky u8 physical_address[0x40]; 8743290650Shselasky}; 8744290650Shselasky 8745290650Shselaskystruct mlx5_ifc_qtct_reg_bits { 8746306233Shselasky u8 operation_type[0x2]; 8747306233Shselasky u8 cap_local_admin[0x1]; 8748306233Shselasky u8 cap_remote_admin[0x1]; 8749306233Shselasky u8 reserved_0[0x4]; 8750290650Shselasky u8 port_number[0x8]; 8751290650Shselasky u8 reserved_1[0xd]; 8752290650Shselasky u8 prio[0x3]; 8753290650Shselasky 8754290650Shselasky u8 reserved_2[0x1d]; 8755290650Shselasky u8 tclass[0x3]; 8756290650Shselasky}; 8757290650Shselasky 8758290650Shselaskystruct mlx5_ifc_qpdp_reg_bits { 8759290650Shselasky u8 reserved_0[0x8]; 8760290650Shselasky u8 port_number[0x8]; 8761290650Shselasky u8 reserved_1[0x10]; 8762290650Shselasky 8763290650Shselasky u8 reserved_2[0x1d]; 8764290650Shselasky u8 pprio[0x3]; 8765290650Shselasky}; 8766290650Shselasky 8767290650Shselaskystruct mlx5_ifc_port_info_ro_fields_param_bits { 8768290650Shselasky u8 reserved_0[0x8]; 8769290650Shselasky u8 port[0x8]; 8770290650Shselasky u8 max_gid[0x10]; 8771290650Shselasky 8772290650Shselasky u8 reserved_1[0x20]; 8773290650Shselasky 8774290650Shselasky u8 port_guid[0x40]; 8775290650Shselasky}; 8776290650Shselasky 8777290650Shselaskystruct mlx5_ifc_nvqc_reg_bits { 8778290650Shselasky u8 type[0x20]; 8779290650Shselasky 8780290650Shselasky u8 reserved_0[0x18]; 8781290650Shselasky u8 version[0x4]; 8782290650Shselasky u8 reserved_1[0x2]; 8783290650Shselasky u8 support_wr[0x1]; 8784290650Shselasky u8 support_rd[0x1]; 8785290650Shselasky}; 8786290650Shselasky 8787290650Shselaskystruct mlx5_ifc_nvia_reg_bits { 8788290650Shselasky u8 reserved_0[0x1d]; 8789290650Shselasky u8 target[0x3]; 8790290650Shselasky 8791290650Shselasky u8 reserved_1[0x20]; 8792290650Shselasky}; 8793290650Shselasky 8794290650Shselaskystruct mlx5_ifc_nvdi_reg_bits { 8795290650Shselasky struct mlx5_ifc_config_item_bits configuration_item_header; 8796290650Shselasky}; 8797290650Shselasky 8798290650Shselaskystruct mlx5_ifc_nvda_reg_bits { 8799290650Shselasky struct mlx5_ifc_config_item_bits configuration_item_header; 8800290650Shselasky 8801290650Shselasky u8 configuration_item_data[0x20]; 8802290650Shselasky}; 8803290650Shselasky 8804290650Shselaskystruct mlx5_ifc_node_info_ro_fields_param_bits { 8805290650Shselasky u8 system_image_guid[0x40]; 8806290650Shselasky 8807290650Shselasky u8 reserved_0[0x40]; 8808290650Shselasky 8809290650Shselasky u8 node_guid[0x40]; 8810290650Shselasky 8811290650Shselasky u8 reserved_1[0x10]; 8812290650Shselasky u8 max_pkey[0x10]; 8813290650Shselasky 8814290650Shselasky u8 reserved_2[0x20]; 8815290650Shselasky}; 8816290650Shselasky 8817290650Shselaskystruct mlx5_ifc_ets_tcn_config_reg_bits { 8818290650Shselasky u8 g[0x1]; 8819290650Shselasky u8 b[0x1]; 8820290650Shselasky u8 r[0x1]; 8821290650Shselasky u8 reserved_0[0x9]; 8822290650Shselasky u8 group[0x4]; 8823290650Shselasky u8 reserved_1[0x9]; 8824290650Shselasky u8 bw_allocation[0x7]; 8825290650Shselasky 8826290650Shselasky u8 reserved_2[0xc]; 8827290650Shselasky u8 max_bw_units[0x4]; 8828290650Shselasky u8 reserved_3[0x8]; 8829290650Shselasky u8 max_bw_value[0x8]; 8830290650Shselasky}; 8831290650Shselasky 8832290650Shselaskystruct mlx5_ifc_ets_global_config_reg_bits { 8833290650Shselasky u8 reserved_0[0x2]; 8834290650Shselasky u8 r[0x1]; 8835290650Shselasky u8 reserved_1[0x1d]; 8836290650Shselasky 8837290650Shselasky u8 reserved_2[0xc]; 8838290650Shselasky u8 max_bw_units[0x4]; 8839290650Shselasky u8 reserved_3[0x8]; 8840290650Shselasky u8 max_bw_value[0x8]; 8841290650Shselasky}; 8842290650Shselasky 8843290650Shselaskystruct mlx5_ifc_nodnic_mac_filters_bits { 8844290650Shselasky struct mlx5_ifc_mac_address_layout_bits mac_filter0; 8845290650Shselasky 8846290650Shselasky struct mlx5_ifc_mac_address_layout_bits mac_filter1; 8847290650Shselasky 8848290650Shselasky struct mlx5_ifc_mac_address_layout_bits mac_filter2; 8849290650Shselasky 8850290650Shselasky struct mlx5_ifc_mac_address_layout_bits mac_filter3; 8851290650Shselasky 8852290650Shselasky struct mlx5_ifc_mac_address_layout_bits mac_filter4; 8853290650Shselasky 8854290650Shselasky u8 reserved_0[0xc0]; 8855290650Shselasky}; 8856290650Shselasky 8857290650Shselaskystruct mlx5_ifc_nodnic_gid_filters_bits { 8858290650Shselasky u8 mgid_filter0[16][0x8]; 8859290650Shselasky 8860290650Shselasky u8 mgid_filter1[16][0x8]; 8861290650Shselasky 8862290650Shselasky u8 mgid_filter2[16][0x8]; 8863290650Shselasky 8864290650Shselasky u8 mgid_filter3[16][0x8]; 8865290650Shselasky}; 8866290650Shselasky 8867290650Shselaskyenum { 8868290650Shselasky MLX5_NODNIC_CONFIG_REG_NUM_PORTS_SINGLE_PORT = 0x0, 8869290650Shselasky MLX5_NODNIC_CONFIG_REG_NUM_PORTS_DUAL_PORT = 0x1, 8870290650Shselasky}; 8871290650Shselasky 8872290650Shselaskyenum { 8873290650Shselasky MLX5_NODNIC_CONFIG_REG_CQE_FORMAT_LEGACY_CQE = 0x0, 8874290650Shselasky MLX5_NODNIC_CONFIG_REG_CQE_FORMAT_NEW_CQE = 0x1, 8875290650Shselasky}; 8876290650Shselasky 8877290650Shselaskystruct mlx5_ifc_nodnic_config_reg_bits { 8878290650Shselasky u8 no_dram_nic_revision[0x8]; 8879290650Shselasky u8 hardware_format[0x8]; 8880290650Shselasky u8 support_receive_filter[0x1]; 8881290650Shselasky u8 support_promisc_filter[0x1]; 8882290650Shselasky u8 support_promisc_multicast_filter[0x1]; 8883290650Shselasky u8 reserved_0[0x2]; 8884290650Shselasky u8 log_working_buffer_size[0x3]; 8885290650Shselasky u8 log_pkey_table_size[0x4]; 8886290650Shselasky u8 reserved_1[0x3]; 8887290650Shselasky u8 num_ports[0x1]; 8888290650Shselasky 8889290650Shselasky u8 reserved_2[0x2]; 8890290650Shselasky u8 log_max_ring_size[0x6]; 8891290650Shselasky u8 reserved_3[0x18]; 8892290650Shselasky 8893290650Shselasky u8 lkey[0x20]; 8894290650Shselasky 8895290650Shselasky u8 cqe_format[0x4]; 8896290650Shselasky u8 reserved_4[0x1c]; 8897290650Shselasky 8898290650Shselasky u8 node_guid[0x40]; 8899290650Shselasky 8900290650Shselasky u8 reserved_5[0x740]; 8901290650Shselasky 8902290650Shselasky struct mlx5_ifc_nodnic_port_config_reg_bits port1_settings; 8903290650Shselasky 8904290650Shselasky struct mlx5_ifc_nodnic_port_config_reg_bits port2_settings; 8905290650Shselasky}; 8906290650Shselasky 8907290650Shselaskystruct mlx5_ifc_vlan_layout_bits { 8908290650Shselasky u8 reserved_0[0x14]; 8909290650Shselasky u8 vlan[0xc]; 8910290650Shselasky 8911290650Shselasky u8 reserved_1[0x20]; 8912290650Shselasky}; 8913290650Shselasky 8914290650Shselaskystruct mlx5_ifc_umr_pointer_desc_argument_bits { 8915290650Shselasky u8 reserved_0[0x20]; 8916290650Shselasky 8917290650Shselasky u8 mkey[0x20]; 8918290650Shselasky 8919290650Shselasky u8 addressh_63_32[0x20]; 8920290650Shselasky 8921290650Shselasky u8 addressl_31_0[0x20]; 8922290650Shselasky}; 8923290650Shselasky 8924290650Shselaskystruct mlx5_ifc_ud_adrs_vector_bits { 8925290650Shselasky u8 dc_key[0x40]; 8926290650Shselasky 8927290650Shselasky u8 ext[0x1]; 8928290650Shselasky u8 reserved_0[0x7]; 8929290650Shselasky u8 destination_qp_dct[0x18]; 8930290650Shselasky 8931290650Shselasky u8 static_rate[0x4]; 8932290650Shselasky u8 sl_eth_prio[0x4]; 8933290650Shselasky u8 fl[0x1]; 8934290650Shselasky u8 mlid[0x7]; 8935290650Shselasky u8 rlid_udp_sport[0x10]; 8936290650Shselasky 8937290650Shselasky u8 reserved_1[0x20]; 8938290650Shselasky 8939290650Shselasky u8 rmac_47_16[0x20]; 8940290650Shselasky 8941290650Shselasky u8 rmac_15_0[0x10]; 8942290650Shselasky u8 tclass[0x8]; 8943290650Shselasky u8 hop_limit[0x8]; 8944290650Shselasky 8945290650Shselasky u8 reserved_2[0x1]; 8946290650Shselasky u8 grh[0x1]; 8947290650Shselasky u8 reserved_3[0x2]; 8948290650Shselasky u8 src_addr_index[0x8]; 8949290650Shselasky u8 flow_label[0x14]; 8950290650Shselasky 8951290650Shselasky u8 rgid_rip[16][0x8]; 8952290650Shselasky}; 8953290650Shselasky 8954290650Shselaskystruct mlx5_ifc_port_module_event_bits { 8955290650Shselasky u8 reserved_0[0x8]; 8956290650Shselasky u8 module[0x8]; 8957290650Shselasky u8 reserved_1[0xc]; 8958290650Shselasky u8 module_status[0x4]; 8959290650Shselasky 8960290650Shselasky u8 reserved_2[0x14]; 8961290650Shselasky u8 error_type[0x4]; 8962290650Shselasky u8 reserved_3[0x8]; 8963290650Shselasky 8964290650Shselasky u8 reserved_4[0xa0]; 8965290650Shselasky}; 8966290650Shselasky 8967290650Shselaskystruct mlx5_ifc_icmd_control_bits { 8968290650Shselasky u8 opcode[0x10]; 8969290650Shselasky u8 status[0x8]; 8970290650Shselasky u8 reserved_0[0x7]; 8971290650Shselasky u8 busy[0x1]; 8972290650Shselasky}; 8973290650Shselasky 8974290650Shselaskystruct mlx5_ifc_eqe_bits { 8975290650Shselasky u8 reserved_0[0x8]; 8976290650Shselasky u8 event_type[0x8]; 8977290650Shselasky u8 reserved_1[0x8]; 8978290650Shselasky u8 event_sub_type[0x8]; 8979290650Shselasky 8980290650Shselasky u8 reserved_2[0xe0]; 8981290650Shselasky 8982290650Shselasky union mlx5_ifc_event_auto_bits event_data; 8983290650Shselasky 8984290650Shselasky u8 reserved_3[0x10]; 8985290650Shselasky u8 signature[0x8]; 8986290650Shselasky u8 reserved_4[0x7]; 8987290650Shselasky u8 owner[0x1]; 8988290650Shselasky}; 8989290650Shselasky 8990290650Shselaskyenum { 8991290650Shselasky MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7, 8992290650Shselasky}; 8993290650Shselasky 8994290650Shselaskystruct mlx5_ifc_cmd_queue_entry_bits { 8995290650Shselasky u8 type[0x8]; 8996290650Shselasky u8 reserved_0[0x18]; 8997290650Shselasky 8998290650Shselasky u8 input_length[0x20]; 8999290650Shselasky 9000290650Shselasky u8 input_mailbox_pointer_63_32[0x20]; 9001290650Shselasky 9002290650Shselasky u8 input_mailbox_pointer_31_9[0x17]; 9003290650Shselasky u8 reserved_1[0x9]; 9004290650Shselasky 9005290650Shselasky u8 command_input_inline_data[16][0x8]; 9006290650Shselasky 9007290650Shselasky u8 command_output_inline_data[16][0x8]; 9008290650Shselasky 9009290650Shselasky u8 output_mailbox_pointer_63_32[0x20]; 9010290650Shselasky 9011290650Shselasky u8 output_mailbox_pointer_31_9[0x17]; 9012290650Shselasky u8 reserved_2[0x9]; 9013290650Shselasky 9014290650Shselasky u8 output_length[0x20]; 9015290650Shselasky 9016290650Shselasky u8 token[0x8]; 9017290650Shselasky u8 signature[0x8]; 9018290650Shselasky u8 reserved_3[0x8]; 9019290650Shselasky u8 status[0x7]; 9020290650Shselasky u8 ownership[0x1]; 9021290650Shselasky}; 9022290650Shselasky 9023290650Shselaskystruct mlx5_ifc_cmd_out_bits { 9024290650Shselasky u8 status[0x8]; 9025290650Shselasky u8 reserved_0[0x18]; 9026290650Shselasky 9027290650Shselasky u8 syndrome[0x20]; 9028290650Shselasky 9029290650Shselasky u8 command_output[0x20]; 9030290650Shselasky}; 9031290650Shselasky 9032290650Shselaskystruct mlx5_ifc_cmd_in_bits { 9033290650Shselasky u8 opcode[0x10]; 9034290650Shselasky u8 reserved_0[0x10]; 9035290650Shselasky 9036290650Shselasky u8 reserved_1[0x10]; 9037290650Shselasky u8 op_mod[0x10]; 9038290650Shselasky 9039290650Shselasky u8 command[0][0x20]; 9040290650Shselasky}; 9041290650Shselasky 9042290650Shselaskystruct mlx5_ifc_cmd_if_box_bits { 9043290650Shselasky u8 mailbox_data[512][0x8]; 9044290650Shselasky 9045290650Shselasky u8 reserved_0[0x180]; 9046290650Shselasky 9047290650Shselasky u8 next_pointer_63_32[0x20]; 9048290650Shselasky 9049290650Shselasky u8 next_pointer_31_10[0x16]; 9050290650Shselasky u8 reserved_1[0xa]; 9051290650Shselasky 9052290650Shselasky u8 block_number[0x20]; 9053290650Shselasky 9054290650Shselasky u8 reserved_2[0x8]; 9055290650Shselasky u8 token[0x8]; 9056290650Shselasky u8 ctrl_signature[0x8]; 9057290650Shselasky u8 signature[0x8]; 9058290650Shselasky}; 9059290650Shselasky 9060290650Shselaskystruct mlx5_ifc_mtt_bits { 9061290650Shselasky u8 ptag_63_32[0x20]; 9062290650Shselasky 9063290650Shselasky u8 ptag_31_8[0x18]; 9064290650Shselasky u8 reserved_0[0x6]; 9065290650Shselasky u8 wr_en[0x1]; 9066290650Shselasky u8 rd_en[0x1]; 9067290650Shselasky}; 9068290650Shselasky 9069290650Shselaskystruct mlx5_ifc_vendor_specific_cap_bits { 9070290650Shselasky u8 type[0x8]; 9071290650Shselasky u8 length[0x8]; 9072290650Shselasky u8 next_pointer[0x8]; 9073290650Shselasky u8 capability_id[0x8]; 9074290650Shselasky 9075290650Shselasky u8 status[0x3]; 9076290650Shselasky u8 reserved_0[0xd]; 9077290650Shselasky u8 space[0x10]; 9078290650Shselasky 9079290650Shselasky u8 counter[0x20]; 9080290650Shselasky 9081290650Shselasky u8 semaphore[0x20]; 9082290650Shselasky 9083290650Shselasky u8 flag[0x1]; 9084290650Shselasky u8 reserved_1[0x1]; 9085290650Shselasky u8 address[0x1e]; 9086290650Shselasky 9087290650Shselasky u8 data[0x20]; 9088290650Shselasky}; 9089290650Shselasky 9090290650Shselaskyenum { 9091290650Shselasky MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0, 9092290650Shselasky MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1, 9093290650Shselasky MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2, 9094290650Shselasky}; 9095290650Shselasky 9096290650Shselaskyenum { 9097290650Shselasky MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0, 9098290650Shselasky MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1, 9099290650Shselasky MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2, 9100290650Shselasky}; 9101290650Shselasky 9102290650Shselaskyenum { 9103290650Shselasky MLX5_HEALTH_SYNDR_FW_ERR = 0x1, 9104290650Shselasky MLX5_HEALTH_SYNDR_IRISC_ERR = 0x7, 9105290650Shselasky MLX5_HEALTH_SYNDR_HW_UNRECOVERABLE_ERR = 0x8, 9106290650Shselasky MLX5_HEALTH_SYNDR_CRC_ERR = 0x9, 9107290650Shselasky MLX5_HEALTH_SYNDR_FETCH_PCI_ERR = 0xa, 9108290650Shselasky MLX5_HEALTH_SYNDR_HW_FTL_ERR = 0xb, 9109290650Shselasky MLX5_HEALTH_SYNDR_ASYNC_EQ_OVERRUN_ERR = 0xc, 9110290650Shselasky MLX5_HEALTH_SYNDR_EQ_ERR = 0xd, 9111290650Shselasky MLX5_HEALTH_SYNDR_EQ_INV = 0xe, 9112290650Shselasky MLX5_HEALTH_SYNDR_FFSER_ERR = 0xf, 9113290650Shselasky MLX5_HEALTH_SYNDR_HIGH_TEMP = 0x10, 9114290650Shselasky}; 9115290650Shselasky 9116290650Shselaskystruct mlx5_ifc_initial_seg_bits { 9117290650Shselasky u8 fw_rev_minor[0x10]; 9118290650Shselasky u8 fw_rev_major[0x10]; 9119290650Shselasky 9120290650Shselasky u8 cmd_interface_rev[0x10]; 9121290650Shselasky u8 fw_rev_subminor[0x10]; 9122290650Shselasky 9123290650Shselasky u8 reserved_0[0x40]; 9124290650Shselasky 9125290650Shselasky u8 cmdq_phy_addr_63_32[0x20]; 9126290650Shselasky 9127290650Shselasky u8 cmdq_phy_addr_31_12[0x14]; 9128290650Shselasky u8 reserved_1[0x2]; 9129290650Shselasky u8 nic_interface[0x2]; 9130290650Shselasky u8 log_cmdq_size[0x4]; 9131290650Shselasky u8 log_cmdq_stride[0x4]; 9132290650Shselasky 9133290650Shselasky u8 command_doorbell_vector[0x20]; 9134290650Shselasky 9135290650Shselasky u8 reserved_2[0xf00]; 9136290650Shselasky 9137290650Shselasky u8 initializing[0x1]; 9138290650Shselasky u8 reserved_3[0x4]; 9139290650Shselasky u8 nic_interface_supported[0x3]; 9140290650Shselasky u8 reserved_4[0x18]; 9141290650Shselasky 9142290650Shselasky struct mlx5_ifc_health_buffer_bits health_buffer; 9143290650Shselasky 9144290650Shselasky u8 no_dram_nic_offset[0x20]; 9145290650Shselasky 9146290650Shselasky u8 reserved_5[0x6de0]; 9147290650Shselasky 9148290650Shselasky u8 internal_timer_h[0x20]; 9149290650Shselasky 9150290650Shselasky u8 internal_timer_l[0x20]; 9151290650Shselasky 9152290650Shselasky u8 reserved_6[0x20]; 9153290650Shselasky 9154290650Shselasky u8 reserved_7[0x1f]; 9155290650Shselasky u8 clear_int[0x1]; 9156290650Shselasky 9157290650Shselasky u8 health_syndrome[0x8]; 9158290650Shselasky u8 health_counter[0x18]; 9159290650Shselasky 9160290650Shselasky u8 reserved_8[0x17fc0]; 9161290650Shselasky}; 9162290650Shselasky 9163290650Shselaskyunion mlx5_ifc_icmd_interface_document_bits { 9164290650Shselasky struct mlx5_ifc_fw_version_bits fw_version; 9165290650Shselasky struct mlx5_ifc_icmd_access_reg_in_bits icmd_access_reg_in; 9166290650Shselasky struct mlx5_ifc_icmd_access_reg_out_bits icmd_access_reg_out; 9167290650Shselasky struct mlx5_ifc_icmd_init_ocsd_in_bits icmd_init_ocsd_in; 9168290650Shselasky struct mlx5_ifc_icmd_ocbb_init_in_bits icmd_ocbb_init_in; 9169290650Shselasky struct mlx5_ifc_icmd_ocbb_query_etoc_stats_out_bits icmd_ocbb_query_etoc_stats_out; 9170290650Shselasky struct mlx5_ifc_icmd_ocbb_query_header_stats_out_bits icmd_ocbb_query_header_stats_out; 9171290650Shselasky struct mlx5_ifc_icmd_query_cap_general_bits icmd_query_cap_general; 9172290650Shselasky struct mlx5_ifc_icmd_query_cap_in_bits icmd_query_cap_in; 9173290650Shselasky struct mlx5_ifc_icmd_query_fw_info_out_bits icmd_query_fw_info_out; 9174290650Shselasky struct mlx5_ifc_icmd_query_virtual_mac_out_bits icmd_query_virtual_mac_out; 9175290650Shselasky struct mlx5_ifc_icmd_set_virtual_mac_in_bits icmd_set_virtual_mac_in; 9176290650Shselasky struct mlx5_ifc_icmd_set_wol_rol_in_bits icmd_set_wol_rol_in; 9177290650Shselasky struct mlx5_ifc_icmd_set_wol_rol_out_bits icmd_set_wol_rol_out; 9178290650Shselasky u8 reserved_0[0x42c0]; 9179290650Shselasky}; 9180290650Shselasky 9181290650Shselaskyunion mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits { 9182290650Shselasky struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout; 9183290650Shselasky struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout; 9184290650Shselasky struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout; 9185290650Shselasky struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout; 9186290650Shselasky struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout; 9187308678Shselasky struct mlx5_ifc_eth_discard_cntrs_grp_bits eth_discard_cntrs_grp; 9188290650Shselasky struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout; 9189290650Shselasky struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs; 9190308678Shselasky struct mlx5_ifc_infiniband_port_cntrs_bits infiniband_port_cntrs; 9191290650Shselasky u8 reserved_0[0x7c0]; 9192290650Shselasky}; 9193290650Shselasky 9194290650Shselaskystruct mlx5_ifc_ppcnt_reg_bits { 9195290650Shselasky u8 swid[0x8]; 9196290650Shselasky u8 local_port[0x8]; 9197290650Shselasky u8 pnat[0x2]; 9198290650Shselasky u8 reserved_0[0x8]; 9199290650Shselasky u8 grp[0x6]; 9200290650Shselasky 9201290650Shselasky u8 clr[0x1]; 9202290650Shselasky u8 reserved_1[0x1c]; 9203290650Shselasky u8 prio_tc[0x3]; 9204290650Shselasky 9205290650Shselasky union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set; 9206290650Shselasky}; 9207290650Shselasky 9208306233Shselaskystruct mlx5_ifc_pcie_performance_counters_data_layout_bits { 9209306233Shselasky u8 life_time_counter_high[0x20]; 9210306233Shselasky 9211306233Shselasky u8 life_time_counter_low[0x20]; 9212306233Shselasky 9213306233Shselasky u8 rx_errors[0x20]; 9214306233Shselasky 9215306233Shselasky u8 tx_errors[0x20]; 9216306233Shselasky 9217306233Shselasky u8 l0_to_recovery_eieos[0x20]; 9218306233Shselasky 9219306233Shselasky u8 l0_to_recovery_ts[0x20]; 9220306233Shselasky 9221306233Shselasky u8 l0_to_recovery_framing[0x20]; 9222306233Shselasky 9223306233Shselasky u8 l0_to_recovery_retrain[0x20]; 9224306233Shselasky 9225306233Shselasky u8 crc_error_dllp[0x20]; 9226306233Shselasky 9227306233Shselasky u8 crc_error_tlp[0x20]; 9228306233Shselasky 9229306233Shselasky u8 reserved_0[0x680]; 9230306233Shselasky}; 9231306233Shselasky 9232306233Shselaskystruct mlx5_ifc_pcie_timers_and_states_data_layout_bits { 9233306233Shselasky u8 life_time_counter_high[0x20]; 9234306233Shselasky 9235306233Shselasky u8 life_time_counter_low[0x20]; 9236306233Shselasky 9237306233Shselasky u8 time_to_boot_image_start[0x20]; 9238306233Shselasky 9239306233Shselasky u8 time_to_link_image[0x20]; 9240306233Shselasky 9241306233Shselasky u8 calibration_time[0x20]; 9242306233Shselasky 9243306233Shselasky u8 time_to_first_perst[0x20]; 9244306233Shselasky 9245306233Shselasky u8 time_to_detect_state[0x20]; 9246306233Shselasky 9247306233Shselasky u8 time_to_l0[0x20]; 9248306233Shselasky 9249306233Shselasky u8 time_to_crs_en[0x20]; 9250306233Shselasky 9251306233Shselasky u8 time_to_plastic_image_start[0x20]; 9252306233Shselasky 9253306233Shselasky u8 time_to_iron_image_start[0x20]; 9254306233Shselasky 9255306233Shselasky u8 perst_handler[0x20]; 9256306233Shselasky 9257306233Shselasky u8 times_in_l1[0x20]; 9258306233Shselasky 9259306233Shselasky u8 times_in_l23[0x20]; 9260306233Shselasky 9261306233Shselasky u8 dl_down[0x20]; 9262306233Shselasky 9263306233Shselasky u8 config_cycle1usec[0x20]; 9264306233Shselasky 9265306233Shselasky u8 config_cycle2to7usec[0x20]; 9266306233Shselasky 9267306233Shselasky u8 config_cycle8to15usec[0x20]; 9268306233Shselasky 9269306233Shselasky u8 config_cycle16to63usec[0x20]; 9270306233Shselasky 9271306233Shselasky u8 config_cycle64usec[0x20]; 9272306233Shselasky 9273306233Shselasky u8 correctable_err_msg_sent[0x20]; 9274306233Shselasky 9275306233Shselasky u8 non_fatal_err_msg_sent[0x20]; 9276306233Shselasky 9277306233Shselasky u8 fatal_err_msg_sent[0x20]; 9278306233Shselasky 9279306233Shselasky u8 reserved_0[0x4e0]; 9280306233Shselasky}; 9281306233Shselasky 9282306233Shselaskystruct mlx5_ifc_pcie_lanes_counters_data_layout_bits { 9283306233Shselasky u8 life_time_counter_high[0x20]; 9284306233Shselasky 9285306233Shselasky u8 life_time_counter_low[0x20]; 9286306233Shselasky 9287306233Shselasky u8 error_counter_lane0[0x20]; 9288306233Shselasky 9289306233Shselasky u8 error_counter_lane1[0x20]; 9290306233Shselasky 9291306233Shselasky u8 error_counter_lane2[0x20]; 9292306233Shselasky 9293306233Shselasky u8 error_counter_lane3[0x20]; 9294306233Shselasky 9295306233Shselasky u8 error_counter_lane4[0x20]; 9296306233Shselasky 9297306233Shselasky u8 error_counter_lane5[0x20]; 9298306233Shselasky 9299306233Shselasky u8 error_counter_lane6[0x20]; 9300306233Shselasky 9301306233Shselasky u8 error_counter_lane7[0x20]; 9302306233Shselasky 9303306233Shselasky u8 error_counter_lane8[0x20]; 9304306233Shselasky 9305306233Shselasky u8 error_counter_lane9[0x20]; 9306306233Shselasky 9307306233Shselasky u8 error_counter_lane10[0x20]; 9308306233Shselasky 9309306233Shselasky u8 error_counter_lane11[0x20]; 9310306233Shselasky 9311306233Shselasky u8 error_counter_lane12[0x20]; 9312306233Shselasky 9313306233Shselasky u8 error_counter_lane13[0x20]; 9314306233Shselasky 9315306233Shselasky u8 error_counter_lane14[0x20]; 9316306233Shselasky 9317306233Shselasky u8 error_counter_lane15[0x20]; 9318306233Shselasky 9319306233Shselasky u8 reserved_0[0x580]; 9320306233Shselasky}; 9321306233Shselasky 9322306233Shselaskyunion mlx5_ifc_mpcnt_cntrs_grp_data_layout_bits { 9323306233Shselasky struct mlx5_ifc_pcie_performance_counters_data_layout_bits pcie_performance_counters_data_layout; 9324306233Shselasky struct mlx5_ifc_pcie_timers_and_states_data_layout_bits pcie_timers_and_states_data_layout; 9325306233Shselasky struct mlx5_ifc_pcie_lanes_counters_data_layout_bits pcie_lanes_counters_data_layout; 9326306233Shselasky u8 reserved_0[0xf8]; 9327306233Shselasky}; 9328306233Shselasky 9329306233Shselaskystruct mlx5_ifc_mpcnt_reg_bits { 9330306233Shselasky u8 reserved_0[0x8]; 9331306233Shselasky u8 pcie_index[0x8]; 9332306233Shselasky u8 reserved_1[0xa]; 9333306233Shselasky u8 grp[0x6]; 9334306233Shselasky 9335306233Shselasky u8 clr[0x1]; 9336306233Shselasky u8 reserved_2[0x1f]; 9337306233Shselasky 9338306233Shselasky union mlx5_ifc_mpcnt_cntrs_grp_data_layout_bits counter_set; 9339306233Shselasky}; 9340306233Shselasky 9341290650Shselaskyunion mlx5_ifc_ports_control_registers_document_bits { 9342290650Shselasky struct mlx5_ifc_ib_portcntrs_attribute_grp_data_bits ib_portcntrs_attribute_grp_data; 9343290650Shselasky struct mlx5_ifc_bufferx_reg_bits bufferx_reg; 9344290650Shselasky struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout; 9345290650Shselasky struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout; 9346290650Shselasky struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout; 9347290650Shselasky struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout; 9348308678Shselasky struct mlx5_ifc_eth_discard_cntrs_grp_bits eth_discard_cntrs_grp; 9349290650Shselasky struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout; 9350290650Shselasky struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout; 9351290650Shselasky struct mlx5_ifc_eth_per_traffic_class_cong_layout_bits eth_per_traffic_class_cong_layout; 9352290650Shselasky struct mlx5_ifc_eth_per_traffic_class_layout_bits eth_per_traffic_class_layout; 9353290650Shselasky struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping; 9354290650Shselasky struct mlx5_ifc_link_level_retrans_cntr_grp_date_bits link_level_retrans_cntr_grp_date; 9355290650Shselasky struct mlx5_ifc_pamp_reg_bits pamp_reg; 9356290650Shselasky struct mlx5_ifc_paos_reg_bits paos_reg; 9357290650Shselasky struct mlx5_ifc_pbmc_reg_bits pbmc_reg; 9358290650Shselasky struct mlx5_ifc_pcap_reg_bits pcap_reg; 9359290650Shselasky struct mlx5_ifc_peir_reg_bits peir_reg; 9360290650Shselasky struct mlx5_ifc_pelc_reg_bits pelc_reg; 9361290650Shselasky struct mlx5_ifc_pfcc_reg_bits pfcc_reg; 9362290650Shselasky struct mlx5_ifc_phbr_binding_reg_bits phbr_binding_reg; 9363290650Shselasky struct mlx5_ifc_phbr_for_port_tclass_reg_bits phbr_for_port_tclass_reg; 9364290650Shselasky struct mlx5_ifc_phbr_for_prio_reg_bits phbr_for_prio_reg; 9365290650Shselasky struct mlx5_ifc_phrr_reg_bits phrr_reg; 9366290650Shselasky struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs; 9367290650Shselasky struct mlx5_ifc_pifr_reg_bits pifr_reg; 9368290650Shselasky struct mlx5_ifc_pipg_reg_bits pipg_reg; 9369290650Shselasky struct mlx5_ifc_plbf_reg_bits plbf_reg; 9370290650Shselasky struct mlx5_ifc_plib_reg_bits plib_reg; 9371290650Shselasky struct mlx5_ifc_pll_status_data_bits pll_status_data; 9372290650Shselasky struct mlx5_ifc_plpc_reg_bits plpc_reg; 9373290650Shselasky struct mlx5_ifc_pmaos_reg_bits pmaos_reg; 9374290650Shselasky struct mlx5_ifc_pmlp_reg_bits pmlp_reg; 9375290650Shselasky struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg; 9376290650Shselasky struct mlx5_ifc_pmpc_reg_bits pmpc_reg; 9377290650Shselasky struct mlx5_ifc_pmpe_reg_bits pmpe_reg; 9378290650Shselasky struct mlx5_ifc_pmpr_reg_bits pmpr_reg; 9379290650Shselasky struct mlx5_ifc_pmtu_reg_bits pmtu_reg; 9380290650Shselasky struct mlx5_ifc_ppad_reg_bits ppad_reg; 9381290650Shselasky struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg; 9382290650Shselasky struct mlx5_ifc_ppll_reg_bits ppll_reg; 9383290650Shselasky struct mlx5_ifc_pplm_reg_bits pplm_reg; 9384290650Shselasky struct mlx5_ifc_pplr_reg_bits pplr_reg; 9385290650Shselasky struct mlx5_ifc_ppsc_reg_bits ppsc_reg; 9386290650Shselasky struct mlx5_ifc_pspa_reg_bits pspa_reg; 9387290650Shselasky struct mlx5_ifc_ptas_reg_bits ptas_reg; 9388290650Shselasky struct mlx5_ifc_ptys_reg_bits ptys_reg; 9389290650Shselasky struct mlx5_ifc_pude_reg_bits pude_reg; 9390290650Shselasky struct mlx5_ifc_pvlc_reg_bits pvlc_reg; 9391290650Shselasky struct mlx5_ifc_slrg_reg_bits slrg_reg; 9392290650Shselasky struct mlx5_ifc_slrp_reg_bits slrp_reg; 9393290650Shselasky struct mlx5_ifc_sltp_reg_bits sltp_reg; 9394290650Shselasky u8 reserved_0[0x7880]; 9395290650Shselasky}; 9396290650Shselasky 9397290650Shselaskyunion mlx5_ifc_debug_enhancements_document_bits { 9398290650Shselasky struct mlx5_ifc_health_buffer_bits health_buffer; 9399290650Shselasky u8 reserved_0[0x200]; 9400290650Shselasky}; 9401290650Shselasky 9402290650Shselaskyunion mlx5_ifc_no_dram_nic_document_bits { 9403290650Shselasky struct mlx5_ifc_nodnic_config_reg_bits nodnic_config_reg; 9404290650Shselasky struct mlx5_ifc_nodnic_cq_arming_word_bits nodnic_cq_arming_word; 9405290650Shselasky struct mlx5_ifc_nodnic_event_word_bits nodnic_event_word; 9406290650Shselasky struct mlx5_ifc_nodnic_gid_filters_bits nodnic_gid_filters; 9407290650Shselasky struct mlx5_ifc_nodnic_mac_filters_bits nodnic_mac_filters; 9408290650Shselasky struct mlx5_ifc_nodnic_port_config_reg_bits nodnic_port_config_reg; 9409290650Shselasky struct mlx5_ifc_nodnic_ring_config_reg_bits nodnic_ring_config_reg; 9410290650Shselasky struct mlx5_ifc_nodnic_ring_doorbell_bits nodnic_ring_doorbell; 9411290650Shselasky u8 reserved_0[0x3160]; 9412290650Shselasky}; 9413290650Shselasky 9414290650Shselaskyunion mlx5_ifc_uplink_pci_interface_document_bits { 9415290650Shselasky struct mlx5_ifc_initial_seg_bits initial_seg; 9416290650Shselasky struct mlx5_ifc_vendor_specific_cap_bits vendor_specific_cap; 9417290650Shselasky u8 reserved_0[0x20120]; 9418290650Shselasky}; 9419290650Shselasky 9420290650Shselasky 9421290650Shselasky#endif /* MLX5_IFC_H */ 9422