mlx5_main.c revision 353199
1290650Shselasky/*- 2347819Shselasky * Copyright (c) 2013-2019, Mellanox Technologies, Ltd. All rights reserved. 3290650Shselasky * 4290650Shselasky * Redistribution and use in source and binary forms, with or without 5290650Shselasky * modification, are permitted provided that the following conditions 6290650Shselasky * are met: 7290650Shselasky * 1. Redistributions of source code must retain the above copyright 8290650Shselasky * notice, this list of conditions and the following disclaimer. 9290650Shselasky * 2. Redistributions in binary form must reproduce the above copyright 10290650Shselasky * notice, this list of conditions and the following disclaimer in the 11290650Shselasky * documentation and/or other materials provided with the distribution. 12290650Shselasky * 13290650Shselasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14290650Shselasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15290650Shselasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16290650Shselasky * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17290650Shselasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18290650Shselasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19290650Shselasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20290650Shselasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21290650Shselasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22290650Shselasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23290650Shselasky * SUCH DAMAGE. 24290650Shselasky * 25290650Shselasky * $FreeBSD: stable/11/sys/dev/mlx5/mlx5_core/mlx5_main.c 353199 2019-10-07 08:49:32Z hselasky $ 26290650Shselasky */ 27290650Shselasky 28290650Shselasky#include <linux/kmod.h> 29290650Shselasky#include <linux/module.h> 30290650Shselasky#include <linux/errno.h> 31290650Shselasky#include <linux/pci.h> 32290650Shselasky#include <linux/dma-mapping.h> 33290650Shselasky#include <linux/slab.h> 34290650Shselasky#include <linux/io-mapping.h> 35290650Shselasky#include <linux/interrupt.h> 36347802Shselasky#include <linux/hardirq.h> 37290650Shselasky#include <dev/mlx5/driver.h> 38290650Shselasky#include <dev/mlx5/cq.h> 39290650Shselasky#include <dev/mlx5/qp.h> 40290650Shselasky#include <dev/mlx5/srq.h> 41353197Shselasky#include <dev/mlx5/mpfs.h> 42290650Shselasky#include <linux/delay.h> 43290650Shselasky#include <dev/mlx5/mlx5_ifc.h> 44341958Shselasky#include <dev/mlx5/mlx5_fpga/core.h> 45341958Shselasky#include <dev/mlx5/mlx5_lib/mlx5.h> 46290650Shselasky#include "mlx5_core.h" 47329200Shselasky#include "fs_core.h" 48290650Shselasky 49341948Shselaskystatic const char mlx5_version[] = "Mellanox Core driver " 50341948Shselasky DRIVER_VERSION " (" DRIVER_RELDATE ")"; 51290650ShselaskyMODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); 52290650ShselaskyMODULE_DESCRIPTION("Mellanox Connect-IB, ConnectX-4 core driver"); 53290650ShselaskyMODULE_LICENSE("Dual BSD/GPL"); 54290650ShselaskyMODULE_DEPEND(mlx5, linuxkpi, 1, 1, 1); 55347839ShselaskyMODULE_DEPEND(mlx5, mlxfw, 1, 1, 1); 56347847ShselaskyMODULE_DEPEND(mlx5, firmware, 1, 1, 1); 57290650ShselaskyMODULE_VERSION(mlx5, 1); 58290650Shselasky 59347835ShselaskySYSCTL_NODE(_hw, OID_AUTO, mlx5, CTLFLAG_RW, 0, "mlx5 hardware controls"); 60347835Shselasky 61290650Shselaskyint mlx5_core_debug_mask; 62347835ShselaskySYSCTL_INT(_hw_mlx5, OID_AUTO, debug_mask, CTLFLAG_RWTUN, 63347835Shselasky &mlx5_core_debug_mask, 0, 64347835Shselasky "debug mask: 1 = dump cmd data, 2 = dump cmd exec time, 3 = both. Default=0"); 65290650Shselasky 66290650Shselasky#define MLX5_DEFAULT_PROF 2 67347835Shselaskystatic int mlx5_prof_sel = MLX5_DEFAULT_PROF; 68347835ShselaskySYSCTL_INT(_hw_mlx5, OID_AUTO, prof_sel, CTLFLAG_RWTUN, 69347835Shselasky &mlx5_prof_sel, 0, 70347835Shselasky "profile selector. Valid range 0 - 2"); 71290650Shselasky 72347819Shselaskystatic int mlx5_fast_unload_enabled = 1; 73347819ShselaskySYSCTL_INT(_hw_mlx5, OID_AUTO, fast_unload_enabled, CTLFLAG_RWTUN, 74347819Shselasky &mlx5_fast_unload_enabled, 0, 75347819Shselasky "Set to enable fast unload. Clear to disable."); 76347819Shselasky 77290650Shselasky#define NUMA_NO_NODE -1 78290650Shselasky 79290650Shselaskystatic LIST_HEAD(intf_list); 80290650Shselaskystatic LIST_HEAD(dev_list); 81290650Shselaskystatic DEFINE_MUTEX(intf_mutex); 82290650Shselasky 83290650Shselaskystruct mlx5_device_context { 84290650Shselasky struct list_head list; 85290650Shselasky struct mlx5_interface *intf; 86290650Shselasky void *context; 87290650Shselasky}; 88290650Shselasky 89329209Shselaskyenum { 90329209Shselasky MLX5_ATOMIC_REQ_MODE_BE = 0x0, 91329209Shselasky MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS = 0x1, 92329209Shselasky}; 93329209Shselasky 94290650Shselaskystatic struct mlx5_profile profiles[] = { 95290650Shselasky [0] = { 96290650Shselasky .mask = 0, 97290650Shselasky }, 98290650Shselasky [1] = { 99290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE, 100290650Shselasky .log_max_qp = 12, 101290650Shselasky }, 102290650Shselasky [2] = { 103290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE | 104290650Shselasky MLX5_PROF_MASK_MR_CACHE, 105290650Shselasky .log_max_qp = 17, 106290650Shselasky .mr_cache[0] = { 107290650Shselasky .size = 500, 108290650Shselasky .limit = 250 109290650Shselasky }, 110290650Shselasky .mr_cache[1] = { 111290650Shselasky .size = 500, 112290650Shselasky .limit = 250 113290650Shselasky }, 114290650Shselasky .mr_cache[2] = { 115290650Shselasky .size = 500, 116290650Shselasky .limit = 250 117290650Shselasky }, 118290650Shselasky .mr_cache[3] = { 119290650Shselasky .size = 500, 120290650Shselasky .limit = 250 121290650Shselasky }, 122290650Shselasky .mr_cache[4] = { 123290650Shselasky .size = 500, 124290650Shselasky .limit = 250 125290650Shselasky }, 126290650Shselasky .mr_cache[5] = { 127290650Shselasky .size = 500, 128290650Shselasky .limit = 250 129290650Shselasky }, 130290650Shselasky .mr_cache[6] = { 131290650Shselasky .size = 500, 132290650Shselasky .limit = 250 133290650Shselasky }, 134290650Shselasky .mr_cache[7] = { 135290650Shselasky .size = 500, 136290650Shselasky .limit = 250 137290650Shselasky }, 138290650Shselasky .mr_cache[8] = { 139290650Shselasky .size = 500, 140290650Shselasky .limit = 250 141290650Shselasky }, 142290650Shselasky .mr_cache[9] = { 143290650Shselasky .size = 500, 144290650Shselasky .limit = 250 145290650Shselasky }, 146290650Shselasky .mr_cache[10] = { 147290650Shselasky .size = 500, 148290650Shselasky .limit = 250 149290650Shselasky }, 150290650Shselasky .mr_cache[11] = { 151290650Shselasky .size = 500, 152290650Shselasky .limit = 250 153290650Shselasky }, 154290650Shselasky .mr_cache[12] = { 155290650Shselasky .size = 64, 156290650Shselasky .limit = 32 157290650Shselasky }, 158290650Shselasky .mr_cache[13] = { 159290650Shselasky .size = 32, 160290650Shselasky .limit = 16 161290650Shselasky }, 162290650Shselasky .mr_cache[14] = { 163290650Shselasky .size = 16, 164290650Shselasky .limit = 8 165290650Shselasky }, 166290650Shselasky }, 167290650Shselasky [3] = { 168290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE, 169290650Shselasky .log_max_qp = 17, 170290650Shselasky }, 171290650Shselasky}; 172290650Shselasky 173290650Shselaskystatic int set_dma_caps(struct pci_dev *pdev) 174290650Shselasky{ 175290650Shselasky int err; 176290650Shselasky 177290650Shselasky err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 178290650Shselasky if (err) { 179290650Shselasky device_printf((&pdev->dev)->bsddev, "WARN: ""Warning: couldn't set 64-bit PCI DMA mask\n"); 180290650Shselasky err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 181290650Shselasky if (err) { 182290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Can't set PCI DMA mask, aborting\n"); 183290650Shselasky return err; 184290650Shselasky } 185290650Shselasky } 186290650Shselasky 187290650Shselasky err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 188290650Shselasky if (err) { 189290650Shselasky device_printf((&pdev->dev)->bsddev, "WARN: ""Warning: couldn't set 64-bit consistent PCI DMA mask\n"); 190290650Shselasky err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 191290650Shselasky if (err) { 192290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Can't set consistent PCI DMA mask, aborting\n"); 193290650Shselasky return err; 194290650Shselasky } 195290650Shselasky } 196290650Shselasky 197290650Shselasky dma_set_max_seg_size(&pdev->dev, 2u * 1024 * 1024 * 1024); 198290650Shselasky return err; 199290650Shselasky} 200290650Shselasky 201347862Shselaskyint mlx5_pci_read_power_status(struct mlx5_core_dev *dev, 202347862Shselasky u16 *p_power, u8 *p_status) 203347862Shselasky{ 204347862Shselasky u32 in[MLX5_ST_SZ_DW(mpein_reg)] = {}; 205347862Shselasky u32 out[MLX5_ST_SZ_DW(mpein_reg)] = {}; 206347862Shselasky int err; 207347862Shselasky 208347862Shselasky err = mlx5_core_access_reg(dev, in, sizeof(in), out, sizeof(out), 209347862Shselasky MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MPEIN, 0, 0); 210347862Shselasky 211347862Shselasky *p_status = MLX5_GET(mpein_reg, out, pwr_status); 212347862Shselasky *p_power = MLX5_GET(mpein_reg, out, pci_power); 213347862Shselasky return err; 214347862Shselasky} 215347862Shselasky 216331580Shselaskystatic int mlx5_pci_enable_device(struct mlx5_core_dev *dev) 217331580Shselasky{ 218331580Shselasky struct pci_dev *pdev = dev->pdev; 219331580Shselasky int err = 0; 220331580Shselasky 221331580Shselasky mutex_lock(&dev->pci_status_mutex); 222331580Shselasky if (dev->pci_status == MLX5_PCI_STATUS_DISABLED) { 223331580Shselasky err = pci_enable_device(pdev); 224331580Shselasky if (!err) 225331580Shselasky dev->pci_status = MLX5_PCI_STATUS_ENABLED; 226331580Shselasky } 227331580Shselasky mutex_unlock(&dev->pci_status_mutex); 228331580Shselasky 229331580Shselasky return err; 230331580Shselasky} 231331580Shselasky 232331580Shselaskystatic void mlx5_pci_disable_device(struct mlx5_core_dev *dev) 233331580Shselasky{ 234331580Shselasky struct pci_dev *pdev = dev->pdev; 235331580Shselasky 236331580Shselasky mutex_lock(&dev->pci_status_mutex); 237331580Shselasky if (dev->pci_status == MLX5_PCI_STATUS_ENABLED) { 238331580Shselasky pci_disable_device(pdev); 239331580Shselasky dev->pci_status = MLX5_PCI_STATUS_DISABLED; 240331580Shselasky } 241331580Shselasky mutex_unlock(&dev->pci_status_mutex); 242331580Shselasky} 243331580Shselasky 244290650Shselaskystatic int request_bar(struct pci_dev *pdev) 245290650Shselasky{ 246290650Shselasky int err = 0; 247290650Shselasky 248290650Shselasky if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { 249290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Missing registers BAR, aborting\n"); 250290650Shselasky return -ENODEV; 251290650Shselasky } 252290650Shselasky 253290650Shselasky err = pci_request_regions(pdev, DRIVER_NAME); 254290650Shselasky if (err) 255290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Couldn't get PCI resources, aborting\n"); 256290650Shselasky 257290650Shselasky return err; 258290650Shselasky} 259290650Shselasky 260290650Shselaskystatic void release_bar(struct pci_dev *pdev) 261290650Shselasky{ 262290650Shselasky pci_release_regions(pdev); 263290650Shselasky} 264290650Shselasky 265290650Shselaskystatic int mlx5_enable_msix(struct mlx5_core_dev *dev) 266290650Shselasky{ 267290650Shselasky struct mlx5_priv *priv = &dev->priv; 268290650Shselasky struct mlx5_eq_table *table = &priv->eq_table; 269290650Shselasky int num_eqs = 1 << MLX5_CAP_GEN(dev, log_max_eq); 270338554Shselasky int limit = dev->msix_eqvec; 271337112Shselasky int nvec = MLX5_EQ_VEC_COMP_BASE; 272290650Shselasky int i; 273290650Shselasky 274337112Shselasky if (limit > 0) 275337112Shselasky nvec += limit; 276337112Shselasky else 277337112Shselasky nvec += MLX5_CAP_GEN(dev, num_ports) * num_online_cpus(); 278337112Shselasky 279353189Shselasky if (nvec > num_eqs) 280353189Shselasky nvec = num_eqs; 281353189Shselasky if (nvec > 256) 282353189Shselasky nvec = 256; /* limit of firmware API */ 283290650Shselasky if (nvec <= MLX5_EQ_VEC_COMP_BASE) 284290650Shselasky return -ENOMEM; 285290650Shselasky 286290650Shselasky priv->msix_arr = kzalloc(nvec * sizeof(*priv->msix_arr), GFP_KERNEL); 287290650Shselasky 288290650Shselasky for (i = 0; i < nvec; i++) 289290650Shselasky priv->msix_arr[i].entry = i; 290290650Shselasky 291290650Shselasky nvec = pci_enable_msix_range(dev->pdev, priv->msix_arr, 292290650Shselasky MLX5_EQ_VEC_COMP_BASE + 1, nvec); 293290650Shselasky if (nvec < 0) 294290650Shselasky return nvec; 295290650Shselasky 296290650Shselasky table->num_comp_vectors = nvec - MLX5_EQ_VEC_COMP_BASE; 297290650Shselasky return 0; 298290650Shselasky} 299290650Shselasky 300290650Shselaskystatic void mlx5_disable_msix(struct mlx5_core_dev *dev) 301290650Shselasky{ 302290650Shselasky struct mlx5_priv *priv = &dev->priv; 303290650Shselasky 304290650Shselasky pci_disable_msix(dev->pdev); 305290650Shselasky kfree(priv->msix_arr); 306290650Shselasky} 307290650Shselasky 308290650Shselaskystruct mlx5_reg_host_endianess { 309290650Shselasky u8 he; 310290650Shselasky u8 rsvd[15]; 311290650Shselasky}; 312290650Shselasky 313290650Shselasky 314290650Shselasky#define CAP_MASK(pos, size) ((u64)((1 << (size)) - 1) << (pos)) 315290650Shselasky 316290650Shselaskyenum { 317290650Shselasky MLX5_CAP_BITS_RW_MASK = CAP_MASK(MLX5_CAP_OFF_CMDIF_CSUM, 2) | 318306233Shselasky MLX5_DEV_CAP_FLAG_DCT | 319306233Shselasky MLX5_DEV_CAP_FLAG_DRAIN_SIGERR, 320290650Shselasky}; 321290650Shselasky 322290650Shselaskystatic u16 to_fw_pkey_sz(u32 size) 323290650Shselasky{ 324290650Shselasky switch (size) { 325290650Shselasky case 128: 326290650Shselasky return 0; 327290650Shselasky case 256: 328290650Shselasky return 1; 329290650Shselasky case 512: 330290650Shselasky return 2; 331290650Shselasky case 1024: 332290650Shselasky return 3; 333290650Shselasky case 2048: 334290650Shselasky return 4; 335290650Shselasky case 4096: 336290650Shselasky return 5; 337290650Shselasky default: 338290650Shselasky printf("mlx5_core: WARN: ""invalid pkey table size %d\n", size); 339290650Shselasky return 0; 340290650Shselasky } 341290650Shselasky} 342290650Shselasky 343331807Shselaskystatic int mlx5_core_get_caps_mode(struct mlx5_core_dev *dev, 344331807Shselasky enum mlx5_cap_type cap_type, 345331807Shselasky enum mlx5_cap_mode cap_mode) 346290650Shselasky{ 347290650Shselasky u8 in[MLX5_ST_SZ_BYTES(query_hca_cap_in)]; 348290650Shselasky int out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out); 349290650Shselasky void *out, *hca_caps; 350290650Shselasky u16 opmod = (cap_type << 1) | (cap_mode & 0x01); 351290650Shselasky int err; 352290650Shselasky 353290650Shselasky memset(in, 0, sizeof(in)); 354290650Shselasky out = kzalloc(out_sz, GFP_KERNEL); 355290650Shselasky 356290650Shselasky MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP); 357290650Shselasky MLX5_SET(query_hca_cap_in, in, op_mod, opmod); 358290650Shselasky err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz); 359290650Shselasky if (err) { 360290650Shselasky mlx5_core_warn(dev, 361290650Shselasky "QUERY_HCA_CAP : type(%x) opmode(%x) Failed(%d)\n", 362290650Shselasky cap_type, cap_mode, err); 363290650Shselasky goto query_ex; 364290650Shselasky } 365290650Shselasky 366290650Shselasky hca_caps = MLX5_ADDR_OF(query_hca_cap_out, out, capability); 367290650Shselasky 368290650Shselasky switch (cap_mode) { 369290650Shselasky case HCA_CAP_OPMOD_GET_MAX: 370290650Shselasky memcpy(dev->hca_caps_max[cap_type], hca_caps, 371290650Shselasky MLX5_UN_SZ_BYTES(hca_cap_union)); 372290650Shselasky break; 373290650Shselasky case HCA_CAP_OPMOD_GET_CUR: 374290650Shselasky memcpy(dev->hca_caps_cur[cap_type], hca_caps, 375290650Shselasky MLX5_UN_SZ_BYTES(hca_cap_union)); 376290650Shselasky break; 377290650Shselasky default: 378290650Shselasky mlx5_core_warn(dev, 379290650Shselasky "Tried to query dev cap type(%x) with wrong opmode(%x)\n", 380290650Shselasky cap_type, cap_mode); 381290650Shselasky err = -EINVAL; 382290650Shselasky break; 383290650Shselasky } 384290650Shselaskyquery_ex: 385290650Shselasky kfree(out); 386290650Shselasky return err; 387290650Shselasky} 388290650Shselasky 389331807Shselaskyint mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type) 390331807Shselasky{ 391331807Shselasky int ret; 392331807Shselasky 393331807Shselasky ret = mlx5_core_get_caps_mode(dev, cap_type, HCA_CAP_OPMOD_GET_CUR); 394331807Shselasky if (ret) 395331807Shselasky return ret; 396331807Shselasky 397331807Shselasky return mlx5_core_get_caps_mode(dev, cap_type, HCA_CAP_OPMOD_GET_MAX); 398331807Shselasky} 399331807Shselasky 400290650Shselaskystatic int set_caps(struct mlx5_core_dev *dev, void *in, int in_sz) 401290650Shselasky{ 402331807Shselasky u32 out[MLX5_ST_SZ_DW(set_hca_cap_out)] = {0}; 403290650Shselasky 404290650Shselasky MLX5_SET(set_hca_cap_in, in, opcode, MLX5_CMD_OP_SET_HCA_CAP); 405290650Shselasky 406331807Shselasky return mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out)); 407290650Shselasky} 408290650Shselasky 409290650Shselaskystatic int handle_hca_cap(struct mlx5_core_dev *dev) 410290650Shselasky{ 411290650Shselasky void *set_ctx = NULL; 412290650Shselasky struct mlx5_profile *prof = dev->profile; 413290650Shselasky int err = -ENOMEM; 414290650Shselasky int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in); 415290650Shselasky void *set_hca_cap; 416290650Shselasky 417290650Shselasky set_ctx = kzalloc(set_sz, GFP_KERNEL); 418290650Shselasky 419331807Shselasky err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL); 420290650Shselasky if (err) 421290650Shselasky goto query_ex; 422290650Shselasky 423290650Shselasky set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, 424290650Shselasky capability); 425290650Shselasky memcpy(set_hca_cap, dev->hca_caps_cur[MLX5_CAP_GENERAL], 426290650Shselasky MLX5_ST_SZ_BYTES(cmd_hca_cap)); 427290650Shselasky 428290650Shselasky mlx5_core_dbg(dev, "Current Pkey table size %d Setting new size %d\n", 429290650Shselasky mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size)), 430290650Shselasky 128); 431290650Shselasky /* we limit the size of the pkey table to 128 entries for now */ 432290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, pkey_table_size, 433290650Shselasky to_fw_pkey_sz(128)); 434290650Shselasky 435290650Shselasky if (prof->mask & MLX5_PROF_MASK_QP_SIZE) 436290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, log_max_qp, 437290650Shselasky prof->log_max_qp); 438290650Shselasky 439290650Shselasky /* disable cmdif checksum */ 440290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, cmdif_checksum, 0); 441290650Shselasky 442306233Shselasky /* enable drain sigerr */ 443306233Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, drain_sigerr, 1); 444306233Shselasky 445290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, log_uar_page_sz, PAGE_SHIFT - 12); 446290650Shselasky 447290650Shselasky err = set_caps(dev, set_ctx, set_sz); 448290650Shselasky 449290650Shselaskyquery_ex: 450290650Shselasky kfree(set_ctx); 451290650Shselasky return err; 452290650Shselasky} 453290650Shselasky 454329209Shselaskystatic int handle_hca_cap_atomic(struct mlx5_core_dev *dev) 455329209Shselasky{ 456329209Shselasky void *set_ctx; 457329209Shselasky void *set_hca_cap; 458329209Shselasky int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in); 459329209Shselasky int req_endianness; 460329209Shselasky int err; 461329209Shselasky 462329209Shselasky if (MLX5_CAP_GEN(dev, atomic)) { 463331807Shselasky err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC); 464329209Shselasky if (err) 465329209Shselasky return err; 466329209Shselasky } else { 467329209Shselasky return 0; 468329209Shselasky } 469329209Shselasky 470329209Shselasky req_endianness = 471329209Shselasky MLX5_CAP_ATOMIC(dev, 472329209Shselasky supported_atomic_req_8B_endianess_mode_1); 473329209Shselasky 474329209Shselasky if (req_endianness != MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS) 475329209Shselasky return 0; 476329209Shselasky 477329209Shselasky set_ctx = kzalloc(set_sz, GFP_KERNEL); 478329209Shselasky if (!set_ctx) 479329209Shselasky return -ENOMEM; 480329209Shselasky 481329209Shselasky MLX5_SET(set_hca_cap_in, set_ctx, op_mod, 482329209Shselasky MLX5_SET_HCA_CAP_OP_MOD_ATOMIC << 1); 483329209Shselasky set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability); 484329209Shselasky 485329209Shselasky /* Set requestor to host endianness */ 486329209Shselasky MLX5_SET(atomic_caps, set_hca_cap, atomic_req_8B_endianess_mode, 487329209Shselasky MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS); 488329209Shselasky 489329209Shselasky err = set_caps(dev, set_ctx, set_sz); 490329209Shselasky 491329209Shselasky kfree(set_ctx); 492329209Shselasky return err; 493329209Shselasky} 494329209Shselasky 495290650Shselaskystatic int set_hca_ctrl(struct mlx5_core_dev *dev) 496290650Shselasky{ 497290650Shselasky struct mlx5_reg_host_endianess he_in; 498290650Shselasky struct mlx5_reg_host_endianess he_out; 499290650Shselasky int err; 500290650Shselasky 501306233Shselasky if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH && 502306233Shselasky !MLX5_CAP_GEN(dev, roce)) 503306233Shselasky return 0; 504306233Shselasky 505290650Shselasky memset(&he_in, 0, sizeof(he_in)); 506290650Shselasky he_in.he = MLX5_SET_HOST_ENDIANNESS; 507290650Shselasky err = mlx5_core_access_reg(dev, &he_in, sizeof(he_in), 508290650Shselasky &he_out, sizeof(he_out), 509290650Shselasky MLX5_REG_HOST_ENDIANNESS, 0, 1); 510290650Shselasky return err; 511290650Shselasky} 512290650Shselasky 513290650Shselaskystatic int mlx5_core_enable_hca(struct mlx5_core_dev *dev) 514290650Shselasky{ 515331807Shselasky u32 out[MLX5_ST_SZ_DW(enable_hca_out)] = {0}; 516331807Shselasky u32 in[MLX5_ST_SZ_DW(enable_hca_in)] = {0}; 517290650Shselasky 518290650Shselasky MLX5_SET(enable_hca_in, in, opcode, MLX5_CMD_OP_ENABLE_HCA); 519331807Shselasky return mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out)); 520290650Shselasky} 521290650Shselasky 522290650Shselaskystatic int mlx5_core_disable_hca(struct mlx5_core_dev *dev) 523290650Shselasky{ 524331807Shselasky u32 out[MLX5_ST_SZ_DW(disable_hca_out)] = {0}; 525331807Shselasky u32 in[MLX5_ST_SZ_DW(disable_hca_in)] = {0}; 526290650Shselasky 527290650Shselasky MLX5_SET(disable_hca_in, in, opcode, MLX5_CMD_OP_DISABLE_HCA); 528331807Shselasky return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); 529290650Shselasky} 530290650Shselasky 531290650Shselaskystatic int mlx5_core_set_issi(struct mlx5_core_dev *dev) 532290650Shselasky{ 533331807Shselasky u32 query_in[MLX5_ST_SZ_DW(query_issi_in)] = {0}; 534331807Shselasky u32 query_out[MLX5_ST_SZ_DW(query_issi_out)] = {0}; 535331807Shselasky u32 sup_issi; 536290650Shselasky int err; 537290650Shselasky 538290650Shselasky MLX5_SET(query_issi_in, query_in, opcode, MLX5_CMD_OP_QUERY_ISSI); 539290650Shselasky 540331807Shselasky err = mlx5_cmd_exec(dev, query_in, sizeof(query_in), query_out, sizeof(query_out)); 541290650Shselasky if (err) { 542331807Shselasky u32 syndrome; 543331807Shselasky u8 status; 544331807Shselasky 545331807Shselasky mlx5_cmd_mbox_status(query_out, &status, &syndrome); 546331807Shselasky if (status == MLX5_CMD_STAT_BAD_OP_ERR) { 547290650Shselasky pr_debug("Only ISSI 0 is supported\n"); 548290650Shselasky return 0; 549290650Shselasky } 550290650Shselasky 551290650Shselasky printf("mlx5_core: ERR: ""failed to query ISSI\n"); 552290650Shselasky return err; 553290650Shselasky } 554290650Shselasky 555290650Shselasky sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0); 556290650Shselasky 557290650Shselasky if (sup_issi & (1 << 1)) { 558331807Shselasky u32 set_in[MLX5_ST_SZ_DW(set_issi_in)] = {0}; 559331807Shselasky u32 set_out[MLX5_ST_SZ_DW(set_issi_out)] = {0}; 560290650Shselasky 561290650Shselasky MLX5_SET(set_issi_in, set_in, opcode, MLX5_CMD_OP_SET_ISSI); 562290650Shselasky MLX5_SET(set_issi_in, set_in, current_issi, 1); 563290650Shselasky 564331807Shselasky err = mlx5_cmd_exec(dev, set_in, sizeof(set_in), set_out, sizeof(set_out)); 565290650Shselasky if (err) { 566331807Shselasky printf("mlx5_core: ERR: ""failed to set ISSI=1 err(%d)\n", err); 567290650Shselasky return err; 568290650Shselasky } 569290650Shselasky 570290650Shselasky dev->issi = 1; 571290650Shselasky 572290650Shselasky return 0; 573290650Shselasky } else if (sup_issi & (1 << 0)) { 574290650Shselasky return 0; 575290650Shselasky } 576290650Shselasky 577290650Shselasky return -ENOTSUPP; 578290650Shselasky} 579290650Shselasky 580290650Shselasky 581290650Shselaskyint mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn, int *irqn) 582290650Shselasky{ 583290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 584290650Shselasky struct mlx5_eq *eq; 585290650Shselasky int err = -ENOENT; 586290650Shselasky 587290650Shselasky spin_lock(&table->lock); 588290650Shselasky list_for_each_entry(eq, &table->comp_eqs_list, list) { 589290650Shselasky if (eq->index == vector) { 590290650Shselasky *eqn = eq->eqn; 591290650Shselasky *irqn = eq->irqn; 592290650Shselasky err = 0; 593290650Shselasky break; 594290650Shselasky } 595290650Shselasky } 596290650Shselasky spin_unlock(&table->lock); 597290650Shselasky 598290650Shselasky return err; 599290650Shselasky} 600290650ShselaskyEXPORT_SYMBOL(mlx5_vector2eqn); 601290650Shselasky 602290650Shselaskystatic void free_comp_eqs(struct mlx5_core_dev *dev) 603290650Shselasky{ 604290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 605290650Shselasky struct mlx5_eq *eq, *n; 606290650Shselasky 607290650Shselasky spin_lock(&table->lock); 608290650Shselasky list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) { 609290650Shselasky list_del(&eq->list); 610290650Shselasky spin_unlock(&table->lock); 611290650Shselasky if (mlx5_destroy_unmap_eq(dev, eq)) 612290650Shselasky mlx5_core_warn(dev, "failed to destroy EQ 0x%x\n", 613290650Shselasky eq->eqn); 614290650Shselasky kfree(eq); 615290650Shselasky spin_lock(&table->lock); 616290650Shselasky } 617290650Shselasky spin_unlock(&table->lock); 618290650Shselasky} 619290650Shselasky 620290650Shselaskystatic int alloc_comp_eqs(struct mlx5_core_dev *dev) 621290650Shselasky{ 622290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 623290650Shselasky struct mlx5_eq *eq; 624290650Shselasky int ncomp_vec; 625290650Shselasky int nent; 626290650Shselasky int err; 627290650Shselasky int i; 628290650Shselasky 629290650Shselasky INIT_LIST_HEAD(&table->comp_eqs_list); 630290650Shselasky ncomp_vec = table->num_comp_vectors; 631290650Shselasky nent = MLX5_COMP_EQ_SIZE; 632290650Shselasky for (i = 0; i < ncomp_vec; i++) { 633290650Shselasky eq = kzalloc(sizeof(*eq), GFP_KERNEL); 634290650Shselasky 635290650Shselasky err = mlx5_create_map_eq(dev, eq, 636290650Shselasky i + MLX5_EQ_VEC_COMP_BASE, nent, 0, 637353199Shselasky &dev->priv.uuari.uars[0]); 638290650Shselasky if (err) { 639290650Shselasky kfree(eq); 640290650Shselasky goto clean; 641290650Shselasky } 642290650Shselasky mlx5_core_dbg(dev, "allocated completion EQN %d\n", eq->eqn); 643290650Shselasky eq->index = i; 644290650Shselasky spin_lock(&table->lock); 645290650Shselasky list_add_tail(&eq->list, &table->comp_eqs_list); 646290650Shselasky spin_unlock(&table->lock); 647290650Shselasky } 648290650Shselasky 649290650Shselasky return 0; 650290650Shselasky 651290650Shselaskyclean: 652290650Shselasky free_comp_eqs(dev); 653290650Shselasky return err; 654290650Shselasky} 655290650Shselasky 656290650Shselaskystatic int map_bf_area(struct mlx5_core_dev *dev) 657290650Shselasky{ 658290650Shselasky resource_size_t bf_start = pci_resource_start(dev->pdev, 0); 659290650Shselasky resource_size_t bf_len = pci_resource_len(dev->pdev, 0); 660290650Shselasky 661290650Shselasky dev->priv.bf_mapping = io_mapping_create_wc(bf_start, bf_len); 662290650Shselasky 663290650Shselasky return dev->priv.bf_mapping ? 0 : -ENOMEM; 664290650Shselasky} 665290650Shselasky 666290650Shselaskystatic void unmap_bf_area(struct mlx5_core_dev *dev) 667290650Shselasky{ 668290650Shselasky if (dev->priv.bf_mapping) 669290650Shselasky io_mapping_free(dev->priv.bf_mapping); 670290650Shselasky} 671290650Shselasky 672290650Shselaskystatic inline int fw_initializing(struct mlx5_core_dev *dev) 673290650Shselasky{ 674290650Shselasky return ioread32be(&dev->iseg->initializing) >> 31; 675290650Shselasky} 676290650Shselasky 677290650Shselaskystatic int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili) 678290650Shselasky{ 679290650Shselasky u64 end = jiffies + msecs_to_jiffies(max_wait_mili); 680290650Shselasky int err = 0; 681290650Shselasky 682290650Shselasky while (fw_initializing(dev)) { 683290650Shselasky if (time_after(jiffies, end)) { 684290650Shselasky err = -EBUSY; 685290650Shselasky break; 686290650Shselasky } 687290650Shselasky msleep(FW_INIT_WAIT_MS); 688290650Shselasky } 689290650Shselasky 690290650Shselasky return err; 691290650Shselasky} 692290650Shselasky 693331580Shselaskystatic void mlx5_add_device(struct mlx5_interface *intf, struct mlx5_priv *priv) 694290650Shselasky{ 695331580Shselasky struct mlx5_device_context *dev_ctx; 696331580Shselasky struct mlx5_core_dev *dev = container_of(priv, struct mlx5_core_dev, priv); 697331580Shselasky 698331580Shselasky dev_ctx = kzalloc(sizeof(*dev_ctx), GFP_KERNEL); 699331580Shselasky if (!dev_ctx) 700331580Shselasky return; 701331580Shselasky 702331580Shselasky dev_ctx->intf = intf; 703331580Shselasky CURVNET_SET_QUIET(vnet0); 704331580Shselasky dev_ctx->context = intf->add(dev); 705331580Shselasky CURVNET_RESTORE(); 706331580Shselasky 707331580Shselasky if (dev_ctx->context) { 708331580Shselasky spin_lock_irq(&priv->ctx_lock); 709331580Shselasky list_add_tail(&dev_ctx->list, &priv->ctx_list); 710331580Shselasky spin_unlock_irq(&priv->ctx_lock); 711331580Shselasky } else { 712331580Shselasky kfree(dev_ctx); 713331580Shselasky } 714331580Shselasky} 715331580Shselasky 716331580Shselaskystatic void mlx5_remove_device(struct mlx5_interface *intf, struct mlx5_priv *priv) 717331580Shselasky{ 718331580Shselasky struct mlx5_device_context *dev_ctx; 719331580Shselasky struct mlx5_core_dev *dev = container_of(priv, struct mlx5_core_dev, priv); 720331580Shselasky 721331580Shselasky list_for_each_entry(dev_ctx, &priv->ctx_list, list) 722331580Shselasky if (dev_ctx->intf == intf) { 723331580Shselasky spin_lock_irq(&priv->ctx_lock); 724331580Shselasky list_del(&dev_ctx->list); 725331580Shselasky spin_unlock_irq(&priv->ctx_lock); 726331580Shselasky 727331580Shselasky intf->remove(dev, dev_ctx->context); 728331580Shselasky kfree(dev_ctx); 729331580Shselasky return; 730331580Shselasky } 731331580Shselasky} 732331580Shselasky 733341958Shselaskyint 734341958Shselaskymlx5_register_device(struct mlx5_core_dev *dev) 735331580Shselasky{ 736290650Shselasky struct mlx5_priv *priv = &dev->priv; 737331580Shselasky struct mlx5_interface *intf; 738290650Shselasky 739331580Shselasky mutex_lock(&intf_mutex); 740331580Shselasky list_add_tail(&priv->dev_list, &dev_list); 741331580Shselasky list_for_each_entry(intf, &intf_list, list) 742331580Shselasky mlx5_add_device(intf, priv); 743331580Shselasky mutex_unlock(&intf_mutex); 744331580Shselasky 745331580Shselasky return 0; 746331580Shselasky} 747331580Shselasky 748341958Shselaskyvoid 749341958Shselaskymlx5_unregister_device(struct mlx5_core_dev *dev) 750331580Shselasky{ 751331580Shselasky struct mlx5_priv *priv = &dev->priv; 752331580Shselasky struct mlx5_interface *intf; 753331580Shselasky 754331580Shselasky mutex_lock(&intf_mutex); 755331580Shselasky list_for_each_entry(intf, &intf_list, list) 756331580Shselasky mlx5_remove_device(intf, priv); 757331580Shselasky list_del(&priv->dev_list); 758331580Shselasky mutex_unlock(&intf_mutex); 759331580Shselasky} 760331580Shselasky 761331580Shselaskyint mlx5_register_interface(struct mlx5_interface *intf) 762331580Shselasky{ 763331580Shselasky struct mlx5_priv *priv; 764331580Shselasky 765331580Shselasky if (!intf->add || !intf->remove) 766331580Shselasky return -EINVAL; 767331580Shselasky 768331580Shselasky mutex_lock(&intf_mutex); 769331580Shselasky list_add_tail(&intf->list, &intf_list); 770331580Shselasky list_for_each_entry(priv, &dev_list, dev_list) 771331580Shselasky mlx5_add_device(intf, priv); 772331580Shselasky mutex_unlock(&intf_mutex); 773331580Shselasky 774331580Shselasky return 0; 775331580Shselasky} 776331580ShselaskyEXPORT_SYMBOL(mlx5_register_interface); 777331580Shselasky 778331580Shselaskyvoid mlx5_unregister_interface(struct mlx5_interface *intf) 779331580Shselasky{ 780331580Shselasky struct mlx5_priv *priv; 781331580Shselasky 782331580Shselasky mutex_lock(&intf_mutex); 783331580Shselasky list_for_each_entry(priv, &dev_list, dev_list) 784331580Shselasky mlx5_remove_device(intf, priv); 785331580Shselasky list_del(&intf->list); 786331580Shselasky mutex_unlock(&intf_mutex); 787331580Shselasky} 788331580ShselaskyEXPORT_SYMBOL(mlx5_unregister_interface); 789331580Shselasky 790331580Shselaskyvoid *mlx5_get_protocol_dev(struct mlx5_core_dev *mdev, int protocol) 791331580Shselasky{ 792331580Shselasky struct mlx5_priv *priv = &mdev->priv; 793331580Shselasky struct mlx5_device_context *dev_ctx; 794331580Shselasky unsigned long flags; 795331580Shselasky void *result = NULL; 796331580Shselasky 797331580Shselasky spin_lock_irqsave(&priv->ctx_lock, flags); 798331580Shselasky 799331580Shselasky list_for_each_entry(dev_ctx, &mdev->priv.ctx_list, list) 800331580Shselasky if ((dev_ctx->intf->protocol == protocol) && 801331580Shselasky dev_ctx->intf->get_dev) { 802331580Shselasky result = dev_ctx->intf->get_dev(dev_ctx->context); 803331580Shselasky break; 804331580Shselasky } 805331580Shselasky 806331580Shselasky spin_unlock_irqrestore(&priv->ctx_lock, flags); 807331580Shselasky 808331580Shselasky return result; 809331580Shselasky} 810331580ShselaskyEXPORT_SYMBOL(mlx5_get_protocol_dev); 811331580Shselasky 812347853Shselaskystatic int mlx5_auto_fw_update; 813347853ShselaskySYSCTL_INT(_hw_mlx5, OID_AUTO, auto_fw_update, CTLFLAG_RDTUN | CTLFLAG_NOFETCH, 814347853Shselasky &mlx5_auto_fw_update, 0, 815347853Shselasky "Allow automatic firmware update on driver start"); 816347847Shselaskystatic int 817347847Shselaskymlx5_firmware_update(struct mlx5_core_dev *dev) 818347847Shselasky{ 819347847Shselasky const struct firmware *fw; 820347847Shselasky int err; 821347847Shselasky 822347853Shselasky TUNABLE_INT_FETCH("hw.mlx5.auto_fw_update", &mlx5_auto_fw_update); 823347853Shselasky if (!mlx5_auto_fw_update) 824347853Shselasky return (0); 825347847Shselasky fw = firmware_get("mlx5fw_mfa"); 826347847Shselasky if (fw) { 827347847Shselasky err = mlx5_firmware_flash(dev, fw); 828347847Shselasky firmware_put(fw, FIRMWARE_UNLOAD); 829347847Shselasky } 830347847Shselasky else 831347847Shselasky return (-ENOENT); 832347847Shselasky 833347847Shselasky return err; 834347847Shselasky} 835347847Shselasky 836331580Shselaskystatic int mlx5_pci_init(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 837331580Shselasky{ 838331580Shselasky struct pci_dev *pdev = dev->pdev; 839331580Shselasky int err = 0; 840331580Shselasky 841290650Shselasky pci_set_drvdata(dev->pdev, dev); 842290650Shselasky strncpy(priv->name, dev_name(&pdev->dev), MLX5_MAX_NAME_LEN); 843290650Shselasky priv->name[MLX5_MAX_NAME_LEN - 1] = 0; 844290650Shselasky 845290650Shselasky mutex_init(&priv->pgdir_mutex); 846290650Shselasky INIT_LIST_HEAD(&priv->pgdir_list); 847290650Shselasky spin_lock_init(&priv->mkey_lock); 848290650Shselasky 849290650Shselasky priv->numa_node = NUMA_NO_NODE; 850290650Shselasky 851331580Shselasky err = mlx5_pci_enable_device(dev); 852290650Shselasky if (err) { 853290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Cannot enable PCI device, aborting\n"); 854290650Shselasky goto err_dbg; 855290650Shselasky } 856290650Shselasky 857290650Shselasky err = request_bar(pdev); 858290650Shselasky if (err) { 859290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""error requesting BARs, aborting\n"); 860290650Shselasky goto err_disable; 861290650Shselasky } 862290650Shselasky 863290650Shselasky pci_set_master(pdev); 864290650Shselasky 865290650Shselasky err = set_dma_caps(pdev); 866290650Shselasky if (err) { 867290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed setting DMA capabilities mask, aborting\n"); 868290650Shselasky goto err_clr_master; 869290650Shselasky } 870290650Shselasky 871329212Shselasky dev->iseg_base = pci_resource_start(dev->pdev, 0); 872329212Shselasky dev->iseg = ioremap(dev->iseg_base, sizeof(*dev->iseg)); 873290650Shselasky if (!dev->iseg) { 874290650Shselasky err = -ENOMEM; 875290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed mapping initialization segment, aborting\n"); 876290650Shselasky goto err_clr_master; 877290650Shselasky } 878331580Shselasky 879337105Shselasky return 0; 880331585Shselasky 881331580Shselaskyerr_clr_master: 882331580Shselasky release_bar(dev->pdev); 883331580Shselaskyerr_disable: 884331580Shselasky mlx5_pci_disable_device(dev); 885331580Shselaskyerr_dbg: 886331580Shselasky return err; 887331580Shselasky} 888331580Shselasky 889331580Shselaskystatic void mlx5_pci_close(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 890331580Shselasky{ 891331580Shselasky iounmap(dev->iseg); 892331580Shselasky release_bar(dev->pdev); 893331580Shselasky mlx5_pci_disable_device(dev); 894331580Shselasky} 895331580Shselasky 896331810Shselaskystatic int mlx5_init_once(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 897331580Shselasky{ 898331580Shselasky struct pci_dev *pdev = dev->pdev; 899331580Shselasky int err; 900331580Shselasky 901337103Shselasky err = mlx5_vsc_find_cap(dev); 902337103Shselasky if (err) 903337103Shselasky dev_err(&pdev->dev, "Unable to find vendor specific capabilities\n"); 904331815Shselasky 905331810Shselasky err = mlx5_query_hca_caps(dev); 906331810Shselasky if (err) { 907331810Shselasky dev_err(&pdev->dev, "query hca failed\n"); 908331810Shselasky goto out; 909331810Shselasky } 910331810Shselasky 911331810Shselasky err = mlx5_query_board_id(dev); 912331810Shselasky if (err) { 913331810Shselasky dev_err(&pdev->dev, "query board id failed\n"); 914331810Shselasky goto out; 915331810Shselasky } 916331810Shselasky 917331810Shselasky err = mlx5_eq_init(dev); 918331810Shselasky if (err) { 919331810Shselasky dev_err(&pdev->dev, "failed to initialize eq\n"); 920331810Shselasky goto out; 921331810Shselasky } 922331810Shselasky 923331810Shselasky MLX5_INIT_DOORBELL_LOCK(&priv->cq_uar_lock); 924331810Shselasky 925331810Shselasky err = mlx5_init_cq_table(dev); 926331810Shselasky if (err) { 927331810Shselasky dev_err(&pdev->dev, "failed to initialize cq table\n"); 928331810Shselasky goto err_eq_cleanup; 929331810Shselasky } 930331810Shselasky 931331810Shselasky mlx5_init_qp_table(dev); 932331810Shselasky mlx5_init_srq_table(dev); 933331810Shselasky mlx5_init_mr_table(dev); 934331810Shselasky 935341958Shselasky mlx5_init_reserved_gids(dev); 936341958Shselasky mlx5_fpga_init(dev); 937341958Shselasky 938331810Shselasky return 0; 939331810Shselasky 940331810Shselaskyerr_eq_cleanup: 941331810Shselasky mlx5_eq_cleanup(dev); 942331810Shselasky 943331810Shselaskyout: 944331810Shselasky return err; 945331810Shselasky} 946331810Shselasky 947331810Shselaskystatic void mlx5_cleanup_once(struct mlx5_core_dev *dev) 948331810Shselasky{ 949341958Shselasky mlx5_fpga_cleanup(dev); 950341958Shselasky mlx5_cleanup_reserved_gids(dev); 951331810Shselasky mlx5_cleanup_mr_table(dev); 952331810Shselasky mlx5_cleanup_srq_table(dev); 953331810Shselasky mlx5_cleanup_qp_table(dev); 954331810Shselasky mlx5_cleanup_cq_table(dev); 955331810Shselasky mlx5_eq_cleanup(dev); 956331810Shselasky} 957331810Shselasky 958331810Shselaskystatic int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, 959331810Shselasky bool boot) 960331810Shselasky{ 961331810Shselasky struct pci_dev *pdev = dev->pdev; 962331810Shselasky int err; 963331810Shselasky 964331580Shselasky mutex_lock(&dev->intf_state_mutex); 965331580Shselasky if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) { 966331580Shselasky dev_warn(&dev->pdev->dev, "%s: interface is up, NOP\n", 967331580Shselasky __func__); 968331580Shselasky goto out; 969331580Shselasky } 970331580Shselasky 971290650Shselasky device_printf((&pdev->dev)->bsddev, "INFO: ""firmware version: %d.%d.%d\n", fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev)); 972290650Shselasky 973306233Shselasky /* 974306233Shselasky * On load removing any previous indication of internal error, 975306233Shselasky * device is up 976306233Shselasky */ 977306233Shselasky dev->state = MLX5_DEVICE_STATE_UP; 978306233Shselasky 979290650Shselasky err = mlx5_cmd_init(dev); 980290650Shselasky if (err) { 981290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed initializing command interface, aborting\n"); 982331580Shselasky goto out_err; 983290650Shselasky } 984290650Shselasky 985290650Shselasky err = wait_fw_init(dev, FW_INIT_TIMEOUT_MILI); 986290650Shselasky if (err) { 987290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""Firmware over %d MS in initializing state, aborting\n", FW_INIT_TIMEOUT_MILI); 988290650Shselasky goto err_cmd_cleanup; 989290650Shselasky } 990290650Shselasky 991290650Shselasky err = mlx5_core_enable_hca(dev); 992290650Shselasky if (err) { 993290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""enable hca failed\n"); 994331810Shselasky goto err_cmd_cleanup; 995290650Shselasky } 996290650Shselasky 997290650Shselasky err = mlx5_core_set_issi(dev); 998290650Shselasky if (err) { 999290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to set issi\n"); 1000290650Shselasky goto err_disable_hca; 1001290650Shselasky } 1002290650Shselasky 1003290650Shselasky err = mlx5_pagealloc_start(dev); 1004290650Shselasky if (err) { 1005290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_pagealloc_start failed\n"); 1006290650Shselasky goto err_disable_hca; 1007290650Shselasky } 1008290650Shselasky 1009290650Shselasky err = mlx5_satisfy_startup_pages(dev, 1); 1010290650Shselasky if (err) { 1011290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to allocate boot pages\n"); 1012290650Shselasky goto err_pagealloc_stop; 1013290650Shselasky } 1014290650Shselasky 1015329209Shselasky err = set_hca_ctrl(dev); 1016329209Shselasky if (err) { 1017329209Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""set_hca_ctrl failed\n"); 1018329209Shselasky goto reclaim_boot_pages; 1019329209Shselasky } 1020329209Shselasky 1021306233Shselasky err = handle_hca_cap(dev); 1022290650Shselasky if (err) { 1023306233Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap failed\n"); 1024290650Shselasky goto reclaim_boot_pages; 1025290650Shselasky } 1026290650Shselasky 1027329209Shselasky err = handle_hca_cap_atomic(dev); 1028290650Shselasky if (err) { 1029329209Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap_atomic failed\n"); 1030290650Shselasky goto reclaim_boot_pages; 1031290650Shselasky } 1032290650Shselasky 1033290650Shselasky err = mlx5_satisfy_startup_pages(dev, 0); 1034290650Shselasky if (err) { 1035290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to allocate init pages\n"); 1036290650Shselasky goto reclaim_boot_pages; 1037290650Shselasky } 1038290650Shselasky 1039290650Shselasky err = mlx5_cmd_init_hca(dev); 1040290650Shselasky if (err) { 1041290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""init hca failed\n"); 1042290650Shselasky goto reclaim_boot_pages; 1043290650Shselasky } 1044290650Shselasky 1045290650Shselasky mlx5_start_health_poll(dev); 1046290650Shselasky 1047331810Shselasky if (boot && mlx5_init_once(dev, priv)) { 1048331810Shselasky dev_err(&pdev->dev, "sw objs init failed\n"); 1049290650Shselasky goto err_stop_poll; 1050290650Shselasky } 1051290650Shselasky 1052290650Shselasky err = mlx5_enable_msix(dev); 1053290650Shselasky if (err) { 1054290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""enable msix failed\n"); 1055331810Shselasky goto err_cleanup_once; 1056290650Shselasky } 1057290650Shselasky 1058290650Shselasky err = mlx5_alloc_uuars(dev, &priv->uuari); 1059290650Shselasky if (err) { 1060290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed allocating uar, aborting\n"); 1061331810Shselasky goto err_disable_msix; 1062290650Shselasky } 1063290650Shselasky 1064290650Shselasky err = mlx5_start_eqs(dev); 1065290650Shselasky if (err) { 1066290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to start pages and async EQs\n"); 1067290650Shselasky goto err_free_uar; 1068290650Shselasky } 1069290650Shselasky 1070290650Shselasky err = alloc_comp_eqs(dev); 1071290650Shselasky if (err) { 1072290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to alloc completion EQs\n"); 1073290650Shselasky goto err_stop_eqs; 1074290650Shselasky } 1075290650Shselasky 1076290650Shselasky if (map_bf_area(dev)) 1077290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to map blue flame area\n"); 1078290650Shselasky 1079329200Shselasky err = mlx5_init_fs(dev); 1080329200Shselasky if (err) { 1081329200Shselasky mlx5_core_err(dev, "flow steering init %d\n", err); 1082331810Shselasky goto err_free_comp_eqs; 1083329200Shselasky } 1084329200Shselasky 1085353197Shselasky err = mlx5_mpfs_init(dev); 1086353197Shselasky if (err) { 1087353197Shselasky mlx5_core_err(dev, "mpfs init failed %d\n", err); 1088353197Shselasky goto err_fs; 1089353197Shselasky } 1090353197Shselasky 1091341958Shselasky err = mlx5_fpga_device_start(dev); 1092341958Shselasky if (err) { 1093341958Shselasky dev_err(&pdev->dev, "fpga device start failed %d\n", err); 1094353197Shselasky goto err_mpfs; 1095341958Shselasky } 1096341958Shselasky 1097331580Shselasky err = mlx5_register_device(dev); 1098331580Shselasky if (err) { 1099331580Shselasky dev_err(&pdev->dev, "mlx5_register_device failed %d\n", err); 1100353193Shselasky goto err_fpga; 1101331580Shselasky } 1102331580Shselasky 1103331580Shselasky set_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); 1104331580Shselasky 1105331580Shselaskyout: 1106331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1107290650Shselasky return 0; 1108290650Shselasky 1109353193Shselaskyerr_fpga: 1110353193Shselasky mlx5_fpga_device_stop(dev); 1111353193Shselasky 1112353197Shselaskyerr_mpfs: 1113353197Shselasky mlx5_mpfs_destroy(dev); 1114353197Shselasky 1115331810Shselaskyerr_fs: 1116331580Shselasky mlx5_cleanup_fs(dev); 1117331810Shselasky 1118331810Shselaskyerr_free_comp_eqs: 1119331810Shselasky free_comp_eqs(dev); 1120329200Shselasky unmap_bf_area(dev); 1121329200Shselasky 1122290650Shselaskyerr_stop_eqs: 1123290650Shselasky mlx5_stop_eqs(dev); 1124290650Shselasky 1125290650Shselaskyerr_free_uar: 1126290650Shselasky mlx5_free_uuars(dev, &priv->uuari); 1127290650Shselasky 1128331810Shselaskyerr_disable_msix: 1129290650Shselasky mlx5_disable_msix(dev); 1130290650Shselasky 1131331810Shselaskyerr_cleanup_once: 1132331810Shselasky if (boot) 1133331810Shselasky mlx5_cleanup_once(dev); 1134331810Shselasky 1135290650Shselaskyerr_stop_poll: 1136341934Shselasky mlx5_stop_health_poll(dev, boot); 1137290650Shselasky if (mlx5_cmd_teardown_hca(dev)) { 1138290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""tear_down_hca failed, skip cleanup\n"); 1139331580Shselasky goto out_err; 1140290650Shselasky } 1141290650Shselasky 1142290650Shselaskyreclaim_boot_pages: 1143290650Shselasky mlx5_reclaim_startup_pages(dev); 1144290650Shselasky 1145290650Shselaskyerr_pagealloc_stop: 1146290650Shselasky mlx5_pagealloc_stop(dev); 1147290650Shselasky 1148290650Shselaskyerr_disable_hca: 1149290650Shselasky mlx5_core_disable_hca(dev); 1150290650Shselasky 1151290650Shselaskyerr_cmd_cleanup: 1152290650Shselasky mlx5_cmd_cleanup(dev); 1153290650Shselasky 1154331580Shselaskyout_err: 1155331580Shselasky dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; 1156331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1157290650Shselasky 1158290650Shselasky return err; 1159290650Shselasky} 1160290650Shselasky 1161331810Shselaskystatic int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, 1162331810Shselasky bool cleanup) 1163290650Shselasky{ 1164331580Shselasky int err = 0; 1165290650Shselasky 1166331811Shselasky if (cleanup) 1167331811Shselasky mlx5_drain_health_recovery(dev); 1168331811Shselasky 1169331580Shselasky mutex_lock(&dev->intf_state_mutex); 1170347799Shselasky if (!test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) { 1171331580Shselasky dev_warn(&dev->pdev->dev, "%s: interface is down, NOP\n", __func__); 1172331810Shselasky if (cleanup) 1173331810Shselasky mlx5_cleanup_once(dev); 1174331580Shselasky goto out; 1175331580Shselasky } 1176331580Shselasky 1177331580Shselasky mlx5_unregister_device(dev); 1178331580Shselasky 1179341958Shselasky mlx5_fpga_device_stop(dev); 1180353197Shselasky mlx5_mpfs_destroy(dev); 1181329200Shselasky mlx5_cleanup_fs(dev); 1182290650Shselasky unmap_bf_area(dev); 1183322144Shselasky mlx5_wait_for_reclaim_vfs_pages(dev); 1184290650Shselasky free_comp_eqs(dev); 1185290650Shselasky mlx5_stop_eqs(dev); 1186290650Shselasky mlx5_free_uuars(dev, &priv->uuari); 1187290650Shselasky mlx5_disable_msix(dev); 1188331810Shselasky if (cleanup) 1189331810Shselasky mlx5_cleanup_once(dev); 1190341934Shselasky mlx5_stop_health_poll(dev, cleanup); 1191331580Shselasky err = mlx5_cmd_teardown_hca(dev); 1192331580Shselasky if (err) { 1193290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""tear_down_hca failed, skip cleanup\n"); 1194331580Shselasky goto out; 1195290650Shselasky } 1196290650Shselasky mlx5_pagealloc_stop(dev); 1197290650Shselasky mlx5_reclaim_startup_pages(dev); 1198290650Shselasky mlx5_core_disable_hca(dev); 1199290650Shselasky mlx5_cmd_cleanup(dev); 1200290650Shselasky 1201331580Shselaskyout: 1202331580Shselasky clear_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); 1203331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1204331580Shselasky return err; 1205290650Shselasky} 1206290650Shselasky 1207331580Shselaskyvoid mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event, 1208331580Shselasky unsigned long param) 1209290650Shselasky{ 1210290650Shselasky struct mlx5_priv *priv = &dev->priv; 1211290650Shselasky struct mlx5_device_context *dev_ctx; 1212290650Shselasky unsigned long flags; 1213290650Shselasky 1214290650Shselasky spin_lock_irqsave(&priv->ctx_lock, flags); 1215290650Shselasky 1216290650Shselasky list_for_each_entry(dev_ctx, &priv->ctx_list, list) 1217290650Shselasky if (dev_ctx->intf->event) 1218290650Shselasky dev_ctx->intf->event(dev, dev_ctx->context, event, param); 1219290650Shselasky 1220290650Shselasky spin_unlock_irqrestore(&priv->ctx_lock, flags); 1221290650Shselasky} 1222290650Shselasky 1223290650Shselaskystruct mlx5_core_event_handler { 1224290650Shselasky void (*event)(struct mlx5_core_dev *dev, 1225290650Shselasky enum mlx5_dev_event event, 1226290650Shselasky void *data); 1227290650Shselasky}; 1228290650Shselasky 1229290650Shselaskystatic int init_one(struct pci_dev *pdev, 1230290650Shselasky const struct pci_device_id *id) 1231290650Shselasky{ 1232290650Shselasky struct mlx5_core_dev *dev; 1233290650Shselasky struct mlx5_priv *priv; 1234338554Shselasky device_t bsddev = pdev->dev.bsddev; 1235290650Shselasky int err; 1236290650Shselasky 1237290650Shselasky dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1238290650Shselasky priv = &dev->priv; 1239306233Shselasky if (id) 1240306233Shselasky priv->pci_dev_data = id->driver_data; 1241290650Shselasky 1242347835Shselasky if (mlx5_prof_sel < 0 || mlx5_prof_sel >= ARRAY_SIZE(profiles)) { 1243341930Shselasky device_printf(bsddev, "WARN: selected profile out of range, selecting default (%d)\n", MLX5_DEFAULT_PROF); 1244347835Shselasky mlx5_prof_sel = MLX5_DEFAULT_PROF; 1245290650Shselasky } 1246347835Shselasky dev->profile = &profiles[mlx5_prof_sel]; 1247331580Shselasky dev->pdev = pdev; 1248290650Shselasky dev->event = mlx5_core_event; 1249290650Shselasky 1250341948Shselasky /* Set desc */ 1251341948Shselasky device_set_desc(bsddev, mlx5_version); 1252341948Shselasky 1253338554Shselasky sysctl_ctx_init(&dev->sysctl_ctx); 1254338554Shselasky SYSCTL_ADD_INT(&dev->sysctl_ctx, 1255338554Shselasky SYSCTL_CHILDREN(device_get_sysctl_tree(bsddev)), 1256338554Shselasky OID_AUTO, "msix_eqvec", CTLFLAG_RDTUN, &dev->msix_eqvec, 0, 1257338554Shselasky "Maximum number of MSIX event queue vectors, if set"); 1258347862Shselasky SYSCTL_ADD_INT(&dev->sysctl_ctx, 1259347862Shselasky SYSCTL_CHILDREN(device_get_sysctl_tree(bsddev)), 1260347862Shselasky OID_AUTO, "power_status", CTLFLAG_RD, &dev->pwr_status, 0, 1261347862Shselasky "0:Invalid 1:Sufficient 2:Insufficient"); 1262347862Shselasky SYSCTL_ADD_INT(&dev->sysctl_ctx, 1263347862Shselasky SYSCTL_CHILDREN(device_get_sysctl_tree(bsddev)), 1264347862Shselasky OID_AUTO, "power_value", CTLFLAG_RD, &dev->pwr_value, 0, 1265347862Shselasky "Current power value in Watts"); 1266338554Shselasky 1267290650Shselasky INIT_LIST_HEAD(&priv->ctx_list); 1268290650Shselasky spin_lock_init(&priv->ctx_lock); 1269341930Shselasky mutex_init(&dev->pci_status_mutex); 1270341930Shselasky mutex_init(&dev->intf_state_mutex); 1271347880Shselasky mtx_init(&dev->dump_lock, "mlx5dmp", NULL, MTX_DEF | MTX_NEW); 1272331580Shselasky err = mlx5_pci_init(dev, priv); 1273290650Shselasky if (err) { 1274341930Shselasky device_printf(bsddev, "ERR: mlx5_pci_init failed %d\n", err); 1275331580Shselasky goto clean_dev; 1276290650Shselasky } 1277290650Shselasky 1278341930Shselasky err = mlx5_health_init(dev); 1279341930Shselasky if (err) { 1280341930Shselasky device_printf(bsddev, "ERR: mlx5_health_init failed %d\n", err); 1281341930Shselasky goto close_pci; 1282341930Shselasky } 1283331580Shselasky 1284331810Shselasky mlx5_pagealloc_init(dev); 1285331810Shselasky 1286331810Shselasky err = mlx5_load_one(dev, priv, true); 1287290650Shselasky if (err) { 1288341930Shselasky device_printf(bsddev, "ERR: mlx5_load_one failed %d\n", err); 1289331580Shselasky goto clean_health; 1290290650Shselasky } 1291290650Shselasky 1292331914Shselasky mlx5_fwdump_prep(dev); 1293331914Shselasky 1294347847Shselasky mlx5_firmware_update(dev); 1295347847Shselasky 1296341930Shselasky pci_save_state(bsddev); 1297290650Shselasky return 0; 1298290650Shselasky 1299331580Shselaskyclean_health: 1300331810Shselasky mlx5_pagealloc_cleanup(dev); 1301341930Shselasky mlx5_health_cleanup(dev); 1302331580Shselaskyclose_pci: 1303341930Shselasky mlx5_pci_close(dev, priv); 1304331580Shselaskyclean_dev: 1305338554Shselasky sysctl_ctx_free(&dev->sysctl_ctx); 1306347880Shselasky mtx_destroy(&dev->dump_lock); 1307290650Shselasky kfree(dev); 1308290650Shselasky return err; 1309290650Shselasky} 1310290650Shselasky 1311290650Shselaskystatic void remove_one(struct pci_dev *pdev) 1312290650Shselasky{ 1313290650Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1314331580Shselasky struct mlx5_priv *priv = &dev->priv; 1315290650Shselasky 1316331810Shselasky if (mlx5_unload_one(dev, priv, true)) { 1317331580Shselasky dev_err(&dev->pdev->dev, "mlx5_unload_one failed\n"); 1318331580Shselasky mlx5_health_cleanup(dev); 1319331580Shselasky return; 1320331580Shselasky } 1321331580Shselasky 1322331810Shselasky mlx5_pagealloc_cleanup(dev); 1323331580Shselasky mlx5_health_cleanup(dev); 1324347880Shselasky mlx5_fwdump_clean(dev); 1325331580Shselasky mlx5_pci_close(dev, priv); 1326347880Shselasky mtx_destroy(&dev->dump_lock); 1327331580Shselasky pci_set_drvdata(pdev, NULL); 1328338554Shselasky sysctl_ctx_free(&dev->sysctl_ctx); 1329290650Shselasky kfree(dev); 1330290650Shselasky} 1331290650Shselasky 1332331580Shselaskystatic pci_ers_result_t mlx5_pci_err_detected(struct pci_dev *pdev, 1333331580Shselasky pci_channel_state_t state) 1334331580Shselasky{ 1335331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1336331580Shselasky struct mlx5_priv *priv = &dev->priv; 1337331580Shselasky 1338331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1339331810Shselasky mlx5_enter_error_state(dev, false); 1340331810Shselasky mlx5_unload_one(dev, priv, false); 1341331914Shselasky 1342331582Shselasky if (state) { 1343331582Shselasky mlx5_drain_health_wq(dev); 1344331582Shselasky mlx5_pci_disable_device(dev); 1345331582Shselasky } 1346331582Shselasky 1347331580Shselasky return state == pci_channel_io_perm_failure ? 1348331580Shselasky PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET; 1349331580Shselasky} 1350331580Shselasky 1351331580Shselaskystatic pci_ers_result_t mlx5_pci_slot_reset(struct pci_dev *pdev) 1352331580Shselasky{ 1353331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1354331580Shselasky int err = 0; 1355331580Shselasky 1356331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1357331580Shselasky 1358331580Shselasky err = mlx5_pci_enable_device(dev); 1359331580Shselasky if (err) { 1360331580Shselasky dev_err(&pdev->dev, "%s: mlx5_pci_enable_device failed with error code: %d\n" 1361331580Shselasky , __func__, err); 1362331580Shselasky return PCI_ERS_RESULT_DISCONNECT; 1363331580Shselasky } 1364331580Shselasky pci_set_master(pdev); 1365331580Shselasky pci_set_powerstate(pdev->dev.bsddev, PCI_POWERSTATE_D0); 1366331580Shselasky pci_restore_state(pdev->dev.bsddev); 1367331816Shselasky pci_save_state(pdev->dev.bsddev); 1368331580Shselasky 1369331580Shselasky return err ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED; 1370331580Shselasky} 1371331580Shselasky 1372331580Shselasky/* wait for the device to show vital signs. For now we check 1373331580Shselasky * that we can read the device ID and that the health buffer 1374331580Shselasky * shows a non zero value which is different than 0xffffffff 1375331580Shselasky */ 1376331580Shselaskystatic void wait_vital(struct pci_dev *pdev) 1377331580Shselasky{ 1378331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1379331580Shselasky struct mlx5_core_health *health = &dev->priv.health; 1380331580Shselasky const int niter = 100; 1381331580Shselasky u32 count; 1382331580Shselasky u16 did; 1383331580Shselasky int i; 1384331580Shselasky 1385331580Shselasky /* Wait for firmware to be ready after reset */ 1386331580Shselasky msleep(1000); 1387331580Shselasky for (i = 0; i < niter; i++) { 1388331580Shselasky if (pci_read_config_word(pdev, 2, &did)) { 1389331580Shselasky dev_warn(&pdev->dev, "failed reading config word\n"); 1390331580Shselasky break; 1391331580Shselasky } 1392331580Shselasky if (did == pdev->device) { 1393331580Shselasky dev_info(&pdev->dev, "device ID correctly read after %d iterations\n", i); 1394331580Shselasky break; 1395331580Shselasky } 1396331580Shselasky msleep(50); 1397331580Shselasky } 1398331580Shselasky if (i == niter) 1399331580Shselasky dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__); 1400331580Shselasky 1401331580Shselasky for (i = 0; i < niter; i++) { 1402331580Shselasky count = ioread32be(health->health_counter); 1403331580Shselasky if (count && count != 0xffffffff) { 1404331580Shselasky dev_info(&pdev->dev, "Counter value 0x%x after %d iterations\n", count, i); 1405331580Shselasky break; 1406331580Shselasky } 1407331580Shselasky msleep(50); 1408331580Shselasky } 1409331580Shselasky 1410331580Shselasky if (i == niter) 1411331580Shselasky dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__); 1412331580Shselasky} 1413331580Shselasky 1414331580Shselaskystatic void mlx5_pci_resume(struct pci_dev *pdev) 1415331580Shselasky{ 1416331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1417331580Shselasky struct mlx5_priv *priv = &dev->priv; 1418331580Shselasky int err; 1419331580Shselasky 1420331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1421331580Shselasky 1422331580Shselasky wait_vital(pdev); 1423331580Shselasky 1424331810Shselasky err = mlx5_load_one(dev, priv, false); 1425331580Shselasky if (err) 1426331580Shselasky dev_err(&pdev->dev, "%s: mlx5_load_one failed with error code: %d\n" 1427331580Shselasky , __func__, err); 1428331580Shselasky else 1429331580Shselasky dev_info(&pdev->dev, "%s: device recovered\n", __func__); 1430331580Shselasky} 1431331580Shselasky 1432331580Shselaskystatic const struct pci_error_handlers mlx5_err_handler = { 1433331580Shselasky .error_detected = mlx5_pci_err_detected, 1434331580Shselasky .slot_reset = mlx5_pci_slot_reset, 1435331580Shselasky .resume = mlx5_pci_resume 1436331580Shselasky}; 1437331580Shselasky 1438331810Shselaskystatic int mlx5_try_fast_unload(struct mlx5_core_dev *dev) 1439331810Shselasky{ 1440347818Shselasky bool fast_teardown, force_teardown; 1441331810Shselasky int err; 1442331810Shselasky 1443347819Shselasky if (!mlx5_fast_unload_enabled) { 1444347819Shselasky mlx5_core_dbg(dev, "fast unload is disabled by user\n"); 1445347819Shselasky return -EOPNOTSUPP; 1446347819Shselasky } 1447347819Shselasky 1448347818Shselasky fast_teardown = MLX5_CAP_GEN(dev, fast_teardown); 1449347818Shselasky force_teardown = MLX5_CAP_GEN(dev, force_teardown); 1450347818Shselasky 1451347818Shselasky mlx5_core_dbg(dev, "force teardown firmware support=%d\n", force_teardown); 1452347818Shselasky mlx5_core_dbg(dev, "fast teardown firmware support=%d\n", fast_teardown); 1453347818Shselasky 1454347818Shselasky if (!fast_teardown && !force_teardown) 1455331810Shselasky return -EOPNOTSUPP; 1456331810Shselasky 1457331810Shselasky if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 1458331810Shselasky mlx5_core_dbg(dev, "Device in internal error state, giving up\n"); 1459331810Shselasky return -EAGAIN; 1460331810Shselasky } 1461331810Shselasky 1462341934Shselasky /* Panic tear down fw command will stop the PCI bus communication 1463341934Shselasky * with the HCA, so the health polll is no longer needed. 1464341934Shselasky */ 1465341934Shselasky mlx5_drain_health_wq(dev); 1466341934Shselasky mlx5_stop_health_poll(dev, false); 1467341934Shselasky 1468347818Shselasky err = mlx5_cmd_fast_teardown_hca(dev); 1469347818Shselasky if (!err) 1470347818Shselasky goto done; 1471347818Shselasky 1472331810Shselasky err = mlx5_cmd_force_teardown_hca(dev); 1473347818Shselasky if (!err) 1474347818Shselasky goto done; 1475331810Shselasky 1476347818Shselasky mlx5_core_dbg(dev, "Firmware couldn't do fast unload error: %d\n", err); 1477347818Shselasky mlx5_start_health_poll(dev); 1478347818Shselasky return err; 1479347818Shselaskydone: 1480331810Shselasky mlx5_enter_error_state(dev, true); 1481331810Shselasky return 0; 1482331810Shselasky} 1483331810Shselasky 1484347802Shselaskystatic void mlx5_disable_interrupts(struct mlx5_core_dev *mdev) 1485347802Shselasky{ 1486347802Shselasky int nvec = mdev->priv.eq_table.num_comp_vectors + MLX5_EQ_VEC_COMP_BASE; 1487347802Shselasky int x; 1488347802Shselasky 1489347802Shselasky mdev->priv.disable_irqs = 1; 1490347802Shselasky 1491347802Shselasky /* wait for all IRQ handlers to finish processing */ 1492347802Shselasky for (x = 0; x != nvec; x++) 1493347802Shselasky synchronize_irq(mdev->priv.msix_arr[x].vector); 1494347802Shselasky} 1495347802Shselasky 1496329211Shselaskystatic void shutdown_one(struct pci_dev *pdev) 1497329211Shselasky{ 1498331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1499331580Shselasky struct mlx5_priv *priv = &dev->priv; 1500331810Shselasky int err; 1501331580Shselasky 1502347802Shselasky /* enter polling mode */ 1503347802Shselasky mlx5_cmd_use_polling(dev); 1504347802Shselasky 1505347802Shselasky /* disable all interrupts */ 1506347802Shselasky mlx5_disable_interrupts(dev); 1507347802Shselasky 1508331810Shselasky err = mlx5_try_fast_unload(dev); 1509331810Shselasky if (err) 1510331810Shselasky mlx5_unload_one(dev, priv, false); 1511331580Shselasky mlx5_pci_disable_device(dev); 1512329211Shselasky} 1513329211Shselasky 1514290650Shselaskystatic const struct pci_device_id mlx5_core_pci_table[] = { 1515290650Shselasky { PCI_VDEVICE(MELLANOX, 4113) }, /* Connect-IB */ 1516290650Shselasky { PCI_VDEVICE(MELLANOX, 4114) }, /* Connect-IB VF */ 1517290650Shselasky { PCI_VDEVICE(MELLANOX, 4115) }, /* ConnectX-4 */ 1518290650Shselasky { PCI_VDEVICE(MELLANOX, 4116) }, /* ConnectX-4 VF */ 1519290650Shselasky { PCI_VDEVICE(MELLANOX, 4117) }, /* ConnectX-4LX */ 1520290650Shselasky { PCI_VDEVICE(MELLANOX, 4118) }, /* ConnectX-4LX VF */ 1521306233Shselasky { PCI_VDEVICE(MELLANOX, 4119) }, /* ConnectX-5 */ 1522306233Shselasky { PCI_VDEVICE(MELLANOX, 4120) }, /* ConnectX-5 VF */ 1523290650Shselasky { PCI_VDEVICE(MELLANOX, 4121) }, 1524290650Shselasky { PCI_VDEVICE(MELLANOX, 4122) }, 1525290650Shselasky { PCI_VDEVICE(MELLANOX, 4123) }, 1526290650Shselasky { PCI_VDEVICE(MELLANOX, 4124) }, 1527290650Shselasky { PCI_VDEVICE(MELLANOX, 4125) }, 1528290650Shselasky { PCI_VDEVICE(MELLANOX, 4126) }, 1529290650Shselasky { PCI_VDEVICE(MELLANOX, 4127) }, 1530290650Shselasky { PCI_VDEVICE(MELLANOX, 4128) }, 1531290650Shselasky { PCI_VDEVICE(MELLANOX, 4129) }, 1532290650Shselasky { PCI_VDEVICE(MELLANOX, 4130) }, 1533290650Shselasky { PCI_VDEVICE(MELLANOX, 4131) }, 1534290650Shselasky { PCI_VDEVICE(MELLANOX, 4132) }, 1535290650Shselasky { PCI_VDEVICE(MELLANOX, 4133) }, 1536290650Shselasky { PCI_VDEVICE(MELLANOX, 4134) }, 1537290650Shselasky { PCI_VDEVICE(MELLANOX, 4135) }, 1538290650Shselasky { PCI_VDEVICE(MELLANOX, 4136) }, 1539290650Shselasky { PCI_VDEVICE(MELLANOX, 4137) }, 1540290650Shselasky { PCI_VDEVICE(MELLANOX, 4138) }, 1541290650Shselasky { PCI_VDEVICE(MELLANOX, 4139) }, 1542290650Shselasky { PCI_VDEVICE(MELLANOX, 4140) }, 1543290650Shselasky { PCI_VDEVICE(MELLANOX, 4141) }, 1544290650Shselasky { PCI_VDEVICE(MELLANOX, 4142) }, 1545290650Shselasky { PCI_VDEVICE(MELLANOX, 4143) }, 1546290650Shselasky { PCI_VDEVICE(MELLANOX, 4144) }, 1547290650Shselasky { 0, } 1548290650Shselasky}; 1549290650Shselasky 1550290650ShselaskyMODULE_DEVICE_TABLE(pci, mlx5_core_pci_table); 1551290650Shselasky 1552331809Shselaskyvoid mlx5_disable_device(struct mlx5_core_dev *dev) 1553331809Shselasky{ 1554331809Shselasky mlx5_pci_err_detected(dev->pdev, 0); 1555331809Shselasky} 1556331809Shselasky 1557331809Shselaskyvoid mlx5_recover_device(struct mlx5_core_dev *dev) 1558331809Shselasky{ 1559331809Shselasky mlx5_pci_disable_device(dev); 1560331809Shselasky if (mlx5_pci_slot_reset(dev->pdev) == PCI_ERS_RESULT_RECOVERED) 1561331809Shselasky mlx5_pci_resume(dev->pdev); 1562331809Shselasky} 1563331809Shselasky 1564331586Shselaskystruct pci_driver mlx5_core_driver = { 1565290650Shselasky .name = DRIVER_NAME, 1566290650Shselasky .id_table = mlx5_core_pci_table, 1567329211Shselasky .shutdown = shutdown_one, 1568290650Shselasky .probe = init_one, 1569331580Shselasky .remove = remove_one, 1570331580Shselasky .err_handler = &mlx5_err_handler 1571290650Shselasky}; 1572290650Shselasky 1573290650Shselaskystatic int __init init(void) 1574290650Shselasky{ 1575290650Shselasky int err; 1576290650Shselasky 1577290650Shselasky err = pci_register_driver(&mlx5_core_driver); 1578290650Shselasky if (err) 1579331580Shselasky goto err_debug; 1580290650Shselasky 1581347871Shselasky err = mlx5_ctl_init(); 1582331586Shselasky if (err) 1583347871Shselasky goto err_ctl; 1584331586Shselasky 1585331586Shselasky return 0; 1586331586Shselasky 1587347871Shselaskyerr_ctl: 1588331586Shselasky pci_unregister_driver(&mlx5_core_driver); 1589290650Shselasky 1590290650Shselaskyerr_debug: 1591290650Shselasky return err; 1592290650Shselasky} 1593290650Shselasky 1594290650Shselaskystatic void __exit cleanup(void) 1595290650Shselasky{ 1596347871Shselasky mlx5_ctl_fini(); 1597290650Shselasky pci_unregister_driver(&mlx5_core_driver); 1598290650Shselasky} 1599290650Shselasky 1600290650Shselaskymodule_init(init); 1601290650Shselaskymodule_exit(cleanup); 1602