mlx5_main.c revision 347880
1290650Shselasky/*- 2347819Shselasky * Copyright (c) 2013-2019, Mellanox Technologies, Ltd. All rights reserved. 3290650Shselasky * 4290650Shselasky * Redistribution and use in source and binary forms, with or without 5290650Shselasky * modification, are permitted provided that the following conditions 6290650Shselasky * are met: 7290650Shselasky * 1. Redistributions of source code must retain the above copyright 8290650Shselasky * notice, this list of conditions and the following disclaimer. 9290650Shselasky * 2. Redistributions in binary form must reproduce the above copyright 10290650Shselasky * notice, this list of conditions and the following disclaimer in the 11290650Shselasky * documentation and/or other materials provided with the distribution. 12290650Shselasky * 13290650Shselasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14290650Shselasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15290650Shselasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16290650Shselasky * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17290650Shselasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18290650Shselasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19290650Shselasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20290650Shselasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21290650Shselasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22290650Shselasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23290650Shselasky * SUCH DAMAGE. 24290650Shselasky * 25290650Shselasky * $FreeBSD: stable/11/sys/dev/mlx5/mlx5_core/mlx5_main.c 347880 2019-05-16 18:28:12Z hselasky $ 26290650Shselasky */ 27290650Shselasky 28290650Shselasky#include <linux/kmod.h> 29290650Shselasky#include <linux/module.h> 30290650Shselasky#include <linux/errno.h> 31290650Shselasky#include <linux/pci.h> 32290650Shselasky#include <linux/dma-mapping.h> 33290650Shselasky#include <linux/slab.h> 34290650Shselasky#include <linux/io-mapping.h> 35290650Shselasky#include <linux/interrupt.h> 36347802Shselasky#include <linux/hardirq.h> 37290650Shselasky#include <dev/mlx5/driver.h> 38290650Shselasky#include <dev/mlx5/cq.h> 39290650Shselasky#include <dev/mlx5/qp.h> 40290650Shselasky#include <dev/mlx5/srq.h> 41290650Shselasky#include <linux/delay.h> 42290650Shselasky#include <dev/mlx5/mlx5_ifc.h> 43341958Shselasky#include <dev/mlx5/mlx5_fpga/core.h> 44341958Shselasky#include <dev/mlx5/mlx5_lib/mlx5.h> 45290650Shselasky#include "mlx5_core.h" 46329200Shselasky#include "fs_core.h" 47290650Shselasky 48341948Shselaskystatic const char mlx5_version[] = "Mellanox Core driver " 49341948Shselasky DRIVER_VERSION " (" DRIVER_RELDATE ")"; 50290650ShselaskyMODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); 51290650ShselaskyMODULE_DESCRIPTION("Mellanox Connect-IB, ConnectX-4 core driver"); 52290650ShselaskyMODULE_LICENSE("Dual BSD/GPL"); 53290650ShselaskyMODULE_DEPEND(mlx5, linuxkpi, 1, 1, 1); 54347839ShselaskyMODULE_DEPEND(mlx5, mlxfw, 1, 1, 1); 55347847ShselaskyMODULE_DEPEND(mlx5, firmware, 1, 1, 1); 56290650ShselaskyMODULE_VERSION(mlx5, 1); 57290650Shselasky 58347835ShselaskySYSCTL_NODE(_hw, OID_AUTO, mlx5, CTLFLAG_RW, 0, "mlx5 hardware controls"); 59347835Shselasky 60290650Shselaskyint mlx5_core_debug_mask; 61347835ShselaskySYSCTL_INT(_hw_mlx5, OID_AUTO, debug_mask, CTLFLAG_RWTUN, 62347835Shselasky &mlx5_core_debug_mask, 0, 63347835Shselasky "debug mask: 1 = dump cmd data, 2 = dump cmd exec time, 3 = both. Default=0"); 64290650Shselasky 65290650Shselasky#define MLX5_DEFAULT_PROF 2 66347835Shselaskystatic int mlx5_prof_sel = MLX5_DEFAULT_PROF; 67347835ShselaskySYSCTL_INT(_hw_mlx5, OID_AUTO, prof_sel, CTLFLAG_RWTUN, 68347835Shselasky &mlx5_prof_sel, 0, 69347835Shselasky "profile selector. Valid range 0 - 2"); 70290650Shselasky 71347819Shselaskystatic int mlx5_fast_unload_enabled = 1; 72347819ShselaskySYSCTL_INT(_hw_mlx5, OID_AUTO, fast_unload_enabled, CTLFLAG_RWTUN, 73347819Shselasky &mlx5_fast_unload_enabled, 0, 74347819Shselasky "Set to enable fast unload. Clear to disable."); 75347819Shselasky 76290650Shselasky#define NUMA_NO_NODE -1 77290650Shselasky 78290650Shselaskystatic LIST_HEAD(intf_list); 79290650Shselaskystatic LIST_HEAD(dev_list); 80290650Shselaskystatic DEFINE_MUTEX(intf_mutex); 81290650Shselasky 82290650Shselaskystruct mlx5_device_context { 83290650Shselasky struct list_head list; 84290650Shselasky struct mlx5_interface *intf; 85290650Shselasky void *context; 86290650Shselasky}; 87290650Shselasky 88329209Shselaskyenum { 89329209Shselasky MLX5_ATOMIC_REQ_MODE_BE = 0x0, 90329209Shselasky MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS = 0x1, 91329209Shselasky}; 92329209Shselasky 93290650Shselaskystatic struct mlx5_profile profiles[] = { 94290650Shselasky [0] = { 95290650Shselasky .mask = 0, 96290650Shselasky }, 97290650Shselasky [1] = { 98290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE, 99290650Shselasky .log_max_qp = 12, 100290650Shselasky }, 101290650Shselasky [2] = { 102290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE | 103290650Shselasky MLX5_PROF_MASK_MR_CACHE, 104290650Shselasky .log_max_qp = 17, 105290650Shselasky .mr_cache[0] = { 106290650Shselasky .size = 500, 107290650Shselasky .limit = 250 108290650Shselasky }, 109290650Shselasky .mr_cache[1] = { 110290650Shselasky .size = 500, 111290650Shselasky .limit = 250 112290650Shselasky }, 113290650Shselasky .mr_cache[2] = { 114290650Shselasky .size = 500, 115290650Shselasky .limit = 250 116290650Shselasky }, 117290650Shselasky .mr_cache[3] = { 118290650Shselasky .size = 500, 119290650Shselasky .limit = 250 120290650Shselasky }, 121290650Shselasky .mr_cache[4] = { 122290650Shselasky .size = 500, 123290650Shselasky .limit = 250 124290650Shselasky }, 125290650Shselasky .mr_cache[5] = { 126290650Shselasky .size = 500, 127290650Shselasky .limit = 250 128290650Shselasky }, 129290650Shselasky .mr_cache[6] = { 130290650Shselasky .size = 500, 131290650Shselasky .limit = 250 132290650Shselasky }, 133290650Shselasky .mr_cache[7] = { 134290650Shselasky .size = 500, 135290650Shselasky .limit = 250 136290650Shselasky }, 137290650Shselasky .mr_cache[8] = { 138290650Shselasky .size = 500, 139290650Shselasky .limit = 250 140290650Shselasky }, 141290650Shselasky .mr_cache[9] = { 142290650Shselasky .size = 500, 143290650Shselasky .limit = 250 144290650Shselasky }, 145290650Shselasky .mr_cache[10] = { 146290650Shselasky .size = 500, 147290650Shselasky .limit = 250 148290650Shselasky }, 149290650Shselasky .mr_cache[11] = { 150290650Shselasky .size = 500, 151290650Shselasky .limit = 250 152290650Shselasky }, 153290650Shselasky .mr_cache[12] = { 154290650Shselasky .size = 64, 155290650Shselasky .limit = 32 156290650Shselasky }, 157290650Shselasky .mr_cache[13] = { 158290650Shselasky .size = 32, 159290650Shselasky .limit = 16 160290650Shselasky }, 161290650Shselasky .mr_cache[14] = { 162290650Shselasky .size = 16, 163290650Shselasky .limit = 8 164290650Shselasky }, 165290650Shselasky }, 166290650Shselasky [3] = { 167290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE, 168290650Shselasky .log_max_qp = 17, 169290650Shselasky }, 170290650Shselasky}; 171290650Shselasky 172290650Shselaskystatic int set_dma_caps(struct pci_dev *pdev) 173290650Shselasky{ 174290650Shselasky int err; 175290650Shselasky 176290650Shselasky err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 177290650Shselasky if (err) { 178290650Shselasky device_printf((&pdev->dev)->bsddev, "WARN: ""Warning: couldn't set 64-bit PCI DMA mask\n"); 179290650Shselasky err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 180290650Shselasky if (err) { 181290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Can't set PCI DMA mask, aborting\n"); 182290650Shselasky return err; 183290650Shselasky } 184290650Shselasky } 185290650Shselasky 186290650Shselasky err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 187290650Shselasky if (err) { 188290650Shselasky device_printf((&pdev->dev)->bsddev, "WARN: ""Warning: couldn't set 64-bit consistent PCI DMA mask\n"); 189290650Shselasky err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 190290650Shselasky if (err) { 191290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Can't set consistent PCI DMA mask, aborting\n"); 192290650Shselasky return err; 193290650Shselasky } 194290650Shselasky } 195290650Shselasky 196290650Shselasky dma_set_max_seg_size(&pdev->dev, 2u * 1024 * 1024 * 1024); 197290650Shselasky return err; 198290650Shselasky} 199290650Shselasky 200347862Shselaskyint mlx5_pci_read_power_status(struct mlx5_core_dev *dev, 201347862Shselasky u16 *p_power, u8 *p_status) 202347862Shselasky{ 203347862Shselasky u32 in[MLX5_ST_SZ_DW(mpein_reg)] = {}; 204347862Shselasky u32 out[MLX5_ST_SZ_DW(mpein_reg)] = {}; 205347862Shselasky int err; 206347862Shselasky 207347862Shselasky err = mlx5_core_access_reg(dev, in, sizeof(in), out, sizeof(out), 208347862Shselasky MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MPEIN, 0, 0); 209347862Shselasky 210347862Shselasky *p_status = MLX5_GET(mpein_reg, out, pwr_status); 211347862Shselasky *p_power = MLX5_GET(mpein_reg, out, pci_power); 212347862Shselasky return err; 213347862Shselasky} 214347862Shselasky 215331580Shselaskystatic int mlx5_pci_enable_device(struct mlx5_core_dev *dev) 216331580Shselasky{ 217331580Shselasky struct pci_dev *pdev = dev->pdev; 218331580Shselasky int err = 0; 219331580Shselasky 220331580Shselasky mutex_lock(&dev->pci_status_mutex); 221331580Shselasky if (dev->pci_status == MLX5_PCI_STATUS_DISABLED) { 222331580Shselasky err = pci_enable_device(pdev); 223331580Shselasky if (!err) 224331580Shselasky dev->pci_status = MLX5_PCI_STATUS_ENABLED; 225331580Shselasky } 226331580Shselasky mutex_unlock(&dev->pci_status_mutex); 227331580Shselasky 228331580Shselasky return err; 229331580Shselasky} 230331580Shselasky 231331580Shselaskystatic void mlx5_pci_disable_device(struct mlx5_core_dev *dev) 232331580Shselasky{ 233331580Shselasky struct pci_dev *pdev = dev->pdev; 234331580Shselasky 235331580Shselasky mutex_lock(&dev->pci_status_mutex); 236331580Shselasky if (dev->pci_status == MLX5_PCI_STATUS_ENABLED) { 237331580Shselasky pci_disable_device(pdev); 238331580Shselasky dev->pci_status = MLX5_PCI_STATUS_DISABLED; 239331580Shselasky } 240331580Shselasky mutex_unlock(&dev->pci_status_mutex); 241331580Shselasky} 242331580Shselasky 243290650Shselaskystatic int request_bar(struct pci_dev *pdev) 244290650Shselasky{ 245290650Shselasky int err = 0; 246290650Shselasky 247290650Shselasky if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { 248290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Missing registers BAR, aborting\n"); 249290650Shselasky return -ENODEV; 250290650Shselasky } 251290650Shselasky 252290650Shselasky err = pci_request_regions(pdev, DRIVER_NAME); 253290650Shselasky if (err) 254290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Couldn't get PCI resources, aborting\n"); 255290650Shselasky 256290650Shselasky return err; 257290650Shselasky} 258290650Shselasky 259290650Shselaskystatic void release_bar(struct pci_dev *pdev) 260290650Shselasky{ 261290650Shselasky pci_release_regions(pdev); 262290650Shselasky} 263290650Shselasky 264290650Shselaskystatic int mlx5_enable_msix(struct mlx5_core_dev *dev) 265290650Shselasky{ 266290650Shselasky struct mlx5_priv *priv = &dev->priv; 267290650Shselasky struct mlx5_eq_table *table = &priv->eq_table; 268290650Shselasky int num_eqs = 1 << MLX5_CAP_GEN(dev, log_max_eq); 269338554Shselasky int limit = dev->msix_eqvec; 270337112Shselasky int nvec = MLX5_EQ_VEC_COMP_BASE; 271290650Shselasky int i; 272290650Shselasky 273337112Shselasky if (limit > 0) 274337112Shselasky nvec += limit; 275337112Shselasky else 276337112Shselasky nvec += MLX5_CAP_GEN(dev, num_ports) * num_online_cpus(); 277337112Shselasky 278290650Shselasky nvec = min_t(int, nvec, num_eqs); 279290650Shselasky if (nvec <= MLX5_EQ_VEC_COMP_BASE) 280290650Shselasky return -ENOMEM; 281290650Shselasky 282290650Shselasky priv->msix_arr = kzalloc(nvec * sizeof(*priv->msix_arr), GFP_KERNEL); 283290650Shselasky 284290650Shselasky priv->irq_info = kzalloc(nvec * sizeof(*priv->irq_info), GFP_KERNEL); 285290650Shselasky 286290650Shselasky for (i = 0; i < nvec; i++) 287290650Shselasky priv->msix_arr[i].entry = i; 288290650Shselasky 289290650Shselasky nvec = pci_enable_msix_range(dev->pdev, priv->msix_arr, 290290650Shselasky MLX5_EQ_VEC_COMP_BASE + 1, nvec); 291290650Shselasky if (nvec < 0) 292290650Shselasky return nvec; 293290650Shselasky 294290650Shselasky table->num_comp_vectors = nvec - MLX5_EQ_VEC_COMP_BASE; 295290650Shselasky 296290650Shselasky return 0; 297290650Shselasky 298290650Shselasky} 299290650Shselasky 300290650Shselaskystatic void mlx5_disable_msix(struct mlx5_core_dev *dev) 301290650Shselasky{ 302290650Shselasky struct mlx5_priv *priv = &dev->priv; 303290650Shselasky 304290650Shselasky pci_disable_msix(dev->pdev); 305290650Shselasky kfree(priv->irq_info); 306290650Shselasky kfree(priv->msix_arr); 307290650Shselasky} 308290650Shselasky 309290650Shselaskystruct mlx5_reg_host_endianess { 310290650Shselasky u8 he; 311290650Shselasky u8 rsvd[15]; 312290650Shselasky}; 313290650Shselasky 314290650Shselasky 315290650Shselasky#define CAP_MASK(pos, size) ((u64)((1 << (size)) - 1) << (pos)) 316290650Shselasky 317290650Shselaskyenum { 318290650Shselasky MLX5_CAP_BITS_RW_MASK = CAP_MASK(MLX5_CAP_OFF_CMDIF_CSUM, 2) | 319306233Shselasky MLX5_DEV_CAP_FLAG_DCT | 320306233Shselasky MLX5_DEV_CAP_FLAG_DRAIN_SIGERR, 321290650Shselasky}; 322290650Shselasky 323290650Shselaskystatic u16 to_fw_pkey_sz(u32 size) 324290650Shselasky{ 325290650Shselasky switch (size) { 326290650Shselasky case 128: 327290650Shselasky return 0; 328290650Shselasky case 256: 329290650Shselasky return 1; 330290650Shselasky case 512: 331290650Shselasky return 2; 332290650Shselasky case 1024: 333290650Shselasky return 3; 334290650Shselasky case 2048: 335290650Shselasky return 4; 336290650Shselasky case 4096: 337290650Shselasky return 5; 338290650Shselasky default: 339290650Shselasky printf("mlx5_core: WARN: ""invalid pkey table size %d\n", size); 340290650Shselasky return 0; 341290650Shselasky } 342290650Shselasky} 343290650Shselasky 344331807Shselaskystatic int mlx5_core_get_caps_mode(struct mlx5_core_dev *dev, 345331807Shselasky enum mlx5_cap_type cap_type, 346331807Shselasky enum mlx5_cap_mode cap_mode) 347290650Shselasky{ 348290650Shselasky u8 in[MLX5_ST_SZ_BYTES(query_hca_cap_in)]; 349290650Shselasky int out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out); 350290650Shselasky void *out, *hca_caps; 351290650Shselasky u16 opmod = (cap_type << 1) | (cap_mode & 0x01); 352290650Shselasky int err; 353290650Shselasky 354290650Shselasky memset(in, 0, sizeof(in)); 355290650Shselasky out = kzalloc(out_sz, GFP_KERNEL); 356290650Shselasky 357290650Shselasky MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP); 358290650Shselasky MLX5_SET(query_hca_cap_in, in, op_mod, opmod); 359290650Shselasky err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz); 360290650Shselasky if (err) { 361290650Shselasky mlx5_core_warn(dev, 362290650Shselasky "QUERY_HCA_CAP : type(%x) opmode(%x) Failed(%d)\n", 363290650Shselasky cap_type, cap_mode, err); 364290650Shselasky goto query_ex; 365290650Shselasky } 366290650Shselasky 367290650Shselasky hca_caps = MLX5_ADDR_OF(query_hca_cap_out, out, capability); 368290650Shselasky 369290650Shselasky switch (cap_mode) { 370290650Shselasky case HCA_CAP_OPMOD_GET_MAX: 371290650Shselasky memcpy(dev->hca_caps_max[cap_type], hca_caps, 372290650Shselasky MLX5_UN_SZ_BYTES(hca_cap_union)); 373290650Shselasky break; 374290650Shselasky case HCA_CAP_OPMOD_GET_CUR: 375290650Shselasky memcpy(dev->hca_caps_cur[cap_type], hca_caps, 376290650Shselasky MLX5_UN_SZ_BYTES(hca_cap_union)); 377290650Shselasky break; 378290650Shselasky default: 379290650Shselasky mlx5_core_warn(dev, 380290650Shselasky "Tried to query dev cap type(%x) with wrong opmode(%x)\n", 381290650Shselasky cap_type, cap_mode); 382290650Shselasky err = -EINVAL; 383290650Shselasky break; 384290650Shselasky } 385290650Shselaskyquery_ex: 386290650Shselasky kfree(out); 387290650Shselasky return err; 388290650Shselasky} 389290650Shselasky 390331807Shselaskyint mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type) 391331807Shselasky{ 392331807Shselasky int ret; 393331807Shselasky 394331807Shselasky ret = mlx5_core_get_caps_mode(dev, cap_type, HCA_CAP_OPMOD_GET_CUR); 395331807Shselasky if (ret) 396331807Shselasky return ret; 397331807Shselasky 398331807Shselasky return mlx5_core_get_caps_mode(dev, cap_type, HCA_CAP_OPMOD_GET_MAX); 399331807Shselasky} 400331807Shselasky 401290650Shselaskystatic int set_caps(struct mlx5_core_dev *dev, void *in, int in_sz) 402290650Shselasky{ 403331807Shselasky u32 out[MLX5_ST_SZ_DW(set_hca_cap_out)] = {0}; 404290650Shselasky 405290650Shselasky MLX5_SET(set_hca_cap_in, in, opcode, MLX5_CMD_OP_SET_HCA_CAP); 406290650Shselasky 407331807Shselasky return mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out)); 408290650Shselasky} 409290650Shselasky 410290650Shselaskystatic int handle_hca_cap(struct mlx5_core_dev *dev) 411290650Shselasky{ 412290650Shselasky void *set_ctx = NULL; 413290650Shselasky struct mlx5_profile *prof = dev->profile; 414290650Shselasky int err = -ENOMEM; 415290650Shselasky int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in); 416290650Shselasky void *set_hca_cap; 417290650Shselasky 418290650Shselasky set_ctx = kzalloc(set_sz, GFP_KERNEL); 419290650Shselasky 420331807Shselasky err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL); 421290650Shselasky if (err) 422290650Shselasky goto query_ex; 423290650Shselasky 424290650Shselasky set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, 425290650Shselasky capability); 426290650Shselasky memcpy(set_hca_cap, dev->hca_caps_cur[MLX5_CAP_GENERAL], 427290650Shselasky MLX5_ST_SZ_BYTES(cmd_hca_cap)); 428290650Shselasky 429290650Shselasky mlx5_core_dbg(dev, "Current Pkey table size %d Setting new size %d\n", 430290650Shselasky mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size)), 431290650Shselasky 128); 432290650Shselasky /* we limit the size of the pkey table to 128 entries for now */ 433290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, pkey_table_size, 434290650Shselasky to_fw_pkey_sz(128)); 435290650Shselasky 436290650Shselasky if (prof->mask & MLX5_PROF_MASK_QP_SIZE) 437290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, log_max_qp, 438290650Shselasky prof->log_max_qp); 439290650Shselasky 440290650Shselasky /* disable cmdif checksum */ 441290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, cmdif_checksum, 0); 442290650Shselasky 443306233Shselasky /* enable drain sigerr */ 444306233Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, drain_sigerr, 1); 445306233Shselasky 446290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, log_uar_page_sz, PAGE_SHIFT - 12); 447290650Shselasky 448290650Shselasky err = set_caps(dev, set_ctx, set_sz); 449290650Shselasky 450290650Shselaskyquery_ex: 451290650Shselasky kfree(set_ctx); 452290650Shselasky return err; 453290650Shselasky} 454290650Shselasky 455329209Shselaskystatic int handle_hca_cap_atomic(struct mlx5_core_dev *dev) 456329209Shselasky{ 457329209Shselasky void *set_ctx; 458329209Shselasky void *set_hca_cap; 459329209Shselasky int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in); 460329209Shselasky int req_endianness; 461329209Shselasky int err; 462329209Shselasky 463329209Shselasky if (MLX5_CAP_GEN(dev, atomic)) { 464331807Shselasky err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC); 465329209Shselasky if (err) 466329209Shselasky return err; 467329209Shselasky } else { 468329209Shselasky return 0; 469329209Shselasky } 470329209Shselasky 471329209Shselasky req_endianness = 472329209Shselasky MLX5_CAP_ATOMIC(dev, 473329209Shselasky supported_atomic_req_8B_endianess_mode_1); 474329209Shselasky 475329209Shselasky if (req_endianness != MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS) 476329209Shselasky return 0; 477329209Shselasky 478329209Shselasky set_ctx = kzalloc(set_sz, GFP_KERNEL); 479329209Shselasky if (!set_ctx) 480329209Shselasky return -ENOMEM; 481329209Shselasky 482329209Shselasky MLX5_SET(set_hca_cap_in, set_ctx, op_mod, 483329209Shselasky MLX5_SET_HCA_CAP_OP_MOD_ATOMIC << 1); 484329209Shselasky set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability); 485329209Shselasky 486329209Shselasky /* Set requestor to host endianness */ 487329209Shselasky MLX5_SET(atomic_caps, set_hca_cap, atomic_req_8B_endianess_mode, 488329209Shselasky MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS); 489329209Shselasky 490329209Shselasky err = set_caps(dev, set_ctx, set_sz); 491329209Shselasky 492329209Shselasky kfree(set_ctx); 493329209Shselasky return err; 494329209Shselasky} 495329209Shselasky 496290650Shselaskystatic int set_hca_ctrl(struct mlx5_core_dev *dev) 497290650Shselasky{ 498290650Shselasky struct mlx5_reg_host_endianess he_in; 499290650Shselasky struct mlx5_reg_host_endianess he_out; 500290650Shselasky int err; 501290650Shselasky 502306233Shselasky if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH && 503306233Shselasky !MLX5_CAP_GEN(dev, roce)) 504306233Shselasky return 0; 505306233Shselasky 506290650Shselasky memset(&he_in, 0, sizeof(he_in)); 507290650Shselasky he_in.he = MLX5_SET_HOST_ENDIANNESS; 508290650Shselasky err = mlx5_core_access_reg(dev, &he_in, sizeof(he_in), 509290650Shselasky &he_out, sizeof(he_out), 510290650Shselasky MLX5_REG_HOST_ENDIANNESS, 0, 1); 511290650Shselasky return err; 512290650Shselasky} 513290650Shselasky 514290650Shselaskystatic int mlx5_core_enable_hca(struct mlx5_core_dev *dev) 515290650Shselasky{ 516331807Shselasky u32 out[MLX5_ST_SZ_DW(enable_hca_out)] = {0}; 517331807Shselasky u32 in[MLX5_ST_SZ_DW(enable_hca_in)] = {0}; 518290650Shselasky 519290650Shselasky MLX5_SET(enable_hca_in, in, opcode, MLX5_CMD_OP_ENABLE_HCA); 520331807Shselasky return mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out)); 521290650Shselasky} 522290650Shselasky 523290650Shselaskystatic int mlx5_core_disable_hca(struct mlx5_core_dev *dev) 524290650Shselasky{ 525331807Shselasky u32 out[MLX5_ST_SZ_DW(disable_hca_out)] = {0}; 526331807Shselasky u32 in[MLX5_ST_SZ_DW(disable_hca_in)] = {0}; 527290650Shselasky 528290650Shselasky MLX5_SET(disable_hca_in, in, opcode, MLX5_CMD_OP_DISABLE_HCA); 529331807Shselasky return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); 530290650Shselasky} 531290650Shselasky 532290650Shselaskystatic int mlx5_core_set_issi(struct mlx5_core_dev *dev) 533290650Shselasky{ 534331807Shselasky u32 query_in[MLX5_ST_SZ_DW(query_issi_in)] = {0}; 535331807Shselasky u32 query_out[MLX5_ST_SZ_DW(query_issi_out)] = {0}; 536331807Shselasky u32 sup_issi; 537290650Shselasky int err; 538290650Shselasky 539290650Shselasky MLX5_SET(query_issi_in, query_in, opcode, MLX5_CMD_OP_QUERY_ISSI); 540290650Shselasky 541331807Shselasky err = mlx5_cmd_exec(dev, query_in, sizeof(query_in), query_out, sizeof(query_out)); 542290650Shselasky if (err) { 543331807Shselasky u32 syndrome; 544331807Shselasky u8 status; 545331807Shselasky 546331807Shselasky mlx5_cmd_mbox_status(query_out, &status, &syndrome); 547331807Shselasky if (status == MLX5_CMD_STAT_BAD_OP_ERR) { 548290650Shselasky pr_debug("Only ISSI 0 is supported\n"); 549290650Shselasky return 0; 550290650Shselasky } 551290650Shselasky 552290650Shselasky printf("mlx5_core: ERR: ""failed to query ISSI\n"); 553290650Shselasky return err; 554290650Shselasky } 555290650Shselasky 556290650Shselasky sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0); 557290650Shselasky 558290650Shselasky if (sup_issi & (1 << 1)) { 559331807Shselasky u32 set_in[MLX5_ST_SZ_DW(set_issi_in)] = {0}; 560331807Shselasky u32 set_out[MLX5_ST_SZ_DW(set_issi_out)] = {0}; 561290650Shselasky 562290650Shselasky MLX5_SET(set_issi_in, set_in, opcode, MLX5_CMD_OP_SET_ISSI); 563290650Shselasky MLX5_SET(set_issi_in, set_in, current_issi, 1); 564290650Shselasky 565331807Shselasky err = mlx5_cmd_exec(dev, set_in, sizeof(set_in), set_out, sizeof(set_out)); 566290650Shselasky if (err) { 567331807Shselasky printf("mlx5_core: ERR: ""failed to set ISSI=1 err(%d)\n", err); 568290650Shselasky return err; 569290650Shselasky } 570290650Shselasky 571290650Shselasky dev->issi = 1; 572290650Shselasky 573290650Shselasky return 0; 574290650Shselasky } else if (sup_issi & (1 << 0)) { 575290650Shselasky return 0; 576290650Shselasky } 577290650Shselasky 578290650Shselasky return -ENOTSUPP; 579290650Shselasky} 580290650Shselasky 581290650Shselasky 582290650Shselaskyint mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn, int *irqn) 583290650Shselasky{ 584290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 585290650Shselasky struct mlx5_eq *eq; 586290650Shselasky int err = -ENOENT; 587290650Shselasky 588290650Shselasky spin_lock(&table->lock); 589290650Shselasky list_for_each_entry(eq, &table->comp_eqs_list, list) { 590290650Shselasky if (eq->index == vector) { 591290650Shselasky *eqn = eq->eqn; 592290650Shselasky *irqn = eq->irqn; 593290650Shselasky err = 0; 594290650Shselasky break; 595290650Shselasky } 596290650Shselasky } 597290650Shselasky spin_unlock(&table->lock); 598290650Shselasky 599290650Shselasky return err; 600290650Shselasky} 601290650ShselaskyEXPORT_SYMBOL(mlx5_vector2eqn); 602290650Shselasky 603290650Shselaskyint mlx5_rename_eq(struct mlx5_core_dev *dev, int eq_ix, char *name) 604290650Shselasky{ 605290650Shselasky struct mlx5_priv *priv = &dev->priv; 606290650Shselasky struct mlx5_eq_table *table = &priv->eq_table; 607290650Shselasky struct mlx5_eq *eq; 608290650Shselasky int err = -ENOENT; 609290650Shselasky 610290650Shselasky spin_lock(&table->lock); 611290650Shselasky list_for_each_entry(eq, &table->comp_eqs_list, list) { 612290650Shselasky if (eq->index == eq_ix) { 613290650Shselasky int irq_ix = eq_ix + MLX5_EQ_VEC_COMP_BASE; 614290650Shselasky 615290650Shselasky snprintf(priv->irq_info[irq_ix].name, MLX5_MAX_IRQ_NAME, 616290650Shselasky "%s-%d", name, eq_ix); 617290650Shselasky 618290650Shselasky err = 0; 619290650Shselasky break; 620290650Shselasky } 621290650Shselasky } 622290650Shselasky spin_unlock(&table->lock); 623290650Shselasky 624290650Shselasky return err; 625290650Shselasky} 626290650Shselasky 627290650Shselaskystatic void free_comp_eqs(struct mlx5_core_dev *dev) 628290650Shselasky{ 629290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 630290650Shselasky struct mlx5_eq *eq, *n; 631290650Shselasky 632290650Shselasky spin_lock(&table->lock); 633290650Shselasky list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) { 634290650Shselasky list_del(&eq->list); 635290650Shselasky spin_unlock(&table->lock); 636290650Shselasky if (mlx5_destroy_unmap_eq(dev, eq)) 637290650Shselasky mlx5_core_warn(dev, "failed to destroy EQ 0x%x\n", 638290650Shselasky eq->eqn); 639290650Shselasky kfree(eq); 640290650Shselasky spin_lock(&table->lock); 641290650Shselasky } 642290650Shselasky spin_unlock(&table->lock); 643290650Shselasky} 644290650Shselasky 645290650Shselaskystatic int alloc_comp_eqs(struct mlx5_core_dev *dev) 646290650Shselasky{ 647290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 648290650Shselasky char name[MLX5_MAX_IRQ_NAME]; 649290650Shselasky struct mlx5_eq *eq; 650290650Shselasky int ncomp_vec; 651290650Shselasky int nent; 652290650Shselasky int err; 653290650Shselasky int i; 654290650Shselasky 655290650Shselasky INIT_LIST_HEAD(&table->comp_eqs_list); 656290650Shselasky ncomp_vec = table->num_comp_vectors; 657290650Shselasky nent = MLX5_COMP_EQ_SIZE; 658290650Shselasky for (i = 0; i < ncomp_vec; i++) { 659290650Shselasky eq = kzalloc(sizeof(*eq), GFP_KERNEL); 660290650Shselasky 661290650Shselasky snprintf(name, MLX5_MAX_IRQ_NAME, "mlx5_comp%d", i); 662290650Shselasky err = mlx5_create_map_eq(dev, eq, 663290650Shselasky i + MLX5_EQ_VEC_COMP_BASE, nent, 0, 664290650Shselasky name, &dev->priv.uuari.uars[0]); 665290650Shselasky if (err) { 666290650Shselasky kfree(eq); 667290650Shselasky goto clean; 668290650Shselasky } 669290650Shselasky mlx5_core_dbg(dev, "allocated completion EQN %d\n", eq->eqn); 670290650Shselasky eq->index = i; 671290650Shselasky spin_lock(&table->lock); 672290650Shselasky list_add_tail(&eq->list, &table->comp_eqs_list); 673290650Shselasky spin_unlock(&table->lock); 674290650Shselasky } 675290650Shselasky 676290650Shselasky return 0; 677290650Shselasky 678290650Shselaskyclean: 679290650Shselasky free_comp_eqs(dev); 680290650Shselasky return err; 681290650Shselasky} 682290650Shselasky 683290650Shselaskystatic int map_bf_area(struct mlx5_core_dev *dev) 684290650Shselasky{ 685290650Shselasky resource_size_t bf_start = pci_resource_start(dev->pdev, 0); 686290650Shselasky resource_size_t bf_len = pci_resource_len(dev->pdev, 0); 687290650Shselasky 688290650Shselasky dev->priv.bf_mapping = io_mapping_create_wc(bf_start, bf_len); 689290650Shselasky 690290650Shselasky return dev->priv.bf_mapping ? 0 : -ENOMEM; 691290650Shselasky} 692290650Shselasky 693290650Shselaskystatic void unmap_bf_area(struct mlx5_core_dev *dev) 694290650Shselasky{ 695290650Shselasky if (dev->priv.bf_mapping) 696290650Shselasky io_mapping_free(dev->priv.bf_mapping); 697290650Shselasky} 698290650Shselasky 699290650Shselaskystatic inline int fw_initializing(struct mlx5_core_dev *dev) 700290650Shselasky{ 701290650Shselasky return ioread32be(&dev->iseg->initializing) >> 31; 702290650Shselasky} 703290650Shselasky 704290650Shselaskystatic int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili) 705290650Shselasky{ 706290650Shselasky u64 end = jiffies + msecs_to_jiffies(max_wait_mili); 707290650Shselasky int err = 0; 708290650Shselasky 709290650Shselasky while (fw_initializing(dev)) { 710290650Shselasky if (time_after(jiffies, end)) { 711290650Shselasky err = -EBUSY; 712290650Shselasky break; 713290650Shselasky } 714290650Shselasky msleep(FW_INIT_WAIT_MS); 715290650Shselasky } 716290650Shselasky 717290650Shselasky return err; 718290650Shselasky} 719290650Shselasky 720331580Shselaskystatic void mlx5_add_device(struct mlx5_interface *intf, struct mlx5_priv *priv) 721290650Shselasky{ 722331580Shselasky struct mlx5_device_context *dev_ctx; 723331580Shselasky struct mlx5_core_dev *dev = container_of(priv, struct mlx5_core_dev, priv); 724331580Shselasky 725331580Shselasky dev_ctx = kzalloc(sizeof(*dev_ctx), GFP_KERNEL); 726331580Shselasky if (!dev_ctx) 727331580Shselasky return; 728331580Shselasky 729331580Shselasky dev_ctx->intf = intf; 730331580Shselasky CURVNET_SET_QUIET(vnet0); 731331580Shselasky dev_ctx->context = intf->add(dev); 732331580Shselasky CURVNET_RESTORE(); 733331580Shselasky 734331580Shselasky if (dev_ctx->context) { 735331580Shselasky spin_lock_irq(&priv->ctx_lock); 736331580Shselasky list_add_tail(&dev_ctx->list, &priv->ctx_list); 737331580Shselasky spin_unlock_irq(&priv->ctx_lock); 738331580Shselasky } else { 739331580Shselasky kfree(dev_ctx); 740331580Shselasky } 741331580Shselasky} 742331580Shselasky 743331580Shselaskystatic void mlx5_remove_device(struct mlx5_interface *intf, struct mlx5_priv *priv) 744331580Shselasky{ 745331580Shselasky struct mlx5_device_context *dev_ctx; 746331580Shselasky struct mlx5_core_dev *dev = container_of(priv, struct mlx5_core_dev, priv); 747331580Shselasky 748331580Shselasky list_for_each_entry(dev_ctx, &priv->ctx_list, list) 749331580Shselasky if (dev_ctx->intf == intf) { 750331580Shselasky spin_lock_irq(&priv->ctx_lock); 751331580Shselasky list_del(&dev_ctx->list); 752331580Shselasky spin_unlock_irq(&priv->ctx_lock); 753331580Shselasky 754331580Shselasky intf->remove(dev, dev_ctx->context); 755331580Shselasky kfree(dev_ctx); 756331580Shselasky return; 757331580Shselasky } 758331580Shselasky} 759331580Shselasky 760341958Shselaskyint 761341958Shselaskymlx5_register_device(struct mlx5_core_dev *dev) 762331580Shselasky{ 763290650Shselasky struct mlx5_priv *priv = &dev->priv; 764331580Shselasky struct mlx5_interface *intf; 765290650Shselasky 766331580Shselasky mutex_lock(&intf_mutex); 767331580Shselasky list_add_tail(&priv->dev_list, &dev_list); 768331580Shselasky list_for_each_entry(intf, &intf_list, list) 769331580Shselasky mlx5_add_device(intf, priv); 770331580Shselasky mutex_unlock(&intf_mutex); 771331580Shselasky 772331580Shselasky return 0; 773331580Shselasky} 774331580Shselasky 775341958Shselaskyvoid 776341958Shselaskymlx5_unregister_device(struct mlx5_core_dev *dev) 777331580Shselasky{ 778331580Shselasky struct mlx5_priv *priv = &dev->priv; 779331580Shselasky struct mlx5_interface *intf; 780331580Shselasky 781331580Shselasky mutex_lock(&intf_mutex); 782331580Shselasky list_for_each_entry(intf, &intf_list, list) 783331580Shselasky mlx5_remove_device(intf, priv); 784331580Shselasky list_del(&priv->dev_list); 785331580Shselasky mutex_unlock(&intf_mutex); 786331580Shselasky} 787331580Shselasky 788331580Shselaskyint mlx5_register_interface(struct mlx5_interface *intf) 789331580Shselasky{ 790331580Shselasky struct mlx5_priv *priv; 791331580Shselasky 792331580Shselasky if (!intf->add || !intf->remove) 793331580Shselasky return -EINVAL; 794331580Shselasky 795331580Shselasky mutex_lock(&intf_mutex); 796331580Shselasky list_add_tail(&intf->list, &intf_list); 797331580Shselasky list_for_each_entry(priv, &dev_list, dev_list) 798331580Shselasky mlx5_add_device(intf, priv); 799331580Shselasky mutex_unlock(&intf_mutex); 800331580Shselasky 801331580Shselasky return 0; 802331580Shselasky} 803331580ShselaskyEXPORT_SYMBOL(mlx5_register_interface); 804331580Shselasky 805331580Shselaskyvoid mlx5_unregister_interface(struct mlx5_interface *intf) 806331580Shselasky{ 807331580Shselasky struct mlx5_priv *priv; 808331580Shselasky 809331580Shselasky mutex_lock(&intf_mutex); 810331580Shselasky list_for_each_entry(priv, &dev_list, dev_list) 811331580Shselasky mlx5_remove_device(intf, priv); 812331580Shselasky list_del(&intf->list); 813331580Shselasky mutex_unlock(&intf_mutex); 814331580Shselasky} 815331580ShselaskyEXPORT_SYMBOL(mlx5_unregister_interface); 816331580Shselasky 817331580Shselaskyvoid *mlx5_get_protocol_dev(struct mlx5_core_dev *mdev, int protocol) 818331580Shselasky{ 819331580Shselasky struct mlx5_priv *priv = &mdev->priv; 820331580Shselasky struct mlx5_device_context *dev_ctx; 821331580Shselasky unsigned long flags; 822331580Shselasky void *result = NULL; 823331580Shselasky 824331580Shselasky spin_lock_irqsave(&priv->ctx_lock, flags); 825331580Shselasky 826331580Shselasky list_for_each_entry(dev_ctx, &mdev->priv.ctx_list, list) 827331580Shselasky if ((dev_ctx->intf->protocol == protocol) && 828331580Shselasky dev_ctx->intf->get_dev) { 829331580Shselasky result = dev_ctx->intf->get_dev(dev_ctx->context); 830331580Shselasky break; 831331580Shselasky } 832331580Shselasky 833331580Shselasky spin_unlock_irqrestore(&priv->ctx_lock, flags); 834331580Shselasky 835331580Shselasky return result; 836331580Shselasky} 837331580ShselaskyEXPORT_SYMBOL(mlx5_get_protocol_dev); 838331580Shselasky 839347853Shselaskystatic int mlx5_auto_fw_update; 840347853ShselaskySYSCTL_INT(_hw_mlx5, OID_AUTO, auto_fw_update, CTLFLAG_RDTUN | CTLFLAG_NOFETCH, 841347853Shselasky &mlx5_auto_fw_update, 0, 842347853Shselasky "Allow automatic firmware update on driver start"); 843347847Shselaskystatic int 844347847Shselaskymlx5_firmware_update(struct mlx5_core_dev *dev) 845347847Shselasky{ 846347847Shselasky const struct firmware *fw; 847347847Shselasky int err; 848347847Shselasky 849347853Shselasky TUNABLE_INT_FETCH("hw.mlx5.auto_fw_update", &mlx5_auto_fw_update); 850347853Shselasky if (!mlx5_auto_fw_update) 851347853Shselasky return (0); 852347847Shselasky fw = firmware_get("mlx5fw_mfa"); 853347847Shselasky if (fw) { 854347847Shselasky err = mlx5_firmware_flash(dev, fw); 855347847Shselasky firmware_put(fw, FIRMWARE_UNLOAD); 856347847Shselasky } 857347847Shselasky else 858347847Shselasky return (-ENOENT); 859347847Shselasky 860347847Shselasky return err; 861347847Shselasky} 862347847Shselasky 863331580Shselaskystatic int mlx5_pci_init(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 864331580Shselasky{ 865331580Shselasky struct pci_dev *pdev = dev->pdev; 866331580Shselasky int err = 0; 867331580Shselasky 868290650Shselasky pci_set_drvdata(dev->pdev, dev); 869290650Shselasky strncpy(priv->name, dev_name(&pdev->dev), MLX5_MAX_NAME_LEN); 870290650Shselasky priv->name[MLX5_MAX_NAME_LEN - 1] = 0; 871290650Shselasky 872290650Shselasky mutex_init(&priv->pgdir_mutex); 873290650Shselasky INIT_LIST_HEAD(&priv->pgdir_list); 874290650Shselasky spin_lock_init(&priv->mkey_lock); 875290650Shselasky 876290650Shselasky priv->numa_node = NUMA_NO_NODE; 877290650Shselasky 878331580Shselasky err = mlx5_pci_enable_device(dev); 879290650Shselasky if (err) { 880290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Cannot enable PCI device, aborting\n"); 881290650Shselasky goto err_dbg; 882290650Shselasky } 883290650Shselasky 884290650Shselasky err = request_bar(pdev); 885290650Shselasky if (err) { 886290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""error requesting BARs, aborting\n"); 887290650Shselasky goto err_disable; 888290650Shselasky } 889290650Shselasky 890290650Shselasky pci_set_master(pdev); 891290650Shselasky 892290650Shselasky err = set_dma_caps(pdev); 893290650Shselasky if (err) { 894290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed setting DMA capabilities mask, aborting\n"); 895290650Shselasky goto err_clr_master; 896290650Shselasky } 897290650Shselasky 898329212Shselasky dev->iseg_base = pci_resource_start(dev->pdev, 0); 899329212Shselasky dev->iseg = ioremap(dev->iseg_base, sizeof(*dev->iseg)); 900290650Shselasky if (!dev->iseg) { 901290650Shselasky err = -ENOMEM; 902290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed mapping initialization segment, aborting\n"); 903290650Shselasky goto err_clr_master; 904290650Shselasky } 905331580Shselasky 906337105Shselasky return 0; 907331585Shselasky 908331580Shselaskyerr_clr_master: 909331580Shselasky release_bar(dev->pdev); 910331580Shselaskyerr_disable: 911331580Shselasky mlx5_pci_disable_device(dev); 912331580Shselaskyerr_dbg: 913331580Shselasky return err; 914331580Shselasky} 915331580Shselasky 916331580Shselaskystatic void mlx5_pci_close(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 917331580Shselasky{ 918331580Shselasky iounmap(dev->iseg); 919331580Shselasky release_bar(dev->pdev); 920331580Shselasky mlx5_pci_disable_device(dev); 921331580Shselasky} 922331580Shselasky 923331810Shselaskystatic int mlx5_init_once(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 924331580Shselasky{ 925331580Shselasky struct pci_dev *pdev = dev->pdev; 926331580Shselasky int err; 927331580Shselasky 928337103Shselasky err = mlx5_vsc_find_cap(dev); 929337103Shselasky if (err) 930337103Shselasky dev_err(&pdev->dev, "Unable to find vendor specific capabilities\n"); 931331815Shselasky 932331810Shselasky err = mlx5_query_hca_caps(dev); 933331810Shselasky if (err) { 934331810Shselasky dev_err(&pdev->dev, "query hca failed\n"); 935331810Shselasky goto out; 936331810Shselasky } 937331810Shselasky 938331810Shselasky err = mlx5_query_board_id(dev); 939331810Shselasky if (err) { 940331810Shselasky dev_err(&pdev->dev, "query board id failed\n"); 941331810Shselasky goto out; 942331810Shselasky } 943331810Shselasky 944331810Shselasky err = mlx5_eq_init(dev); 945331810Shselasky if (err) { 946331810Shselasky dev_err(&pdev->dev, "failed to initialize eq\n"); 947331810Shselasky goto out; 948331810Shselasky } 949331810Shselasky 950331810Shselasky MLX5_INIT_DOORBELL_LOCK(&priv->cq_uar_lock); 951331810Shselasky 952331810Shselasky err = mlx5_init_cq_table(dev); 953331810Shselasky if (err) { 954331810Shselasky dev_err(&pdev->dev, "failed to initialize cq table\n"); 955331810Shselasky goto err_eq_cleanup; 956331810Shselasky } 957331810Shselasky 958331810Shselasky mlx5_init_qp_table(dev); 959331810Shselasky mlx5_init_srq_table(dev); 960331810Shselasky mlx5_init_mr_table(dev); 961331810Shselasky 962341958Shselasky mlx5_init_reserved_gids(dev); 963341958Shselasky mlx5_fpga_init(dev); 964341958Shselasky 965331810Shselasky return 0; 966331810Shselasky 967331810Shselaskyerr_eq_cleanup: 968331810Shselasky mlx5_eq_cleanup(dev); 969331810Shselasky 970331810Shselaskyout: 971331810Shselasky return err; 972331810Shselasky} 973331810Shselasky 974331810Shselaskystatic void mlx5_cleanup_once(struct mlx5_core_dev *dev) 975331810Shselasky{ 976341958Shselasky mlx5_fpga_cleanup(dev); 977341958Shselasky mlx5_cleanup_reserved_gids(dev); 978331810Shselasky mlx5_cleanup_mr_table(dev); 979331810Shselasky mlx5_cleanup_srq_table(dev); 980331810Shselasky mlx5_cleanup_qp_table(dev); 981331810Shselasky mlx5_cleanup_cq_table(dev); 982331810Shselasky mlx5_eq_cleanup(dev); 983331810Shselasky} 984331810Shselasky 985331810Shselaskystatic int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, 986331810Shselasky bool boot) 987331810Shselasky{ 988331810Shselasky struct pci_dev *pdev = dev->pdev; 989331810Shselasky int err; 990331810Shselasky 991331580Shselasky mutex_lock(&dev->intf_state_mutex); 992331580Shselasky if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) { 993331580Shselasky dev_warn(&dev->pdev->dev, "%s: interface is up, NOP\n", 994331580Shselasky __func__); 995331580Shselasky goto out; 996331580Shselasky } 997331580Shselasky 998290650Shselasky device_printf((&pdev->dev)->bsddev, "INFO: ""firmware version: %d.%d.%d\n", fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev)); 999290650Shselasky 1000306233Shselasky /* 1001306233Shselasky * On load removing any previous indication of internal error, 1002306233Shselasky * device is up 1003306233Shselasky */ 1004306233Shselasky dev->state = MLX5_DEVICE_STATE_UP; 1005306233Shselasky 1006290650Shselasky err = mlx5_cmd_init(dev); 1007290650Shselasky if (err) { 1008290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed initializing command interface, aborting\n"); 1009331580Shselasky goto out_err; 1010290650Shselasky } 1011290650Shselasky 1012290650Shselasky err = wait_fw_init(dev, FW_INIT_TIMEOUT_MILI); 1013290650Shselasky if (err) { 1014290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""Firmware over %d MS in initializing state, aborting\n", FW_INIT_TIMEOUT_MILI); 1015290650Shselasky goto err_cmd_cleanup; 1016290650Shselasky } 1017290650Shselasky 1018290650Shselasky err = mlx5_core_enable_hca(dev); 1019290650Shselasky if (err) { 1020290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""enable hca failed\n"); 1021331810Shselasky goto err_cmd_cleanup; 1022290650Shselasky } 1023290650Shselasky 1024290650Shselasky err = mlx5_core_set_issi(dev); 1025290650Shselasky if (err) { 1026290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to set issi\n"); 1027290650Shselasky goto err_disable_hca; 1028290650Shselasky } 1029290650Shselasky 1030290650Shselasky err = mlx5_pagealloc_start(dev); 1031290650Shselasky if (err) { 1032290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_pagealloc_start failed\n"); 1033290650Shselasky goto err_disable_hca; 1034290650Shselasky } 1035290650Shselasky 1036290650Shselasky err = mlx5_satisfy_startup_pages(dev, 1); 1037290650Shselasky if (err) { 1038290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to allocate boot pages\n"); 1039290650Shselasky goto err_pagealloc_stop; 1040290650Shselasky } 1041290650Shselasky 1042329209Shselasky err = set_hca_ctrl(dev); 1043329209Shselasky if (err) { 1044329209Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""set_hca_ctrl failed\n"); 1045329209Shselasky goto reclaim_boot_pages; 1046329209Shselasky } 1047329209Shselasky 1048306233Shselasky err = handle_hca_cap(dev); 1049290650Shselasky if (err) { 1050306233Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap failed\n"); 1051290650Shselasky goto reclaim_boot_pages; 1052290650Shselasky } 1053290650Shselasky 1054329209Shselasky err = handle_hca_cap_atomic(dev); 1055290650Shselasky if (err) { 1056329209Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap_atomic failed\n"); 1057290650Shselasky goto reclaim_boot_pages; 1058290650Shselasky } 1059290650Shselasky 1060290650Shselasky err = mlx5_satisfy_startup_pages(dev, 0); 1061290650Shselasky if (err) { 1062290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to allocate init pages\n"); 1063290650Shselasky goto reclaim_boot_pages; 1064290650Shselasky } 1065290650Shselasky 1066290650Shselasky err = mlx5_cmd_init_hca(dev); 1067290650Shselasky if (err) { 1068290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""init hca failed\n"); 1069290650Shselasky goto reclaim_boot_pages; 1070290650Shselasky } 1071290650Shselasky 1072290650Shselasky mlx5_start_health_poll(dev); 1073290650Shselasky 1074331810Shselasky if (boot && mlx5_init_once(dev, priv)) { 1075331810Shselasky dev_err(&pdev->dev, "sw objs init failed\n"); 1076290650Shselasky goto err_stop_poll; 1077290650Shselasky } 1078290650Shselasky 1079290650Shselasky err = mlx5_enable_msix(dev); 1080290650Shselasky if (err) { 1081290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""enable msix failed\n"); 1082331810Shselasky goto err_cleanup_once; 1083290650Shselasky } 1084290650Shselasky 1085290650Shselasky err = mlx5_alloc_uuars(dev, &priv->uuari); 1086290650Shselasky if (err) { 1087290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed allocating uar, aborting\n"); 1088331810Shselasky goto err_disable_msix; 1089290650Shselasky } 1090290650Shselasky 1091290650Shselasky err = mlx5_start_eqs(dev); 1092290650Shselasky if (err) { 1093290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to start pages and async EQs\n"); 1094290650Shselasky goto err_free_uar; 1095290650Shselasky } 1096290650Shselasky 1097290650Shselasky err = alloc_comp_eqs(dev); 1098290650Shselasky if (err) { 1099290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to alloc completion EQs\n"); 1100290650Shselasky goto err_stop_eqs; 1101290650Shselasky } 1102290650Shselasky 1103290650Shselasky if (map_bf_area(dev)) 1104290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to map blue flame area\n"); 1105290650Shselasky 1106329200Shselasky err = mlx5_init_fs(dev); 1107329200Shselasky if (err) { 1108329200Shselasky mlx5_core_err(dev, "flow steering init %d\n", err); 1109331810Shselasky goto err_free_comp_eqs; 1110329200Shselasky } 1111329200Shselasky 1112341958Shselasky err = mlx5_fpga_device_start(dev); 1113341958Shselasky if (err) { 1114341958Shselasky dev_err(&pdev->dev, "fpga device start failed %d\n", err); 1115341958Shselasky goto err_fpga_start; 1116341958Shselasky } 1117341958Shselasky 1118331580Shselasky err = mlx5_register_device(dev); 1119331580Shselasky if (err) { 1120331580Shselasky dev_err(&pdev->dev, "mlx5_register_device failed %d\n", err); 1121331810Shselasky goto err_fs; 1122331580Shselasky } 1123331580Shselasky 1124331580Shselasky set_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); 1125331580Shselasky 1126331580Shselaskyout: 1127331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1128290650Shselasky return 0; 1129290650Shselasky 1130341958Shselaskyerr_fpga_start: 1131331810Shselaskyerr_fs: 1132331580Shselasky mlx5_cleanup_fs(dev); 1133331810Shselasky 1134331810Shselaskyerr_free_comp_eqs: 1135331810Shselasky free_comp_eqs(dev); 1136329200Shselasky unmap_bf_area(dev); 1137329200Shselasky 1138290650Shselaskyerr_stop_eqs: 1139290650Shselasky mlx5_stop_eqs(dev); 1140290650Shselasky 1141290650Shselaskyerr_free_uar: 1142290650Shselasky mlx5_free_uuars(dev, &priv->uuari); 1143290650Shselasky 1144331810Shselaskyerr_disable_msix: 1145290650Shselasky mlx5_disable_msix(dev); 1146290650Shselasky 1147331810Shselaskyerr_cleanup_once: 1148331810Shselasky if (boot) 1149331810Shselasky mlx5_cleanup_once(dev); 1150331810Shselasky 1151290650Shselaskyerr_stop_poll: 1152341934Shselasky mlx5_stop_health_poll(dev, boot); 1153290650Shselasky if (mlx5_cmd_teardown_hca(dev)) { 1154290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""tear_down_hca failed, skip cleanup\n"); 1155331580Shselasky goto out_err; 1156290650Shselasky } 1157290650Shselasky 1158290650Shselaskyreclaim_boot_pages: 1159290650Shselasky mlx5_reclaim_startup_pages(dev); 1160290650Shselasky 1161290650Shselaskyerr_pagealloc_stop: 1162290650Shselasky mlx5_pagealloc_stop(dev); 1163290650Shselasky 1164290650Shselaskyerr_disable_hca: 1165290650Shselasky mlx5_core_disable_hca(dev); 1166290650Shselasky 1167290650Shselaskyerr_cmd_cleanup: 1168290650Shselasky mlx5_cmd_cleanup(dev); 1169290650Shselasky 1170331580Shselaskyout_err: 1171331580Shselasky dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; 1172331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1173290650Shselasky 1174290650Shselasky return err; 1175290650Shselasky} 1176290650Shselasky 1177331810Shselaskystatic int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, 1178331810Shselasky bool cleanup) 1179290650Shselasky{ 1180331580Shselasky int err = 0; 1181290650Shselasky 1182331811Shselasky if (cleanup) 1183331811Shselasky mlx5_drain_health_recovery(dev); 1184331811Shselasky 1185331580Shselasky mutex_lock(&dev->intf_state_mutex); 1186347799Shselasky if (!test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) { 1187331580Shselasky dev_warn(&dev->pdev->dev, "%s: interface is down, NOP\n", __func__); 1188331810Shselasky if (cleanup) 1189331810Shselasky mlx5_cleanup_once(dev); 1190331580Shselasky goto out; 1191331580Shselasky } 1192331580Shselasky 1193331580Shselasky mlx5_unregister_device(dev); 1194331580Shselasky 1195341958Shselasky mlx5_fpga_device_stop(dev); 1196329200Shselasky mlx5_cleanup_fs(dev); 1197290650Shselasky unmap_bf_area(dev); 1198322144Shselasky mlx5_wait_for_reclaim_vfs_pages(dev); 1199290650Shselasky free_comp_eqs(dev); 1200290650Shselasky mlx5_stop_eqs(dev); 1201290650Shselasky mlx5_free_uuars(dev, &priv->uuari); 1202290650Shselasky mlx5_disable_msix(dev); 1203331810Shselasky if (cleanup) 1204331810Shselasky mlx5_cleanup_once(dev); 1205341934Shselasky mlx5_stop_health_poll(dev, cleanup); 1206331580Shselasky err = mlx5_cmd_teardown_hca(dev); 1207331580Shselasky if (err) { 1208290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""tear_down_hca failed, skip cleanup\n"); 1209331580Shselasky goto out; 1210290650Shselasky } 1211290650Shselasky mlx5_pagealloc_stop(dev); 1212290650Shselasky mlx5_reclaim_startup_pages(dev); 1213290650Shselasky mlx5_core_disable_hca(dev); 1214290650Shselasky mlx5_cmd_cleanup(dev); 1215290650Shselasky 1216331580Shselaskyout: 1217331580Shselasky clear_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); 1218331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1219331580Shselasky return err; 1220290650Shselasky} 1221290650Shselasky 1222331580Shselaskyvoid mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event, 1223331580Shselasky unsigned long param) 1224290650Shselasky{ 1225290650Shselasky struct mlx5_priv *priv = &dev->priv; 1226290650Shselasky struct mlx5_device_context *dev_ctx; 1227290650Shselasky unsigned long flags; 1228290650Shselasky 1229290650Shselasky spin_lock_irqsave(&priv->ctx_lock, flags); 1230290650Shselasky 1231290650Shselasky list_for_each_entry(dev_ctx, &priv->ctx_list, list) 1232290650Shselasky if (dev_ctx->intf->event) 1233290650Shselasky dev_ctx->intf->event(dev, dev_ctx->context, event, param); 1234290650Shselasky 1235290650Shselasky spin_unlock_irqrestore(&priv->ctx_lock, flags); 1236290650Shselasky} 1237290650Shselasky 1238290650Shselaskystruct mlx5_core_event_handler { 1239290650Shselasky void (*event)(struct mlx5_core_dev *dev, 1240290650Shselasky enum mlx5_dev_event event, 1241290650Shselasky void *data); 1242290650Shselasky}; 1243290650Shselasky 1244290650Shselaskystatic int init_one(struct pci_dev *pdev, 1245290650Shselasky const struct pci_device_id *id) 1246290650Shselasky{ 1247290650Shselasky struct mlx5_core_dev *dev; 1248290650Shselasky struct mlx5_priv *priv; 1249338554Shselasky device_t bsddev = pdev->dev.bsddev; 1250290650Shselasky int err; 1251290650Shselasky 1252290650Shselasky dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1253290650Shselasky priv = &dev->priv; 1254306233Shselasky if (id) 1255306233Shselasky priv->pci_dev_data = id->driver_data; 1256290650Shselasky 1257347835Shselasky if (mlx5_prof_sel < 0 || mlx5_prof_sel >= ARRAY_SIZE(profiles)) { 1258341930Shselasky device_printf(bsddev, "WARN: selected profile out of range, selecting default (%d)\n", MLX5_DEFAULT_PROF); 1259347835Shselasky mlx5_prof_sel = MLX5_DEFAULT_PROF; 1260290650Shselasky } 1261347835Shselasky dev->profile = &profiles[mlx5_prof_sel]; 1262331580Shselasky dev->pdev = pdev; 1263290650Shselasky dev->event = mlx5_core_event; 1264290650Shselasky 1265341948Shselasky /* Set desc */ 1266341948Shselasky device_set_desc(bsddev, mlx5_version); 1267341948Shselasky 1268338554Shselasky sysctl_ctx_init(&dev->sysctl_ctx); 1269338554Shselasky SYSCTL_ADD_INT(&dev->sysctl_ctx, 1270338554Shselasky SYSCTL_CHILDREN(device_get_sysctl_tree(bsddev)), 1271338554Shselasky OID_AUTO, "msix_eqvec", CTLFLAG_RDTUN, &dev->msix_eqvec, 0, 1272338554Shselasky "Maximum number of MSIX event queue vectors, if set"); 1273347862Shselasky SYSCTL_ADD_INT(&dev->sysctl_ctx, 1274347862Shselasky SYSCTL_CHILDREN(device_get_sysctl_tree(bsddev)), 1275347862Shselasky OID_AUTO, "power_status", CTLFLAG_RD, &dev->pwr_status, 0, 1276347862Shselasky "0:Invalid 1:Sufficient 2:Insufficient"); 1277347862Shselasky SYSCTL_ADD_INT(&dev->sysctl_ctx, 1278347862Shselasky SYSCTL_CHILDREN(device_get_sysctl_tree(bsddev)), 1279347862Shselasky OID_AUTO, "power_value", CTLFLAG_RD, &dev->pwr_value, 0, 1280347862Shselasky "Current power value in Watts"); 1281338554Shselasky 1282290650Shselasky INIT_LIST_HEAD(&priv->ctx_list); 1283290650Shselasky spin_lock_init(&priv->ctx_lock); 1284341930Shselasky mutex_init(&dev->pci_status_mutex); 1285341930Shselasky mutex_init(&dev->intf_state_mutex); 1286347880Shselasky mtx_init(&dev->dump_lock, "mlx5dmp", NULL, MTX_DEF | MTX_NEW); 1287331580Shselasky err = mlx5_pci_init(dev, priv); 1288290650Shselasky if (err) { 1289341930Shselasky device_printf(bsddev, "ERR: mlx5_pci_init failed %d\n", err); 1290331580Shselasky goto clean_dev; 1291290650Shselasky } 1292290650Shselasky 1293341930Shselasky err = mlx5_health_init(dev); 1294341930Shselasky if (err) { 1295341930Shselasky device_printf(bsddev, "ERR: mlx5_health_init failed %d\n", err); 1296341930Shselasky goto close_pci; 1297341930Shselasky } 1298331580Shselasky 1299331810Shselasky mlx5_pagealloc_init(dev); 1300331810Shselasky 1301331810Shselasky err = mlx5_load_one(dev, priv, true); 1302290650Shselasky if (err) { 1303341930Shselasky device_printf(bsddev, "ERR: mlx5_load_one failed %d\n", err); 1304331580Shselasky goto clean_health; 1305290650Shselasky } 1306290650Shselasky 1307331914Shselasky mlx5_fwdump_prep(dev); 1308331914Shselasky 1309347847Shselasky mlx5_firmware_update(dev); 1310347847Shselasky 1311341930Shselasky pci_save_state(bsddev); 1312290650Shselasky return 0; 1313290650Shselasky 1314331580Shselaskyclean_health: 1315331810Shselasky mlx5_pagealloc_cleanup(dev); 1316341930Shselasky mlx5_health_cleanup(dev); 1317331580Shselaskyclose_pci: 1318341930Shselasky mlx5_pci_close(dev, priv); 1319331580Shselaskyclean_dev: 1320338554Shselasky sysctl_ctx_free(&dev->sysctl_ctx); 1321347880Shselasky mtx_destroy(&dev->dump_lock); 1322290650Shselasky kfree(dev); 1323290650Shselasky return err; 1324290650Shselasky} 1325290650Shselasky 1326290650Shselaskystatic void remove_one(struct pci_dev *pdev) 1327290650Shselasky{ 1328290650Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1329331580Shselasky struct mlx5_priv *priv = &dev->priv; 1330290650Shselasky 1331331810Shselasky if (mlx5_unload_one(dev, priv, true)) { 1332331580Shselasky dev_err(&dev->pdev->dev, "mlx5_unload_one failed\n"); 1333331580Shselasky mlx5_health_cleanup(dev); 1334331580Shselasky return; 1335331580Shselasky } 1336331580Shselasky 1337331810Shselasky mlx5_pagealloc_cleanup(dev); 1338331580Shselasky mlx5_health_cleanup(dev); 1339347880Shselasky mlx5_fwdump_clean(dev); 1340331580Shselasky mlx5_pci_close(dev, priv); 1341347880Shselasky mtx_destroy(&dev->dump_lock); 1342331580Shselasky pci_set_drvdata(pdev, NULL); 1343338554Shselasky sysctl_ctx_free(&dev->sysctl_ctx); 1344290650Shselasky kfree(dev); 1345290650Shselasky} 1346290650Shselasky 1347331580Shselaskystatic pci_ers_result_t mlx5_pci_err_detected(struct pci_dev *pdev, 1348331580Shselasky pci_channel_state_t state) 1349331580Shselasky{ 1350331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1351331580Shselasky struct mlx5_priv *priv = &dev->priv; 1352331580Shselasky 1353331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1354331810Shselasky mlx5_enter_error_state(dev, false); 1355331810Shselasky mlx5_unload_one(dev, priv, false); 1356331914Shselasky 1357331582Shselasky if (state) { 1358331582Shselasky mlx5_drain_health_wq(dev); 1359331582Shselasky mlx5_pci_disable_device(dev); 1360331582Shselasky } 1361331582Shselasky 1362331580Shselasky return state == pci_channel_io_perm_failure ? 1363331580Shselasky PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET; 1364331580Shselasky} 1365331580Shselasky 1366331580Shselaskystatic pci_ers_result_t mlx5_pci_slot_reset(struct pci_dev *pdev) 1367331580Shselasky{ 1368331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1369331580Shselasky int err = 0; 1370331580Shselasky 1371331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1372331580Shselasky 1373331580Shselasky err = mlx5_pci_enable_device(dev); 1374331580Shselasky if (err) { 1375331580Shselasky dev_err(&pdev->dev, "%s: mlx5_pci_enable_device failed with error code: %d\n" 1376331580Shselasky , __func__, err); 1377331580Shselasky return PCI_ERS_RESULT_DISCONNECT; 1378331580Shselasky } 1379331580Shselasky pci_set_master(pdev); 1380331580Shselasky pci_set_powerstate(pdev->dev.bsddev, PCI_POWERSTATE_D0); 1381331580Shselasky pci_restore_state(pdev->dev.bsddev); 1382331816Shselasky pci_save_state(pdev->dev.bsddev); 1383331580Shselasky 1384331580Shselasky return err ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED; 1385331580Shselasky} 1386331580Shselasky 1387331580Shselasky/* wait for the device to show vital signs. For now we check 1388331580Shselasky * that we can read the device ID and that the health buffer 1389331580Shselasky * shows a non zero value which is different than 0xffffffff 1390331580Shselasky */ 1391331580Shselaskystatic void wait_vital(struct pci_dev *pdev) 1392331580Shselasky{ 1393331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1394331580Shselasky struct mlx5_core_health *health = &dev->priv.health; 1395331580Shselasky const int niter = 100; 1396331580Shselasky u32 count; 1397331580Shselasky u16 did; 1398331580Shselasky int i; 1399331580Shselasky 1400331580Shselasky /* Wait for firmware to be ready after reset */ 1401331580Shselasky msleep(1000); 1402331580Shselasky for (i = 0; i < niter; i++) { 1403331580Shselasky if (pci_read_config_word(pdev, 2, &did)) { 1404331580Shselasky dev_warn(&pdev->dev, "failed reading config word\n"); 1405331580Shselasky break; 1406331580Shselasky } 1407331580Shselasky if (did == pdev->device) { 1408331580Shselasky dev_info(&pdev->dev, "device ID correctly read after %d iterations\n", i); 1409331580Shselasky break; 1410331580Shselasky } 1411331580Shselasky msleep(50); 1412331580Shselasky } 1413331580Shselasky if (i == niter) 1414331580Shselasky dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__); 1415331580Shselasky 1416331580Shselasky for (i = 0; i < niter; i++) { 1417331580Shselasky count = ioread32be(health->health_counter); 1418331580Shselasky if (count && count != 0xffffffff) { 1419331580Shselasky dev_info(&pdev->dev, "Counter value 0x%x after %d iterations\n", count, i); 1420331580Shselasky break; 1421331580Shselasky } 1422331580Shselasky msleep(50); 1423331580Shselasky } 1424331580Shselasky 1425331580Shselasky if (i == niter) 1426331580Shselasky dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__); 1427331580Shselasky} 1428331580Shselasky 1429331580Shselaskystatic void mlx5_pci_resume(struct pci_dev *pdev) 1430331580Shselasky{ 1431331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1432331580Shselasky struct mlx5_priv *priv = &dev->priv; 1433331580Shselasky int err; 1434331580Shselasky 1435331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1436331580Shselasky 1437331580Shselasky wait_vital(pdev); 1438331580Shselasky 1439331810Shselasky err = mlx5_load_one(dev, priv, false); 1440331580Shselasky if (err) 1441331580Shselasky dev_err(&pdev->dev, "%s: mlx5_load_one failed with error code: %d\n" 1442331580Shselasky , __func__, err); 1443331580Shselasky else 1444331580Shselasky dev_info(&pdev->dev, "%s: device recovered\n", __func__); 1445331580Shselasky} 1446331580Shselasky 1447331580Shselaskystatic const struct pci_error_handlers mlx5_err_handler = { 1448331580Shselasky .error_detected = mlx5_pci_err_detected, 1449331580Shselasky .slot_reset = mlx5_pci_slot_reset, 1450331580Shselasky .resume = mlx5_pci_resume 1451331580Shselasky}; 1452331580Shselasky 1453331810Shselaskystatic int mlx5_try_fast_unload(struct mlx5_core_dev *dev) 1454331810Shselasky{ 1455347818Shselasky bool fast_teardown, force_teardown; 1456331810Shselasky int err; 1457331810Shselasky 1458347819Shselasky if (!mlx5_fast_unload_enabled) { 1459347819Shselasky mlx5_core_dbg(dev, "fast unload is disabled by user\n"); 1460347819Shselasky return -EOPNOTSUPP; 1461347819Shselasky } 1462347819Shselasky 1463347818Shselasky fast_teardown = MLX5_CAP_GEN(dev, fast_teardown); 1464347818Shselasky force_teardown = MLX5_CAP_GEN(dev, force_teardown); 1465347818Shselasky 1466347818Shselasky mlx5_core_dbg(dev, "force teardown firmware support=%d\n", force_teardown); 1467347818Shselasky mlx5_core_dbg(dev, "fast teardown firmware support=%d\n", fast_teardown); 1468347818Shselasky 1469347818Shselasky if (!fast_teardown && !force_teardown) 1470331810Shselasky return -EOPNOTSUPP; 1471331810Shselasky 1472331810Shselasky if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 1473331810Shselasky mlx5_core_dbg(dev, "Device in internal error state, giving up\n"); 1474331810Shselasky return -EAGAIN; 1475331810Shselasky } 1476331810Shselasky 1477341934Shselasky /* Panic tear down fw command will stop the PCI bus communication 1478341934Shselasky * with the HCA, so the health polll is no longer needed. 1479341934Shselasky */ 1480341934Shselasky mlx5_drain_health_wq(dev); 1481341934Shselasky mlx5_stop_health_poll(dev, false); 1482341934Shselasky 1483347818Shselasky err = mlx5_cmd_fast_teardown_hca(dev); 1484347818Shselasky if (!err) 1485347818Shselasky goto done; 1486347818Shselasky 1487331810Shselasky err = mlx5_cmd_force_teardown_hca(dev); 1488347818Shselasky if (!err) 1489347818Shselasky goto done; 1490331810Shselasky 1491347818Shselasky mlx5_core_dbg(dev, "Firmware couldn't do fast unload error: %d\n", err); 1492347818Shselasky mlx5_start_health_poll(dev); 1493347818Shselasky return err; 1494347818Shselaskydone: 1495331810Shselasky mlx5_enter_error_state(dev, true); 1496331810Shselasky return 0; 1497331810Shselasky} 1498331810Shselasky 1499347802Shselaskystatic void mlx5_disable_interrupts(struct mlx5_core_dev *mdev) 1500347802Shselasky{ 1501347802Shselasky int nvec = mdev->priv.eq_table.num_comp_vectors + MLX5_EQ_VEC_COMP_BASE; 1502347802Shselasky int x; 1503347802Shselasky 1504347802Shselasky mdev->priv.disable_irqs = 1; 1505347802Shselasky 1506347802Shselasky /* wait for all IRQ handlers to finish processing */ 1507347802Shselasky for (x = 0; x != nvec; x++) 1508347802Shselasky synchronize_irq(mdev->priv.msix_arr[x].vector); 1509347802Shselasky} 1510347802Shselasky 1511329211Shselaskystatic void shutdown_one(struct pci_dev *pdev) 1512329211Shselasky{ 1513331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1514331580Shselasky struct mlx5_priv *priv = &dev->priv; 1515331810Shselasky int err; 1516331580Shselasky 1517347802Shselasky /* enter polling mode */ 1518347802Shselasky mlx5_cmd_use_polling(dev); 1519347802Shselasky 1520347802Shselasky /* disable all interrupts */ 1521347802Shselasky mlx5_disable_interrupts(dev); 1522347802Shselasky 1523331810Shselasky err = mlx5_try_fast_unload(dev); 1524331810Shselasky if (err) 1525331810Shselasky mlx5_unload_one(dev, priv, false); 1526331580Shselasky mlx5_pci_disable_device(dev); 1527329211Shselasky} 1528329211Shselasky 1529290650Shselaskystatic const struct pci_device_id mlx5_core_pci_table[] = { 1530290650Shselasky { PCI_VDEVICE(MELLANOX, 4113) }, /* Connect-IB */ 1531290650Shselasky { PCI_VDEVICE(MELLANOX, 4114) }, /* Connect-IB VF */ 1532290650Shselasky { PCI_VDEVICE(MELLANOX, 4115) }, /* ConnectX-4 */ 1533290650Shselasky { PCI_VDEVICE(MELLANOX, 4116) }, /* ConnectX-4 VF */ 1534290650Shselasky { PCI_VDEVICE(MELLANOX, 4117) }, /* ConnectX-4LX */ 1535290650Shselasky { PCI_VDEVICE(MELLANOX, 4118) }, /* ConnectX-4LX VF */ 1536306233Shselasky { PCI_VDEVICE(MELLANOX, 4119) }, /* ConnectX-5 */ 1537306233Shselasky { PCI_VDEVICE(MELLANOX, 4120) }, /* ConnectX-5 VF */ 1538290650Shselasky { PCI_VDEVICE(MELLANOX, 4121) }, 1539290650Shselasky { PCI_VDEVICE(MELLANOX, 4122) }, 1540290650Shselasky { PCI_VDEVICE(MELLANOX, 4123) }, 1541290650Shselasky { PCI_VDEVICE(MELLANOX, 4124) }, 1542290650Shselasky { PCI_VDEVICE(MELLANOX, 4125) }, 1543290650Shselasky { PCI_VDEVICE(MELLANOX, 4126) }, 1544290650Shselasky { PCI_VDEVICE(MELLANOX, 4127) }, 1545290650Shselasky { PCI_VDEVICE(MELLANOX, 4128) }, 1546290650Shselasky { PCI_VDEVICE(MELLANOX, 4129) }, 1547290650Shselasky { PCI_VDEVICE(MELLANOX, 4130) }, 1548290650Shselasky { PCI_VDEVICE(MELLANOX, 4131) }, 1549290650Shselasky { PCI_VDEVICE(MELLANOX, 4132) }, 1550290650Shselasky { PCI_VDEVICE(MELLANOX, 4133) }, 1551290650Shselasky { PCI_VDEVICE(MELLANOX, 4134) }, 1552290650Shselasky { PCI_VDEVICE(MELLANOX, 4135) }, 1553290650Shselasky { PCI_VDEVICE(MELLANOX, 4136) }, 1554290650Shselasky { PCI_VDEVICE(MELLANOX, 4137) }, 1555290650Shselasky { PCI_VDEVICE(MELLANOX, 4138) }, 1556290650Shselasky { PCI_VDEVICE(MELLANOX, 4139) }, 1557290650Shselasky { PCI_VDEVICE(MELLANOX, 4140) }, 1558290650Shselasky { PCI_VDEVICE(MELLANOX, 4141) }, 1559290650Shselasky { PCI_VDEVICE(MELLANOX, 4142) }, 1560290650Shselasky { PCI_VDEVICE(MELLANOX, 4143) }, 1561290650Shselasky { PCI_VDEVICE(MELLANOX, 4144) }, 1562290650Shselasky { 0, } 1563290650Shselasky}; 1564290650Shselasky 1565290650ShselaskyMODULE_DEVICE_TABLE(pci, mlx5_core_pci_table); 1566290650Shselasky 1567331809Shselaskyvoid mlx5_disable_device(struct mlx5_core_dev *dev) 1568331809Shselasky{ 1569331809Shselasky mlx5_pci_err_detected(dev->pdev, 0); 1570331809Shselasky} 1571331809Shselasky 1572331809Shselaskyvoid mlx5_recover_device(struct mlx5_core_dev *dev) 1573331809Shselasky{ 1574331809Shselasky mlx5_pci_disable_device(dev); 1575331809Shselasky if (mlx5_pci_slot_reset(dev->pdev) == PCI_ERS_RESULT_RECOVERED) 1576331809Shselasky mlx5_pci_resume(dev->pdev); 1577331809Shselasky} 1578331809Shselasky 1579331586Shselaskystruct pci_driver mlx5_core_driver = { 1580290650Shselasky .name = DRIVER_NAME, 1581290650Shselasky .id_table = mlx5_core_pci_table, 1582329211Shselasky .shutdown = shutdown_one, 1583290650Shselasky .probe = init_one, 1584331580Shselasky .remove = remove_one, 1585331580Shselasky .err_handler = &mlx5_err_handler 1586290650Shselasky}; 1587290650Shselasky 1588290650Shselaskystatic int __init init(void) 1589290650Shselasky{ 1590290650Shselasky int err; 1591290650Shselasky 1592290650Shselasky err = pci_register_driver(&mlx5_core_driver); 1593290650Shselasky if (err) 1594331580Shselasky goto err_debug; 1595290650Shselasky 1596347871Shselasky err = mlx5_ctl_init(); 1597331586Shselasky if (err) 1598347871Shselasky goto err_ctl; 1599331586Shselasky 1600331586Shselasky return 0; 1601331586Shselasky 1602347871Shselaskyerr_ctl: 1603331586Shselasky pci_unregister_driver(&mlx5_core_driver); 1604290650Shselasky 1605290650Shselaskyerr_debug: 1606290650Shselasky return err; 1607290650Shselasky} 1608290650Shselasky 1609290650Shselaskystatic void __exit cleanup(void) 1610290650Shselasky{ 1611347871Shselasky mlx5_ctl_fini(); 1612290650Shselasky pci_unregister_driver(&mlx5_core_driver); 1613290650Shselasky} 1614290650Shselasky 1615290650Shselaskymodule_init(init); 1616290650Shselaskymodule_exit(cleanup); 1617